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@@ -3501,9 +3501,16 @@ bool Sema::checkTargetAttr(SourceLocation LiteralLoc,
StringRef AttrStr) {
return false;
}
+static bool hasStreamingModeChangeInABI(const FunctionDecl *FD) {
sdesmalen-arm wrote:
nit:
```suggestion
static bool hasArmStreamingInterfac
@@ -814,6 +820,49 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+class SMEAttributes {
sdesmalen-arm wrote:
I'd like to avoid adding another `SMEAttributes class`. Co
@@ -0,0 +1,13 @@
+// RUN: %clang --target=aarch64-none-linux-gnu -march=armv9-a+sme -O3 -S
-Xclang -verify %s
+
+// Conflicting attributes when using always_inline
+__attribute__((always_inline))
sdesmalen-arm wrote:
nit: To simplify the test, could you do somet
@@ -814,6 +820,49 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+class SMEAttributes {
+public:
+ bool IsStreaming = false;
+ bool IsStreamingCompatible = false;
+ bool HasNewZA = f
@@ -279,6 +279,12 @@ def err_builtin_needs_feature : Error<"%0 needs target
feature %1">;
def err_function_needs_feature : Error<
"always_inline function %1 requires target feature '%2', but would "
"be inlined into function %0 that is compiled without support for '%2'">;
@@ -0,0 +1,6 @@
+// RUN: %clang --target=aarch64-none-linux-gnu -march=armv9-a+sme -O3 -S
-Xclang -verify %s
sdesmalen-arm wrote:
Can you merge all these tests into a single file?
https://github.com/llvm/llvm-project/pull/77936
_
@@ -0,0 +1,7 @@
+// RUN: %clang --target=aarch64-none-linux-gnu -march=armv9-a+sme -O3 -S
-Xclang -verify %s
sdesmalen-arm wrote:
You can remove `-O3` because clang doesn't do any codegen when it has `-verify`.
https://github.com/llvm/llvm-project/pull/77936
__
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Author: Sander de Smalen
Date: 2024-02-23T11:43:55Z
New Revision: cdf19d13bf39f0679c3636eada87a5645f9a4c84
URL:
https://github.com/llvm/llvm-project/commit/cdf19d13bf39f0679c3636eada87a5645f9a4c84
DIFF:
https://github.com/llvm/llvm-project/commit/cdf19d13bf39f0679c3636eada87a5645f9a4c84.diff
L
Author: Sander de Smalen
Date: 2024-02-23T12:13:14Z
New Revision: 3b3d0978c334702114131e4dab549aa25b9f0ad4
URL:
https://github.com/llvm/llvm-project/commit/3b3d0978c334702114131e4dab549aa25b9f0ad4
DIFF:
https://github.com/llvm/llvm-project/commit/3b3d0978c334702114131e4dab549aa25b9f0ad4.diff
L
https://github.com/sdesmalen-arm requested changes to this pull request.
There isn't that much commonality factored out by these multi-classes as I had
initially hoped, but I can understand why it's difficult to group these
together in a better way.
Given the above and the fact that the origi
https://github.com/sdesmalen-arm approved this pull request.
https://github.com/llvm/llvm-project/pull/82810
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@@ -7513,6 +7516,36 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+bool IsCalleeStreaming =
+(ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask);
+bool IsC
@@ -3717,6 +3717,16 @@ def err_sme_definition_using_za_in_non_sme_target :
Error<
"function using ZA state requires 'sme'">;
def err_sme_definition_using_zt0_in_non_sme2_target : Error<
"function using ZT0 state requires 'sme2'">;
+def warn_sme_streaming_pass_return_vl_to_
@@ -12230,12 +12230,22 @@ bool Sema::CheckFunctionDeclaration(Scope *S,
FunctionDecl *NewFD,
}
// Check if the function definition uses any AArch64 SME features without
- // having the '+sme' feature enabled.
+ // having the '+sme' feature enabled and warn user if sme l
@@ -7513,6 +7516,36 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+bool IsCalleeStreaming =
+(ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask);
+bool IsC
@@ -3717,6 +3717,16 @@ def err_sme_definition_using_za_in_non_sme_target :
Error<
"function using ZA state requires 'sme'">;
def err_sme_definition_using_zt0_in_non_sme2_target : Error<
"function using ZT0 state requires 'sme2'">;
+def warn_sme_streaming_pass_return_vl_to_
@@ -7531,19 +7531,15 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
// vector lengths may be different.
if (CallerFD && Context.getTargetInfo().hasFeature("sme") && !IsBuiltin) {
ArmStreamingType CallerFnType = getArmStreamingFnType(Cal
@@ -7513,6 +7516,36 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+bool IsCalleeStreaming =
+(ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask);
+bool IsC
https://github.com/sdesmalen-arm updated
https://github.com/llvm/llvm-project/pull/79166
>From c055495729fe35c4c49a05fdc64a780b2cf72d9e Mon Sep 17 00:00:00 2001
From: Sander de Smalen
Date: Mon, 22 Jan 2024 16:50:41 +0100
Subject: [PATCH 1/3] [AArch64] Replace LLVM IR function attributes for
P
https://github.com/sdesmalen-arm updated
https://github.com/llvm/llvm-project/pull/79166
>From c055495729fe35c4c49a05fdc64a780b2cf72d9e Mon Sep 17 00:00:00 2001
From: Sander de Smalen
Date: Mon, 22 Jan 2024 16:50:41 +0100
Subject: [PATCH 1/4] [AArch64] Replace LLVM IR function attributes for
P
@@ -10702,6 +10702,14 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
parseConstraintCode(Constraint) != AArch64CC::Invalid)
return std::make_pair(unsigned(AArch64::NZCV), &AArch64::CCRRegClass);
+ if (StringRef("{za}").equals_insensitive(Constraint)) {
@@ -507,6 +507,10 @@ bool AArch64RegisterInfo::isAsmClobberable(const
MachineFunction &MF,
MCRegisterInfo::regsOverlap(PhysReg, AArch64::X16))
return true;
+ // ZA/ZT0 registers are reserved but may be permitted in the clobber list.
+ if (PhysReg.id() == AArch64
@@ -10702,6 +10702,14 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
parseConstraintCode(Constraint) != AArch64CC::Invalid)
return std::make_pair(unsigned(AArch64::NZCV), &AArch64::CCRRegClass);
+ if (StringRef("{za}").equals_insensitive(Constraint)) {
+
https://github.com/sdesmalen-arm edited
https://github.com/llvm/llvm-project/pull/79276
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https://github.com/sdesmalen-arm approved this pull request.
LGTM!
https://github.com/llvm/llvm-project/pull/79276
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https://github.com/sdesmalen-arm created
https://github.com/llvm/llvm-project/pull/80293
__ARM_STATE_ZA and __ARM_STATE_ZT0 are set when the compiler can parse
the "za" and "zt0" strings in the SME attributes.
__ARM_FEATURE_SME and __ARM_FEATURE_SME2 are set when the compiler can
generate cod
https://github.com/sdesmalen-arm created
https://github.com/llvm/llvm-project/pull/80295
When a function F has ZA and ZT0 state, calls another function G that only
shares ZT0 state with its caller, F will have to save ZA before the call to G,
and restore it afterwards (rather than setting up a l
https://github.com/sdesmalen-arm updated
https://github.com/llvm/llvm-project/pull/80295
>From 6759819e531424ecc84f11c493b63d3092e4cabd Mon Sep 17 00:00:00 2001
From: Sander de Smalen
Date: Thu, 1 Feb 2024 14:01:58 +
Subject: [PATCH 1/2] NFC: Refactor code in SemaChecking [to squash]
---
https://github.com/sdesmalen-arm closed
https://github.com/llvm/llvm-project/pull/80293
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@@ -2136,14 +2136,16 @@ Value *ScalarExprEmitter::VisitCastExpr(CastExpr *CE) {
// bitcast.
if (const auto *FixedSrc = dyn_cast(SrcTy)) {
if (const auto *ScalableDst = dyn_cast(DstTy))
{
-// If we are casting a fixed i8 vector to a scalable 16 x i1 predic
https://github.com/sdesmalen-arm commented:
Generalising this code makes sense, 16 should never have been hardcoded here.
Is it possible to add a test for the case where the predicate type is not
``?
> Though I do wonder if we have the bitcast on the wrong side. Maybe we should
> be casting t
https://github.com/sdesmalen-arm edited
https://github.com/llvm/llvm-project/pull/76548
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@@ -3717,6 +3717,30 @@ def err_sme_definition_using_za_in_non_sme_target :
Error<
"function using ZA state requires 'sme'">;
def err_sme_definition_using_zt0_in_non_sme2_target : Error<
"function using ZT0 state requires 'sme2'">;
+def warn_sme_streaming_caller_pass_args_t
@@ -7513,6 +7516,44 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+if (FD && CallerFD && Context.getTargetInfo().hasFeature("sme") &&
+!FD->getBuiltinID()) {
+ // If the cal
@@ -1,5 +1,6 @@
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme
-fsyntax-only -verify %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme
-fsyntax-only -verify=expected-cpp -x c++ %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gn
@@ -7513,6 +7516,44 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+if (FD && CallerFD && Context.getTargetInfo().hasFeature("sme") &&
+!FD->getBuiltinID()) {
+ // If the cal
https://github.com/sdesmalen-arm edited
https://github.com/llvm/llvm-project/pull/80681
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https://github.com/llvm/llvm-project/pull/77936
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@@ -814,6 +821,93 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+class SMEAttributes {
+public:
+ bool IsStreaming = false;
+ bool IsStreamingBody = false;
+ bool IsStreamingCompati
sdesmalen-arm wrote:
These changes are no longer necessary?
https://github.com/llvm/llvm-project/pull/77936
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@@ -279,6 +279,12 @@ def err_builtin_needs_feature : Error<"%0 needs target
feature %1">;
def err_function_needs_feature : Error<
"always_inline function %1 requires target feature '%2', but would "
"be inlined into function %0 that is compiled without support for '%2'">;
@@ -31,6 +31,7 @@ set(LLVM_LINK_COMPONENTS
Target
TargetParser
TransformUtils
+ AArch64Utils
sdesmalen-arm wrote:
This change is no longer necessary?
https://github.com/llvm/llvm-project/pull/77936
___
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@@ -15,13 +15,13 @@
#define LLVM_LIB_TARGET_AARCH64_AARCH64ISELLOWERING_H
#include "AArch64.h"
-#include "Utils/AArch64SMEAttributes.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llv
@@ -814,6 +821,93 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+class SMEAttributes {
+public:
+ bool IsStreaming = false;
+ bool IsStreamingBody = false;
+ bool IsStreamingCompati
https://github.com/sdesmalen-arm edited
https://github.com/llvm/llvm-project/pull/77936
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>From f11df4616d319d8f95ae3012ebd74e10b5072041 Mon Sep 17 00:00:00 2001
From: Sander de Smalen
Date: Mon, 22 Jan 2024 16:50:41 +0100
Subject: [PATCH 1/2] [AArch64] Replace LLVM IR function attributes for
P
https://github.com/sdesmalen-arm edited
https://github.com/llvm/llvm-project/pull/79166
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@@ -22,26 +22,32 @@ Below we describe the LLVM IR attributes and their relation
to the C/C++
level ACLE attributes:
``aarch64_pstate_sm_enabled``
-is used for functions with ``__attribute__((arm_streaming))``
+is used for functions with ``__arm_streaming``
``aarch6
@@ -1098,11 +1098,15 @@ LogicalResult
ModuleTranslation::convertOneFunction(LLVMFuncOp func) {
llvmFunc->addFnAttr("aarch64_pstate_sm_compatible");
if (func.getArmNewZa())
-llvmFunc->addFnAttr("aarch64_pstate_za_new");
- else if (func.getArmSharedZa())
-llvmFun
@@ -255,6 +255,22 @@ class AttributeCommonInfo {
return SpellingIndex != SpellingNotCalculated;
}
};
+
+enum class KeywordAttributeParseArgumentsKind { None, Optional, Required };
sdesmalen-arm wrote:
Done.
https://github.com/llvm/llvm-project/pull/7697
@@ -8806,26 +8806,90 @@ static bool MustDelayAttributeArguments(const
ParsedAttr &AL) {
return false;
}
+static bool checkArmNewAttrMutualExclusion(Sema &S, const ParsedAttr &AL,
+ const FunctionProtoType *FPT,
+
@@ -6898,13 +6941,18 @@ at the end of the function.
}];
}
-def ArmSmeNewZADocs : Documentation {
+def ArmNewDocs : Documentation {
let Category = DocCatArmSmeAttributes;
let Content = [{
-The ``__arm_new_za`` keyword applies to function declarations and specifies
-that
@@ -1,60 +1,60 @@
// RUN: %clang_cc1 -fsyntax-only -triple aarch64-none-linux-gnu
-target-feature +sme -verify=expected,notc2x -Wno-strict-prototypes %s
// RUN: %clang_cc1 -fsyntax-only -triple aarch64-none-linux-gnu
-target-feature +sme -verify=expected,c2x %s
-enum __arm_s
@@ -66,7 +66,7 @@ void test_svzero_mask_za_2(void) __arm_shared_za {
// CHECK-CXX-NEXT:tail call void @llvm.aarch64.sme.zero(i32 255)
// CHECK-CXX-NEXT:ret void
//
-void test_svzero_za(void) __arm_shared_za {
+void test_svzero_za(void) __arm_inout("za") {
--
@@ -30,7 +30,7 @@
// CPP-CHECK-NEXT:tail call void
@llvm.aarch64.sme.write.ver.vg2.nxv16i8(i32 0, i32 [[BASE:%.*]], [[TMP0]], [[TMP1]])
// CPP-CHECK-NEXT:ret void
//
-void test_svwrite_ver_za8_u8_vg2(uint32_t base, svuint8x2_t val)
__arm_streaming __arm_shared_za {
https://github.com/sdesmalen-arm closed
https://github.com/llvm/llvm-project/pull/76971
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https://github.com/llvm/llvm-project/pull/77941
>From 764e7aaecffb758e7a311c17a189ee605c623246 Mon Sep 17 00:00:00 2001
From: Sander de Smalen
Date: Thu, 4 Jan 2024 14:03:04 +
Subject: [PATCH] [Clang] Amend SME attributes with support for ZT0.
This
https://github.com/sdesmalen-arm edited
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sdesmalen-arm wrote:
> I won't approve because of the growth in FunctionProtoType — someone more
> qualified than me should sign off on that.
@AaronBallman or @erichkeane, would you be happy to sign off on this patch?
I think previously you raised concerns about the size of `ExtProtoInfo` when
https://github.com/sdesmalen-arm updated
https://github.com/llvm/llvm-project/pull/77941
>From 764e7aaecffb758e7a311c17a189ee605c623246 Mon Sep 17 00:00:00 2001
From: Sander de Smalen
Date: Thu, 4 Jan 2024 14:03:04 +
Subject: [PATCH 1/2] [Clang] Amend SME attributes with support for ZT0.
T
@@ -3145,7 +3138,7 @@ bool Sema::ParseSVEImmChecks(
return HasError;
}
-static ArmStreamingType getArmStreamingFnType(const FunctionDecl *FD) {
+Sema::ArmStreamingType Sema::getArmStreamingFnType(const FunctionDecl *FD) {
sdesmalen-arm wrote:
I don't think
@@ -812,6 +819,24 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+void AArch64TargetCodeGenInfo::checkFunctionCallABI(
+CodeGenModule &CGM, SourceLocation CallLoc, const FunctionDec
@@ -10056,7 +10056,7 @@ CodeGenFunction::getSVEOverloadTypes(const SVETypeFlags
&TypeFlags,
llvm::Type *DefaultType = getSVEType(TypeFlags);
- if (TypeFlags.isOverloadWhile())
+ if (TypeFlags.isOverloadWhile() || TypeFlags.isOverloadMultiVecCvt())
sdesma
https://github.com/sdesmalen-arm closed
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Author: Sander de Smalen
Date: 2024-01-16T11:20:59Z
New Revision: 032c832719b5b2c44b78359ed54b91964ef15b79
URL:
https://github.com/llvm/llvm-project/commit/032c832719b5b2c44b78359ed54b91964ef15b79
DIFF:
https://github.com/llvm/llvm-project/commit/032c832719b5b2c44b78359ed54b91964ef15b79.diff
L
https://github.com/sdesmalen-arm created
https://github.com/llvm/llvm-project/pull/78258
The arm_sme.td file was still using `IsSharedZA` and `IsPreservesZA`, which
should be changed to match the new state attributes added in #76971.
This patch adds `IsInZA`, `IsOutZA` and `IsInOutZA` as the s
https://github.com/sdesmalen-arm created
https://github.com/llvm/llvm-project/pull/78424
This decouples the Arm type attributes from other bits, which means
the data will only be allocated when a function uses these Arm
attributes.
The first patch adds the bit `HasArmTypeAttributes` to
`Functio
@@ -4253,7 +4260,7 @@ class FunctionProtoType final
FunctionType::ExtInfo ExtInfo;
unsigned Variadic : 1;
unsigned HasTrailingReturn : 1;
-unsigned AArch64SMEAttributes : 6;
sdesmalen-arm wrote:
Thanks for both your input! The Arm attributes wi
https://github.com/sdesmalen-arm approved this pull request.
LGTM, thanks!
https://github.com/llvm/llvm-project/pull/78430
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https://github.com/llvm/llvm-project/pull/77941
>From 3be3f5f3a0176ec704c516961e1eff0d3713b084 Mon Sep 17 00:00:00 2001
From: Sander de Smalen
Date: Thu, 4 Jan 2024 14:03:04 +
Subject: [PATCH 1/2] [Clang] Amend SME attributes with support for ZT0.
T
sdesmalen-arm wrote:
[rebased patch on top of #78424]
With the contentious part of adding new bits addressed in #78424 and
@rsandifo-arm having reviewed and informally accepted the Arm/ZT0 side of the
changes in this pull-request, are you happy to formally accept this PR
@erichkeane / @AaronB
sdesmalen-arm wrote:
> There's no general rule that forbids taking the address of an always_inline
> function. So if a user really wants to, they can call a mismatched
> always_inline function anyway. Given that, making this a hard error seems a
> bit dubious; it should probably be a warning i
@@ -760,8 +760,9 @@ KEYWORD(__builtin_available , KEYALL)
KEYWORD(__builtin_sycl_unique_stable_name, KEYSYCL)
// Keywords defined by Attr.td.
+// The "EMPTY ## X" is used to prevent early macro-expansion of the keyword.
#ifndef KEYWORD_ATTRIBUTE
-#define KEYWORD_
@@ -760,8 +760,9 @@ KEYWORD(__builtin_available , KEYALL)
KEYWORD(__builtin_sycl_unique_stable_name, KEYSYCL)
// Keywords defined by Attr.td.
+// The "EMPTY ## X" is used to prevent early macro-expansion of the keyword.
#ifndef KEYWORD_ATTRIBUTE
-#define KEYWORD_
https://github.com/sdesmalen-arm approved this pull request.
https://github.com/llvm/llvm-project/pull/78704
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https://github.com/sdesmalen-arm updated
https://github.com/llvm/llvm-project/pull/78258
>From 545866d530ebeab04384ce85e61a7eb29d343167 Mon Sep 17 00:00:00 2001
From: Sander de Smalen
Date: Mon, 15 Jan 2024 16:06:36 +
Subject: [PATCH 1/2] [Clang] Refactor diagnostics for SME builtins.
The
@@ -1720,21 +1720,29 @@ void SVEEmitter::createBuiltinZAState(raw_ostream &OS) {
for (auto *R : RV)
createIntrinsic(R, Defs);
- std::map> DefsZAState;
-
- uint64_t IsSharedZAFlag = getEnumValueForFlag("IsSharedZA");
+ std::map> IntrinsicsPerState;
for (auto &Def :
@@ -3005,6 +3005,15 @@ enum ArmStreamingType {
ArmStreamingOrSVE2p1
};
+enum ArmSMEState : unsigned {
+ ArmNoState = 0,
+
+ ArmInZA = 0b01,
+ ArmOutZA = 0b10,
+ ArmInOutZA = 0b11,
+ ArmZAMask = 0b11,
sdesmalen-arm wrote:
I'm not really convinced that's
@@ -342,331 +342,331 @@ let TargetGuard = "sme2" in {
//
let TargetGuard = "sme2" in {
- def SVSMOPA : Inst<"svmopa_za32[_{d}]_m", "viPPdd", "s", MergeNone,
"aarch64_sme_smopa_za32", [IsSharedZA, IsStreaming], [ImmCheck<0,
ImmCheck0_3>]>;
- def SVUSMOPA : Inst<"svmopa_za3
@@ -342,331 +342,331 @@ let TargetGuard = "sme2" in {
//
let TargetGuard = "sme2" in {
- def SVSMOPA : Inst<"svmopa_za32[_{d}]_m", "viPPdd", "s", MergeNone,
"aarch64_sme_smopa_za32", [IsSharedZA, IsStreaming], [ImmCheck<0,
ImmCheck0_3>]>;
- def SVUSMOPA : Inst<"svmopa_za3
@@ -136,10 +136,10 @@ defm SVWRITE_ZA128 : ZAWrite<"za128", "csilUcUsUiUlhbfd",
"aarch64_sme_writeq",
let TargetGuard = "sme" in {
def SVZERO_MASK_ZA : SInst<"svzero_mask_za", "vi", "", MergeNone,
"aarch64_sme_zero",
- [IsOverloadNone, IsStreami
@@ -814,6 +821,42 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+void AArch64TargetCodeGenInfo::checkFunctionCallABI(
+CodeGenModule &CGM, SourceLocation CallLoc, const FunctionDec
@@ -814,6 +821,42 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+void AArch64TargetCodeGenInfo::checkFunctionCallABI(
+CodeGenModule &CGM, SourceLocation CallLoc, const FunctionDec
sdesmalen-arm wrote:
It seems wrong to move the header files to llvm/include/llvm/Support, but to
leave the implementation in llvm/lib/AArch64 (which ends up in a different
library). If you move the corresponding .cpp file to llvm/lib/Support then you
don't n
sdesmalen-arm wrote:
> > Separately, it's probably worth ensuring that the LLVM inlining passes
> > don't actually perform illegal inlining for functions marked always_inline;
> > looking at the code, it looks like we might end up skipping the relevant
> > checks.
>
> The `TargetTransformInfo
https://github.com/sdesmalen-arm closed
https://github.com/llvm/llvm-project/pull/78258
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https://github.com/sdesmalen-arm approved this pull request.
LGTM!
https://github.com/llvm/llvm-project/pull/77947
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https://github.com/sdesmalen-arm updated
https://github.com/llvm/llvm-project/pull/77941
>From 34da3f6446c826ec1d2c7f6eb8020d1c18146b51 Mon Sep 17 00:00:00 2001
From: Sander de Smalen
Date: Thu, 4 Jan 2024 14:03:04 +
Subject: [PATCH 1/3] [Clang] Amend SME attributes with support for ZT0.
T
https://github.com/sdesmalen-arm updated
https://github.com/llvm/llvm-project/pull/77941
>From c02435b095996fba3f34b13fad20b01849cee8e6 Mon Sep 17 00:00:00 2001
From: Sander de Smalen
Date: Thu, 4 Jan 2024 14:03:04 +
Subject: [PATCH 1/3] [Clang] Amend SME attributes with support for ZT0.
T
https://github.com/sdesmalen-arm closed
https://github.com/llvm/llvm-project/pull/77941
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https://github.com/sdesmalen-arm created
https://github.com/llvm/llvm-project/pull/79140
Similar to what we did for ZA, this patch adds diagnostics to flag when using a
ZT0 builtin in a function that does not have ZT0 state.
>From 7bd053d35ad114a2f95281abd22a9c4e963cca36 Mon Sep 17 00:00:00 20
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