[llvm] [clang] [AArch64][SME] Implement inline-asm clobbers for za/zt0 (PR #79276)

[Sander de Smalen via cfe-commits]

================
@@ -10702,6 +10702,14 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
       parseConstraintCode(Constraint) != AArch64CC::Invalid)
     return std::make_pair(unsigned(AArch64::NZCV), &AArch64::CCRRegClass);
 
+  if (StringRef("{za}").equals_insensitive(Constraint)) {
+    return std::make_pair(unsigned(AArch64::ZA), &AArch64::MPRRegClass);
+  }
+
+  if (StringRef("{zt0}").equals_insensitive(Constraint)) {
----------------
sdesmalen-arm wrote:

```suggestion
  if (Constraint == "zt0") {
```
?

https://github.com/llvm/llvm-project/pull/79276
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