@@ -4825,6 +4827,72 @@ SDValue AArch64TargetLowering::getPStateSM(SelectionDAG
&DAG, SDValue Chain,
Mask);
}
+SDValue LowerSMELdrStr(SDValue N, SelectionDAG &DAG, bool IsLoad) {
+ // Lower an SME LDR/STR ZA intrinsic to LDR_ZA_PSEUDO or STR_ZA.
+ // If
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68565
>From de07976922782b9dcf5d13d44551b782dc8b3b94 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/6] [AArch64][SME] Remove immediate argument restriction for
sv
@@ -1741,6 +1742,69 @@ void AArch64DAGToDAGISel::SelectCVTIntrinsic(SDNode *N,
unsigned NumVecs,
CurDAG->RemoveDeadNode(N);
}
+void AArch64DAGToDAGISel::SelectSMELdrStrZA(SDNode *N, bool IsLoad) {
+ // Lower an SME LDR/STR ZA intrinsic to LDR_ZA_PSEUDO or STR_ZA.
+ // If
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68565
>From de07976922782b9dcf5d13d44551b782dc8b3b94 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/7] [AArch64][SME] Remove immediate argument restriction for
sv
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68565
>From de07976922782b9dcf5d13d44551b782dc8b3b94 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/9] [AArch64][SME] Remove immediate argument restriction for
sv
@@ -4825,6 +4827,72 @@ SDValue AArch64TargetLowering::getPStateSM(SelectionDAG
&DAG, SDValue Chain,
Mask);
}
+SDValue LowerSMELdrStr(SDValue N, SelectionDAG &DAG, bool IsLoad) {
+ // Lower an SME LDR/STR ZA intrinsic to LDR_ZA_PSEUDO or STR_ZA.
+ // If
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68565
>From de07976922782b9dcf5d13d44551b782dc8b3b94 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 01/10] [AArch64][SME] Remove immediate argument restriction
for
https://github.com/SamTebbs33 approved this pull request.
https://github.com/llvm/llvm-project/pull/71176
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@@ -296,5 +296,28 @@ multiclass ZAAddSub {
}
}
+
+// SME2 - MIN, MAX
+
+multiclass MinMaxIntr {
+ def SVS # NAME : SInst<"sv" # i # "[" # zm # "_{d}_" # mul # "]", t, "csil",
MergeNone, "aa
https://github.com/SamTebbs33 created
https://github.com/llvm/llvm-project/pull/71707
Adds the following SME2 builtins:
svminnm_single_f(16|32|64)_x(2|4)
svminnm_f(16|32|64)_x(2|4)
svmaxnm_single_f(16|32|64)_x(2|4)
svmaxnm_f(16|32|64)_x(2|4)
See
[ARM-software/acle#217](https://github.com/ARM-s
SamTebbs33 wrote:
Considering the definitions are commented out, are these changes necessary?
https://github.com/llvm/llvm-project/pull/71795
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https://github.com/SamTebbs33 created
https://github.com/llvm/llvm-project/pull/71927
This patch enables the following builtins for SME2
svbfmlslb_f32
svbfmlslb_lane_f32
svbfmlslt_f32
svbfmlslt_lane_f32
Patch by: Kerry McLaughlin
>From ff33739706ce758f416153aa3cdb7c632e068da3
https://github.com/SamTebbs33 edited
https://github.com/llvm/llvm-project/pull/71688
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https://github.com/SamTebbs33 approved this pull request.
Nice one, looks good to me.
https://github.com/llvm/llvm-project/pull/71795
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@@ -1987,8 +1987,26 @@ defm SVREVD : SInstZPZ<"svrevd", "csilUcUsUiUl",
"aarch64_sve_revd">;
// SME intrinsics which operate only on vectors and do not require ZA should
be added here,
// as they could possibly become SVE instructions in the future.
+multiclass MinMaxIntr {
https://github.com/SamTebbs33 closed
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SamTebbs33 wrote:
> FYI I pushed
> [3a9cc17](https://github.com/llvm/llvm-project/commit/3a9cc17ca088267348e4b4a6e64a88a38ae9c6e4)
> to hopefully unbreak the build.
Thank you!
https://github.com/llvm/llvm-project/pull/71688
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https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/71927
>From ff33739706ce758f416153aa3cdb7c632e068da3 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Thu, 9 Nov 2023 17:39:26 +
Subject: [PATCH 1/2] [AArch64][SME2] Enable bfm builtings for sme2
This patch en
@@ -1992,3 +1986,12 @@ let TargetGuard = "sme2" in {
def SVADD_SINGLE_X2 : SInst<"svadd[_single_{d}_x2]", "22d", "cUcsUsiUilUl",
MergeNone, "aarch64_sve_add_single_x2", [IsStreaming], []>;
def SVADD_SINGLE_X4 : SInst<"svadd[_single_{d}_x4]", "44d", "cUcsUsiUilUl",
MergeNon
https://github.com/SamTebbs33 approved this pull request.
https://github.com/llvm/llvm-project/pull/71953
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https://github.com/SamTebbs33 edited
https://github.com/llvm/llvm-project/pull/66525
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https://github.com/SamTebbs33 approved this pull request.
Thanks Momchil. This looks good to me with a couple of questions. The tests are
comprehensive as well.
https://github.com/llvm/llvm-project/pull/66525
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@@ -861,6 +861,12 @@ def AArch64stilp : SDNode<"AArch64ISD::STILP",
SDT_AArch64stilp, [SDNPHasChain,
def AArch64stnp : SDNode<"AArch64ISD::STNP", SDT_AArch64stnp, [SDNPHasChain,
SDNPMayStore, SDNPMemOperand]>;
def AArch64tbl : SDNode<"AArch64ISD::TBL", SDT_AArch64TBL>;
+
+de
@@ -9461,6 +9462,94 @@ bool AArch64InstrInfo::isReallyTriviallyReMaterializable(
return TargetInstrInfo::isReallyTriviallyReMaterializable(MI);
}
+MachineBasicBlock::iterator
+AArch64InstrInfo::probedStackAlloc(MachineBasicBlock::iterator MBBI,
SamTebbs33 wr
@@ -4825,6 +4827,113 @@ SDValue AArch64TargetLowering::getPStateSM(SelectionDAG
&DAG, SDValue Chain,
Mask);
}
+// Lower an SME LDR/STR ZA intrinsic to LDR_ZA_PSEUDO or STR_ZA.
+// Case 1: If the vector number (vecnum) is an immediate in range, it gets
+//
https://github.com/SamTebbs33 approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/71191
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https://github.com/SamTebbs33 approved this pull request.
Looks good to me :+1:
https://github.com/llvm/llvm-project/pull/68993
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@@ -1992,3 +1986,12 @@ let TargetGuard = "sme2" in {
def SVADD_SINGLE_X2 : SInst<"svadd[_single_{d}_x2]", "22d", "cUcsUsiUilUl",
MergeNone, "aarch64_sve_add_single_x2", [IsStreaming], []>;
def SVADD_SINGLE_X4 : SInst<"svadd[_single_{d}_x4]", "44d", "cUcsUsiUilUl",
MergeNon
@@ -2,10 +2,15 @@
// REQUIRES: aarch64-registered-target
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu
-target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s
| opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
+/
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68565
>From de07976922782b9dcf5d13d44551b782dc8b3b94 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 01/11] [AArch64][SME] Remove immediate argument restriction
for
@@ -289,7 +283,7 @@ ARM_STREAMING_ATTR void test_svst1_ver_vnum_za64(uint32_t
slice_base, svbool_t p
// CHECK-CXX-NEXT:tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], ptr [[TMP2]], i32 15, i32 [[SLICE_BASE]])
// CHECK-CXX-NEXT:ret void
//
-ARM_STREAMING_ATTR void
@@ -6,20 +6,20 @@
#include
__attribute__((target("sme")))
-void test_sme(svbool_t pg, void *ptr) {
+void test_sme(svbool_t pg, void *ptr) __arm_streaming {
svld1_hor_za8(0, 0, pg, ptr);
}
__attribute__((target("arch=armv8-a+sme")))
-void test_arch_sme(svbool_t pg, void
@@ -2995,6 +2995,134 @@ static QualType getNeonEltType(NeonTypeFlags Flags,
ASTContext &Context,
enum ArmStreamingType { ArmNonStreaming, ArmStreaming, ArmStreamingCompatible
};
+bool Sema::ParseSVEImmChecks(
+CallExpr *TheCall, SmallVector, 3> &ImmChecks) {
+ // Perfo
@@ -289,7 +283,7 @@ ARM_STREAMING_ATTR void test_svst1_ver_vnum_za64(uint32_t
slice_base, svbool_t p
// CHECK-CXX-NEXT:tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], ptr [[TMP2]], i32 15, i32 [[SLICE_BASE]])
// CHECK-CXX-NEXT:ret void
//
-ARM_STREAMING_ATTR void
@@ -3023,6 +3151,66 @@ static void checkArmStreamingBuiltin(Sema &S, CallExpr
*TheCall,
<< TheCall->getSourceRange() << "streaming compatible";
return;
}
+
+ if (FnType == ArmNonStreaming && BuiltinType == ArmStreaming) {
+S.Diag(TheCall->getBeginLoc(),
dia
@@ -3183,6 +3140,114 @@ bool Sema::CheckSVEBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
return HasError;
}
+static ArmStreamingType getArmStreamingFnType(const FunctionDecl *FD) {
+ if (FD->hasAttr())
+return ArmStreaming;
+ if (const auto *T = FD->get
@@ -3172,6 +3117,18 @@ bool Sema::CheckSVEBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
if (SemaBuiltinConstantArgRange(TheCall, ArgNum, 0, 255))
HasError = true;
break;
+case SVETypeFlags::ImmCheck1_1:
SamTebbs33 wrote:
@@ -3183,6 +3140,114 @@ bool Sema::CheckSVEBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
return HasError;
}
+static ArmStreamingType getArmStreamingFnType(const FunctionDecl *FD) {
+ if (FD->hasAttr())
+return ArmStreaming;
+ if (const auto *T = FD->get
https://github.com/SamTebbs33 approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/74720
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@@ -3058,6 +3058,11 @@ bool Sema::ParseSVEImmChecks(
if (SemaBuiltinConstantArgRange(TheCall, ArgNum, 1, 7))
HasError = true;
break;
+case SVETypeFlags::ImmCheck2_4_Mul2:
SamTebbs33 wrote:
I think you were looking at an old commit as I
@@ -20,3 +21,23 @@ int16x8_t incompat_neon_smc(int16x8_t splat)
__arm_streaming_compatible {
// expected-warning@+1 {{builtin call has undefined behaviour when called
from a streaming compatible function}}
return (int16x8_t)__builtin_neon_vqaddq_v((int8x16_t)splat,
(int8x
@@ -6,20 +6,21 @@
#include
__attribute__((target("sme")))
-void test_sme(svbool_t pg, void *ptr) {
+void test_sme(svbool_t pg, void *ptr) __arm_streaming __arm_shared_za {
svld1_hor_za8(0, 0, pg, ptr);
}
__attribute__((target("arch=armv8-a+sme")))
-void test_arch_sme(s
@@ -18,7 +18,7 @@
// CHECK-CXX-NEXT:tail call void @llvm.aarch64.sme.zero(i32 0)
// CHECK-CXX-NEXT:ret void
//
-void test_svzero_mask_za() {
+__arm_new_za void test_svzero_mask_za() {
SamTebbs33 wrote:
I did try `__arm_shared_za` but got
> '__arm_sha
@@ -3168,11 +3168,70 @@ static void checkArmStreamingBuiltin(Sema &S, CallExpr
*TheCall,
<< TheCall->getSourceRange() << "streaming compatible";
return;
}
+
+ if (FnType == ArmNonStreaming && BuiltinType == ArmStreaming) {
+S.Diag(TheCall->getBeginLoc(),
di
@@ -1375,6 +1381,12 @@ void SVEEmitter::createHeader(raw_ostream &OS) {
OS << "#define __aio static __inline__ __attribute__((__always_inline__, "
"__nodebug__, __overloadable__))\n\n";
+ OS << "#ifdef __ARM_FEATURE_SME\n";
+ OS << "#define __asc __attribute__((arm
@@ -500,6 +506,12 @@ bool ClangTableGenMain(raw_ostream &OS, RecordKeeper
&Records) {
case GenArmSmeRangeChecks:
EmitSmeRangeChecks(Records, OS);
break;
+ case GenArmSmeStreamingAttrs:
SamTebbs33 wrote:
I remember you suggesting that we have the SM
@@ -3168,11 +3168,70 @@ static void checkArmStreamingBuiltin(Sema &S, CallExpr
*TheCall,
<< TheCall->getSourceRange() << "streaming compatible";
return;
}
+
+ if (FnType == ArmNonStreaming && BuiltinType == ArmStreaming) {
+S.Diag(TheCall->getBeginLoc(),
di
@@ -20,3 +21,23 @@ int16x8_t incompat_neon_smc(int16x8_t splat)
__arm_streaming_compatible {
// expected-warning@+1 {{builtin call has undefined behaviour when called
from a streaming compatible function}}
return (int16x8_t)__builtin_neon_vqaddq_v((int8x16_t)splat,
(int8x
@@ -500,6 +506,12 @@ bool ClangTableGenMain(raw_ostream &OS, RecordKeeper
&Records) {
case GenArmSmeRangeChecks:
EmitSmeRangeChecks(Records, OS);
break;
+ case GenArmSmeStreamingAttrs:
SamTebbs33 wrote:
Done
https://github.com/llvm/llvm-project/pu
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68565
>From 83e20904c206980285c4ee9d0227706803147654 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 01/12] [AArch64][SME] Remove immediate argument restriction
for
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/71927
>From ff33739706ce758f416153aa3cdb7c632e068da3 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Thu, 9 Nov 2023 17:39:26 +
Subject: [PATCH 1/4] [AArch64][SME2] Enable bfm builtings for sme2
This patch en
@@ -4850,6 +4852,93 @@ SDValue AArch64TargetLowering::getPStateSM(SelectionDAG
&DAG, SDValue Chain,
Mask);
}
+// Lower an SME LDR/STR ZA intrinsic to LDR_ZA_PSEUDO or STR_ZA.
SamTebbs33 wrote:
And it's no longer precise as we lower it to
@@ -4850,6 +4852,93 @@ SDValue AArch64TargetLowering::getPStateSM(SelectionDAG
&DAG, SDValue Chain,
Mask);
}
+// Lower an SME LDR/STR ZA intrinsic to LDR_ZA_PSEUDO or STR_ZA.
+// Case 1: If the vector number (vecnum) is an immediate in range, it gets
+//
SamTebbs33 wrote:
> Thanks for all the changes! LGTM with few little nits addressed.
Thanks!
https://github.com/llvm/llvm-project/pull/68565
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https://github.com/llvm/llvm-project/pull/68565
>From 83e20904c206980285c4ee9d0227706803147654 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 01/13] [AArch64][SME] Remove immediate argument restriction
for
https://github.com/SamTebbs33 closed
https://github.com/llvm/llvm-project/pull/71707
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@@ -292,7 +292,42 @@ define void @ldr_with_off_16mulvl(ptr %ptr) {
%vscale = call i64 @llvm.vscale.i64()
%mulvl = mul i64 %vscale, 256
%base = getelementptr i8, ptr %ptr, i64 %mulvl
- call void @llvm.aarch64.sme.ldr(i32 16, ptr %base)
+ call void @llvm.aarch64.sme.ldr(i
@@ -1741,6 +1742,54 @@ void AArch64DAGToDAGISel::SelectCVTIntrinsic(SDNode *N,
unsigned NumVecs,
CurDAG->RemoveDeadNode(N);
}
+void AArch64DAGToDAGISel::SelectSMELdrStrZA(SDNode *N, bool IsLoad) {
+ // Lower an SME LDR/STR ZA intrinsic to LDR_ZA_PSEUDO or STR_ZA.
+ // If
https://github.com/SamTebbs33 approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/70809
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@@ -1741,6 +1742,54 @@ void AArch64DAGToDAGISel::SelectCVTIntrinsic(SDNode *N,
unsigned NumVecs,
CurDAG->RemoveDeadNode(N);
}
+void AArch64DAGToDAGISel::SelectSMELdrStrZA(SDNode *N, bool IsLoad) {
+ // Lower an SME LDR/STR ZA intrinsic to LDR_ZA_PSEUDO or STR_ZA.
+ // If
https://github.com/SamTebbs33 edited
https://github.com/llvm/llvm-project/pull/68565
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https://github.com/llvm/llvm-project/pull/68565
>From de07976922782b9dcf5d13d44551b782dc8b3b94 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/5] [AArch64][SME] Remove immediate argument restriction for
sv
SamTebbs33 wrote:
I've changed the approach to consider immediates outside of 0-15 and fixed the
issue of the tile slice not being updated. Please let me know what you think.
https://github.com/llvm/llvm-project/pull/68565
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https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68565
>From de07976922782b9dcf5d13d44551b782dc8b3b94 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/4] [AArch64][SME] Remove immediate argument restriction for
sv
@@ -1741,6 +1742,69 @@ void AArch64DAGToDAGISel::SelectCVTIntrinsic(SDNode *N,
unsigned NumVecs,
CurDAG->RemoveDeadNode(N);
}
+void AArch64DAGToDAGISel::SelectSMELdrStrZA(SDNode *N, bool IsLoad) {
+ // Lower an SME LDR/STR ZA intrinsic to LDR_ZA_PSEUDO or STR_ZA.
+ // If
@@ -292,23 +292,101 @@ define void @ldr_with_off_16mulvl(ptr %ptr) {
%vscale = call i64 @llvm.vscale.i64()
%mulvl = mul i64 %vscale, 256
%base = getelementptr i8, ptr %ptr, i64 %mulvl
- call void @llvm.aarch64.sme.ldr(i32 16, ptr %base)
+ call void @llvm.aarch64.sme.ldr
https://github.com/SamTebbs33 approved this pull request.
Looks good to me.
https://github.com/llvm/llvm-project/pull/75075
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@@ -1694,6 +1697,61 @@ void SVEEmitter::createSMERangeChecks(raw_ostream &OS) {
OS << "#endif\n\n";
}
+void SVEEmitter::createStreamingAttrs(raw_ostream &OS, ACLEKind Kind) {
+ std::vector RV = Records.getAllDerivedDefinitions("Inst");
+ SmallVector, 128> Defs;
+ for (aut
@@ -3168,9 +3167,60 @@ static void checkArmStreamingBuiltin(Sema &S, CallExpr
*TheCall,
<< TheCall->getSourceRange() << "streaming compatible";
return;
}
+
+ if (FnType == ArmNonStreaming && BuiltinType == ArmStreaming) {
+S.Diag(TheCall->getBeginLoc(),
dia
https://github.com/SamTebbs33 closed
https://github.com/llvm/llvm-project/pull/74064
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https://github.com/llvm/llvm-project/pull/75449
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SamTebbs33 wrote:
Thanks for reporting that Nico. I've reverted the patch and will work on
improving compile time. I like your idea Sander.
https://github.com/llvm/llvm-project/pull/74064
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https:/
SamTebbs33 wrote:
Commit
[6dc8fa2](https://github.com/llvm/llvm-project/pull/75487/commits/6dc8fa2c89159d234d9477358dd1ce1cbf059865)
is the only one with new content.
[d9a8da1](https://github.com/llvm/llvm-project/pull/75487/commits/d9a8da139e93f0b3259cb22d7f4c55ed46f9f265)
is the exact same
SamTebbs33 wrote:
New PR at https://github.com/llvm/llvm-project/pull/75487
https://github.com/llvm/llvm-project/pull/74064
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SamTebbs33 wrote:
> If it's not too much trouble, could you `git cherry-pick
> c60663d128f8e0dccd418bdf16ecc403b96aa74a` into this? (Cool if not, ofc.)
Sure, I can do that. Would you also mind attempting to reproduce the compile
time with the latest commit, just to make sure it fixes the issue
@@ -1702,6 +1705,62 @@ void SVEEmitter::createSMERangeChecks(raw_ostream &OS) {
OS << "#endif\n\n";
}
+void SVEEmitter::createStreamingAttrs(raw_ostream &OS, ACLEKind Kind) {
+ std::vector RV = Records.getAllDerivedDefinitions("Inst");
+ SmallVector, 128> Defs;
+ for (aut
SamTebbs33 wrote:
@nico I tried to cherry-pick your commit
(c60663d128f8e0dccd418bdf16ecc403b96aa74a) into my branch but for some reason
it was always empty. It might be best for you to try recommitting it now.
https://github.com/llvm/llvm-project/pull/75487
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https://github.com/SamTebbs33 closed
https://github.com/llvm/llvm-project/pull/75487
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https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/71927
>From 93a02d9af1d7e4f1e23c252d72b20d292927a79f Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Thu, 9 Nov 2023 17:39:26 +
Subject: [PATCH 1/5] [AArch64][SME2] Enable bfm builtings for sme2
This patch en
@@ -1992,3 +1986,12 @@ let TargetGuard = "sme2" in {
def SVADD_SINGLE_X2 : SInst<"svadd[_single_{d}_x2]", "22d", "cUcsUsiUilUl",
MergeNone, "aarch64_sve_add_single_x2", [IsStreaming], []>;
def SVADD_SINGLE_X4 : SInst<"svadd[_single_{d}_x4]", "44d", "cUcsUsiUilUl",
MergeNon
SamTebbs33 wrote:
Rebased to fix a merge conflict and made the builtins temporarily
`IsStreamingCompatible`.
https://github.com/llvm/llvm-project/pull/71927
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https://github.com/SamTebbs33 approved this pull request.
LGTM, thanks!
https://github.com/llvm/llvm-project/pull/75584
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https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/71927
>From 93a02d9af1d7e4f1e23c252d72b20d292927a79f Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Thu, 9 Nov 2023 17:39:26 +
Subject: [PATCH 1/6] [AArch64][SME2] Enable bfm builtings for sme2
This patch en
SamTebbs33 wrote:
Should these builtins be `IsStreamingCompatible` until we add
`IsStreamingOrSVE2p1`?
https://github.com/llvm/llvm-project/pull/75821
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https://github.com/SamTebbs33 closed
https://github.com/llvm/llvm-project/pull/75805
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https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/71927
>From 93a02d9af1d7e4f1e23c252d72b20d292927a79f Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Thu, 9 Nov 2023 17:39:26 +
Subject: [PATCH 1/7] [AArch64][SME2] Enable bfm builtings for sme2
This patch en
https://github.com/SamTebbs33 closed
https://github.com/llvm/llvm-project/pull/71927
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@@ -679,6 +679,7 @@ bool AArch64TargetInfo::hasFeature(StringRef Feature) const
{
.Case("f32mm", FPU & SveMode && HasMatmulFP32)
.Case("f64mm", FPU & SveMode && HasMatmulFP64)
.Case("sve2", FPU & SveMode && HasSVE2)
+ .Case("sve2p1", HasSVE2p1)
-
@@ -8,7 +8,7 @@
// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple
aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror
-Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim |
FileCheck %s
// RUN: %clang_cc1 -f
@@ -11,10 +11,16 @@
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu
-target-feature +sve2p1 \
// RUN: -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu
-target-feature
@@ -1,14 +1,20 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// REQUIRES: aarch64-registered-target
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S
-disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S
-p
@@ -10,6 +10,10 @@
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu \
// RUN: -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - -x c++ %s |
FileCheck %s -check-prefix=CPP-CHECK
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-
https://github.com/SamTebbs33 created
https://github.com/llvm/llvm-project/pull/73672
This patch introduces a warning that is emitted when a Neon builtin is called
from a streaming function, as that situation is not supported.
Uses work by Kerry McLaughlin.
>From 96464a9c37a532216e4df6c003aa1
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/73672
>From 96464a9c37a532216e4df6c003aa1a8fcb448637 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Tue, 28 Nov 2023 16:22:32 +
Subject: [PATCH 1/2] [AArch64] Warn when calling a NEON builtin in a streaming
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/73672
>From ba3d2c36ee3268b24864466d429a30fec92a69e3 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Tue, 28 Nov 2023 16:22:32 +
Subject: [PATCH 1/4] [AArch64] Warn when calling a NEON builtin in a streaming
@@ -2993,6 +2993,47 @@ static QualType getNeonEltType(NeonTypeFlags Flags,
ASTContext &Context,
llvm_unreachable("Invalid NeonTypeFlag!");
}
+enum ArmStreamingType {
+ ArmNonStreaming,
+ ArmStreaming,
+ ArmStreamingCompatible,
+ ArmLocallyStreaming
+};
+
+static ArmStre
https://github.com/SamTebbs33 closed
https://github.com/llvm/llvm-project/pull/73672
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