This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGab7abd8bf41b: [Driver] Add support for
-msve-vector-bits=scalable. (authored by paulwalker-arm).
Repository:
rG LLVM Github Monorepo
CHANGES SINC
Author: Paul Walker
Date: 2020-07-20T10:46:22Z
New Revision: ab7abd8bf41b558aef402a21c637211760bc2739
URL:
https://github.com/llvm/llvm-project/commit/ab7abd8bf41b558aef402a21c637211760bc2739
DIFF:
https://github.com/llvm/llvm-project/commit/ab7abd8bf41b558aef402a21c637211760bc2739.diff
LOG: [
Author: Paul Walker
Date: 2020-06-06T12:31:38Z
New Revision: d6d2f78fe504fb7b749b08c10558f42180d83d73
URL:
https://github.com/llvm/llvm-project/commit/d6d2f78fe504fb7b749b08c10558f42180d83d73
DIFF:
https://github.com/llvm/llvm-project/commit/d6d2f78fe504fb7b749b08c10558f42180d83d73.diff
LOG: [
https://github.com/paulwalker-arm created
https://github.com/llvm/llvm-project/pull/74502
[LLVM][IR] Add native vector support to ConstantInt & ConstantFP.
NOTE: For brevity the following takes about ConstantInt but
everything extends to cover ConstantFP as well.
Whilst ConstantInt::get() supp
paulwalker-arm wrote:
The PR contains a couple of commits that unless there's disagreement I'm
tempted to land directly but have held off just in case there's any buyer
remorse about extending ConstantInt/ConstantFP to cover vector types.
For similar reasons I've not updated the LangRef as I d
@@ -136,7 +144,11 @@ class ConstantInt final : public ConstantData {
inline const APInt &getValue() const { return Val; }
/// getBitWidth - Return the bitwidth of this constant.
- unsigned getBitWidth() const { return Val.getBitWidth(); }
+ unsigned getBitWidth() const {
@@ -98,6 +99,13 @@ class ConstantInt final : public ConstantData {
/// value. Otherwise return a ConstantInt for the given value.
static Constant *get(Type *Ty, uint64_t V, bool IsSigned = false);
+ /// WARNING: Incomplete support, do not use. These methods exist for earl
@@ -343,7 +343,7 @@ static bool verifyTripCount(Value *RHS, Loop *L,
// If the RHS of the compare is equal to the backedge taken count we need
// to add one to get the trip count.
if (SCEVRHS == BackedgeTCExt || SCEVRHS == BackedgeTakenCount) {
- ConstantInt *O
@@ -136,7 +144,11 @@ class ConstantInt final : public ConstantData {
inline const APInt &getValue() const { return Val; }
/// getBitWidth - Return the bitwidth of this constant.
- unsigned getBitWidth() const { return Val.getBitWidth(); }
+ unsigned getBitWidth() const {
@@ -98,6 +99,13 @@ class ConstantInt final : public ConstantData {
/// value. Otherwise return a ConstantInt for the given value.
static Constant *get(Type *Ty, uint64_t V, bool IsSigned = false);
+ /// WARNING: Incomplete support, do not use. These methods exist for earl
@@ -343,7 +343,7 @@ static bool verifyTripCount(Value *RHS, Loop *L,
// If the RHS of the compare is equal to the backedge taken count we need
// to add one to get the trip count.
if (SCEVRHS == BackedgeTCExt || SCEVRHS == BackedgeTakenCount) {
- ConstantInt *O
paulwalker-arm wrote:
Do you think it's worth adding something to the Clang release note?
https://github.com/llvm/llvm-project/pull/73326
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@@ -98,6 +99,13 @@ class ConstantInt final : public ConstantData {
/// value. Otherwise return a ConstantInt for the given value.
static Constant *get(Type *Ty, uint64_t V, bool IsSigned = false);
+ /// WARNING: Incomplete support, do not use. These methods exist for earl
https://github.com/paulwalker-arm approved this pull request.
This looks broadly good to me. I suggest reverting the LangRef change because
it doesn't add any new information relevant to LLVM IR.
https://github.com/llvm/llvm-project/pull/73326
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@@ -196,6 +196,9 @@ C Language Changes
number of elements in the flexible array member. This information can improve
the results of the array bound sanitizer and the
``__builtin_dynamic_object_size`` builtin.
+- Enums will now be represented in TBAA metadata using their a
@@ -6376,13 +6376,26 @@ aliases a memory access with an access tag ``(BaseTy2,
AccessTy2,
Offset2)`` if either ``(BaseTy1, Offset1)`` is reachable from ``(Base2,
Offset2)`` via the ``Parent`` relation or vice versa.
+In C an enum will be compatible with an underlying integer
@@ -196,6 +196,9 @@ C Language Changes
number of elements in the flexible array member. This information can improve
the results of the array bound sanitizer and the
``__builtin_dynamic_object_size`` builtin.
+- Enums will now be represented in TBAA metadata using their a
@@ -2355,13 +2357,7 @@ void NeonEmitter::run(raw_ostream &OS) {
OS << "#include \n";
- // Emit NEON-specific scalar typedefs.
- OS << "typedef float float32_t;\n";
- OS << "typedef __fp16 float16_t;\n";
-
- OS << "#ifdef __aarch64__\n";
- OS << "typedef double float64_
Author: Paul Walker
Date: 2023-12-08T18:01:12Z
New Revision: 94c837345c27e173284a85471d4efda19eded08e
URL:
https://github.com/llvm/llvm-project/commit/94c837345c27e173284a85471d4efda19eded08e
DIFF:
https://github.com/llvm/llvm-project/commit/94c837345c27e173284a85471d4efda19eded08e.diff
LOG: [
https://github.com/paulwalker-arm edited
https://github.com/llvm/llvm-project/pull/73515
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@@ -347,7 +347,12 @@ void RuntimePointerChecking::tryToCreateDiffCheck(
auto *SinkStartAR = cast(SinkStartInt);
const Loop *StartARLoop = SrcStartAR->getLoop();
if (StartARLoop == SinkStartAR->getLoop() &&
-StartARLoop == InnerLoop->getParentLoop()) {
+
https://github.com/paulwalker-arm approved this pull request.
https://github.com/llvm/llvm-project/pull/73515
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https://github.com/paulwalker-arm approved this pull request.
It looks like there's a code formatter issue with the MLIR change but otherwise
this looks good to me.
https://github.com/llvm/llvm-project/pull/72979
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paulwalker-arm wrote:
> The static functions renaming is going to produce a lot of noise but I guess
> this is too late already... Shall we revert to keep the change minimal?
> @nikic @paulwalker-arm WDYT ?
For my money the function's were originally named correctly and then
erroneously chang
https://github.com/paulwalker-arm created
https://github.com/llvm/llvm-project/pull/70970
[LLVM][AArch64] Add ASM constraints for reduced GPR register ranges.
The patch adds the follow ASM constraints:
Uci => w8-w11
Ucj => w12-w15
These constraints are required for SME load/store i
paulwalker-arm wrote:
The first commit contains refactoring that I'll land separately assuming the
reviewers are happy. The new functionality is implemented by the second commit.
https://github.com/llvm/llvm-project/pull/70970
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https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/70970
>From 500e5007a33d4ee3d594ef5ce58f8894c231f3dc Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Wed, 1 Nov 2023 16:27:29 +
Subject: [PATCH 1/2] [NFC][LLVM][SVE] Refactor predicate register ASM
constra
https://github.com/paulwalker-arm edited
https://github.com/llvm/llvm-project/pull/70970
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paulwalker-arm wrote:
* Rebased.
* Extended coverage to include all typical scalar types.
* Updated the LangRef to document the new constraints.
* Added an entry to the release note.
https://github.com/llvm/llvm-project/pull/70970
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https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/70970
>From 4bd5f30bf5f3f55cbca0c49a612cf0fa0122046e Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Wed, 1 Nov 2023 17:33:10 +
Subject: [PATCH] [LLVM][AArch64] Add ASM constraints for reduced GPR register
paulwalker-arm wrote:
Rebased after pushing NFC refactoring commit.
https://github.com/llvm/llvm-project/pull/70970
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https://github.com/paulwalker-arm closed
https://github.com/llvm/llvm-project/pull/70970
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https://github.com/paulwalker-arm created
https://github.com/llvm/llvm-project/pull/75217
The specialisation will not be valid when ConstantInt gains native support for
vector types.
This is largely a mechanical change but with extra attention paid to
InstCombineVectorOps.cpp, LoopFlatten.cpp
paulwalker-arm wrote:
Most all the recommend changes assume the code paths will work equally well for
vector types as they do for scalar types. Can we be so sure this is the case?
This is why I opted to keep the casting assertions with the exception of a few
places where I could be sure the c
https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/75217
>From 3f01bab15a8645be06ab30afa3bc42f11f3d4959 Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Wed, 29 Nov 2023 14:45:06 +
Subject: [PATCH 1/2] [LLVM][IR] Replace ConstantInt's specialisation of
getT
https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/75217
>From 3f01bab15a8645be06ab30afa3bc42f11f3d4959 Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Wed, 29 Nov 2023 14:45:06 +
Subject: [PATCH 1/3] [LLVM][IR] Replace ConstantInt's specialisation of
getT
https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/75217
>From 3f01bab15a8645be06ab30afa3bc42f11f3d4959 Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Wed, 29 Nov 2023 14:45:06 +
Subject: [PATCH 1/4] [LLVM][IR] Replace ConstantInt's specialisation of
getT
https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/75217
>From 3f01bab15a8645be06ab30afa3bc42f11f3d4959 Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Wed, 29 Nov 2023 14:45:06 +
Subject: [PATCH 1/5] [LLVM][IR] Replace ConstantInt's specialisation of
getT
https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/75217
>From 3f01bab15a8645be06ab30afa3bc42f11f3d4959 Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Wed, 29 Nov 2023 14:45:06 +
Subject: [PATCH 1/6] [LLVM][IR] Replace ConstantInt's specialisation of
getT
https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/75217
>From 3f01bab15a8645be06ab30afa3bc42f11f3d4959 Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Wed, 29 Nov 2023 14:45:06 +
Subject: [PATCH 1/7] [LLVM][IR] Replace ConstantInt's specialisation of
getT
https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/75217
>From 3f01bab15a8645be06ab30afa3bc42f11f3d4959 Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Wed, 29 Nov 2023 14:45:06 +
Subject: [PATCH 1/8] [LLVM][IR] Replace ConstantInt's specialisation of
getT
https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/75217
>From b484b3c60b172fadb6fa600cdc15a865750867a8 Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Wed, 29 Nov 2023 14:45:06 +
Subject: [PATCH] [LLVM][IR] Replace ConstantInt's specialisation of getType()
paulwalker-arm wrote:
Just a note to say the PR is not complete because there are uses outside of
clang and llvm that I need to port.
https://github.com/llvm/llvm-project/pull/75217
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https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/75217
>From d19e9e20432c0dfe50bfba7cd782179653f42b2b Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Wed, 29 Nov 2023 14:45:06 +
Subject: [PATCH] [LLVM][IR] Replace ConstantInt's specialisation of getType()
paulwalker-arm wrote:
Turns out there was just a single extra instance, within MLIR. It's an
interesting one though and I've noted it as it looks like I'll need to extend
`ModuleImport::getConstantAsAttr` as part of the patch that enables direct
VectorType support for ConstantInt/FP.
https:/
https://github.com/paulwalker-arm closed
https://github.com/llvm/llvm-project/pull/75217
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@@ -1600,6 +1600,25 @@ void SVEEmitter::createSMEHeader(raw_ostream &OS) {
OS << "extern \"C\" {\n";
OS << "#endif\n\n";
+ OS << "void __arm_za_disable(void) __arm_streaming_compatible;\n\n";
+
+ OS << "__ai bool __arm_has_sme(void) __arm_streaming_compatible {\n";
+ OS
@@ -10570,6 +10570,26 @@ Value
*CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID));
}
+ if (BuiltinID == clang::AArch64::BI__builtin_arm_get_sme_state) {
+// Create call to __arm_sme_sta
@@ -10570,6 +10570,26 @@ Value
*CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID));
}
+ if (BuiltinID == clang::AArch64::BI__builtin_arm_get_sme_state) {
+// Create call to __arm_sme_sta
@@ -1600,6 +1600,25 @@ void SVEEmitter::createSMEHeader(raw_ostream &OS) {
OS << "extern \"C\" {\n";
OS << "#endif\n\n";
+ OS << "void __arm_za_disable(void) __arm_streaming_compatible;\n\n";
+
+ OS << "__ai bool __arm_has_sme(void) __arm_streaming_compatible {\n";
+ OS
https://github.com/paulwalker-arm approved this pull request.
https://github.com/llvm/llvm-project/pull/75791
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https://github.com/paulwalker-arm edited
https://github.com/llvm/llvm-project/pull/75791
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@@ -10570,6 +10570,26 @@ Value
*CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID));
}
+ if (BuiltinID == clang::AArch64::BI__builtin_arm_get_sme_state) {
+// Create call to __arm_sme_sta
paulwalker-arm wrote:
Bike shedding here but shouldn't the header be arm_vector_types.h (i.e.
plural)? or even arm_acle_types.h if we think it might grow more uses.
https://github.com/llvm/llvm-project/pull/73258
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Author: Paul Walker
Date: 2022-05-19T17:27:09Z
New Revision: d640442518d5b095cbf10d4c8eae569425f0506e
URL:
https://github.com/llvm/llvm-project/commit/d640442518d5b095cbf10d4c8eae569425f0506e
DIFF:
https://github.com/llvm/llvm-project/commit/d640442518d5b095cbf10d4c8eae569425f0506e.diff
LOG: [
https://github.com/paulwalker-arm created
https://github.com/llvm/llvm-project/pull/82810
Implements the follow-on work requesting on
https://github.com/llvm/llvm-project/pull/75614.
>From a75304dffb77be1fb15f268000bfbdd07be774e1 Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Fri, 23 Feb 20
https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/82810
>From a4c46459564bd8a8e5ca2a56fa643f866b7e869a Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Fri, 23 Feb 2024 18:26:10 +
Subject: [PATCH] [LLVM][TypeSize] Remove default constructor.
---
clang/lib
https://github.com/paulwalker-arm closed
https://github.com/llvm/llvm-project/pull/82810
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https://github.com/llvm/llvm-project/pull/69321
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paulwalker-arm wrote:
To aid review I've split the patch into several commits mainly so the
mechanical update of 200+ ACLE tests is separate from the much smaller code
changes. Given this is an ABI break I'd rather land the series as a single
commit.
https://github.com/llvm/llvm-project/pull
paulwalker-arm wrote:
I've updated the release note to remove bogus references to a function's return
type affecting its name mangling.
https://github.com/llvm/llvm-project/pull/69460
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Author: Paul Walker
Date: 2022-10-20T14:52:25Z
New Revision: ab8257ca0e9389d39c081d7bb8bd4afceb2215cc
URL:
https://github.com/llvm/llvm-project/commit/ab8257ca0e9389d39c081d7bb8bd4afceb2215cc
DIFF:
https://github.com/llvm/llvm-project/commit/ab8257ca0e9389d39c081d7bb8bd4afceb2215cc.diff
LOG: [
Author: Maciej Gabka
Date: 2022-08-12T12:25:49Z
New Revision: 48e1250a91d244741c8677fed248ace1fcd7c41c
URL:
https://github.com/llvm/llvm-project/commit/48e1250a91d244741c8677fed248ace1fcd7c41c
DIFF:
https://github.com/llvm/llvm-project/commit/48e1250a91d244741c8677fed248ace1fcd7c41c.diff
LOG:
Author: Paul Walker
Date: 2023-01-26T12:10:39Z
New Revision: 26b79ca3fafc525225090646d42837368b3763c3
URL:
https://github.com/llvm/llvm-project/commit/26b79ca3fafc525225090646d42837368b3763c3
DIFF:
https://github.com/llvm/llvm-project/commit/26b79ca3fafc525225090646d42837368b3763c3.diff
LOG: [
paulwalker-arm wrote:
I agree and custom lowering also gives a straight forward way to support
vectors types as well.
https://github.com/llvm/llvm-project/pull/67552
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https://github.com/paulwalker-arm approved this pull request.
https://github.com/llvm/llvm-project/pull/68065
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https://github.com/paulwalker-arm created
https://github.com/llvm/llvm-project/pull/69321
This matches the behaviour of the other SVE ACLE types.
>From d036844f5006adecbd5b0ae4fbc3014d43ef3992 Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Tue, 17 Oct 2023 11:57:28 +0100
Subject: [PATCH] [SV
Author: Paul Walker
Date: 2023-03-17T12:49:45Z
New Revision: 62f09d788f9fc540db12f3cfa2f98760071fca96
URL:
https://github.com/llvm/llvm-project/commit/62f09d788f9fc540db12f3cfa2f98760071fca96
DIFF:
https://github.com/llvm/llvm-project/commit/62f09d788f9fc540db12f3cfa2f98760071fca96.diff
LOG: [
Author: Paul Walker
Date: 2023-06-29T11:55:36Z
New Revision: 989879f8fded41c732db93864461b3a67b9f1501
URL:
https://github.com/llvm/llvm-project/commit/989879f8fded41c732db93864461b3a67b9f1501
DIFF:
https://github.com/llvm/llvm-project/commit/989879f8fded41c732db93864461b3a67b9f1501.diff
LOG: [
Author: Paul Walker
Date: 2023-04-24T12:45:19Z
New Revision: 2bb7e00b098cdbf87b9e2e2f5ec85b661664b709
URL:
https://github.com/llvm/llvm-project/commit/2bb7e00b098cdbf87b9e2e2f5ec85b661664b709
DIFF:
https://github.com/llvm/llvm-project/commit/2bb7e00b098cdbf87b9e2e2f5ec85b661664b709.diff
LOG: [
https://github.com/paulwalker-arm created
https://github.com/llvm/llvm-project/pull/107599
Some switch statements require all SVE builtin types to be manually specified.
This patch refactors the SVE_*_TYPE macros so that such code can be generated
during preprocessing.
I've tried to establish
https://github.com/paulwalker-arm updated
https://github.com/llvm/llvm-project/pull/107599
>From 05670ea720be07ff8c1645ca90fff00460029de7 Mon Sep 17 00:00:00 2001
From: Paul Walker
Date: Fri, 6 Sep 2024 12:10:19 +0100
Subject: [PATCH] [NFC][Clang][SVE] Refactor AArch64SVEACLETypes.def to enable
https://github.com/paulwalker-arm edited
https://github.com/llvm/llvm-project/pull/108008
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https://github.com/llvm/llvm-project/pull/108008
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paulwalker-arm wrote:
I'll need to look to see if the TBAA metadata we're adding matches what we
initially envisaged but my gut feeling matches @arsenm.
I'm assuming the original code emitted an error, something along the lines of
"no version of svst1 available for long long*", which you've "f
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@@ -135,6 +135,8 @@ enum NodeType : unsigned {
UDIV_PRED,
UMAX_PRED,
UMIN_PRED,
+ FAMAX_PRED,
+ FAMIN_PRED,
paulwalker-arm wrote:
Is it necessary to create dedicated AArch64ISD nodes? We normally reserve that
for cases where additional DAG combines ar
paulwalker-arm wrote:
@momchil-velikov's commentary applies globally and is not specific to FPMR.
Which is to say, Arm switched a while back from "all system register need to be
protected by their feature flag" to "only protect system registers where there
is a need". The rational is that we
@@ -559,31 +559,86 @@ SemaARM::ArmStreamingType getArmStreamingFnType(const
FunctionDecl *FD) {
return SemaARM::ArmNonStreaming;
}
-static void checkArmStreamingBuiltin(Sema &S, CallExpr *TheCall,
- const FunctionDecl *FD,
-
@@ -559,31 +559,86 @@ SemaARM::ArmStreamingType getArmStreamingFnType(const
FunctionDecl *FD) {
return SemaARM::ArmNonStreaming;
}
-static void checkArmStreamingBuiltin(Sema &S, CallExpr *TheCall,
- const FunctionDecl *FD,
-
@@ -622,7 +679,8 @@ bool SemaARM::CheckSMEBuiltinFunctionCall(unsigned
BuiltinID,
}
if (BuiltinType)
- checkArmStreamingBuiltin(SemaRef, TheCall, FD, *BuiltinType);
+ HasError |= checkArmStreamingBuiltin(SemaRef, TheCall, FD, *BuiltinType,
p
@@ -559,31 +559,76 @@ SemaARM::ArmStreamingType getArmStreamingFnType(const
FunctionDecl *FD) {
return SemaARM::ArmNonStreaming;
}
-static void checkArmStreamingBuiltin(Sema &S, CallExpr *TheCall,
- const FunctionDecl *FD,
-
https://github.com/paulwalker-arm approved this pull request.
https://github.com/llvm/llvm-project/pull/93802
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https://github.com/paulwalker-arm commented:
Not for this patch but I do wonder if there's value in protecting non-bf16
instruction backed builtins (e.g. loadstone and shuffles) with the bf16 target
guard. I figure we'll either error on the use of the `svbfloat` type or the
code generation sh
@@ -2264,6 +2278,18 @@ let TargetGuard = "sve2p1" in {
defm SVPMOV_TO_VEC_LANE_D : PMOV_TO_VEC<"svpmov", "lUl",
"aarch64_sve_pmov_to_vector_lane" ,[], ImmCheck1_7>;
}
+let TargetGuard = "sve2p1|sme2" in {
paulwalker-arm wrote:
I think this is a sme2p1 feat
https://github.com/paulwalker-arm edited
https://github.com/llvm/llvm-project/pull/95787
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@@ -1781,7 +1781,12 @@ void SVEEmitter::createStreamingAttrs(raw_ostream &OS,
ACLEKind Kind) {
uint64_t VerifyRuntimeMode = getEnumValueForFlag("VerifyRuntimeMode");
uint64_t IsStreamingCompatibleFlag =
getEnumValueForFlag("IsStreamingCompatible");
+
for (auto &De
@@ -286,10 +290,13 @@ let TargetGuard = "sve,f64mm,bf16" in {
}
let TargetGuard = "sve,bf16" in {
+ def SVBFMMLA : SInst<"svbfmmla[_{0}]", "MMdd", "b", MergeNone,
"aarch64_sve_bfmmla", [IsOverloadNone]>;
+}
+
+let TargetGuard = "(sve,bf16)|sme" in {
--
https://github.com/paulwalker-arm edited
https://github.com/llvm/llvm-project/pull/95787
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https://github.com/paulwalker-arm edited
https://github.com/llvm/llvm-project/pull/95787
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@@ -17,7 +25,7 @@
// CPP-CHECK-NEXT:[[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4
// CPP-CHECK-NEXT:ret i64 [[TMP1]]
//
-uint64_t test_svcntb()
+uint64_t test_svcntb(void) MODE_ATTR
paulwalker-arm wrote:
Is there a problem we need to worry about with usin
https://github.com/paulwalker-arm edited
https://github.com/llvm/llvm-project/pull/95787
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@@ -286,17 +290,20 @@ let TargetGuard = "sve,f64mm,bf16" in {
}
let TargetGuard = "sve,bf16" in {
+ def SVBFMMLA : SInst<"svbfmmla[_{0}]", "MMdd", "b", MergeNone,
"aarch64_sve_bfmmla", [IsOverloadNone]>;
+}
+
+let TargetGuard = "(sve|sme),bf16" in {
def
https://github.com/paulwalker-arm commented:
With the change of default it's very hard to check everything but we've already
agreed there'll need to be a full audit once all the inflight work has landed.
I did spot one thing though:
Should the integer svclamp and svrevd builtins be protected
@@ -2264,6 +2278,18 @@ let TargetGuard = "sve2p1" in {
defm SVPMOV_TO_VEC_LANE_D : PMOV_TO_VEC<"svpmov", "lUl",
"aarch64_sve_pmov_to_vector_lane" ,[], ImmCheck1_7>;
}
+let TargetGuard = "sve2p1|sme2p1" in {
+ // DUPQ
+ def SVDUP_LANEQ_B : SInst<"svdup_laneq[_{d}]", "ddi"
@@ -1781,7 +1781,13 @@ void SVEEmitter::createStreamingAttrs(raw_ostream &OS,
ACLEKind Kind) {
uint64_t VerifyRuntimeMode = getEnumValueForFlag("VerifyRuntimeMode");
uint64_t IsStreamingCompatibleFlag =
getEnumValueForFlag("IsStreamingCompatible");
+
for (auto &De
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