Author: Paul Walker Date: 2023-12-08T18:01:12Z New Revision: 94c837345c27e173284a85471d4efda19eded08e
URL: https://github.com/llvm/llvm-project/commit/94c837345c27e173284a85471d4efda19eded08e DIFF: https://github.com/llvm/llvm-project/commit/94c837345c27e173284a85471d4efda19eded08e.diff LOG: [NFC] A few whitespace changes. Added: Modified: clang/include/clang/Basic/DiagnosticFrontendKinds.td llvm/include/llvm/Analysis/TargetTransformInfo.h llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h Removed: ################################################################################ diff --git a/clang/include/clang/Basic/DiagnosticFrontendKinds.td b/clang/include/clang/Basic/DiagnosticFrontendKinds.td index 715e0c0dc8fa84..568000106a84dc 100644 --- a/clang/include/clang/Basic/DiagnosticFrontendKinds.td +++ b/clang/include/clang/Basic/DiagnosticFrontendKinds.td @@ -80,6 +80,7 @@ def remark_fe_backend_optimization_remark_analysis_aliasing : Remark<"%0; " "the '__restrict__' qualifier with the independent array arguments. " "Erroneous results will occur if these options are incorrectly applied!">, BackendInfo, InGroup<BackendOptimizationRemarkAnalysis>; + def warn_fe_backend_optimization_failure : Warning<"%0">, BackendInfo, InGroup<BackendOptimizationFailure>, DefaultWarn; def note_fe_backend_invalid_loc : Note<"could " diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h index 8635bdd470ee69..fb6f3287e3d262 100644 --- a/llvm/include/llvm/Analysis/TargetTransformInfo.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h @@ -2376,12 +2376,12 @@ class TargetTransformInfo::Model final : public TargetTransformInfo::Concept { bool IsZeroCmp) const override { return Impl.enableMemCmpExpansion(OptSize, IsZeroCmp); } - bool enableInterleavedAccessVectorization() override { - return Impl.enableInterleavedAccessVectorization(); - } bool enableSelectOptimize() override { return Impl.enableSelectOptimize(); } + bool enableInterleavedAccessVectorization() override { + return Impl.enableInterleavedAccessVectorization(); + } bool enableMaskedInterleavedAccessVectorization() override { return Impl.enableMaskedInterleavedAccessVectorization(); } diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h index fa4c93d5f77a19..0b220069a388b6 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h @@ -291,6 +291,7 @@ class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> { bool isLegalMaskedGather(Type *DataType, Align Alignment) const { return isLegalMaskedGatherScatter(DataType); } + bool isLegalMaskedScatter(Type *DataType, Align Alignment) const { return isLegalMaskedGatherScatter(DataType); } _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
