[PATCH] D63636: [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst

This revision was automatically updated to reflect the committed changes. Closed by commit rGe0407f549653: [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst (authored by nemanjai). Herald added subscribers: shchenz, wuzish. Changed prior to commit: https://reviews.llvm.org/D63636?vs=206123&

[PATCH] D55326: [Driver] Fix incorrect GNU triplet for PowerPC on SUSE Linux

nemanjai accepted this revision. nemanjai added a comment. LGTM. Thanks for adding the test case. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D55326/new/ https://reviews.llvm.org/D55326 ___ cfe-commit

[PATCH] D74436: Change clang option -ffp-model=precise to select ffp-contract=on

nemanjai added a comment. > You're right, -O0 shouldn't generate FMA. I'm preparing to revert this now -- > just verifying the build. Perhaps this should be `off` with no optimization `on` with `-O1/-O2/-O3/-Os/-Oz` `fast` with fast math Just a suggestion, I'm not sure whether that would be the

[PATCH] D44921: [PowerPC] Option for secure plt mode

nemanjai added a comment. I'll let Justin give the actual ACK, but this looks fine to me. The only question that I have (since I don't know anything about secure PLT) is whether this is a PPC-specific thing (since the option is a PPC option). Comment at: include/clang/Driver/

[PATCH] D44921: [PowerPC] Option for secure plt mode

nemanjai added a comment. In https://reviews.llvm.org/D44921#1050299, @joerg wrote: > GCC supports -mbss-plt to get the legacy behavior. Not sure if anyone > actually uses it though. @spetrovic Is this something we want to implement? https://reviews.llvm.org/D44921 ___

[PATCH] D44921: [PowerPC] Option for secure plt mode

nemanjai added a subscriber: chmeee. nemanjai added a comment. In https://reviews.llvm.org/D44921#1056672, @spetrovic wrote: > -mbss-plt is currently default in LLVM, once secure plt support is finished > we can set secure plt as default in LLVM, but not for now. I was thinking in case the ove

[PATCH] D143467: [PowerPC] Add target feature requirement to builtins

nemanjai added a comment. In D143467#4195474 , @qiucf wrote: > - For builtins with matching instruction, use the required ISA/vector version > - For the rest builtins used in altivec.h, use requirements specified by the > header > - Keep the feature chec

[PATCH] D143467: [PowerPC] Add target feature requirement to builtins

nemanjai added a comment. Actually, while you're here, can you please remove all calls to `SemaFeatureCheck()` that test builtins which are only available on a specific CPU? The Sema checking happens too early before the target info is populated, which does not allow for a very common idiom whe

[PATCH] D144967: [PowerPC] Recognize long CPU name for -mtune in Clang

nemanjai created this revision. nemanjai added reviewers: PowerPC, nathanchance, MaskRay. Herald added subscribers: steven.zhang, shchenz, kbarton. Herald added a project: All. nemanjai requested review of this revision. Herald added a project: clang. There are two ways of specifying a CPU on Powe

[PATCH] D144967: [PowerPC] Recognize long CPU name for -mtune in Clang

nemanjai added a comment. I'll provide an updated patch in a few min... Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144967/new/ https://reviews.llvm.org/D144967 ___ cfe-commits mailing list cfe-commits

[PATCH] D144967: [PowerPC] Recognize long CPU name for -mtune in Clang

nemanjai added a comment. In D144967#4165140 , @nemanjai wrote: > I'll provide an updated patch in a few min... Ah, what I mean is I will update the patch and push in a few min. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https:/

[PATCH] D144967: [PowerPC] Recognize long CPU name for -mtune in Clang

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG59cd692454c9: [PowerPC] Recognize long CPU name for -mtune in Clang (authored by nemanjai). Changed prior to commit: https://reviews.llvm.org/D144

[PATCH] D145141: [Driver] Reject -march= for ppc

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. I am perfectly fine with this. That option is quite problematic. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D145141/new/ https://rev

[PATCH] D143467: [PowerPC] Add target feature requirement to builtins

nemanjai added inline comments. Comment at: clang/include/clang/Basic/BuiltinsPPC.def:491 +TARGET_BUILTIN(__builtin_altivec_vabsduh, "V8UsV8UsV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vabsduw, "V4UiV4UiV4Ui", "", "altivec") qiucf wrote: > shchenz

[PATCH] D143467: [PowerPC] Add target feature requirement to builtins

nemanjai added a comment. Another note regarding the motivating test case: Use of `vector double` should require VSX. We don't really seem to have the ability to turn this off early enough to catch this though. It would seem that in the front end, the target features depend on the compilation op

[PATCH] D135171: FreeBSD: enable __float128 on x86 and powerpc64le

nemanjai accepted this revision. nemanjai added a comment. My comments are minor nits that don't require another review, so LGTM. Comment at: clang/lib/Basic/Targets/OSTargets.h:245-250 switch (Triple.getArch()) { -default: +case llvm::Triple::ppc64le: case ll

[PATCH] D143467: [PowerPC] Add target feature requirement to builtins

nemanjai accepted this revision. nemanjai added subscribers: maryammo, kamaub, stefanp. nemanjai added a comment. This revision is now accepted and ready to land. This looks fine to me. I'd like some of the devs that have added builtins with Sema checking in the past to have a look here as well.

[PATCH] D144321: [PowerPC] Correctly use ELFv2 ABI on all OS's that use the ELFv2 ABI

nemanjai added inline comments. Comment at: clang/lib/Basic/Targets/PPC.h:430-432 + if ((Triple.isOSFreeBSD() && (Triple.getOSVersion().empty() || +Triple.getOSMajorVersion() >= 13)) || + Triple.isOSOpenBSD() || Triple.isMusl()) -

[PATCH] D144321: [PowerPC] Correctly use ELFv2 ABI on all OS's that use the ELFv2 ABI

nemanjai accepted this revision. nemanjai added a comment. Thanks for doing this. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144321/new/ https://reviews.llvm.org/D144321 ___ cfe-commits mailing

[PATCH] D144293: [PowerPC] Fix the implicit casting for the emulated intrinsics

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM as long as the naming nit is addressed. Comment at: clang/lib/Headers/ppc_wrappers/emmintrin.h:57 typedef __vector unsigned char __v16qu; +typedef __vector float __

[PATCH] D152914: [Draft] Make __builtin_cpu builtins target-independent

nemanjai created this revision. nemanjai added reviewers: PowerPC, RKSimon, pengfei, arsenm, t.p.northover. Herald added subscribers: steven.zhang, kbarton, hiraditya. Herald added a project: All. nemanjai requested review of this revision. Herald added subscribers: jdoerfert, wdng. Herald added pr

[PATCH] D152914: [Draft] Make __builtin_cpu builtins target-independent

nemanjai added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1785 + if (static_cast(TM).hasGlibcHWCAPAccess()) +OutStreamer->emitSymbolValue( This probably deserves a comment along the lines of: ``` // Emit a reference to a symbol

[PATCH] D148697: [clang-tidy] Add more checks for functions which should be noexcept

nemanjai added a comment. In D148697#4421739 , @Dinistro wrote: > In D148697#4421643 , @PiotrZSL > wrote: > >> @Dinistro It compiles & links with clang 16 also (shared libs). So I'm >> unable to reproduce. > > I

[PATCH] D148697: [clang-tidy] Add more checks for functions which should be noexcept

nemanjai added a comment. In D148697#4422642 , @PiotrZSL wrote: > In D148697#4422629 , @nemanjai > wrote: > >> It was also causing PPC bots to break. I fixed it in >> https://reviews.llvm.org/rGffd7a200fdfbd01ef

[PATCH] D152914: [Draft] Make __builtin_cpu builtins target-independent

nemanjai added inline comments. Comment at: llvm/include/llvm/IR/Intrinsics.td:903-907 +// Load of a value provided by the system library at a fixed address. Used for +// accessing things like HWCAP word provided by GLIBC. +def int_fixed_addr_ld +: DefaultAttrsIntrinsic<[llvm

[PATCH] D106409: [PowerPC] Truncate exponent parameter for vec_cts,vec_ctf

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106409/new/ https://reviews.llvm.org/D106409 __

[PATCH] D140080: [clang][PPC] Supporting -mcpu=405

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. I don't think the comments require another round of review. Thanks for fixing this. Comment at: clang/lib/Driver/ToolChains/Arch/PPC.cpp:23-29 +static constexpr llvm::St

[PATCH] D26546: [PPC] Add vec_insert4b/vec_extract4b to altivec.h

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. Just one minor inline nit. Other than that, LGTM. Comment at: test/CodeGen/builtins-ppc-error.c:5 +// RUN: -triple powerpc64-unknown-unknown -fsyntax-only \ +// RUN:

[PATCH] D26546: [PPC] Add vec_insert4b/vec_extract4b to altivec.h

nemanjai added inline comments. Comment at: test/CodeGen/builtins-ppc-extractword-error.c:2 +// REQUIRES: powerpc-registered-target +// XFAIL: powerpc + I think this will fail on all the powerpc targets, such as powerpc64le, etc. Which isn't what you want I imag

[PATCH] D28528: [PowerPC] Fix the wrong implementation of builtin vec_rlnm.

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. Please fix the minor issue with the test case and then commit. LGTM. Comment at: test/CodeGen/builtins-ppc-p9vector.c:871 vector unsigned int test77(void) { +// CHECK-BE

[PATCH] D27251: [PPC] some bugs mainly about sign problem fixed in altivec.h

nemanjai added a comment. @Zeson are you working on an update to this or is this to be abandoned? https://reviews.llvm.org/D27251 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D33820: [PowerPC] Pass CPU to assembler with -no-integrated-as

nemanjai added a comment. Ping. Repository: rL LLVM https://reviews.llvm.org/D33820 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D33820: [PowerPC] Pass CPU to assembler with -no-integrated-as

This revision was automatically updated to reflect the committed changes. Closed by commit rL309256: [PowerPC] Pass CPU to assembler with -no-integrated-as (authored by nemanjai). Changed prior to commit: https://reviews.llvm.org/D33820?vs=101508&id=108434#toc Repository: rL LLVM https://re

[PATCH] D29750: [PPC] Enable -fomit-frame-pointer by default for PPC

This revision was automatically updated to reflect the committed changes. Closed by commit rL296861: [PowerPC] Enable -fomit-frame-pointer by default for PPC (authored by nemanjai). Changed prior to commit: https://reviews.llvm.org/D29750?vs=87821&id=90443#toc Repository: rL LLVM https://re

[PATCH] D30415: Fix -mno-altivec cannot overwrite -maltivec option

nemanjai added a subscriber: echristo. nemanjai added a comment. This seems to change the relationship between -m[no-]altivec and -f[no-]altivec which has been kind of contentious for a while. Can you add a note as to whether the new behaviour matches the GCC behaviour. Also, perhaps @echristo

[PATCH] D27251: [PPC] some bugs mainly about sign problem fixed in altivec.h

nemanjai added a comment. Thank you for fixing these issues. I certainly see how the shifts really need to get the signedness right because the right shifts need to fill with the sign bit (so that vector bool will still have all 0 or all 1 bits). However, I don't really follow why the compariso

[PATCH] D26546: [PPC] Add vec_insert4b/vec_extract4b to altivec.h

nemanjai added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:8193 +if (getTarget().isLittleEndian()) { + // Create a shuffle mask of (1, 0) + Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), This will likely have to change when th

[PATCH] D26546: [PPC] Add vec_insert4b/vec_extract4b to altivec.h

nemanjai requested changes to this revision. nemanjai added a comment. This revision now requires changes to proceed. The finalized wording for vec_insert4b: Let W be the first doubleword element of ARG1, truncated to 32 bits. The result vector is formed by inserting W into ARG2 at the byte posi

[PATCH] D33053: [PowerPC] Implement vec_xxpermdi builtin.

nemanjai requested changes to this revision. nemanjai added a comment. This revision now requires changes to proceed. Add a test case like the one that currently crashes (see inline comment). Also, please do the following: - Put a note in the description (and the commit message) with a link to t

[PATCH] D33053: [PowerPC] Implement vec_xxpermdi builtin.

nemanjai added a comment. Other than the few minor comments, this LGTM. Comment at: lib/CodeGen/CGBuiltin.cpp:8458 +if (getTarget().isLittleEndian()) { + ElemIdx0 = (~Index & 1) + 2; + ElemIdx1 = (~Index & 2) >> 1; Minor nit: please add a comment

[PATCH] D33053: [PowerPC] Implement vec_xxpermdi builtin.

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. Much like Eric's comments, mine shouldn't hold up approval. Feel free to address them on the commit. LGTM. Comment at: lib/Sema/SemaChecking.cpp:3900 +// Which takes th

[PATCH] D112073: [PowerPC] Emit warning when SP is clobbered by asm

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112073/new/ https://reviews.llvm.org/D112073 ___

[PATCH] D117181: [PowerPC] Use IEEE long double in proper toolchain

nemanjai added a comment. I don't think this is the right approach. Personally, I would find it surprising if simply having GCC 12.1 on the system changes my `long double` default. Imagine if I simply install and use such a toolchain on a machine for whatever reason. If the default for such a t

[PATCH] D117181: [PowerPC] Use IEEE long double in proper toolchain

nemanjai added a comment. In D117181#3261396 , @jsji wrote: > So, the proposal is we change the default on Linux, so we will not change > the default based on the gcc version, it is based on OS and clang version > only. > but will emit warning if we de

[PATCH] D112906: [PowerPC] Emit warning for ieeelongdouble on older GNU toolchain

nemanjai added inline comments. Comment at: clang/lib/Driver/ToolChains/PPCLinux.cpp:50 + if (!SupportIEEEFloat128(D, Triple, Args)) { +if (Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) { + StringRef ABIName = A->getValue(); Seems that this will be le

[PATCH] D118110: [CMake] [Clang] Add CMake build option to specify long double format on PowerPC

nemanjai added a comment. It is probably not worth the effort since there won't be that many test cases that test the front end's IR generation for `long double`, but there should be a way to set up lit to know the default through its configuration files. Repository: rG LLVM Github Monorepo

[PATCH] D118110: [CMake] [Clang] Add CMake build option to specify long double format on PowerPC

nemanjai added inline comments. Comment at: clang/CMakeLists.txt:240 +set(ENABLE_PPC_IEEELONGDOUBLE OFF CACHE BOOL +"Enable IEEE binary128 as default long double format on PowerPC.") Do we need any error checking here? What happens if someone erroneously se

[PATCH] D118211: Add missing namespace to PPCLinux.cpp

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118211/new/ https://reviews.llvm.org/D118211 __

[PATCH] D116085: [clang-tidy] Performance improvements for NOLINTBEGIN/END blocks

nemanjai added a comment. This is causing buildbot failures with `-Werror` (i.e. https://lab.llvm.org/buildbot/#/builders/57/builds/14322/steps/5/logs/stdio). Please fix or revert. The failure is: .../llvm-project/clang-tools-extra/clang-tidy/NoLintDirectiveHandler.cpp:204:38: error: moving

[PATCH] D116085: [clang-tidy] Performance improvements for NOLINTBEGIN/END blocks

nemanjai added a comment. In D116085#3272200 , @nemanjai wrote: > This is causing buildbot failures with `-Werror` (i.e. > https://lab.llvm.org/buildbot/#/builders/57/builds/14322/steps/5/logs/stdio). > Please fix or revert. The failure is: > > > ...

[PATCH] D118350: [Clang][Sema][AIX][PowerPC] Emit byval alignment warning only when struct member is passed to a function

nemanjai added a comment. Would it make sense (and would it be possible) to check the linkage of the callee? Presumably calling something like `static void localfunc(int *)` with an over-aligned member shouldn't be a problem. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION h

[PATCH] D120305: [Driver] Default CLANG_DEFAULT_PIE_ON_LINUX to ON

nemanjai added a comment. In D120305#3346144 , @MaskRay wrote: > In D120305#3345978 , @MaskRay wrote: > >> In D120305#3345810 , @RKSimon >> wrote: >> >>> @MaskRay The ppc

[PATCH] D120305: [Driver] Default CLANG_DEFAULT_PIE_ON_LINUX to ON

nemanjai added a comment. In D120305#3346880 , @MaskRay wrote: > While I feel sorry for leaving clang-ppc64le-rhel red for some time and am > willing to fix issues if I have access to a ppc64 machine (especially > compiler-rt ones that I care about), >

[PATCH] D101130: [PowerPC] Provide XL-compatible builtins in altivec.h

nemanjai created this revision. nemanjai added reviewers: cebowleratibm, hubert.reinterpretcast, bmahjour, PowerPC. Herald added subscribers: shchenz, kbarton. nemanjai requested review of this revision. Herald added a project: clang. There are some interfaces in altivec.h that are not compatible

[PATCH] D101130: [PowerPC] Provide XL-compatible builtins in altivec.h

nemanjai added inline comments. Comment at: clang/lib/Headers/altivec.h:3055 +#ifdef __XL_COMPAT_ALTIVEC__ +/* vec_ctf */ jsji wrote: > This only affects __VSX__ version right? If so, can we move `#ifdef > __XL_COMPAT_ALTIVEC__` into `#ifdef __VSX__`？ > Or eve

[PATCH] D79714: [Diagnostics] Restore -Wdeprecated warning when user-declared copy assignment operator is defined as deleted (PR45634)

nemanjai added a comment. This breaks Clang's ability to bootstrap LLVM with `-Werror` as evidenced by the buildbot failure https://lab.llvm.org/buildbot/#/builders/36/builds/7587. Please revert or fix the `googletest` code that trips this warning. Pertinent file: FAILED: unittests/Support/C

[PATCH] D101130: [PowerPC] Provide XL-compatible builtins in altivec.h

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG19b29b1ed1ba: [PowerPC] Provide XL-compatible builtins in altivec.h (authored by nemanjai). Changed prior to commit: https://reviews.llvm.org/D101

[PATCH] D101209: [PowerPC] Provide fastmath sqrt and div functions in altivec.h

nemanjai created this revision. nemanjai added reviewers: cebowleratibm, bmahjour, PowerPC. Herald added subscribers: shchenz, kbarton. nemanjai requested review of this revision. Herald added a project: clang. This adds the long overdue implementations of these functions that have been part of t

[PATCH] D79714: [Diagnostics] Restore -Wdeprecated warning when user-declared copy assignment operator is defined as deleted (PR45634)

nemanjai added a comment. In D79714#2713610 , @xbolva00 wrote: > I pushed a fix to just disable this warning for googlemock/gtest. There are still more of these. I will apply the same fix to `utils/unittest/googlemock/include/gmock/gmock.h` unless you th

[PATCH] D101214: Disable deprecated-copy warnings on various LLVM code to bring the bot back to green

nemanjai created this revision. nemanjai added reviewers: xbolva00, rsmith. nemanjai requested review of this revision. Herald added projects: clang, LLVM. Herald added a subscriber: llvm-commits. Bootstrap with `-Werror` is currently broken due to https://reviews.llvm.org/D79714. This patch is r

[PATCH] D79714: [Diagnostics] Restore -Wdeprecated warning when user-declared copy assignment operator is defined as deleted (PR45634)

nemanjai added a comment. The fixes in https://reviews.llvm.org/D101214 are sufficient to bring the -Werror bootstrap back to green. Please review the patch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D79714/new/ https://reviews.llvm.org/D79714

[PATCH] D101209: [PowerPC] Provide fastmath sqrt and div functions in altivec.h

nemanjai added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:15122 + case PPC::BI__builtin_ppc_rsqrtd: { +auto FMF = Builder.getFastMathFlags(); +Builder.getFastMathFlags().setFast(); qiucf wrote: > Seems FMF will be automatically restored

[PATCH] D100482: [PowerPC] Provide MMA builtins for compatibility

nemanjai requested changes to this revision. nemanjai added a comment. This revision now requires changes to proceed. There may be something I am overlooking here, but I really don't think we need to or want to change the back end. Just add the new builtins to the front end as aliases to the exi

[PATCH] D101209: [PowerPC] Provide fastmath sqrt and div functions in altivec.h

nemanjai added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:15130 + Value *Y = EmitScalarExpr(E->getArg(1)); + auto Ret = Builder.CreateFDiv(X, Y, "recipdiv"); + Builder.setFastMathFlags(FMF); bmahjour wrote: > I wonder if we can do

[PATCH] D101209: [PowerPC] Provide fastmath sqrt and div functions in altivec.h

nemanjai updated this revision to Diff 341456. nemanjai added a comment. Changed `rsqrt` to be an actual reciprocal rather than just a refined `sqrt` estimate. I have verified that the code generated is equivalent to gcc's and the results produced are the same. Repository: rG LLVM Github Mo

[PATCH] D100782: [PowerPC] Improve f32 to i32 bitcast code gen

nemanjai added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCInstrVSX.td:2798 + (f32 (fpround f64:$A)), (f32 (fpround f64:$A, + (v4f32 (XXSPLTW (COPY_TO_REGCLASS (XSCVDPSP f64:$A), VSRC), 0))>; def : Pat<(v4f32 (build_vector

[PATCH] D101209: [PowerPC] Provide fastmath sqrt and div functions in altivec.h

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGc3da07d216dd: [PowerPC] Provide fastmath sqrt and div functions in altivec.h (authored by nemanjai). Repository: rG LLVM Github Monorepo CHANGES

[PATCH] D100482: [PowerPC] Provide MMA builtins for compatibility

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM. Thanks for fixing this. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D100482/new/ https://reviews.llvm.org/D100482 __

[PATCH] D102064: Parse vector bool when stdbool.h and altivec.h are included

nemanjai added inline comments. Comment at: clang/test/Parser/altivec-bool.c:11 +// RUN:-target-feature +altivec -fsyntax-only %s + +__vector bool char bc; Do we not want the test case to provide a similar define to what `stdbool.h` does? Repositor

[PATCH] D100782: [PowerPC] Improve f32 to i32 bitcast code gen

nemanjai requested changes to this revision. nemanjai added a comment. This revision now requires changes to proceed. Please add the missing BE handling. Comment at: llvm/lib/Target/PowerPC/PPCInstrVSX.td:2800 + (f32 (fpround f64:$A)), (f32 (fproun

[PATCH] D92815: [PowerPC] [Clang] Enable float128 feature on VSX targets

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM. Comment at: clang/lib/Basic/Targets/PPC.cpp:359 llvm::find(FeaturesVec, "+float128") != FeaturesVec.end()) { -// We have __float128 on PPC but not power

[PATCH] D100604: [PowerPC] Improve codegen for int-to-fp conversion of subword vector extract

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D100604/new/ https://reviews.llvm.org/D100604 ___ cfe-commits mailing list cfe-comm

[PATCH] D100782: [PowerPC] Improve f32 to i32 bitcast code gen

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D100782/new/ https://reviews.llvm.org/D100782 ___ cfe-commits mailing list cfe-comm

[PATCH] D102070: [AIX][TLS] Diagnose use of unimplemented TLS models

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM. Maybe give this a couple of days to see if any other reviewers have further input. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D10207

[PATCH] D102064: Parse vector bool when stdbool.h and altivec.h are included

nemanjai added a comment. This seems fine to me now but I'll defer to front end experts for approval. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D102064/new/ https://reviews.llvm.org/D102064 ___ cfe-co

[PATCH] D106120: [PowerPC] Implement vector bool/pixel initialization under -faltivec-src-compat=xl

nemanjai added a comment. In D106120#3196010 , @q66 wrote: > On x86_64, the program predictably prints `Dv4_i`. The semantics here are not new, but the warning is emitted for generic vector types as a result of https://reviews.llvm.org/D103615. This is

[PATCH] D116016: [Clang] [PowerPC] Emit module flag for current float abi

nemanjai added a comment. We should not be emitting the attribute in modules that do not have any use of `long double`. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D116016/new/ https://reviews.llvm.org/D116016 ___

[PATCH] D116015: [PowerPC] Add generic fnmsub intrinsic

nemanjai added a comment. Converting more generic code to target-specific intrinsics is sometimes necessary to ensure the generic IR doesn't get transformed in a way that is disadvantageous. I believe that the description of this review claims that to be the case for these negated FMA's. The ob

[PATCH] D106120: [PowerPC] Implement vector bool/pixel initialization under -faltivec-src-compat=xl

nemanjai added a comment. In D106120#3197209 , @q66 wrote: > Well, I'm more concerned about the actual semantics - as I see it, when using > generic vectors, they should be unaffected by the comparison behavior of > AltiVec vectors, which is not the cas

[PATCH] D100933: [clang] Recognize ppc32 as valid mcpu value

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D100933/new/ https://reviews.llvm.org/D100933 __

[PATCH] D100782: [PowerPC] Improve f32 to i32 bitcast code gen

nemanjai requested changes to this revision. nemanjai added a comment. This revision now requires changes to proceed. This will still produce a redundant `XXSLDWI`: vector float test(vector float a, float b) { a[3] = b; return a; } when compiled with `-mcpu=pwr9`. Repository: rG

[PATCH] D92935: Introduce support for PowerPC devices with an Embedded Floating-point APU version 2 (efpu2)

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. I don't really have any objections to this, but if there is a similar options to GCC, I would hope that they are the same. Please add a comment in the commit message to that end. Other tha

[PATCH] D92935: Introduce support for PowerPC devices with an Embedded Floating-point APU version 2 (efpu2)

nemanjai added a comment. In D92935#2477171 , @kiausch wrote: > Regarding similar GCC options: > > AFAIK GCC has had the spe options -msingle-float and -mdouble-float until spe > support was dropped after version 8.3. > These options would kind of match h

[PATCH] D94162: [PowerPC] Add variants of 64-bit vector types for vec_sel.

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. Kind of bizarre that we missed these, thanks for adding them. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D94162/new/ https://reviews

[PATCH] D92935: Introduce support for PowerPC devices with an Embedded Floating-point APU version 2 (efpu2)

This revision was automatically updated to reflect the committed changes. Closed by commit rG3f7b4ce96065: [PowerPC] Add support for embedded devices with EFPU2 (authored by nemanjai). Changed prior to commit: https://reviews.llvm.org/D92935?vs=315119&id=316093#toc Repository: rG LLVM Github

[PATCH] D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10

nemanjai requested changes to this revision. nemanjai added a comment. This revision now requires changes to proceed. This is still incorrect. The indices for the hi/low words are backwards. You can easily demonstrate this with a test case such as: a.c: vector double test() { return (vector

[PATCH] D92080: [Clang] Mutate long-double math builtins into f128 under IEEE-quad

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM. I think it would be useful to run a functional test with a toolchain that has these library functions. That shouldn't gate this change though. CHANGES SINCE LAST ACTION https://re

[PATCH] D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90173/new/ https://reviews.llvm.org/D90173 ___ cfe-commits mailing list cfe-commit

[PATCH] D111258: [PowerPC] Emit dcbt and dcbtst in place of their extended mnemonics on AIX

nemanjai added a comment. Please change the condition as Jinsong suggested and change the leading comment to: // On AIX, only emit the extended mnemonics for dcbt and dcbtst if // the "modern assembler" is available. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https:

[PATCH] D111258: [PowerPC] Emit dcbt and dcbtst in place of their extended mnemonics on AIX

nemanjai accepted this revision. nemanjai added a comment. LGTM. This is already approved, but just wanted to indicate that I think the comments were addressed adequately. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111258/new/ https://reviews.llvm.org/D111258 __

[PATCH] D104386: [PowerPC][Builtins] Added a number of builtins for compatibility with XL.

nemanjai added a comment. In D104386#2973245 , @dim wrote: > Note that this unexpectedly broke FreeBSD's powerpc64 builds, as we've long > used the following in our `lib/libc/powerpc64/string/bcopy.S`: > > #ifndef FN_NAME > #ifdef MEMMOVE > #define

[PATCH] D108917: [PowerPC] Define __powerpc and __PPC macros

nemanjai added a comment. In D108917#2974490 , @cebowleratibm wrote: > I'd like to see the rationale for adding these forms of the macros in the > review and also in the extended commit message. These forms are being added > primarily because the AIX

[PATCH] D104386: [PowerPC][Builtins] Added a number of builtins for compatibility with XL.

nemanjai added a comment. The idea with putting all of these in a separate function was to: 1. Make it easy to limit it to specific targets as I suggested above 2. Have them all in one place to easily identify which ones are added for this compatibility so we can eventually pull this support onc

[PATCH] D107647: [PowerPC] MMA - Add __builtin_vsx_build_pair and __builtin_mma_build_acc builtins

nemanjai requested changes to this revision. nemanjai added a comment. This revision now requires changes to proceed. There are some questions to answer here before proceeding: 1. Why do we not get paired vector loads and stores in the back end test cases for either little or big endian and rega

[PATCH] D109126: [PowerPC] [NFC] Add Big-Endian checks for existing MMA tests

nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM. Please update the description and commit message as to why this is being added. Comment at: clang/test/CodeGen/builtins-ppc-pair-mma.c:5 +// RUN: %clang_cc1 -O3 -t

[PATCH] D109178: [PowerPC] Disable vector types when not supported by subtarget features

nemanjai added a comment. It is not clear what this patch will do with `vector [[un]signed] long`. This is currently deprecated but still works - and we don't want it to work with no VSX. Comment at: clang/lib/Headers/altivec.h:8881 } #endif This file is

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