nemanjai added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrVSX.td:2798
+ (f32 (fpround f64:$A)), (f32 (fpround
f64:$A)))),
+ (v4f32 (XXSPLTW (COPY_TO_REGCLASS (XSCVDPSP f64:$A), VSRC), 0))>;
def : Pat<(v4f32 (build_vector f32:$A, f32:$A, f32:$A, f32:$A)),
----------------
These `COPY_TO_REGCLASS` should probably be `SUBREG_TO_REG` (all of them by the
looks of it).
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrVSX.td:4242
(v4i32 (XXINSERTW v4i32:$A, AlignValues.I32_TO_BE_WORD1, 0))>;
+def : Pat<(v4f32 (insertelt v4f32:$A, (f32 (fpround f64:$B)), 0)),
+ (v4f32 (XXINSERTW v4f32:$A,
----------------
I am not really seeing the tests for these.
Can we add some tests of the form
```
vector float test(vector float a, double b) {
a[1] = b;
return a;
}
```
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100782/new/
https://reviews.llvm.org/D100782
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