[PATCH] D53608: [builtins] Build float128 soft float builtins for x86_64.

LuoYuanke added a comment. Herald added a subscriber: jdoerfert. Herald added projects: LLVM, Sanitizers. Hi What's the status for __float128 support? Has it already been finished? Repository: rCRT Compiler Runtime CHANGES SINCE LAST ACTION https://reviews.llvm.org/D53608/new/ https://revi

[PATCH] D60552: [X86] Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper Lake

This revision was automatically updated to reflect the committed changes. Closed by commit rL360018: Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper… (authored by LuoYuanke, committed by ). Herald added a project: LLVM. Herald added a subscriber: llvm-commits. Changed

[PATCH] D77628: [Driver][X86] Add -mpad-max-prefix-size

LuoYuanke accepted this revision. LuoYuanke added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77628/new/ https://reviews.llvm.org/D77628 _

[PATCH] D77628: [Driver][X86] Add -mpad-max-prefix-size

LuoYuanke added a comment. > This looks like it requires more thorough discussions, doesn't it? We will > also need discussions with the binutils side. We requested a GCC compiler > driver option long ago but we do not reach a consensus > (https://gcc.gnu.org/legacy-ml/gcc/2020-01/msg00358.html

[PATCH] D122104: [X86][regcall] Support passing / returning structures

LuoYuanke added inline comments. Comment at: clang/include/clang/CodeGen/CGFunctionInfo.h:590 + /// Log 2 of the maximum vector width. + unsigned MaxVectorWidth : 4; + I notice some code would indicate it is log 2 size with Log2 suffix in the variable name. Do

[PATCH] D122104: [X86][regcall] Support passing / returning structures

LuoYuanke accepted this revision. LuoYuanke added a comment. This revision is now accepted and ready to land. LGTM, thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D122104/new/ https://reviews.llvm.org/D122104

[PATCH] D122567: [X86][AMX] enable amx cast intrinsics in FE.

LuoYuanke created this revision. Herald added a subscriber: pengfei. Herald added a project: All. LuoYuanke requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. We have some discission in D99152 and llvm-dev an

[PATCH] D99152: [AMX] Prototype for vector and amx bitcast.

LuoYuanke added a comment. Herald added a project: All. In D99152#3235546 , @lebedev.ri wrote: > What's the status here? Here is the patch D122567 . Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION htt

[PATCH] D122567: [X86][AMX] enable amx cast intrinsics in FE.

LuoYuanke added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:5413-5415 +if (PTy->isX86_AMXTy()) + ArgValue = Builder.CreateIntrinsic(Intrinsic::x86_cast_vector_to_tile, + {ArgValue->getType()}, {ArgVal

[PATCH] D122567: [X86][AMX] enable amx cast intrinsics in FE.

This revision was automatically updated to reflect the committed changes. Closed by commit rG979d876bb4e9: [X86][AMX] enable amx cast intrinsics in FE. (authored by LuoYuanke). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D122567/new/ https://review

[PATCH] D105269: [X86] AVX512FP16 instructions enabling 6/6

LuoYuanke added inline comments. Comment at: llvm/test/CodeGen/X86/avx512cfma-intrinsics.ll:3 +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s + +declare <4 x float> @llvm.x86.avx512fp16.mask.vfmaddc.ph.1

[PATCH] D122104: [X86][regcall] Support passing / returning structures

LuoYuanke added inline comments. Comment at: clang/include/clang/CodeGen/CGFunctionInfo.h:744 + void setMaxVectorWidth(unsigned Width) { + MaxVectorWidth = Width ? llvm::countTrailingZeros(Width) + 1 : 0; + } Use "Log2_32()"? Repository: rG LLVM Github

[PATCH] D72227: Add options for clang to align branches within 32B boundary

LuoYuanke added inline comments. Comment at: clang/lib/Driver/ToolChains/Clang.cpp:2045 + + if (Args.hasFlag(options::OPT_mbranches_within_32B_boundaries, + options::OPT_mno_branches_within_32B_boundaries, false)) { MaskRay wrote: > skan wrote:

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke created this revision. Herald added subscribers: llvm-commits, cfe-commits, hiraditya, mgorny, qcolombet, MatzeB. Herald added projects: clang, LLVM. LuoYuanke requested review of this revision. Herald added a subscriber: jdoerfert. Change-Id: I935e1080916ffcb72af54c2c83faa8b2e97d5cb0

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 293007. LuoYuanke added a comment. Updating D87981 : [X86] AMX programming model prototype. Fixed some clang format issue. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 293051. LuoYuanke added a comment. Herald added a subscriber: nikic. Updating D87981 : [X86] AMX programming model prototype. Fixed lit test case failure. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 293362. LuoYuanke added a comment. Updating D87981 : [X86] AMX programming model prototype. Fix clang format and add test case for RA that across function call. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST AC

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 294036. LuoYuanke added a comment. Updating D87981 : [X86] AMX programming model prototype. Rebase. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.

[PATCH] D92837: [X86] Support tilezero intrinsic and c interface for AMX.

LuoYuanke created this revision. Herald added subscribers: pengfei, hiraditya. LuoYuanke requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D92837 Files: clan

[PATCH] D92837: [X86] Support tilezero intrinsic and c interface for AMX.

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86ExpandPseudo.cpp:499 +MI.RemoveOperand(3); // Remove $tmmcfg +for (int i = 2; i > 0; --i) + MI.RemoveOperand(i); pengfei wrote: > Can change to i = 3? Yes, then remove line 498. ==

[PATCH] D87981: [X86] AMX programming model.

LuoYuanke added a comment. Hi, I'm going to land the patch if there is no objection. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 ___ cfe-commits mailing list

[PATCH] D92837: [X86] Support tilezero intrinsic and c interface for AMX.

LuoYuanke updated this revision to Diff 310786. LuoYuanke added a comment. Address Pengfei's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D92837/new/ https://reviews.llvm.org/D92837 Files: clang/include/clang/Basic/BuiltinsX86_64.def

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 310800. LuoYuanke added a comment. Rebase. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91927/new/ https://reviews.llvm.org/D91927 Files: clang/test/CodeGen/X86/amx_api.c llvm/include/llvm-c/Core.h ll

[PATCH] D92837: [X86] Support tilezero intrinsic and c interface for AMX.

LuoYuanke updated this revision to Diff 311375. LuoYuanke added a comment. a. Change tilezero back to be chained. 1. It avoid copy if several tilezero are same. Copy is expensive in AMX. 2. To keep the original order of amx intrinsics. b. Refactor __tilezero interface. Repository: rG LLVM Gi

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 313315. LuoYuanke added a comment. Address Pengfei's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91927/new/ https://reviews.llvm.org/D91927 Files: clang/test/CodeGen/X86/amx_api.c llvm/includ

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 313326. LuoYuanke added a comment. Rebase and fix lit test case failure. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91927/new/ https://reviews.llvm.org/D91927 Files: clang/test/CodeGen/X86/amx_api.c l

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86LowerAMXType.cpp:264 + SmallVector DeadInsts; + SmallVector DeadBitcasts; + pengfei wrote: > Maybe better to use BitCastInst? There may be dead load or store instructions. Co

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 313458. LuoYuanke added a comment. Address Pengfei's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91927/new/ https://reviews.llvm.org/D91927 Files: clang/test/CodeGen/X86/amx_api.c llvm/includ

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86LowerAMXType.cpp:265 +// If the dst type is <256 x i32>*, it is valid intruction. +// %0 = bitcast x86_amx* %tile to <256 x i32>* +// %1 = load <256 x i32>, <256 x i32>* %0, align 64 -

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke added a comment. In D91927#2469977 , @pengfei wrote: >> In my test case, it is transformed after Combine redundant instructions. > > Can we disable it for AMX type? The pointer to AMX type is meaningless and > may result in bad perfomance. Ok,

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 313635. LuoYuanke added a comment. Address Pengfei's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91927/new/ https://reviews.llvm.org/D91927 Files: clang/test/CodeGen/X86/amx_api.c llvm/includ

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 313639. LuoYuanke added a comment. Improve the comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91927/new/ https://reviews.llvm.org/D91927 Files: clang/test/CodeGen/X86/amx_api.c llvm/include/llvm

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86LowerAMXType.cpp:124 + auto *II = cast(Tile); + // Tile is output from AMX intrinsic. The first operand of the + // intrinsic is row, the second operand of the intrinsic is column. pengfei wro

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 313663. LuoYuanke added a comment. Address Pengfei's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91927/new/ https://reviews.llvm.org/D91927 Files: clang/test/CodeGen/X86/amx_api.c llvm/includ

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 313669. LuoYuanke added a comment. Refine comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91927/new/ https://reviews.llvm.org/D91927 Files: clang/test/CodeGen/X86/amx_api.c llvm/include/llvm-c/Co

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke added a comment. In D91927#2471140 , @pengfei wrote: > LGTM. Thanks for the refactors. Maybe better to wait for a few days to see if > others have objections. Thank Pengfei for the review. Sure, I'll wait for a few days. Repository: rG LLVM

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 302738. LuoYuanke added a comment. Removed tilezero support in this patch. Fixed some bugs. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 Files: clang/include/cla

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke added inline comments. Comment at: llvm/test/CodeGen/X86/ipra-reg-usage.ll:6 define preserve_allcc void @foo()#0 { -; CHECK: foo Clobbered Registers: $cs $df $ds $eflags $eip $eiz $es $fpcw $fpsw $fs $gs $hip $ip $mxcsr $rip $riz $ss $ssp $bnd0 $bnd1 $bnd2 $bnd3 $cr0

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 303345. LuoYuanke added a comment. Fix lit test failure. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 Files: clang/include/clang/Basic/BuiltinsX86_64.def clang

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86TileConfig.cpp:101 + unsigned SubIdx = (BitSize == 8) ? X86::sub_8bit : X86::sub_16bit; + unsigned Opc = (BitSize == 8) ? X86::MOV8mr : X86::MOV16mr; + MachineInstr *NewMI = akashk4 wrote: > I

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke added a comment. In D87981#2379249 , @akashk4 wrote: > It would be great if TILE_RELEASE is supported in the backend, so the scope > of transaction is known and the configurations are at least stored to memory > properly. TILERELEASE don't sto

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke added inline comments. Comment at: clang/test/CodeGen/X86/amx_api.c:13 + //CHECK-LABEL: @test_api + //CHECK: call <256 x i32> @llvm.x86.tileloadd64.internal + //CHECK: call <256 x i32> @llvm.x86.tdpbssd.internal pengfei wrote: > Shoud it check for 3

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 303830. LuoYuanke added a comment. 1. Address Pengfei's comments. 2. Add tilerelease at the epilog. 3. Fix a bug of emitting instruction that use subregister. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D8798

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke marked 5 inline comments as done. LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86TileConfig.cpp:101 + unsigned SubIdx = (BitSize == 8) ? X86::sub_8bit : X86::sub_16bit; + unsigned Opc = (BitSize == 8) ? X86::MOV8mr : X86::MOV16mr; + MachineInstr

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 303833. LuoYuanke added a comment. Reformt the code with lint fix. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 Files: clang/include/clang/Basic/BuiltinsX86_64.d

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 304136. LuoYuanke added a comment. Config palette. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 Files: clang/include/clang/Basic/BuiltinsX86_64.def clang/lib/H

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86TileConfig.cpp:101 + unsigned SubIdx = (BitSize == 8) ? X86::sub_8bit : X86::sub_16bit; + unsigned Opc = (BitSize == 8) ? X86::MOV8mr : X86::MOV16mr; + MachineInstr *NewMI = LuoYuanke wrote: >

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 304703. LuoYuanke added a comment. Rebase. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 Files: clang/include/clang/Basic/BuiltinsX86_64.def clang/lib/Headers/a

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 304736. LuoYuanke added a comment. Fix clang-tidy. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 Files: clang/include/clang/Basic/BuiltinsX86_64.def clang/lib/H

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke added inline comments. Comment at: llvm/test/CodeGen/X86/statepoint-fixup-invoke.mir:94 ; CHECK: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp - ; CHECK: STATEPOINT 0, 0, 1, @

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 305345. LuoYuanke added a comment. Rename type name __tile to __tile1024i. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 Files: clang/include/clang/Basic/Builtins

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke added inline comments. Comment at: llvm/include/llvm/CodeGen/LiveRegMatrix.h:44 VirtRegMap *VRM; + MachineRegisterInfo *MRI; wxiao3 wrote: > what's the purpose of this member? It is useless. Thanks. Comment at: llvm/lib/Target/X

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 305978. LuoYuanke added a comment. Address Wei's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 Files: clang/include/clang/Basic/BuiltinsX86_64.def cla

[PATCH] D87981: [X86] AMX programming model.

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86TileConfig.cpp:223 + LLVM_DEBUG(dbgs() << "** TILE REGISTER CONFIGURE**\n" +<< "** Function: " << mf.getName() << '\n'); + MF = &mf; mehdi_amini wrot

[PATCH] D87981: [X86] AMX programming model.

LuoYuanke added a comment. In D87981#2405187 , @rengolin wrote: > You should at least get @craig.topper's feedback, given this is a significant > change in the x86 backend. We had internal review with Craig on the design before. Craig In D87981#2405187

[PATCH] D87981: [X86] AMX programming model.

LuoYuanke added a comment. In D87981#2406530 , @craig.topper wrote: > This triggers an assertion in X86LowerAMXType::visit() when compiled with > clang test.c -O3 > > typedef int vec1024 __attribute__((vector_size(1024))); > > vec1024 foo(vec1024

[PATCH] D87981: [X86] AMX programming model.

LuoYuanke added a comment. In D87981#2406777 , @craig.topper wrote: > Remind me what happened with the idea of using a dedicated type for tiles in > IR like mmx? Yes, that's good idea. Do you think we need a separate patch to support the new IR type fo

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 296050. LuoYuanke added a comment. Herald added a subscriber: pengfei. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 Files: clang/include/clang/Basic/Built

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke added a comment. ping Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 298546. LuoYuanke added a comment. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 Files: clang/include/clang/Basic/BuiltinsX86_64.def clang/lib/Headers/am

[PATCH] D91927: [X86] Add x86_amx type for intel AMX. The x86_amx is used for AMX intrisics. <256 x i32> is bitcast to x86_amx when it is used by AMX intrinsics, and x86_amx is bitcast to <256 x i32>

LuoYuanke created this revision. Herald added subscribers: llvm-commits, cfe-commits, dexonsmith, pengfei, hiraditya, qcolombet. Herald added a reviewer: deadalnix. Herald added projects: clang, LLVM. LuoYuanke requested review of this revision. Herald added a subscriber: jdoerfert. ...only opera

[PATCH] D87981: [X86] AMX programming model.

LuoYuanke added a comment. @craig.topper. Thank you for the good idea. I create another patch (https://reviews.llvm.org/D91927) to fix the problem. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 _

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke added a comment. In D91927#2412557 , @craig.topper wrote: > I only took a quick pass through this so far. What happens if a bitcast > between x86amx and v256i32(or any other 1024-bit vector type) exists in the > IR but isn't next to a load/st

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 307298. LuoYuanke retitled this revision from "[X86] Add x86_amx type for intel AMX. " to "[X86] Add x86_amx type for intel AMX.". LuoYuanke added a comment. Address Craig's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION http

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 307300. LuoYuanke added a comment. Address Craig's comments. Change dyn_cast to cast. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91927/new/ https://reviews.llvm.org/D91927 Files: clang/test/CodeGen/X86/

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke marked an inline comment as done. LuoYuanke added inline comments. Comment at: llvm/lib/IR/DataLayout.cpp:819 + case Type::X86_AMXTyID: +return Align(64); default: pengfei wrote: > Should be 512 bits? Yes. It is 512. Thanks. C

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 307514. LuoYuanke marked an inline comment as done. LuoYuanke added a comment. Address Craig and Pengfei's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91927/new/ https://reviews.llvm.org/D91927 F

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 308146. LuoYuanke added a comment. Add the handler of "bitcast <256 x i32>* to x86_amx*". Refactor the code. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91927/new/ https://reviews.llvm.org/D91927 Files:

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke updated this revision to Diff 309761. LuoYuanke added a comment. Avoid generatng constant for x86_amx. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91927/new/ https://reviews.llvm.org/D91927 Files: clang/test/CodeGen/X86/amx_api.c l

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 301172. LuoYuanke added a comment. Herald added a subscriber: dexonsmith. Rebase and Model tile configure register. Configure register is the user of all the amx instruction. Add X86PreTileConfig pass to insert psuedo ldtilecfg and build the data depenedcy b

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke added inline comments. Comment at: llvm/include/llvm/CodeGen/TileShapeInfo.h:9 +// +// This file defines TileShapeInfo for AMX. +// pengfei wrote: > Do you want to use `TileShapeInfo` for the class name or forget to change the > comment to `ShapeT`? I

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke updated this revision to Diff 301205. LuoYuanke added a comment. Address Pengfei's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 Files: clang/include/clang/Basic/BuiltinsX86_64.def

[PATCH] D87981: [X86] AMX programming model prototype.

LuoYuanke marked an inline comment as done. LuoYuanke added inline comments. Comment at: clang/lib/Headers/amxintrin.h:259 +__DEFAULT_FN_ATTRS +void __tile_loadd(__tile *dst, const void *base, long stride) { + dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride); -

[PATCH] D99675: [llvm][clang] Create new intrinsic llvm.arith.fence to control FP optimization at expression level

LuoYuanke added a comment. We may add description on the intrinsic in docs/LangRef.rst. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99675/new/ https://reviews.llvm.org/D99675 ___ cfe-commits mailing li

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

LuoYuanke added inline comments. Comment at: llvm/include/llvm-c/Core.h:163 LLVMX86_MMXTypeKind, /**< X86 MMX */ + LLVMX86_AMXTypeKind, /**< X86 AMX */ LLVMTokenTypeKind, /**< Tokens */ MaskRay wrote: > cuviper wrote: > > This is a breaking change

[PATCH] D93594: [X86] Pass to transform amx intrinsics to scalar operation.

LuoYuanke added a comment. Would you rebase to see if the lit test failure is related to this patch? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D93594/new/ https://reviews.llvm.org/D93594 ___ cfe-commi

[PATCH] D96315: [X86][AMX] Assemble new AMX interface to an experiment header file.

LuoYuanke created this revision. Herald added subscribers: pengfei, mgorny. LuoYuanke requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Since the new AMX interface is not mature right now, we assemble the new interface to an experiment file.

[PATCH] D96315: [X86][AMX] Assemble new AMX interface to an experiment header file.

LuoYuanke updated this revision to Diff 322293. LuoYuanke added a comment. Address Pengfei's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D96315/new/ https://reviews.llvm.org/D96315 Files: clang/lib/Headers/CMakeLists.txt clang/lib/H

[PATCH] D96315: [X86][AMX] Assemble new AMX interface to an experiment header file.

LuoYuanke added inline comments. Comment at: clang/lib/Headers/amxintrin_experiment.h:12 + * This file is experiment interface for AMX new programming model. + */ + pengfei wrote: > It's better to add such macros: > ``` > #ifndef __AMXINTRIN_EXPERIMENT_H > #defin

[PATCH] D93594: [X86] Pass to transform amx intrinsics to scalar operation.

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86TargetMachine.cpp:416 + if (TM->getOptLevel() == CodeGenOpt::None) +addPass(createX86LowerAMXIntrinsicsPass()); + else { We may add both pass anyway and skip the pass based on the option le

[PATCH] D93594: [X86] Pass to transform amx intrinsics to scalar operation.

LuoYuanke added inline comments. Comment at: llvm/include/llvm/CodeGen/Passes.h:496 + + FunctionPass *createX86LowerAMXIntrinsicsPass(); } // End llvm namespace Add comments to describe what the pass does? Comment at: llvm/lib/Target/X86/X86L

[PATCH] D97358: [X86] Support amx-bf16 intrinsic.

LuoYuanke added inline comments. Comment at: clang/lib/Headers/amxintrin.h:283 +typedef struct __tile1024bf16_str { + const unsigned short row; pengfei wrote: > Is there much value to differentiate the type? We are using the same AMX type > in the builtins. W

[PATCH] D103784: [X86] Support __tile_stream_loadd intrinsic for new AMX interface

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86FastTileConfig.cpp:124 bool X86FastTileConfig::isTileLoad(MachineInstr &MI) { + return MI.getOpcode() == X86::PTILELOADDV || Also add the stream load for X86PreAMXConfig.cpp: isTileLoad().

[PATCH] D103784: [X86] Support __tile_stream_loadd intrinsic for new AMX interface

LuoYuanke accepted this revision. LuoYuanke added a comment. This revision is now accepted and ready to land. LGTM. Thank you! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103784/new/ https://reviews.llvm.org/D103784 _

[PATCH] D99675: [llvm][clang] Create new intrinsic llvm.arithmetic.fence to control FP optimization at expression level

LuoYuanke accepted this revision. LuoYuanke added a comment. This revision is now accepted and ready to land. LGTM, but pls wait for 1 or 2 days to see if there is any more comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99675/new/ https://

[PATCH] D105263: [X86] AVX512FP16 instructions enabling 1/6

LuoYuanke added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:3405 +/// half member at the specified offset. For example, {int,{half}} has a +/// float at offset 4. It is conservatively correct for this routine to return +/// false. float -> hal

[PATCH] D105263: [X86] AVX512FP16 instructions enabling 1/6

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp:801 // 0b00010: implied 0F 38 leading opcode bytes // 0b00011: implied 0F 3A leading opcode bytes // 0b00100-0b1: Reserved for future use Add commen

[PATCH] D105263: [X86] AVX512FP16 instructions enabling 1/6

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86InstrAVX512.td:82 + PatFrags ScalarIntMemFrags = !if (!eq (EltTypeName, "f16"), + !cast("sse_load_f16"), + !if (!eq (EltTypeName, "f32"), -

[PATCH] D105263: [X86] AVX512FP16 instructions enabling 1/6

LuoYuanke added inline comments. Comment at: llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll:374 +; SSE-NEXT:movl %edi, %ebp +; SSE-NEXT:movzwl %bx, %edi ; SSE-NEXT:callq __gnu_h2f_ieee@PLT Why this test case changes? Shall we add -mattr=+avx512fp16

[PATCH] D105263: [X86] AVX512FP16 instructions enabling 1/6

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86InstrAVX512.td:4478 + let Predicates = [HasFP16] in { +def VMOVSHZrr_REV: AVX512<0x11, MRMDestReg, (outs VR128X:$dst), +(ins VR128X:$src1, VR128X:$src2), pengfei wrote: > craig.toppe

[PATCH] D105263: [X86] AVX512FP16 instructions enabling 1/6

LuoYuanke added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:3471 + ContainsFloatAtOffset(IRType, IROffset + 4, getDataLayout())) +return llvm::FixedVectorType::get(llvm::Type::getHalfTy(getVMContext()), 4); + For 2 float, return <2xflo

[PATCH] D105263: [X86] AVX512FP16 instructions enabling 1/6

LuoYuanke accepted this revision. LuoYuanke added a comment. This revision is now accepted and ready to land. LGTM, but may wait 1 or 2 days for the comments from others. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105263/new/ https://reviews.llv

[PATCH] D105331: [CFE][X86] Enable complex _Float16.

LuoYuanke added a comment. Would you check the failure of the test cases? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105331/new/ https://reviews.llvm.org/D105331 ___ cfe-commits mailing list cfe-commi

[PATCH] D105264: [X86] AVX512FP16 instructions enabling 2/6

LuoYuanke added inline comments. Comment at: clang/include/clang/Basic/BuiltinsX86.def:1860 +TARGET_BUILTIN(__builtin_ia32_minph512, "V32xV32xV32xIi", "ncV:512:", "avx512fp16") + +TARGET_BUILTIN(__builtin_ia32_minph256, "V16xV16xV16x", "ncV:256:", "avx512fp16,avx512vl

[PATCH] D105264: [X86] AVX512FP16 instructions enabling 2/6

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3197 + else if (PatchedName.endswith("sh")) +PatchedName = IsVCMP ? "vcmpsh" : "cmpsh"; + else if (PatchedName.endswith("ph")) There is no cmpsh? =

[PATCH] D105264: [X86] AVX512FP16 instructions enabling 2/6

LuoYuanke added inline comments. Comment at: llvm/lib/Target/X86/X86InstrFoldTables.cpp:4838 { X86::VMULSDZrr_Intk,X86::VMULSDZrm_Intk, TB_NO_REVERSE }, + { X86::VMULSHZrr_Intk,X86::VMULSHZrm_Intk, TB_NO_REVERSE }, { X86::VMU

[PATCH] D107946: [X86] Reverse *_set_ph and *_setr_ph 's set order.

LuoYuanke added a comment. Any test case update? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D107946/new/ https://reviews.llvm.org/D107946 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https:/

[PATCH] D105265: [X86] AVX512FP16 instructions enabling 3/6

LuoYuanke added inline comments. Comment at: clang/lib/Headers/avx512fp16intrin.h:1748 + +#define _mm_cvt_roundsh_i32(A, R) \ + (int)__builtin_ia32_vcvtsh2si32((__v8hf)(A), (int)(R)) Does it also return i32 in x86_64

[PATCH] D105264: [X86] AVX512FP16 instructions enabling 2/6

LuoYuanke added inline comments. Comment at: clang/lib/Headers/avx512vlfp16intrin.h:368 +_mm256_reduce_add_ph(__m256h __W) { + return __builtin_ia32_reduce_fadd_ph256(0.0f16, __W); +} From https://llvm.org/docs/LangRef.html#llvm-vector-reduce-add-intrinsic, -0.

[PATCH] D105264: [X86] AVX512FP16 instructions enabling 2/6

LuoYuanke accepted this revision. LuoYuanke added a comment. This revision is now accepted and ready to land. LGTM, but may wait 1 or 2 days for the comments from others. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105264/new/ https://reviews.llv

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