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https://github.com/SixWeining created
https://github.com/llvm/llvm-project/pull/72514
7e42545 rejects unsupported mcmodel options, but small/medium/large should be
supported models for LoongArch. In addition, to be compatible with gcc, mapping
some of their values to clang's.
The mapping is:
SixWeining wrote:
cc @xen0n @xry111
https://github.com/llvm/llvm-project/pull/72514
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SixWeining wrote:
> > And AFAIK, gcc side doesn't plan to implement the "large" code model.
>
> Why did we distinguish "large" and "extreme" in the first place? If we don't
> need a different "large" code model then I guess we should make it an alias
> of "extreme" for GCC too.
@ChenghuaXu @c
https://github.com/SixWeining approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/69313
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SixWeining wrote:
To keep original 6 commits I have manually merged into trunk. Now close this PR.
https://github.com/llvm/llvm-project/pull/69313
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SixWeining wrote:
> LGTM. I've no permission to make a formal ("GitHub style") approval.
Thanks. You can request to join the llvm organization via
https://llvm.org/docs/DeveloperPolicy.html#obtaining-commit-access firstly.
Then you can make formal ("Github style") approval.
https://github.com
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https://github.com/SixWeining created
https://github.com/llvm/llvm-project/pull/71025
In g++, empty unions are not ignored like empty structs when flattening structs
to examine whether the structs can be passed via FARs in C++. This patch aligns
clang++ with g++.
Fix https://github.com/llvm/l
SixWeining wrote:
Hi @xen0n @xry111, please help to review this. Thanks.
https://github.com/llvm/llvm-project/pull/71025
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SixWeining wrote:
> [gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html](https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html)
> says
>
> ‘large (Not implemented yet)’ ‘extreme’ This mode does not limit the size of
> the code segment and data segment. The -mcmodel=extreme option is
> inco
https://github.com/SixWeining updated
https://github.com/llvm/llvm-project/pull/72514
>From 8dd5bebcd4681e5e7849743aba0ce90c2959ee23 Mon Sep 17 00:00:00 2001
From: Weining Lu
Date: Thu, 16 Nov 2023 21:57:03 +0800
Subject: [PATCH 1/2] [Driver] Support -mcmodel= for LoongArch
7e42545 rejects uns
https://github.com/SixWeining edited
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SixWeining wrote:
LGTM. I have checked with
https://gcc.gnu.org/onlinedocs/gccint/Machine-Constraints.html. 'G' stands for
"A floating point constant 0.0". But I'd like to wait others' opinion.
https://github.com/llvm/llvm-project/pull/76561
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https://github.com/SixWeining approved this pull request.
LGTM from LoongArch side as GCC only have `-m[no-]strict-align`.
BTW, should clang release notes be updated for this change?
https://github.com/llvm/llvm-project/pull/85350
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@@ -132,6 +132,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
: LoongArchTargetInfo(Triple, Opts) {
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
IntMaxType = Int64Type = SignedLong;
+HasCheapUnalignedBitfieldAccess = true;
--
https://github.com/SixWeining updated
https://github.com/llvm/llvm-project/pull/72962
>From 4985669d2de986d595c791c04a42e84c1f080c01 Mon Sep 17 00:00:00 2001
From: Jinyang He
Date: Tue, 9 Jan 2024 15:35:17 +0800
Subject: [PATCH 1/2] [LoongArch] Insert nops and emit align reloc when handle
alig
https://github.com/SixWeining closed
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SixWeining wrote:
Should be fixed by baba7e4175b6.
https://github.com/llvm/llvm-project/pull/72962
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https://github.com/SixWeining approved this pull request.
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https://github.com/SixWeining approved this pull request.
LGTM. Thanks.
https://github.com/llvm/llvm-project/pull/78664
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https://github.com/SixWeining approved this pull request.
LGTM if the conflicting were resolved.
https://github.com/llvm/llvm-project/pull/78962
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SixWeining wrote:
> Given you've already split your changes into several smaller commits, it's
> probably better to file them as separate PRs, so each one is smaller than the
> current 3+-line diff, and become more reviewable that way.
I'm not sure seperate PRs are appropriate since some o
https://github.com/SixWeining requested changes to this pull request.
- For the commits `[LoongArch][CodeGen][clang] Add builtin functions test cases
for LASX` and `[LoongArch][CodeGen][clang] Add builtin functions test cases for
LSX`, `Change-Id`s can be removed.
- Please fix the test failure.
https://github.com/SixWeining created
https://github.com/llvm/llvm-project/pull/70320
How empty structs (not as fields of container struct) are passed in C++ is not
explicitly documented in psABI. However, this patch fixes the mismatch with g++.
Note that the unnamed bitfield case `struct { in
SixWeining wrote:
Hi @xen0n @xry111, what do you think about this change? If it is ok, I'd like
to checrry-pick to release/17.x (hope it's not too late...).
https://github.com/llvm/llvm-project/pull/70320
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SixWeining wrote:
> also cc @SixWeining (BTW we want to have a GitHub team set up for
> notifications and assignments apparently)
There is one:
https://github.com/orgs/llvm/teams/pr-subscribers-loongarch
I will invite you to join this team and others interested in could also request
to join.
https://github.com/SixWeining approved this pull request.
I have checked that glibc/sysdeps/loongarch/machine-gmon.h defines `_mcount`.
https://github.com/llvm/llvm-project/pull/65657
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SixWeining wrote:
> For GCC, we have `-mno-unalgined-access`. We need also add this option to
> clang.
`-mno-unalgined-access` has been added since clang17:
https://reviews.llvm.org/D149946
https://github.com/llvm/llvm-project/pull/65742
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@@ -132,6 +132,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
: LoongArchTargetInfo(Triple, Opts) {
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
IntMaxType = Int64Type = SignedLong;
+HasCheapUnalignedBitfieldAccess = true;
--
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https://github.com/llvm/llvm-project/pull/97984
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https://github.com/SixWeining approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/97984
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SixWeining wrote:
cc @xen0n @xry111
https://github.com/llvm/llvm-project/pull/107664
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https://github.com/SixWeining approved this pull request.
The LoongArch bits LGTM. Thanks.
https://github.com/llvm/llvm-project/pull/107664
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https://github.com/SixWeining commented:
@wangleiat What do you think?
https://github.com/llvm/llvm-project/pull/93814
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@@ -5368,8 +5368,8 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL,
StringRef TT) {
return DL.empty() ? std::string("G1") : (DL + "-G1").str();
}
- if (T.isRISCV64()) {
-// Make i32 a native type for 64-bit RISC-V.
+ if (T.isRISCV64() || T.isLoongArch64(
SixWeining wrote:
We already have `loongarch-default-features.c`.
https://github.com/llvm/llvm-project/pull/94711
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SixWeining wrote:
I just rename it in f2441b0297501610b59527f93e3174c814d63941.
https://github.com/llvm/llvm-project/pull/94711
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https://github.com/llvm/llvm-project/pull/100068
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https://github.com/SixWeining approved this pull request.
LGTM from the LoongArch side. Thanks!
https://github.com/llvm/llvm-project/pull/93179
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@@ -5340,6 +5340,10 @@ def mno_lasx : Flag<["-"], "mno-lasx">,
Group,
def msimd_EQ : Joined<["-"], "msimd=">, Group,
Flags<[TargetSpecific]>,
HelpText<"Select the SIMD extension(s) to be enabled in LoongArch either
'none', 'lsx', 'lasx'.">;
+def mannotate_tablejump : Flag
https://github.com/SixWeining edited
https://github.com/llvm/llvm-project/pull/102411
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@@ -1462,6 +1462,8 @@ template void
Writer::finalizeAddressDependentContent() {
for (;;) {
bool changed = ctx.target->needsThunks
? tc.createThunks(pass, ctx.outputSections)
+ : ctx.arg.emachine == EM_LOONGARCH && !ctx.arg.relax
SixWeining wrote:
The title should also be updated.
https://github.com/llvm/llvm-project/pull/111488
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SixWeining wrote:
I think that's OK.
https://github.com/llvm/llvm-project/pull/111488
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@@ -0,0 +1,30 @@
+/// Test -m[no]frecipe options.
+
+// RUN: %clang --target=loongarch64 -mfrecipe -fsyntax-only %s -### 2>&1 | \
+// RUN: FileCheck %s --check-prefix=CC1-FRECIPE
+// RUN: %clang --target=loongarch64 -mno-frecipe -fsyntax-only %s -### 2>&1 | \
+// RUN: File
https://github.com/SixWeining approved this pull request.
LGTM except a nit.
https://github.com/llvm/llvm-project/pull/109917
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@@ -251,6 +251,16 @@ void loongarch::getLoongArchTargetFeatures(const Driver &D,
} else /*-mno-lasx*/
Features.push_back("-lasx");
}
+
+ // Select frecipe feature determined by -m[no-]frecipe.
+ if (const Arg *A =
+ Args.getLastArg(options::OPT_mfrecipe,
@@ -5902,6 +5914,92 @@ Register
LoongArchTargetLowering::getExceptionSelectorRegister(
return LoongArch::R5;
}
+//===--===//
+// Target Optimization Hooks
+//===-
@@ -141,6 +141,22 @@ enum NodeType : unsigned {
VALL_NONZERO,
VANY_NONZERO,
+ // Floating point approximate reciprocal operation
+ FRECIPE_S,
SixWeining wrote:
Can we only define two generic nodes (FRECIPE / FRSQRTE)?
https://github.com/llvm/llvm-proje
@@ -251,6 +251,16 @@ void loongarch::getLoongArchTargetFeatures(const Driver &D,
} else /*-mno-lasx*/
Features.push_back("-lasx");
}
+
+ // Select frecipe feature determined by -m[no-]frecipe.
+ if (const Arg *A =
+ Args.getLastArg(options::OPT_mfrecipe,
@@ -19,12 +19,15 @@ def SDT_LoongArchMOVGR2FR_W_LA64
def SDT_LoongArchMOVFR2GR_S_LA64
: SDTypeProfile<1, 1, [SDTCisVT<0, i64>, SDTCisVT<1, f32>]>;
def SDT_LoongArchFTINT : SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisFP<1>]>;
+def SDT_LoongArchFRECIPE : SDTypeProfile<1, 1, [SDTC
@@ -5902,6 +5914,92 @@ Register
LoongArchTargetLowering::getExceptionSelectorRegister(
return LoongArch::R5;
}
+//===--===//
+// Target Optimization Hooks
+//===-
@@ -0,0 +1,396 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch32 --mattr=+f,-d,-frecipe < %s | FileCheck %s
--check-prefix=LA32F
+; RUN: llc --mtriple=loongarch32 --mattr=+f,-d,+frecipe < %s | FileCheck %s
--check
@@ -141,6 +141,22 @@ enum NodeType : unsigned {
VALL_NONZERO,
VANY_NONZERO,
+ // Floating point approximate reciprocal operation
+ FRECIPE_S,
SixWeining wrote:
They are not the same. The iocsrrd_* instructions have same operand type `GPR`
but frecipe_*
@@ -205,7 +205,7 @@ void LoongArchTargetInfo::getTargetDefines(const
LangOptions &Opts,
// TODO: As more features of the V1.1 ISA are supported, a unified "v1.1"
// arch feature set will be used to include all sub-features belonging to
// the V1.1 ISA version
@@ -0,0 +1,1674 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch32 --mattr=+d,-lam-bh < %s | FileCheck %s
--check-prefix=LA32
+; RUN: llc --mtriple=loongarch32 --mattr=+d,+lam-bh < %s | FileCheck %s
--check-prefix=
@@ -2088,8 +2088,26 @@ multiclass binary_atomic_op_wd {
(!cast(inst#"__DB_D"#signed) GPR:$rk, GPR:$rj)>;
}
+// Atomic operation for byte and half word
+multiclass binary_atomic_op_bh {
+ def : Pat<(!cast(op#"_i8_monotonic") GPR:$rj, GPR:$rk),
+(!cast(i
@@ -2088,8 +2088,26 @@ multiclass binary_atomic_op_wd {
(!cast(inst#"__DB_D"#signed) GPR:$rk, GPR:$rj)>;
}
+// Atomic operation for byte and half word
+multiclass binary_atomic_op_bh {
+ def : Pat<(!cast(op#"_i8_monotonic") GPR:$rj, GPR:$rk),
+(!cast(i
https://github.com/SixWeining approved this pull request.
https://github.com/llvm/llvm-project/pull/109917
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@@ -1888,6 +1888,14 @@ void Clang::AddLoongArchTargetArgs(const ArgList &Args,
CmdArgs.push_back("-tune-cpu");
CmdArgs.push_back(Args.MakeArgString(TuneCPU));
}
+
+ if (Arg *A = Args.getLastArg(options::OPT_mannotate_tablejump,
+ options
https://github.com/SixWeining commented:
Better to add gcc's links to commit message to let people know the background.
https://github.com/llvm/llvm-project/pull/102411
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@@ -5340,6 +5340,10 @@ def mno_lasx : Flag<["-"], "mno-lasx">,
Group,
def msimd_EQ : Joined<["-"], "msimd=">, Group,
Flags<[TargetSpecific]>,
HelpText<"Select the SIMD extension(s) to be enabled in LoongArch either
'none', 'lsx', 'lasx'.">;
+def mannotate_tablejump : Flag
SixWeining wrote:
> How about now?
The patch doesn't touch lld, so my suggestion is "[Driver] Default enable
LoongArch linker relaxation".
Some additional comments:
- Do we need to consider the `-gsplit-dwarf` issue #56642 resolved by
https://reviews.llvm.org/D130190 ?
- The ``--no-relax`` op
@@ -1462,6 +1462,8 @@ template void
Writer::finalizeAddressDependentContent() {
for (;;) {
bool changed = ctx.target->needsThunks
? tc.createThunks(pass, ctx.outputSections)
+ : ctx.arg.emachine == EM_LOONGARCH && !ctx.arg.relax
SixWeining wrote:
> Just a heads up, I think this broke documentation builds. After bisecting it
> points to this commit.
Thanks. Fixed by #113632.
https://github.com/llvm/llvm-project/pull/113255
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https://github.com/SixWeining closed
https://github.com/llvm/llvm-project/pull/113632
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https://github.com/SixWeining approved this pull request.
https://github.com/llvm/llvm-project/pull/113632
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https://github.com/SixWeining closed
https://github.com/llvm/llvm-project/pull/114512
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https://github.com/SixWeining approved this pull request.
https://github.com/llvm/llvm-project/pull/114512
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https://github.com/SixWeining approved this pull request.
LGTM. Thanks.
https://github.com/llvm/llvm-project/pull/114513
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https://github.com/SixWeining closed
https://github.com/llvm/llvm-project/pull/114513
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