[PATCH] D140950: [X86] Support -march=emeraldrapids

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D140950/new/ https://reviews.llvm.org/D140950 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.

skan added inline comments. Comment at: llvm/lib/Target/X86/X86.td:949 + FeatureAMXINT8, + FeatureAMXBF16, + FeatureBF16]; --

[PATCH] D155148: [X86] Add SM4 instructions.

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155148/new/ https://reviews.llvm.org/D155148 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D155784: [X86] Update features for sierraforest, grandridge

skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155784/new/ https://reviews.llvm.org/D155784 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bi

[PATCH] D155798: [X86] Support -march=graniterapids-d and update -march=graniterapids

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155798/new/ https://reviews.llvm.org/D155798 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D157680: [X86]Support options -mno-gather -mno-scatter

skan added inline comments. Comment at: llvm/lib/Target/X86/X86.td:437 +: SubtargetFeature<"prefer-no-gather", "PreferGather", "false", + "Indicates if gather prefer to be disabled">; +def FeaturePreferNoScatter Does "Prefer no gather in

[PATCH] D157485: [X86][RFC] Support new feature AVX10

skan added inline comments. Comment at: clang/lib/CodeGen/CodeGenFunction.cpp:2581 + unsigned VectorWidth) { + if (!getTarget().getTriple().isX86() || VectorWidth < 512) +return; Minor suggestion. The code here may

[PATCH] D157485: [X86][RFC] Support new feature AVX10

skan added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp:927 + !STI.hasFeature(X86::FeatureAVX10_512bit)) +report_fatal_error("ZMM registers are not supported without AVX10-512BIT"); switch (TSFlags & X86II::OpPrefixMask) { ---

[PATCH] D157485: [X86][RFC] Support new feature AVX10

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157485/new/ https://reviews.llvm.org/D157485 ___ cfe

[PATCH] D158137: Change -ffp-model= related warn_drv_overriding_flag_option to warn_drv_overriding_option

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158137/new/ https://reviews.llvm.org/D158137 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D158252: Fix regression of D157680

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158252/new/ https://reviews.llvm.org/D158252 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D156962: [Driver] Mark m_x86_Features_Group options as TargetSpecific

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156962/new/ https://reviews.llvm.org/D156962 ___ cfe

[PATCH] D154493: [X86] Support some Intel CPUs for cpu_specific/dispatch feature

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154493/new/ https://reviews.llvm.org/D154493 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D155148: Add SM4 instructions.

skan added inline comments. Comment at: llvm/lib/Target/X86/X86InstrSSE.td:8308 +RC:$src2))]>, + Sched<[WriteVecIMul]>; +def rm : I<0xda, MRMSrcMem, (outs RC:$dst), From the description, it seems that `WriteVecIMul` is not the rig

[PATCH] D155147: Add SM3 instructions.

skan added inline comments. Comment at: llvm/lib/Target/X86/X86InstrSSE.td:8331 +VR128:$src2, (loadv4i32 addr:$src3), timm:$src4))]>, + Sched<[WriteVecIMul]>; + } Is the schedule appropriate? Comment at: llvm/test/

[PATCH] D155146: Add SHA512 instructions.

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155146/new/ https://reviews.llvm.org/D155146 ___ cfe

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

skan added inline comments. Comment at: llvm/lib/Target/X86/X86Subtarget.cpp:275 + size_t posEVEX512 = FS.rfind("+evex512"); + size_t posAVX512F = FS.rfind("+avx512"); + Missing f? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://rev

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

skan added inline comments. Comment at: llvm/lib/Target/X86/X86Subtarget.cpp:271 + // Attach EVEX512 feature when we have AVX512 features and EVEX512 is not set. + size_t posNoEVEX512 = FS.rfind("-evex512"); It seems the change in X86.cpp is redundant? Rep

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

skan added inline comments. Comment at: llvm/lib/Target/X86/X86Subtarget.cpp:277 + + if (posAVX512F != StringRef::npos && + (posNoAVX512F == StringRef::npos || posNoAVX512F < posAVX512F)) Well. It's a very tricky implementation, but I can find out a better

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D159250/new/ https://reviews.llvm.org/D159250 ___ cfe

[PATCH] D75017: [Driver][X86] Add helptext for malign-branch*, mbranches-within-32B-boundaries

skan created this revision. skan added reviewers: annita.zhang, LuoYuanke, craig.topper, lebedev.ri, nemanjai, MaskRay. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D75017 Files: clang/include/clang/Drive

[PATCH] D75017: [Driver][X86] Add helptext for malign-branch*, mbranches-within-32B-boundaries

skan marked an inline comment as done. skan added inline comments. Comment at: clang/include/clang/Driver/Options.td:2175 +def mbranches_within_32B_boundaries : Flag<["-"], "mbranches-within-32B-boundaries">, Flags<[DriverOption]>, Group, + HelpText<"Align branches within 32-by

[PATCH] D75017: [Driver][X86] Add helptext for malign-branch*, mbranches-within-32B-boundaries

skan updated this revision to Diff 246132. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75017/new/ https://reviews.llvm.org/D75017 Files: clang/include/clang/Driver/Options.td Index: clang/include/clang/Driver/Options.td ==

[PATCH] D75017: [Driver][X86] Add helptext for malign-branch*, mbranches-within-32B-boundaries

This revision was automatically updated to reflect the committed changes. Closed by commit rG6a3506a208b9: [Driver][X86] Add helptext for malign-branch*, mbranches-within-32B-boundaries (authored by skan). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org

[PATCH] D70157: Align branches within 32-Byte boundary

skan marked an inline comment as done. skan added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:134 + /// macro-fusion. + inline FirstMFInstKind classifyFirstOpcode(unsigned Opcode) { +switch (Opcode) { craig.topper wrote: > xi

[PATCH] D70157: Align branches within 32-Byte boundary

skan marked an inline comment as done. skan added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:88 +SmallVector BranchTypes; +StringRef(Val).split(BranchTypes, '-', -1, false); +for (auto BranchType : BranchTypes) { c

[PATCH] D70157: Align branches within 32-Byte boundary

skan marked an inline comment as done. skan added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:88 +SmallVector BranchTypes; +StringRef(Val).split(BranchTypes, '-', -1, false); +for (auto BranchType : BranchTypes) { c

[PATCH] D70157: Align branches within 32-Byte boundary

skan marked an inline comment as done. skan added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:88 +SmallVector BranchTypes; +StringRef(Val).split(BranchTypes, '-', -1, false); +for (auto BranchType : BranchTypes) { c

[PATCH] D70157: Align branches within 32-Byte boundary

skan added a comment. In D70157#1745125 , @craig.topper wrote: > I've definitely passed something like > -Wl,--plugin-opt=-debug-only=isel,dagcombine on the command line before. I don't know how you could pass it succcessfully. It doesn't work for me

[PATCH] D70157: Align branches within 32-Byte boundary

skan added a comment. In D70157#1745128 , @craig.topper wrote: > In D70157#1745127 , @skan wrote: > > > In D70157#1745125 , @craig.topper > > wrote: > > > > > I've definite

[PATCH] D70157: Align branches within 32-Byte boundary

skan added a comment. In D70157#1747428 , @davezarzycki wrote: > In D70157#1746793 , @MaskRay wrote: > > > On x86, the preferred function alignment is 16 > > (https://github.com/llvm/llvm-project/blob/arcpatch-D70

[PATCH] D70157: Align branches within 32-Byte boundary

skan marked 3 inline comments as done. skan added inline comments. Comment at: llvm/test/MC/X86/i386-align-branch-1a.s:1 +# RUN: llvm-mc -filetype=obj -triple i386-unknown-unknown --x86-align-branch-boundary=32 --x86-align-branch=fused-jcc-jmp --x86-align-branch-prefix-size=5

[PATCH] D70157: Align branches within 32-Byte boundary

skan added a comment. In D70157#1746793 , @MaskRay wrote: > On x86, the preferred function alignment is 16 > (https://github.com/llvm/llvm-project/blob/arcpatch-D70157/llvm/lib/Target/X86/X86ISelLowering.cpp#L1893), > which is the default function alignm

[PATCH] D70157: Align branches within 32-Byte boundary

skan marked an inline comment as done. skan added a comment. In D70157#1755927 , @jyknight wrote: > Thanks for the comments, they help a little. But it's still somewhat > confusing, so let me write down what seems to be happening: > > - Before emitting ev

[PATCH] D70157: Align branches within 32-Byte boundary

skan added a comment. In D70157#1755927 , @jyknight wrote: > An alternative would be to simply emit NOPs before branches as needed. That > would be substantially simpler, since it would only require special handling > for a branch or a fused-branch. I as

[PATCH] D70157: Align branches within 32-Byte boundary

skan marked an inline comment as done. skan added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:158 +case X86::AND16i16: +case X86::AND16mr: +case X86::AND16ri: craig.topper wrote: > None of the AND/ADD/SUB instructions e

[PATCH] D70157: Align branches within 32-Byte boundary

skan added a comment. In D70157#1768389 , @craig.topper wrote: > Can you please put the macro fusion changes in a separate phabricator review. > I’ll review it in the morning US time and if it all looks good we can get > that part committed while the ot

[PATCH] D70157: Align branches within 32-Byte boundary

skan added a comment. In D70157#1769932 , @MaskRay wrote: > I find another deficiency (infinite loop) with the current approach. > > Say, there is a `je 0` (0x0F 0x84 0x00 0x00 0x00 0x00) at byte 0x90. > (0x90+6)%32 == 0, so it ends on a 32-byte boundary.

[PATCH] D70157: Align branches within 32-Byte boundary

skan marked 3 inline comments as done. skan added inline comments. Comment at: llvm/test/MC/X86/x86-64-align-branch-1b.s:10 +# CHECK: foo: +# CHECK-NEXT:0: 64 89 04 25 01 00 00 00 movl%eax, %fs:1 +# CHECK-NEXT:8: 2e 55

[PATCH] D70157: Align branches within 32-Byte boundary

skan added a comment. In D70157#1771771 , @reames wrote: > We uncovered another functional issue with this patch, or at least, the > interaction of this patch and other parts of LLVM. In our support for > STATEPOINT, PATCHPOINT, and STACKMAP we use N-by

[PATCH] D70157: Align branches within 32-Byte boundary

skan added a comment. In D70157#1775481 , @fedor.sergeev wrote: > In D70157#1775016 , @annita.zhang > wrote: > > > > The point is that we have explicit requirement at the start and we have a > > > lowering into 1

[PATCH] D70157: Align branches within 32-Byte boundary

skan added a comment. In D70157#1777272 , @fedor.sergeev wrote: > In D70157#1776424 , @skan wrote: > > > > What if I insert explicit align(8) right *after* the sequence? > > > > If your insert explicit `.align 8`

[PATCH] D70157: Align branches within 32-Byte boundary

skan marked an inline comment as done. skan added inline comments. Comment at: llvm/lib/MC/MCFragment.cpp:426 + case MCFragment::FT_MachineDependent: { +const MCMachineDependentFragment *MF = +cast(this); MaskRay wrote: > `const auto *`. The type is

[PATCH] D70157: Align branches within 32-Byte boundary

skan added a comment. In D70157#1786901 , @reames wrote: > Noting another issue we found in local testing (with an older version of this > patch). This interacts badly with the implicit exception mechanism in LLVM. > For that mechanism, we end up gener

[PATCH] D70157: Align branches within 32-Byte boundary(NOP padding)

skan updated this revision to Diff 234312. skan retitled this revision from "Align branches within 32-Byte boundary" to "Align branches within 32-Byte boundary(NOP padding)". skan edited the summary of this revision. skan added a comment. **Simplify** 1. Drop prefix padding support 2. Drop clang

[PATCH] D70157: Align branches within 32-Byte boundary(NOP padding)

skan added a comment. In D70157#1788445 , @reames wrote: > Specifically on the revised patch, I remain confused by the need for multiple > subtypes. The need for fragments *between* the potentially fused > instructions doesn't make sense to me. What I

[PATCH] D70157: Align branches within 32-Byte boundary(NOP padding)

skan updated this revision to Diff 234488. skan edited the summary of this revision. skan added a comment. **Simplify** Drop the subtype of `MCBoundaryAlignFragment` and add data member `EmitNops` to indicate whether NOPs should be emitted. CHANGES SINCE LAST ACTION https://reviews.llvm.org/

[PATCH] D70157: Align branches within 32-Byte boundary(NOP padding)

skan updated this revision to Diff 234515. skan added a comment. 1. rename `MCBoundaryAlignFragment::hasEmitNop()` to `MCBoundaryAlignFragment::canEmitNop()` 2. reduce the number of `MCBoundaryAlignFragment` emitted as possible CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70157/new/

[PATCH] D70157: Align branches within 32-Byte boundary(NOP padding)

skan updated this revision to Diff 234520. skan added a comment. Fix a typo in `MCFragment::dump()` CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70157/new/ https://reviews.llvm.org/D70157 Files: llvm/include/llvm/MC/MCAsmBackend.h llvm/include/llvm/MC/MCAssembler.h llvm/include/

[PATCH] D70157: Align branches within 32-Byte boundary(NOP padding)

skan updated this revision to Diff 234650. skan added a comment. move the code that checks if we can reuse the current `MCBoundaryAlignFragment` into the function `X86AsmBackend::getOrCreateBoundaryAlignFragment` CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70157/new/ https://reviews

[PATCH] D70157: Align branches within 32-Byte boundary(NOP padding)

skan updated this revision to Diff 234697. skan added a comment. Add more comment CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70157/new/ https://reviews.llvm.org/D70157 Files: llvm/include/llvm/MC/MCAsmBackend.h llvm/include/llvm/MC/MCAssembler.h llvm/include/llvm/MC/MCFragment

[PATCH] D70157: Align branches within 32-Byte boundary(NOP padding)

skan added a comment. In D70157#1791347 , @reames wrote: > The general question is why a *range* of fragments can't be defined. > Computing the instruction size for the entire range then just requires > walking from first to last fragment in the range s

[PATCH] D70157: Align branches within 32-Byte boundary(NOP padding)

skan marked an inline comment as done. skan added inline comments. Comment at: llvm/lib/MC/MCAssembler.cpp:1003 + // exists) also marks the end of the branch. + for (auto i = 0U, N = BF.isFused() ? 2U : 1U; + i != N && !isa(F); ++i, F = F->getNextNode()) { ---

[PATCH] D70157: Align branches within 32-Byte boundary(NOP padding)

skan updated this revision to Diff 234830. skan added a comment. 1. Simplify the test cases. 2. Add some comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70157/new/ https://reviews.llvm.org/D70157 Files: llvm/include/llvm/MC/MCAsmBackend.h llvm/include/llvm/MC/MCAssembler.h

[PATCH] D70157: Align branches within 32-Byte boundary(NOP padding)

skan added a comment. Do you think this patch is ready to land? @MaskRay CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70157/new/ https://reviews.llvm.org/D70157 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org

[PATCH] D70157: Align branches within 32-Byte boundary(NOP padding)

skan updated this revision to Diff 234846. skan added a comment. 1. Add more tests for `!VK_NONE` cases. 2. Reduce pervasive `auto` CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70157/new/ https://reviews.llvm.org/D70157 Files: llvm/include/llvm/MC/MCAsmBackend.h llvm/include/llvm/

[PATCH] D75723: [X86] Make intrinsics _BitScan* not limited to Windows

skan created this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Currently if we want to use _BitScan*, we have to include intrin.h, which can only be included on Windows. Intrinsics _BitScan* are implemented by LLVM IR, so the restriction doesn't make sense. Re

[PATCH] D75723: [X86] Make intrinsics _BitScan* not limited to Windows

skan updated this revision to Diff 248650. skan added a comment. Fix typo Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75723/new/ https://reviews.llvm.org/D75723 Files: clang/include/clang/Basic/BuiltinsX86.def clang/include/clang/Basic/Built

[PATCH] D75723: [X86] Make intrinsics _BitScan* not limited to Windows

skan updated this revision to Diff 248652. skan added a comment. Format the patch due to the warning given by pre-merge check Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75723/new/ https://reviews.llvm.org/D75723 Files: clang/include/clang/Bas

[PATCH] D75723: [X86] Make intrinsics _BitScan* not limited to Windows

skan marked an inline comment as done. skan added inline comments. Comment at: clang/include/clang/Basic/BuiltinsX86.def:1904 +// BITSCAN +TARGET_BUILTIN(_BitScanForward, "UcUNi*UNi", "n", "") +TARGET_BUILTIN(_BitScanReverse, "UcUNi*UNi", "n", "") craig.topper wr

[PATCH] D75723: [X86] Make intrinsics _BitScan* not limited to Windows

skan marked an inline comment as done. skan added inline comments. Comment at: clang/include/clang/Basic/BuiltinsX86.def:1904 +// BITSCAN +TARGET_BUILTIN(_BitScanForward, "UcUNi*UNi", "n", "") +TARGET_BUILTIN(_BitScanReverse, "UcUNi*UNi", "n", "") rnk wrote: > cr

[PATCH] D75723: [X86] Enable intrinsics _BitScan*

skan updated this revision to Diff 249282. skan added a comment. Enable _BitScan* as intrinsics rather than builtin on linux Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75723/new/ https://reviews.llvm.org/D75723 Files: clang/lib/Headers/ia32in

[PATCH] D75894: [X86] Support intrinsics _bextr2*

skan created this revision. skan added reviewers: LuoYuanke, craig.topper, RKSimon, pengfei. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D75894 Files: clang/lib/Headers/bmiintrin.h clang/test/CodeGen/bm

[PATCH] D75896: [X86] Support intrinsic _mm_cldemote

skan created this revision. skan added reviewers: LuoYuanke, craig.topper, RKSimon, pengfei. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D75896 Files: clang/lib/Headers/cldemoteintrin.h clang/test/CodeG

[PATCH] D75897: [X86] Support intrinsic _mm_broadcastsi128_si256

skan created this revision. skan added reviewers: LuoYuanke, craig.topper, RKSimon, pengfei. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D75897 Files: clang/lib/Headers/avx2intrin.h clang/test/CodeGen/a

[PATCH] D75723: [X86] Enable intrinsics _BitScan*

skan updated this revision to Diff 249546. skan added a comment. Address review comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75723/new/ https://reviews.llvm.org/D75723 Files: clang/lib/Headers/ia32intrin.h clang/test/CodeGen/bitscan-

[PATCH] D75894: [X86] Support intrinsics _bextr2*

skan updated this revision to Diff 249547. skan added a comment. Address review comment Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75894/new/ https://reviews.llvm.org/D75894 Files: clang/lib/Headers/bmiintrin.h clang/test/CodeGen/bmi-builti

[PATCH] D75896: [X86] Support intrinsic _mm_cldemote

skan updated this revision to Diff 249548. skan added a comment. Fix typo Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75896/new/ https://reviews.llvm.org/D75896 Files: clang/lib/Headers/cldemoteintrin.h clang/test/CodeGen/cldemote.c Index:

[PATCH] D75723: [X86] Enable intrinsics _BitScan*

skan updated this revision to Diff 249550. skan marked an inline comment as done. skan added a comment. Make the variale name in macro start with 2 underscores Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75723/new/ https://reviews.llvm.org/D75723

[PATCH] D75723: [X86] Enable intrinsics _BitScan*

skan added inline comments. Comment at: clang/lib/Headers/ia32intrin.h:456 + __extension__({ \ +long long c = (long long)(b); \ +unsigned char d;

[PATCH] D75723: [X86] Enable intrinsics _BitScan*

skan marked an inline comment as done. skan added inline comments. Comment at: clang/lib/Headers/ia32intrin.h:421 +if (__c != 0) { \ + *(a) = (unsigned)__bsfd(__c); \

[PATCH] D75723: [X86] Enable intrinsics _BitScan*

skan marked an inline comment as done. skan added inline comments. Comment at: clang/lib/Headers/ia32intrin.h:421 +if (__c != 0) { \ + *(a) = (unsigned)__bsfd(__c); \

[PATCH] D75894: [X86] Support intrinsics _bextr2*

This revision was automatically updated to reflect the committed changes. Closed by commit rG560aa53f8fe5: [X86] Support intrinsics _bextr2* (authored by skan). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75894/new/ https://reviews.llvm.org/D75894

[PATCH] D75896: [X86] Support intrinsic _mm_cldemote

This revision was automatically updated to reflect the committed changes. Closed by commit rGab69cd0779c5: [X86] Support intrinsic _mm_cldemote (authored by skan). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75896/new/ https://reviews.llvm.org/D75

[PATCH] D75897: [X86] Support intrinsic _mm_broadcastsi128_si256

This revision was automatically updated to reflect the committed changes. Closed by commit rG214d24e1f8e0: [X86] Support intrinsic _mm_broadcastsi128_si256 (authored by skan). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75897/new/ https://reviews.

[PATCH] D75723: [X86] Enable intrinsics _BitScan*

skan abandoned this revision. skan added a comment. Reconsidered the advice of @rnk , we can use `-fms-extensions` to supported _BitScan* on linux. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75723/new/ https://reviews.llvm.org/D75723 ___

[PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM for the MC part. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152785/new/ https://reviews.llvm.org/D152785 __

[PATCH] D152989: Pre-commit test for D151696.

skan added inline comments. Comment at: clang/test/CodeGen/attr-cpuspecific-cpus.c:12 + +ATTR(cpu_specific(generic)) void CPU0(void){} +ATTR(cpu_specific(pentium)) void CPU1(void){} Shouldn't we use the same function name? Repository: rG LLVM Github Monorepo

[PATCH] D152989: Pre-commit test for D151696.

skan added inline comments. Comment at: clang/test/CodeGen/attr-cpuspecific-cpus.c:12 + +ATTR(cpu_specific(generic)) void CPU0(void){} +ATTR(cpu_specific(pentium)) void CPU1(void){} FreddyYe wrote: > skan wrote: > > Shouldn't we use the same function name? > Emmm

[PATCH] D152989: Pre-commit test for D151696.

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152989/new/ https://reviews.llvm.org/D152989 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D153714: [NFC] Add missing cpu tests in predefined-arch-macros.c

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D153714/new/ https://reviews.llvm.org/D153714 ___ cfe

[PATCH] D147525: [X86] Add AMX_COMPLEX to Graniterapids

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147525/new/ https://reviews.llvm.org/D147525 ___ cfe

[PATCH] D151863: [x86][MC] Fix movdir64b addressing

skan added a comment. Replace the url of the picture in the summary with the plain text? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D151863/new/ https://reviews.llvm.org/D151863 ___ cfe-commits mailing

[PATCH] D151863: [x86][MC] Fix movdir64b addressing

skan added inline comments. Comment at: llvm/test/MC/X86/x86-64-movdir64b-intel.s:1 +// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s +// CHECK: movdir64b rax, zmmword ptr [rax - 4096] T

[PATCH] D151863: [x86][MC] Fix movdir64b addressing

skan added inline comments. Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:1780 // Otherwise, we set the base register to a non-zero value - // if we don't know the actual value at this time. This is necessary to + // if we don't know the actual value at this ti

[PATCH] D151863: [x86][MC] Fix movdir64b addressing

skan added inline comments. Comment at: llvm/test/MC/X86/x86-64-movdir64b-intel.s:1 +// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s +// CHECK: movdir64b rax, zmmword ptr [rax - 4096] a

[PATCH] D151863: [x86][MC] Fix movdir64b addressing

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D151863/new/ https://reviews.llvm.org/D151863 ___ cfe

[PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows

skan added inline comments. Comment at: llvm/lib/DebugInfo/DWARF/DWARFContext.cpp:1895 + if (RelocatedSection != Obj.section_end() && Name.contains(".dwo")) { +// Each section in COFF can directly contain relocations. +if (isa(&Obj) && Section.relocations().e

[PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows

skan added inline comments. Comment at: llvm/lib/DebugInfo/DWARF/DWARFContext.cpp:1896 +// Each section in COFF can directly contain relocations. +if (isa(&Obj) && Section.relocations().empty()) + continue; Should we merge the check into

[PATCH] D107141: [Inline-asm] Add diagnosts for unsupported inline assembly arguments

skan added inline comments. Comment at: clang/test/Sema/asm.c:318-346 +typedef struct test19_a { + int a; + char b; +} test19_a; + +typedef struct test19_b { + int a; Better to add comments about the size of the struct. Comment at: clang/tes

[PATCH] D115225: [X86][MS-InlineAsm] Make the constraint *m to be simple place holder

skan added inline comments. Comment at: clang/test/CodeGen/ms-inline-asm-functions.c:42 __asm mov eax, k; - // CHECK: movl_k, %eax + // CHECK: movlk, %eax __asm mov eax, kptr; This change is strange here. Others looks good to me. Repository: r

[PATCH] D115225: [X86][MS-InlineAsm] Make the constraint *m to be simple place holder

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115225/new/ https://reviews.llvm.org/D115225 ___ cfe

[PATCH] D115611: [X86][BF16] delete `typedef unsigned short __bfloat16`

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115611/new/ https://reviews.llvm.org/D115611 ___ cfe

[PATCH] D116090: [X86][MS-InlineAsm] Use exact conditions to recognize MS global variables

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. Thank you for the fix! LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D116090/new/ https://reviews.llvm.org/D116090

[PATCH] D100085: [X86] Support -march=rocketlake

skan added inline comments. Comment at: llvm/lib/Support/X86TargetParser.cpp:293-301 +// Empty processor. Include X87 and CMPXCHG8 for backwards compatibility. +{{""}, CK_None, ~0U, FeatureX87 | FeatureCMPXCHG8B}, +// i386-generation processors. +{{"i386"}, CK_i38

[PATCH] D100085: [X86] Support -march=rocketlake

skan added inline comments. Comment at: llvm/lib/Target/X86/X86.td:271-273 -def FeatureSGX : SubtargetFeature<"sgx", "HasSGX", "true", - "Enable Software Guard Extensions">; def FeatureCLFLUSHOPT : SubtargetFeature<"clflushopt", "HasCLFLU

[PATCH] D100085: [X86] Support -march=rocketlake

skan added inline comments. Comment at: llvm/lib/Support/X86TargetParser.cpp:176 FeaturesBroadwell | FeatureAES | FeatureCLFLUSHOPT | FeatureXSAVEC | FeatureXSAVES | FeatureSGX; // SkylakeServer inherits all SkylakeClient features except SGX. Shouldn't

[PATCH] D100085: [X86] Support -march=rocketlake

skan accepted this revision. skan added inline comments. Comment at: llvm/lib/Support/X86TargetParser.cpp:176 FeaturesBroadwell | FeatureAES | FeatureCLFLUSHOPT | FeatureXSAVEC | FeatureXSAVES | FeatureSGX; // SkylakeServer inherits all SkylakeClient features except SG

[PATCH] D111517: [X86] Remove little support we had for MPX

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111517/new/ https://reviews.llvm.org/D111517 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

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