https://github.com/jthackray closed
https://github.com/llvm/llvm-project/pull/90440
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
https://github.com/llvm/llvm-project/pull/98307
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
jthackray wrote:
> Can something be done to prevent this happening accidentally again?
+1. Currently, the struct is initialised with:
`BranchProtectionInfo() = default;`
so it appears this could be improved in future.
https://github.com/llvm/llvm-project/pull/98307
_
@@ -472,22 +472,22 @@ def FeatureFP8 : ExtensionWithMArch<"fp8", "FP8",
"FEAT_FP8",
"Enable FP8 instructions", [FeatureFAMINMAX, FeatureLUT, FeatureBF16]>;
def FeatureFP8FMA : ExtensionWithMArch<"fp8fma", "FP8FMA", "FEAT_FP8FMA",
- "Enable fp8 multiply-add instructions",
@@ -210,29 +210,29 @@ def FeatureDotProd : ExtensionWithMArch<"dotprod",
"DotProd", "FEAT_DotProd",
"Enable dot product support", [FeatureNEON]>;
def FeatureMPAM : Extension<"mpam", "MPAM", "FEAT_MPAM",
- "Enable v8.4-A Memory system Partitioning and Monitoring extension">
jthackray wrote:
> LGTM. Seems like there are still many more inconsistencies that could be
> improved too.
Yes, the more I looked through, the more I spotted. I'm aiming to get something
merged before llvm19 branching, since these are (much more) user-visible now.
https://github.com/llvm/llv
@@ -106,24 +106,24 @@ def FeatureSpecRestrict : Extension<"specrestrict",
"SpecRestrict", "FEAT_CSV2_2
//===--===//
def FeatureLSE : ExtensionWithMArch<"lse", "LSE", "FEAT_LSE",
- "Enable ARMv8.1 Large Syst
https://github.com/jthackray closed
https://github.com/llvm/llvm-project/pull/98550
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray created
https://github.com/llvm/llvm-project/pull/98698
Add documentation for the `--print-supported-extensions`
option which appears to be missing at present.
>From 8071d6f5da6d6a236a558e1488f2d9f1eb51719b Mon Sep 17 00:00:00 2001
From: Jonathan Thackray
Date: Fri
https://github.com/jthackray updated
https://github.com/llvm/llvm-project/pull/98698
>From b5d6146b583f96c7e8cec9abd2d2fec51dd4a611 Mon Sep 17 00:00:00 2001
From: Jonathan Thackray
Date: Fri, 12 Jul 2024 23:08:28 +0100
Subject: [PATCH] [AArch64][RISCV] Document option --print-supported-extensio
https://github.com/jthackray closed
https://github.com/llvm/llvm-project/pull/98698
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/90614
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
LGTM (presumably these were mechanically renamed, given the diff size).
https://github.com/llvm/llvm-project/pull/90320
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.
jthackray wrote:
> The command-line names or FEAT_ names should probably be what we are aiming
> for if we are changing them one-way or the other.
Yes, standardising on FEAT_* names would be good to match the TRM, so we avoid
the
AEK_PREDRES/FEAT_SPECRES, AEK_PERFMON/FEAT_PMUv3, etc. mismatche
@@ -85,6 +85,10 @@ def SMEUnsupported : AArch64Unsupported {
SME2Unsupported.F);
}
+def MTEUnsupported : AArch64Unsupported {
+ let F = [HasMTE];
+}
+
jthackray wrote:
I can't see that MTEUnsupported is referenced from elsewhere in this
https://github.com/jthackray edited
https://github.com/llvm/llvm-project/pull/91022
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
LGTM. (You've still got a few FIXMEs in AArch64SchedOryon.td, I assume you know
about these)
https://github.com/llvm/llvm-project/pull/91022
___
cfe-commits mailing list
cfe-commits@lists.llvm.o
@@ -85,6 +85,10 @@ def SMEUnsupported : AArch64Unsupported {
SME2Unsupported.F);
}
+def MTEUnsupported : AArch64Unsupported {
+ let F = [HasMTE];
+}
+
jthackray wrote:
Oh yes. Thanks.
https://github.com/llvm/llvm-project/pull/91022
___
https://github.com/jthackray edited
https://github.com/llvm/llvm-project/pull/91022
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -85,6 +85,10 @@ def SMEUnsupported : AArch64Unsupported {
SME2Unsupported.F);
}
+def MTEUnsupported : AArch64Unsupported {
+ let F = [HasMTE];
+}
+
jthackray wrote:
Thanks for removing those. Can't see anything else obviously wrong.
https://github.com/jthackray deleted
https://github.com/llvm/llvm-project/pull/91022
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray deleted
https://github.com/llvm/llvm-project/pull/91022
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray deleted
https://github.com/llvm/llvm-project/pull/91022
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray dismissed
https://github.com/llvm/llvm-project/pull/91022
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
LGTM :)
https://github.com/llvm/llvm-project/pull/102501
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray commented:
LGTM so far. Just a couple of minor comments.
https://github.com/llvm/llvm-project/pull/96795
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray edited
https://github.com/llvm/llvm-project/pull/96795
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -343,7 +350,9 @@ bool isX18ReservedByDefault(const Triple &TT);
// themselves, they are sequential (0, 1, 2, 3, ...).
uint64_t getCpuSupportsMask(ArrayRef FeatureStrs);
-void PrintSupportedExtensions(StringMap DescMap);
+void PrintSupportedExtensions();
+
+void printEnabled
@@ -9,28 +9,46 @@
//
//===--===//
-// A SubtargetFeature that can be toggled from the command line, and therefore
-// has an AEK_* entry in ArmExtKind.
+// A SubtargetFeature that represents one or more Archi
https://github.com/jthackray approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/96795
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/112341
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -522,6 +522,39 @@ def FeatureTLBIW : ExtensionWithMArch<"tlbiw", "TLBIW",
"FEAT_TLBIW",
// Armv9.6 Architecture Extensions
//===--===//
+def FeatureCMPBR : ExtensionWithMArch<"cmpbr", "CMPBR", "FEAT_CMPB
@@ -522,6 +522,39 @@ def FeatureTLBIW : ExtensionWithMArch<"tlbiw", "TLBIW",
"FEAT_TLBIW",
// Armv9.6 Architecture Extensions
//===--===//
+def FeatureCMPBR : ExtensionWithMArch<"cmpbr", "CMPBR", "FEAT_CMPB
@@ -522,6 +522,39 @@ def FeatureTLBIW : ExtensionWithMArch<"tlbiw", "TLBIW",
"FEAT_TLBIW",
// Armv9.6 Architecture Extensions
//===--===//
+def FeatureCMPBR : ExtensionWithMArch<"cmpbr", "CMPBR", "FEAT_CMPB
@@ -522,6 +522,39 @@ def FeatureTLBIW : ExtensionWithMArch<"tlbiw", "TLBIW",
"FEAT_TLBIW",
// Armv9.6 Architecture Extensions
//===--===//
+def FeatureCMPBR : ExtensionWithMArch<"cmpbr", "CMPBR", "FEAT_CMPB
@@ -522,6 +522,39 @@ def FeatureTLBIW : ExtensionWithMArch<"tlbiw", "TLBIW",
"FEAT_TLBIW",
// Armv9.6 Architecture Extensions
//===--===//
+def FeatureCMPBR : ExtensionWithMArch<"cmpbr", "CMPBR", "FEAT_CMPB
https://github.com/jthackray deleted
https://github.com/llvm/llvm-project/pull/111677
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray closed
https://github.com/llvm/llvm-project/pull/110825
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray created
https://github.com/llvm/llvm-project/pull/110825
This introduces the Armv9.6-A architecture version, including the relevant
command-line option for -march.
More details about the Armv9.6-A architecture version can be found at:
*
https://community.arm.com
jthackray wrote:
> It might be worth splitting each feature into its own commit rather than one
> big commit, it makes the review easier. Currently it's difficult to determine
> which section belongs to which feature.
Hmm, yeah possible.
https://github.com/llvm/llvm-project/pull/112341
__
@@ -0,0 +1,14 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+occmo
-mattr=+mte < %s | FileCheck %s
jthackray wrote:
I think these tests should also check in
@@ -0,0 +1,12 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+pcdphint %s | FileCheck
%s
jthackray wrote:
I think these tests should also check the instructions are rejecte
@@ -1331,7 +1331,10 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
AArch64::AEK_SVE_F16F32MM, AArch64::AEK_SVE_AES2,
AArch64::AEK_SSVE_AES, AArch64::AEK_F8F32MM,
AArch64::AEK_F8F16MM, AArch64::AEK_LSFE,
- AArch64::AEK_FPRCVT, AArch64
@@ -533,11 +638,158 @@ bool
AArch64ABIInfo::isZeroLengthBitfieldPermittedInHomogeneousAggregate()
return true;
}
+// Check if a type is a Pure Scalable Type as defined by AAPCS64. Return the
+// number of data vectors and the number of predicate vectors in the types,
into
@@ -423,6 +510,19 @@ ABIArgInfo AArch64ABIInfo::classifyReturnType(QualType
RetTy,
// Homogeneous Floating-point Aggregates (HFAs) are returned directly.
return ABIArgInfo::getDirect();
+ // In AAPCS return values of a Pure Scalable type are treated is a first
named
@@ -533,11 +638,158 @@ bool
AArch64ABIInfo::isZeroLengthBitfieldPermittedInHomogeneousAggregate()
return true;
}
+// Check if a type is a Pure Scalable Type as defined by AAPCS64. Return the
+// number of data vectors and the number of predicate vectors in the types,
into
https://github.com/jthackray edited
https://github.com/llvm/llvm-project/pull/112747
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
Looks like a good improvement.
https://github.com/llvm/llvm-project/pull/113281
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
jthackray wrote:
> Hi David, rebase done. Could you help to merge?
It doesn't look like it builds at the moment. Happy to help merge when it's
ready :)
https://github.com/llvm/llvm-project/pull/110085
___
cfe-commits mailing list
cfe-commits@lists.ll
@@ -799,6 +802,24 @@ bool CFI_Parser::parseFDEInstructions(A &addressSpace,
}
break;
+#if defined(_LIBUNWIND_TARGET_AARCH64)
+ case DW_CFA_AARCH64_negate_ra_state_with_pc: {
+int64_t value =
+results->savedRegisters[UNW_AARCH64_RA_SIGN_
@@ -68,19 +68,13 @@ struct ExtensionInfo {
#include "llvm/TargetParser/AArch64TargetParserDef.inc"
struct FMVInfo {
- StringRef Name; // The target_version/target_clones spelling.
- CPUFeatures Bit;// Index of the bit in the FMV feature bitset.
- StringRef Features;
https://github.com/jthackray edited
https://github.com/llvm/llvm-project/pull/112341
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray updated
https://github.com/llvm/llvm-project/pull/113496
>From f56eb26dbeb683777a7db97b43ebaea19a88e5b8 Mon Sep 17 00:00:00 2001
From: Jonathan Thackray
Date: Sat, 19 Oct 2024 00:20:20 +0100
Subject: [PATCH] [AArch64] Add support for Armv9.6-A FEAT_PoPS architecture
https://github.com/jthackray approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/114804
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/113580
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray created
https://github.com/llvm/llvm-project/pull/113496
Add support for the following Armv9.6-A architecture extensions:
* FEAT_PoPS - Point of Physical Storage
as documented here:
https://developer.arm.com/documentation/109697/2024_09/Feature-description
https://github.com/jthackray approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/112747
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray commented:
You could also create an ARM/ directory, and move arm-* files into that too
(186 files)
https://github.com/llvm/llvm-project/pull/115818
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm
https://github.com/jthackray approved this pull request.
Fine by me; I guess anyone with a PR in-flight will need to rebase.
https://github.com/llvm/llvm-project/pull/115818
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org
https://github.com/jthackray edited
https://github.com/llvm/llvm-project/pull/110085
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -362,6 +362,16 @@ def : ProcessorModel<"cortex-m33", CortexM4Model,
[ARMv8mMainline,
FeatureHasNoBranchPredictor,
FeatureFixCMSE_CVE_2021_35465]>;
+def
https://github.com/jthackray commented:
Could you add `star-mc1` to clang/test/Driver/arm-cortex-cpus-2.c?
https://github.com/llvm/llvm-project/pull/110085
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/l
https://github.com/jthackray edited
https://github.com/llvm/llvm-project/pull/110085
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray commented:
Another possible addition would be to `clang/test/Driver/arm-v8m.c`:
```
// RUN: %clang -target arm-none-none-eabi -mcpu=star-mc1 %s -### -c 2>&1 |
FileCheck %s --check-prefix=V8M_MAINLINE_STAR_MC1_DSP
// RUN: %clang -target arm-none-none-eabi -mcpu=star-m
https://github.com/jthackray approved this pull request.
Thanks, LGTM.
https://github.com/llvm/llvm-project/pull/110085
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray edited
https://github.com/llvm/llvm-project/pull/110825
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray edited
https://github.com/llvm/llvm-project/pull/110825
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray closed
https://github.com/llvm/llvm-project/pull/113496
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
https://github.com/llvm/llvm-project/pull/112687
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/115296
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray created
https://github.com/llvm/llvm-project/pull/118492
None
>From 609cf3fbdb28c155f4b8c787c1e2cb791c8a292f Mon Sep 17 00:00:00 2001
From: Jonathan Thackray
Date: Fri, 29 Nov 2024 11:27:03 +
Subject: [PATCH] [AArch64] Add intrinsics for SME FP8 FDOT LANE instr
https://github.com/jthackray updated
https://github.com/llvm/llvm-project/pull/118492
>From 609cf3fbdb28c155f4b8c787c1e2cb791c8a292f Mon Sep 17 00:00:00 2001
From: Jonathan Thackray
Date: Fri, 29 Nov 2024 11:27:03 +
Subject: [PATCH 1/2] [AArch64] Add intrinsics for SME FP8 FDOT LANE
instru
https://github.com/jthackray approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/118124
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -740,6 +740,11 @@ let SMETargetGuard = "sme2" in {
def SVLUTI4_LANE_ZT_X2 : Inst<"svluti4_lane_zt_{d}_x2", "2.di[i",
"cUcsUsiUibhf", MergeNone, "aarch64_sme_luti4_lane_zt_x2", [IsStreaming,
IsInZT0], [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_3>]>;
}
+// FDOT
jthackray wrote:
> We would also want feature and immediate range tests
Now added.
https://github.com/llvm/llvm-project/pull/118492
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -740,6 +740,11 @@ let SMETargetGuard = "sme2" in {
def SVLUTI4_LANE_ZT_X2 : Inst<"svluti4_lane_zt_{d}_x2", "2.di[i",
"cUcsUsiUibhf", MergeNone, "aarch64_sme_luti4_lane_zt_x2", [IsStreaming,
IsInZT0], [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_3>]>;
}
+// FDOT
https://github.com/jthackray approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/118811
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray updated
https://github.com/llvm/llvm-project/pull/118492
>From 609cf3fbdb28c155f4b8c787c1e2cb791c8a292f Mon Sep 17 00:00:00 2001
From: Jonathan Thackray
Date: Fri, 29 Nov 2024 11:27:03 +
Subject: [PATCH 1/4] [AArch64] Add intrinsics for SME FP8 FDOT LANE
instru
https://github.com/jthackray updated
https://github.com/llvm/llvm-project/pull/118492
>From 609cf3fbdb28c155f4b8c787c1e2cb791c8a292f Mon Sep 17 00:00:00 2001
From: Jonathan Thackray
Date: Fri, 29 Nov 2024 11:27:03 +
Subject: [PATCH 1/3] [AArch64] Add intrinsics for SME FP8 FDOT LANE
instru
https://github.com/jthackray approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/118272
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/118025
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/118027
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/118125
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/118126
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray updated
https://github.com/llvm/llvm-project/pull/118492
>From 609cf3fbdb28c155f4b8c787c1e2cb791c8a292f Mon Sep 17 00:00:00 2001
From: Jonathan Thackray
Date: Fri, 29 Nov 2024 11:27:03 +
Subject: [PATCH 1/3] [AArch64] Add intrinsics for SME FP8 FDOT LANE
instru
@@ -740,6 +740,11 @@ let SMETargetGuard = "sme2" in {
def SVLUTI4_LANE_ZT_X2 : Inst<"svluti4_lane_zt_{d}_x2", "2.di[i",
"cUcsUsiUibhf", MergeNone, "aarch64_sme_luti4_lane_zt_x2", [IsStreaming,
IsInZT0], [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_3>]>;
}
+// FDOT
+let
@@ -5737,3 +5768,113 @@ multiclass sme2_fmop4a_fp8_fp16_2way {
// Multiple vectors
def _M2Z2Z_BtoH : sme2_fp8_fp16_quarter_tile_outer_product<0b1, 0b1,
mnemonic, ZZ_b_mul_r_Lo, ZZ_b_mul_r_Hi>;
}
+
+// FP8 SME FDOT instructions
+
+// Selection DAG patterns - map to first le
@@ -0,0 +1,57 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// REQUIRES: aarch64-registered-target
+#include
+
+// RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme
-target-feature +sme2 -target
https://github.com/jthackray updated
https://github.com/llvm/llvm-project/pull/118492
>From 609cf3fbdb28c155f4b8c787c1e2cb791c8a292f Mon Sep 17 00:00:00 2001
From: Jonathan Thackray
Date: Fri, 29 Nov 2024 11:27:03 +
Subject: [PATCH 1/3] [AArch64] Add intrinsics for SME FP8 FDOT LANE
instru
jthackray wrote:
> [Immediate argument
> tests](https://github.com/llvm/llvm-project/blob/e804d5f7cc459b9310122ed5405bba5c4d6a2350/clang/test/Sema/aarch64-fp8-intrinsics/acle_sme2_fp8_imm.c)
Thanks. Looks like this is in #118549 which hasn't been merged yet (/me starts
reviewing your change ;)
https://github.com/jthackray approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/118432
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray updated
https://github.com/llvm/llvm-project/pull/118492
>From 609cf3fbdb28c155f4b8c787c1e2cb791c8a292f Mon Sep 17 00:00:00 2001
From: Jonathan Thackray
Date: Fri, 29 Nov 2024 11:27:03 +
Subject: [PATCH 1/5] [AArch64] Add intrinsics for SME FP8 FDOT LANE
instru
@@ -0,0 +1,29 @@
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme
-target-feature +sme2 -verify -emit-llvm -o - %s
+
+// REQUIRES: aarch64-registered-target
+
+#include
+
+void test_features(uint32_t slice, svmfloat8_t f8, svmfloat8x2_t f8x2,
+
@@ -219,6 +219,37 @@ class SME2_Tile_Movaz_Pat(name # _PSEUDO) $tile, $base, $offset)>;
+
+// FP8 SME FDOT instructions
+
+// Selection DAG patterns - map to first level of pseudo-instructions
(xxx_PSEUDO)
+class SME2_FP8_FMLA_FDOT_Index_VG1x2_Pat
+ : Pat<(intrinsic (i32 (tile
@@ -986,8 +986,8 @@ def LUTI4_S_4ZZT2Z : sme2_luti4_vector_vg4_strided<0b00,
0b00, "luti4">;
let Predicates = [HasSMEF8F16] in {
defm FVDOT_VG2_M2ZZI_BtoH : sme2p1_multi_vec_array_vg2_index_f8f16<"fvdot",
0b11, 0b110, ZZ_b_mul_r, ZPR4b8>;
-defm FDOT_VG2_M2ZZI_BtoH : sme2p1
@@ -219,6 +219,37 @@ class SME2_Tile_Movaz_Pat(name # _PSEUDO) $tile, $base, $offset)>;
+
+// FP8 SME FDOT instructions
+
+// Selection DAG patterns - map to first level of pseudo-instructions
(xxx_PSEUDO)
+class SME2_FP8_FMLA_FDOT_Index_VG1x2_Pat
+ : Pat<(intrinsic (i32 (tile
@@ -0,0 +1,114 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// REQUIRES: aarch64-registered-target
+#include
+
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2
-target-feature +sme-f8f16 -
@@ -0,0 +1,114 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// REQUIRES: aarch64-registered-target
+#include
+
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2
-target-feature +sme-f8f16 -
https://github.com/jthackray deleted
https://github.com/llvm/llvm-project/pull/118492
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/jthackray updated
https://github.com/llvm/llvm-project/pull/118492
>From 609cf3fbdb28c155f4b8c787c1e2cb791c8a292f Mon Sep 17 00:00:00 2001
From: Jonathan Thackray
Date: Fri, 29 Nov 2024 11:27:03 +
Subject: [PATCH 1/6] [AArch64] Add intrinsics for SME FP8 FDOT LANE
instru
101 - 200 of 334 matches
Mail list logo
