https://github.com/jthackray updated https://github.com/llvm/llvm-project/pull/98698
>From b5d6146b583f96c7e8cec9abd2d2fec51dd4a611 Mon Sep 17 00:00:00 2001 From: Jonathan Thackray <jonathan.thack...@arm.com> Date: Fri, 12 Jul 2024 23:08:28 +0100 Subject: [PATCH] [AArch64][RISCV] Document option --print-supported-extensions --- clang/docs/CommandGuide/clang.rst | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/clang/docs/CommandGuide/clang.rst b/clang/docs/CommandGuide/clang.rst index a348f3640c5eb..29154292dc7a5 100644 --- a/clang/docs/CommandGuide/clang.rst +++ b/clang/docs/CommandGuide/clang.rst @@ -400,6 +400,14 @@ number of cross compilers, or may only support a native target. option is only supported on AArch64 and RISC-V. On RISC-V, this option also prints out the ISA string of enabled extensions. +.. option:: --print-supported-extensions + + Prints the list of all extensions that are supported for every CPU target + for an architecture (specified through ``--target=<architecture>`` or + :option:`-arch` ``<architecture>``). If no target is specified, the system + default target will be used. Currently, this option is only supported on + AArch64 and RISC-V. + Code Generation Options ~~~~~~~~~~~~~~~~~~~~~~~ _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
