[PATCH] D68021: [IntrinsicEmitter] Add overloaded type VecOfBitcastsToInt for SVE intrinsics

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM Looks like a pretty straightforward change. Might be worth waiting a day or so before committing incase anyone else has any comments. CHANGES SINCE LAST ACTION https://reviews.llv

[PATCH] D68023: [AArch64][SVE] Implement int_aarch64_sve_cnt intrinsic

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:100-104 + defm CLS_ZPmZ : sve_int_un_pred_arit_1< 0b000, "cls", null_frag>; + defm CLZ_ZPmZ : sve_in

[PATCH] D68380: [Driver] NFC: Remove duplicate call to getLibGccType

c-rhodes created this revision. c-rhodes added a reviewer: saugustine. https://reviews.llvm.org/D68380 Files: clang/lib/Driver/ToolChains/CommonArgs.cpp Index: clang/lib/Driver/ToolChains/CommonArgs.cpp === --- clang/lib/Driver/T

[PATCH] D68380: [Driver] NFC: Remove duplicate call to getLibGccType

This revision was automatically updated to reflect the committed changes. Closed by commit rL373712: [Driver] NFC: Remove duplicate call to getLibGccType (authored by c-rhodes, committed by ). Herald added a project: LLVM. Herald added a subscriber: llvm-commits. Changed prior to commit: https:

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 278430. c-rhodes added a comment. Changes: - Documented internal type attributes. - Set `ASTNode = 0` on user-facing `ArmSveVectorBitsAttr` as the internal type attrs are used in the AST. Also removed the case for this from `TypePrinter`. - `getSveVectorWid

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

c-rhodes marked 6 inline comments as done. c-rhodes added inline comments. Comment at: clang/include/clang/Basic/Attr.td:1541 +def ArmSveVectorBits128 : TypeAttr { + let Spellings = []; aaron.ballman wrote: > aaron.ballman wrote: > > c-rhodes wrote: > > > sdes

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

c-rhodes added inline comments. Comment at: clang/include/clang/Basic/Attr.td:1541 +def ArmSveVectorBits128 : TypeAttr { + let Spellings = []; c-rhodes wrote: > aaron.ballman wrote: > > aaron.ballman wrote: > > > c-rhodes wrote: > > > > sdesmalen wrote: > > >

[PATCH] D83553: [PATCH 3/4][Sema][AArch64] Add codegen for arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 278466. c-rhodes added a comment. Changes: - Rebased. - Added comments for args in calls to `ConvertTypeForMem` when `EnforceFixedLengthSVEAttribute` is set and documented `EnforceFixedLengthSVEAttribute`. - `s/getFixedSVETypeForMemory/getFixedLengthSVETyp

[PATCH] D83553: [PATCH 3/4][Sema][AArch64] Add codegen for arm_sve_vector_bits attribute

c-rhodes marked 5 inline comments as done. c-rhodes added inline comments. Comment at: clang/lib/CodeGen/CodeGenTypes.h:138 + llvm::Type *ConvertTypeForMem(QualType T, bool ForBitField = false, +bool EnforceFixedLengthSVEAttribute = false);

[PATCH] D83550: [PATCH 1/4][Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 278507. c-rhodes added a comment. Use `const auto *` and remove cast CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83550/new/ https://reviews.llvm.org/D83550 Files: clang/include/clang/AST/Type.h clang/include/clang/Basic/Attr.td clang/inclu

[PATCH] D83550: [PATCH 1/4][Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

c-rhodes marked an inline comment as done. c-rhodes added a comment. In D83550#2155837 , @aaron.ballman wrote: > LGTM aside from a small nit. In D83550#2156063 , @rsandifo-arm wrote: > Thanks for doing this.

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

c-rhodes added inline comments. Comment at: clang/include/clang/Basic/Attr.td:1541 +def ArmSveVectorBits128 : TypeAttr { + let Spellings = []; aaron.ballman wrote: > c-rhodes wrote: > > c-rhodes wrote: > > > aaron.ballman wrote: > > > > aaron.ballman wrote: >

[PATCH] D83550: [PATCH 1/4][Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

This revision was automatically updated to reflect the committed changes. c-rhodes marked an inline comment as done. Closed by commit rGbb160e769dbe: [Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute (authored by c-rhodes). Changed prior to commit: https://reviews.llvm.org/D

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

c-rhodes added inline comments. Comment at: clang/include/clang/Basic/Attr.td:1541 +def ArmSveVectorBits128 : TypeAttr { + let Spellings = []; aaron.ballman wrote: > c-rhodes wrote: > > aaron.ballman wrote: > > > c-rhodes wrote: > > > > c-rhodes wrote: > > > >

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 279178. c-rhodes added a comment. Changes: - Remove internal type attributes (defined for each vector-size). - Get the vector size from the `arm_sve_vector_bits` attribute via the `AttributedTypeLoc` associated with the typedef decl. - Change `NumBits` argu

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

c-rhodes marked an inline comment as done. c-rhodes added inline comments. Comment at: clang/include/clang/Basic/Attr.td:1541 +def ArmSveVectorBits128 : TypeAttr { + let Spellings = []; c-rhodes wrote: > aaron.ballman wrote: > > c-rhodes wrote: > > > aaron.bal

[PATCH] D83553: [PATCH 3/4][Sema][AArch64] Add codegen for arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 279265. c-rhodes added a comment. Change the default for `EnforceFixedLengthSVEAttribute`. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83553/new/ https://reviews.llvm.org/D83553 Files: clang/lib/CodeGen/CGExpr.cpp clang/lib/CodeGen/CodeGenFu

[PATCH] D83553: [PATCH 3/4][Sema][AArch64] Add codegen for arm_sve_vector_bits attribute

c-rhodes marked an inline comment as done. c-rhodes added inline comments. Comment at: clang/lib/CodeGen/CodeGenTypes.h:138 + llvm::Type *ConvertTypeForMem(QualType T, bool ForBitField = false, +bool EnforceFixedLengthSVEAttribute = false);

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

c-rhodes added inline comments. Comment at: clang/lib/AST/ASTContext.cpp:1887 + +unsigned getSvePredWidth(const Type *T) { return getSveVectorWidth(T) / 8; } + aaron.ballman wrote: > Should this be dividing by the number of bits in a char for the target as > opp

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 279455. c-rhodes added a comment. - Make helpers static in ASTContext. - Use `getCharWidth`. - `s/vector-length-sized/vector-length-specific`. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83551/new/ https://reviews.llvm.org/D83551 Files: clang/

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

c-rhodes added a comment. In D83551#2164984 , @aaron.ballman wrote: > The attribute bits LGTM, thanks! Thanks for reviewing! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83551/new/ https://reviews.llvm.org/D83551 _

[Differential] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

This revision was not accepted when it landed; it landed in state "Needs Review". This revision was automatically updated to reflect the committed changes. Closed by commit rG89e61e782b73: [Sema][AArch64] Add semantics for arm_sve_vector_bits attribute (authored by c-rhodes). Changed prior to co

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

This revision was automatically updated to reflect the committed changes. Closed by commit rG89e61e782b73: [Sema][AArch64] Add semantics for arm_sve_vector_bits attribute (authored by c-rhodes). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83551/new

[PATCH] D82582: [SVE] Remove calls to VectorType::getNumElements from clang

c-rhodes added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:5612-5613 llvm::VectorType *VTy = GetNeonType(this, Type, HasLegalHalfType, false, AllowBFloatArgsAndRet); llvm::Type *Ty = VTy; Is there a

[PATCH] D83553: [PATCH 3/4][Sema][AArch64] Add codegen for arm_sve_vector_bits attribute

c-rhodes marked an inline comment as done. c-rhodes added inline comments. Comment at: clang/lib/CodeGen/CGExpr.cpp:152 + Align, Name, + /*ArraySize=*/nullptr, Alloca); efriedma wrote: > Do we need to bitcast the result of CreateTempAlloca to a pointe

[PATCH] D82582: [SVE] Remove calls to VectorType::getNumElements from clang

c-rhodes added a comment. there's a few places the `getNumElements` calls can be fixed by getting the initial cast right Comment at: clang/lib/CodeGen/CGBuiltin.cpp:5986 case NEON::BI__builtin_neon_vqrdmulh_lane_v: { auto *RTy = cast(Ty); if (BuiltinID == NEON::BI

[PATCH] D81462: [SveEmitter] Add builtins for svtbl2

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81462/new/ https://reviews.llvm.org/D81462 ___

[PATCH] D83550: [PATCH 1/4][Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, rsandifo-arm, efriedma, ctetreau, cameron.mcinally. Herald added subscribers: danielkiss, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a reviewer: aaron.ballman. Herald added a project: clang. This pa

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, rsandifo-arm, efriedma, cameron.mcinally, ctetreau. Herald added subscribers: danielkiss, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a reviewer: aaron.ballman. Herald added a project: clang. This pa

[PATCH] D83553: [PATCH 3/4][Sema][AArch64] Add codegen for arm_sve_vector_bits attribute

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, rsandifo-arm, efriedma, cameron.mcinally, ctetreau. Herald added subscribers: danielkiss, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: clang. This patch implements codegen for the 'arm_sve_

[PATCH] D83553: [PATCH 3/4][Sema][AArch64] Add codegen for arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 277043. c-rhodes added a comment. Changes: - Use fixed-length instead of fixed-width in naming. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83553/new/ https://reviews.llvm.org/D83553 Files: clang/lib/CodeGen/CGExpr.cpp clang/lib/CodeGen/CGR

[PATCH] D83550: [PATCH 1/4][Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 277853. c-rhodes added a comment. Address @sdesmalen comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83550/new/ https://reviews.llvm.org/D83550 Files: clang/include/clang/AST/Type.h clang/include/clang/Basic/Attr.td clang/include/clan

[PATCH] D83550: [PATCH 1/4][Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

c-rhodes marked 6 inline comments as done. c-rhodes added inline comments. Comment at: clang/lib/Sema/SemaType.cpp:7784 + // The __ARM_FEATURE_SVE_BITS macro must be defined when using this attribute. + auto &PP = S.getPreprocessor(); + if (!PP.isMacroDefined("__ARM_FEATURE_S

[PATCH] D83550: [PATCH 1/4][Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 278009. c-rhodes marked 2 inline comments as done and an inline comment as not done. c-rhodes added a comment. Address @aaron.ballman comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83550/new/ https://reviews.llvm.org/D83550 Files: clang/

[PATCH] D83550: [PATCH 1/4][Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

c-rhodes marked 6 inline comments as done. c-rhodes added a comment. @aaron.ballman thanks for comments! I've updated the patch Comment at: clang/include/clang/Basic/Attr.td:1538 + let Args = [IntArgument<"NumBits">]; + let Documentation = [Undocumented]; +}

[PATCH] D83550: [PATCH 1/4][Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

c-rhodes added inline comments. Comment at: clang/lib/Sema/SemaType.cpp:7784 + // The __ARM_FEATURE_SVE_BITS macro must be defined when using this attribute. + auto &PP = S.getPreprocessor(); + if (!PP.isMacroDefined("__ARM_FEATURE_SVE_BITS")) { sdesmalen wro

[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

c-rhodes added inline comments. Comment at: clang/include/clang/Basic/Attr.td:1541 +def ArmSveVectorBits128 : TypeAttr { + let Spellings = []; sdesmalen wrote: > aaron.ballman wrote: > > sdesmalen wrote: > > > nit: Can you add a comment saying why these are un

[PATCH] D83550: [PATCH 1/4][Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 278218. c-rhodes edited the summary of this revision. c-rhodes added a comment. Herald added a subscriber: dang. Added `-msve-vector-bits=` flag. If specified the `__ARM_FEATURE_SVE_BITS__EXPERIMENTAL` macro is defined and a language option `ArmSveVectorBit

[PATCH] D83550: [PATCH 1/4][Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 278249. c-rhodes added a comment. - Add a note to docs explaining this feature is a WIP. - `s/__ARM_FEATURE_SVE_BITS__EXPERIMENTAL/__ARM_FEATURE_SVE_BITS_EXPERIMENTAL`. - `s/validIntegerConstantExpr/verifyValidIntegerConstantExpr`. - Removed unrelated change.

[PATCH] D83550: [PATCH 1/4][Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

c-rhodes marked 6 inline comments as done. c-rhodes added inline comments. Comment at: clang/test/Sema/arm-feature-sve-bits-macro.c:3 + +#include + aaron.ballman wrote: > c-rhodes wrote: > > aaron.ballman wrote: > > > This should not be using a system include (u

[PATCH] D82178: [AArch64][SVE] Guard svbfloat16_t with feature macro in ACLE

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, efriedma, stuij, fpetrogalli. Herald added subscribers: cfe-commits, danielkiss, psnobl, rkruppe, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: clang. sdesmalen added inline comments. =

[PATCH] D82178: [AArch64][SVE] Guard svbfloat16_t with feature macro in ACLE

c-rhodes updated this revision to Diff 272043. c-rhodes added a comment. Changes: - Error if `__ARM_FEATURE_BF16_SCALAR_ARITHMETIC` not defined when defining `__ARM_FEATURE_SVE_BF16`. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82178/new/ https://reviews.llvm.org/D82178 Files: cl

[PATCH] D82182: [AArch64][SVE] Add bfloat16 support to perm and select intrinsics

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, efriedma, stuij, david-arm, fpetrogalli, kmclaughlin. Herald added subscribers: danielkiss, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added projects: clang, LLVM. Added for following intrinsics: - zip1, zip2,

[PATCH] D82186: [AArch64][SVE] Add bfloat16 support to svlen intrinsic

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, efriedma, david-arm, fpetrogalli, stuij. Herald added subscribers: danielkiss, psnobl, rkruppe, kristof.beyls, tschuett. Herald added a project: clang. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D82186 Files

[PATCH] D82178: [AArch64][SVE] Guard svbfloat16_t with feature macro in ACLE

c-rhodes updated this revision to Diff 272091. c-rhodes added a comment. Changes: - Include `arm_bf16.h` if `__ARM_FEATURE_BF16_SCALAR_ARITHMETIC` is defined. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82178/new/ https://reviews.llvm.org/D82178 Files: clang/include/clang/Basic/ar

[PATCH] D82186: [AArch64][SVE] Add bfloat16 support to svlen intrinsic

c-rhodes added inline comments. Comment at: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c:2 // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -W

[PATCH] D82182: [AArch64][SVE] Add bfloat16 support to perm and select intrinsics

c-rhodes added inline comments. Comment at: clang/include/clang/Basic/arm_sve.td:1115 +let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { +def SVREV_BF16: SInst<"svrev[_{d}]","dd", "b", MergeNone, "aarch64_sve_rev">; fpetrogalli wrote: > nit: cou

[PATCH] D82182: [AArch64][SVE] Add bfloat16 support to perm and select intrinsics

c-rhodes added inline comments. Comment at: clang/include/clang/Basic/arm_sve.td:1115 +let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { +def SVREV_BF16: SInst<"svrev[_{d}]","dd", "b", MergeNone, "aarch64_sve_rev">; c-rhodes wrote: > fpetrogalli

[PATCH] D82178: [AArch64][SVE] Guard svbfloat16_t with feature macro in ACLE

This revision was automatically updated to reflect the committed changes. Closed by commit rGc8fae2bb4afe: [AArch64][SVE] Guard svbfloat16_t with feature macro in ACLE (authored by c-rhodes). Changed prior to commit: https://reviews.llvm.org/D82178?vs=272091&id=272664#toc Repository: rG LLVM

[PATCH] D82178: [AArch64][SVE] Guard svbfloat16_t with feature macro in ACLE

c-rhodes added a comment. In D82178#2106847 , @fpetrogalli wrote: > LGTM! Thanks. Thanks for reviewing! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82178/new/ https://reviews.llvm.org/D82178 ___

[PATCH] D82182: [AArch64][SVE] Add bfloat16 support to perm and select intrinsics

c-rhodes added inline comments. Comment at: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c:2 // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -W

[PATCH] D82369: [SveEmitter] Add verify-checks to Clang bfloat16 tests

c-rhodes added inline comments. Comment at: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c:3-6 +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-ar

[PATCH] D82182: [AArch64][SVE] Add bfloat16 support to perm and select intrinsics

c-rhodes updated this revision to Diff 272745. c-rhodes added a comment. Changes: - Moved bfloat tests to separate files. - Added checks to test intrinsics are guarded by feature flag, this is by omitting the feature macro `__ARM_FEATURE_SVE_BF16` for now but will eventually be updated to omit

[PATCH] D82186: [AArch64][SVE] Add bfloat16 support to svlen intrinsic

c-rhodes updated this revision to Diff 272753. c-rhodes added a comment. Changes: - Rebased. - Moved bfloat test to separate file. - Added checks to test intrinsics are guarded by feature flag, this is by omitting the feature macro `__ARM_FEATURE_SVE_BF16` for now but will eventually be updated

[PATCH] D82391: [AArch64][SVE] Add bfloat16 support to svext intrinsic

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, kmclaughlin, efriedma, david-arm, fpetrogalli. Herald added subscribers: danielkiss, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added projects: clang, LLVM. Repository: rG LLVM Github Monorepo https://review

[PATCH] D82399: [AArch64][SVE2] Add bfloat16 support to whilerw/whilewr intrinsics

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, efriedma, kmclaughlin, david-arm, fpetrogalli, stuij. Herald added subscribers: danielkiss, kristof.beyls, tschuett. Herald added projects: clang, LLVM. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D82399 Fil

[PATCH] D82182: [AArch64][SVE] Add bfloat16 support to perm and select intrinsics

c-rhodes added inline comments. Comment at: clang/include/clang/Basic/arm_sve.td:1115 +let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { +def SVREV_BF16: SInst<"svrev[_{d}]","dd", "b", MergeNone, "aarch64_sve_rev">; fpetrogalli wrote: > c-rhodes

[PATCH] D82399: [AArch64][SVE2] Add bfloat16 support to whilerw/whilewr intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rG05e10ee0aee0: [AArch64][SVE2] Add bfloat16 support to whilerw/whilewr intrinsics (authored by c-rhodes). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82399/

[PATCH] D82182: [AArch64][SVE] Add bfloat16 support to perm and select intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rG26502ad60922: [AArch64][SVE] Add bfloat16 support to perm and select intrinsics (authored by c-rhodes). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82182/n

[PATCH] D82186: [AArch64][SVE] Add bfloat16 support to svlen intrinsic

This revision was automatically updated to reflect the committed changes. Closed by commit rGfd2c4b899932: [AArch64][SVE] Add bfloat16 support to svlen intrinsic (authored by c-rhodes). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82186/new/ https:

[PATCH] D82182: [AArch64][SVE] Add bfloat16 support to perm and select intrinsics

c-rhodes marked an inline comment as done. c-rhodes added inline comments. Comment at: clang/include/clang/Basic/arm_sve.td:1115 +let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { +def SVREV_BF16: SInst<"svrev[_{d}]","dd", "b", MergeNone, "aarch64_sve_rev">; ---

[PATCH] D82450: [AArch64][SVE] Add multiclass for bfloat16 intrinsic definitions

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, fpetrogalli, kmclaughlin, efriedma. Herald added subscribers: danielkiss, psnobl, rkruppe, kristof.beyls, tschuett. Herald added a project: clang. Patch implements a multiclass 'SInstBF16', a wrapper around SInst that also define

[PATCH] D82182: [AArch64][SVE] Add bfloat16 support to perm and select intrinsics

c-rhodes added inline comments. Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll:809 +define @rev_bf16( %a) { +; CHECK-LABEL: rev_bf16 sdesmalen wrote: > Does this test not need the `+bf16` attribute to work? (which implies the > patterns a

[PATCH] D82429: [sve][acle] Add some C intrinsics for brain float types.

c-rhodes added inline comments. Comment at: clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c:4-5 +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch6

[PATCH] D82429: [sve][acle] Add some C intrinsics for brain float types.

c-rhodes added inline comments. Comment at: clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c:7 +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feat

[PATCH] D82345: [sve][acle] Implement some of the C intrinsics for brain float.

c-rhodes added a comment. We need to guard the LLVM patterns on the +bf16 feature as we've done in other patches Comment at: clang/include/clang/Basic/arm_sve.td:694 def SVDUPQ_16 : SInst<"svdupq[_n]_{d}", "d", "sUsh", MergeNone>; +let ArchGuard = "defined(__ARM_FEAT

[PATCH] D82391: [AArch64][SVE] Add bfloat16 support to svext intrinsic

c-rhodes updated this revision to Diff 273365. c-rhodes added a comment. Changes: - Guard patterns on `+bf16`. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82391/new/ https://reviews.llvm.org/D82391 Files: clang/include/clang/Basic/arm_sve.td clang/test/CodeGen/aarch64-sve-intrin

[PATCH] D82429: [sve][acle] Add some C intrinsics for brain float types.

c-rhodes accepted this revision. c-rhodes added inline comments. This revision is now accepted and ready to land. Comment at: clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c:7 +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SC

[PATCH] D82578: [AArch64][SVE2] Guard while intrinsics on scalar bfloat feature macro

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, fpetrogalli, kmclaughlin. Herald added subscribers: danielkiss, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a reviewer: efriedma. Herald added a project: clang. `svwhilerw_bf16` and `svwhilewr_bf16` i

[PATCH] D82345: [sve][acle] Implement some of the C intrinsics for brain float.

c-rhodes added a comment. @fpetrogalli thanks for updating! I have a few more comments, sorry I missed a few things yesterday Comment at: clang/include/clang/Basic/arm_sve.td:725-727 + def NAME : SInst; + let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { +def _BF1

[PATCH] D82578: [AArch64][SVE2] Guard while intrinsics on scalar bfloat feature macro

This revision was automatically updated to reflect the committed changes. Closed by commit rGd45cf9105b5a: [AArch64][SVE2] Guard while intrinsics on scalar bfloat feature macro (authored by c-rhodes). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D825

[PATCH] D82391: [AArch64][SVE] Add bfloat16 support to svext intrinsic

c-rhodes updated this revision to Diff 273685. c-rhodes added a comment. Changes: - Add tests for bfloat bitcast patterns. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82391/new/ https://reviews.llvm.org/D82391 Files: clang/include/clang/Basic/arm_sve.td clang/test/CodeGen/aarch6

[PATCH] D82665: [AArch64][SVE] Add bfloat16 to outstanding tuple vector intrinsics

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, kmclaughlin, fpetrogalli. Herald added subscribers: danielkiss, psnobl, rkruppe, kristof.beyls, tschuett. Herald added a reviewer: efriedma. Herald added projects: clang, LLVM. - svget2/3/4 - svset2/3/4 - svcreate2/3/4 - svundef/

[PATCH] D82668: [AArch64][SVE] clang: Add missing svbfloat16_t tests

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, kmclaughlin, fpetrogalli. Herald added subscribers: danielkiss, psnobl, rkruppe, kristof.beyls, tschuett. Herald added a reviewer: efriedma. Herald added a project: clang. Patch adds tests for mangling of svbfloat16_t and several

[PATCH] D82345: [sve][acle] Implement some of the C intrinsics for brain float.

c-rhodes added a comment. @fpetrogalli thanks for updating, LGTM! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82345/new/ https://reviews.llvm.org/D82345 ___ cfe-commits mailing list cfe-commits@lists

[PATCH] D82391: [AArch64][SVE] Add bfloat16 support to svext intrinsic

This revision was automatically updated to reflect the committed changes. Closed by commit rGd5fc592b7c26: [AArch64][SVE] Add bfloat16 support to svext intrinsic (authored by c-rhodes). Changed prior to commit: https://reviews.llvm.org/D82391?vs=273685&id=274052#toc Repository: rG LLVM Githu

[PATCH] D82665: [AArch64][SVE] Add bfloat16 to outstanding tuple vector intrinsics

c-rhodes added inline comments. Comment at: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c:9 +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else fpetrog

[PATCH] D82668: [AArch64][SVE] clang: Add missing svbfloat16_t tests

c-rhodes added inline comments. Comment at: clang/test/CodeGenCXX/aarch64-sve-typeinfo.cpp:4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu %s -emit-llvm -o - \ -// RUN: -target-feature +sve | FileCheck %s +// RUN: -target-feature +sve,+bf16 | FileCheck %s -

[PATCH] D82665: [AArch64][SVE] Add bfloat16 to outstanding tuple vector intrinsics

c-rhodes updated this revision to Diff 274081. c-rhodes added a comment. Changes: - Cover all indexes in get/set ACLE tests CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82665/new/ https://reviews.llvm.org/D82665 Files: clang/include/clang/Basic/arm_sve.td clang/test/CodeGen/aarch

[PATCH] D82665: [AArch64][SVE] Add bfloat16 to outstanding tuple vector intrinsics

c-rhodes added inline comments. Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-create-tuple.ll:100 + +define @test_svcreate2_bf16_vec0(i1 %p, %z0, %z1) local_unnamed_addr #0 { +; CHECK-LABEL: test_svcreate2_bf16_vec0: fpetrogalli wrote: > nit: remove `lo

[PATCH] D82665: [AArch64][SVE] Add bfloat16 to outstanding tuple vector intrinsics

c-rhodes updated this revision to Diff 274138. c-rhodes added a comment. Changes: - Use function attribute for `+bf16` target feature. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82665/new/ https://reviews.llvm.org/D82665 Files: clang/include/clang/Basic/arm_sve.td clang/test/Co

[PATCH] D82668: [AArch64][SVE] clang: Add missing svbfloat16_t tests

This revision was automatically updated to reflect the committed changes. Closed by commit rG1ef75f53e9e6: [AArch64][SVE] clang: Add missing svbfloat16_t tests (authored by c-rhodes). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82668/new/ https://

[PATCH] D82665: [AArch64][SVE] Add bfloat16 to outstanding tuple vector intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rGe73c3bb06b5a: [AArch64][SVE] Add bfloat16 to outstanding tuple vector intrinsics (authored by c-rhodes). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82665/

[PATCH] D83553: [PATCH 3/4][Sema][AArch64] Add codegen for arm_sve_vector_bits attribute

c-rhodes abandoned this revision. c-rhodes added a comment. I've posted a prototype D85128 with an alternative implementation, given it's quite different to this patch I've posted it as a separate patch and am abandoning this one. See new patch for more details

[PATCH] D85128: [Prototype][SVE] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85128#2191108 , @tschuett wrote: > Stupid questions. > > - Is it for convenience? You get arrays, global variables, structs, ... . > Vectorization becomes easier ... Yes, this allows the definition of types that can be used

[PATCH] D85128: [Prototype][SVE] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85128#2191401 , @efriedma wrote: > Not going to write detailed review comments, but this looks like the right > approach in general. Thanks for taking a look! I'll split this up into separate patches soon. > One high-level

[PATCH] D85128: [Prototype][SVE] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85128#2192867 , @c-rhodes wrote: > In D85128#2191108 , @tschuett wrote: > >> - Is it compatible with GCC? > > Support for this attribute landed in GCC 10 and it's more complete than wha

[PATCH] D85128: [Prototype][SVE] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85128#2193309 , @tschuett wrote: > Sorry. I meant ABI. Can link GCC .o files with Clang .o files using the > attributes? Yes they should be compatible. The machine-level ABI distinguishes 4 types of SVE vector [1]: - VG×64

[PATCH] D85736: [Sema][AArch64] Support arm_sve_vector_bits attribute

c-rhodes created this revision. c-rhodes added reviewers: efriedma, sdesmalen, rsandifo-arm, aaron.ballman, paulwalker-arm. Herald added subscribers: danielkiss, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: clang. c-rhodes requested review of this revision.

[PATCH] D85736: [Sema][AArch64] Support arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 285124. c-rhodes added a comment. Added missing implicit conversions for C++. I considered handling this with the existing implicit vector conversion although one side of the conversion will be an SVE builtin, so instead I've added a new conversion specifical

[PATCH] D85736: [Sema][AArch64] Support arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 285285. c-rhodes marked an inline comment as not done. c-rhodes added a comment. Address @rsandifo-arm comments. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D85736/new/ https://reviews.llvm.org/D85736 Files: clang/include/clang/AST/ASTContext.h

[PATCH] D85736: [Sema][AArch64] Support arm_sve_vector_bits attribute

c-rhodes marked 4 inline comments as done. c-rhodes added inline comments. Comment at: clang/lib/AST/ASTContext.cpp:1941 +// Adjust the alignment for fixed-length SVE predicates. +if (VT->getVectorKind() == VectorType::SveFixedLengthPredicateVector) + Align = 16; ---

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

c-rhodes marked 2 inline comments as done. c-rhodes added inline comments. Comment at: clang/lib/AST/ItaniumMangle.cpp:3330 +// appendices to the Procedure Call Standard for the Arm Architecture, see: +// https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst#app

[PATCH] D86100: [Clang][SVE] NFC: Move info about ACLE types into separate function.

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM, just one minor nit but seems like a nice improvement Comment at: clang/include/clang/AST/ASTContext.h:1318 + BuiltinVectorTypeInfo + getElementTypeForBuiltinVecto

[PATCH] D130984: [clang][AArch64][SVE] Add unary +/- operators for SVE types

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM, just one minor comment Comment at: clang/test/CodeGen/aarch64-sve-vector-arith-ops.c:1654 + +// UNARY PROMOTION + should we add FP tests as well?

[PATCH] D106333: [AArch64][SVE] Handle svbool_t VLST <-> VLAT/GNUT conversion

c-rhodes added inline comments. Comment at: clang/lib/AST/ASTContext.cpp:8673 +/// getSVETypeSize - Return SVE vector or perdicate register size. +static uint64_t getSVETypeSize(ASTContext &Context, const BuiltinType *Ty) { s/perdicate/predicate =

[PATCH] D106860: [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts

c-rhodes added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:2065 if (const auto *FixedSrc = dyn_cast(SrcTy)) { if (const auto *ScalableDst = dyn_cast(DstTy)) { +// If we are casting a fixed i8 vector to a scalable 16 x i1 predicate

[PATCH] D106860: [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts

c-rhodes added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:2110-2129 // Perform VLAT <-> VLST bitcast through memory. // TODO: since the llvm.experimental.vector.{insert,extract} intrinsics // require the element types of the vectors to be

[PATCH] D129476: [AArch64][SVE] Prefer SIMD&FP variant of clast[ab]

c-rhodes created this revision. c-rhodes added reviewers: paulwalker-arm, bsmith, peterwaller-arm, DavidTruby. Herald added subscribers: psnobl, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: efriedma. Herald added a project: All. c-rhodes requested review of this revision. Herald add

[PATCH] D129476: [AArch64][SVE] Prefer SIMD&FP variant of clast[ab]

c-rhodes updated this revision to Diff 443594. c-rhodes added a comment. Add full patch context. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D129476/new/ https://reviews.llvm.org/D129476 Files: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c clang/test/CodeGen/aarch64-

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