c-rhodes added a comment. In D85128#2191401 <https://reviews.llvm.org/D85128#2191401>, @efriedma wrote:
> Not going to write detailed review comments, but this looks like the right > approach in general. Thanks for taking a look! I'll split this up into separate patches soon. > One high-level thing to consider: we could still decide that in IR > generation, we want to represent VLSTs registers using scalable vector types, > like the original patch did. This would allow avoiding the awkward "bitcast" > implementation. That interacts with a relatively narrow slice of clang > CodeGen, though; we could easily change it later without impacting the rest > of the changes. Yeah now that the VLST is part of the canonical type with the new vector kinds we have more information if we were to go the CodeGenTypes route if that's what you're referring to as the narrow slice of CodeGen. That would still require converting between VLAT/VLST, I quite like this approach as it gives me more confidence we're not missing bitcasts when doing it as part of a cast operation. I guess with what you're suggesting the bitcast could still be emitted there but the cast operations could be limited in Sema to cases where ultimately `ConvertType` would return a type that requires bitcasting, or are you saying that could be avoided completely? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D85128/new/ https://reviews.llvm.org/D85128 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
