[clang] 5e5a1d2 - [CodeGen] Emit conj/conjf/confjl libcalls as fneg instructions if possible.

Author: Craig Topper Date: 2019-12-31T10:41:00-08:00 New Revision: 5e5a1d27909626169c15b8f63e10d22fcbdf88d9 URL: https://github.com/llvm/llvm-project/commit/5e5a1d27909626169c15b8f63e10d22fcbdf88d9 DIFF: https://github.com/llvm/llvm-project/commit/5e5a1d27909626169c15b8f63e10d22fcbdf88d9.diff

[clang] d9717d8 - [X86] Add a memory clobber to the bittest intrinsic inline asm. Get default clobbers from the target

Author: Craig Topper Date: 2020-09-23T14:54:39-07:00 New Revision: d9717d8ee7143f4f5b768dfb5e8629ecfa067e39 URL: https://github.com/llvm/llvm-project/commit/d9717d8ee7143f4f5b768dfb5e8629ecfa067e39 DIFF: https://github.com/llvm/llvm-project/commit/d9717d8ee7143f4f5b768dfb5e8629ecfa067e39.diff

[clang] 4cbceb7 - [X86] Add basic support for -mtune command line option in clang

Author: Craig Topper Date: 2020-08-18T15:13:19-07:00 New Revision: 4cbceb74bb5676d0181d4d0cab5194d90a42c2ec URL: https://github.com/llvm/llvm-project/commit/4cbceb74bb5676d0181d4d0cab5194d90a42c2ec DIFF: https://github.com/llvm/llvm-project/commit/4cbceb74bb5676d0181d4d0cab5194d90a42c2ec.diff

[clang] b32f203 - [X86][Driver] Remove code that forced a core2 mtune from MachO::TranslateArgs.

Author: Craig Topper Date: 2020-08-18T23:44:36-07:00 New Revision: b32f203edc8579d4c0023007880293c3f9404fb7 URL: https://github.com/llvm/llvm-project/commit/b32f203edc8579d4c0023007880293c3f9404fb7 DIFF: https://github.com/llvm/llvm-project/commit/b32f203edc8579d4c0023007880293c3f9404fb7.diff

[clang] 7cffaf5 - [X89] Ignore -mtune=generic to fix failures some users are seeing after D85384

Author: Craig Topper Date: 2020-08-19T13:17:57-07:00 New Revision: 7cffaf510f97eabef89b0d45aeb939df40e8e9d3 URL: https://github.com/llvm/llvm-project/commit/7cffaf510f97eabef89b0d45aeb939df40e8e9d3 DIFF: https://github.com/llvm/llvm-project/commit/7cffaf510f97eabef89b0d45aeb939df40e8e9d3.diff

[clang] 4a36711 - [X86] Add mtune command line test cases that should have gone with 4cbceb74bb5676d0181d4d0cab5194d90a42c2ec

Author: Craig Topper Date: 2020-08-19T15:58:06-07:00 New Revision: 4a367114397ab5d175cb8b74ee6144978e7fdeba URL: https://github.com/llvm/llvm-project/commit/4a367114397ab5d175cb8b74ee6144978e7fdeba DIFF: https://github.com/llvm/llvm-project/commit/4a367114397ab5d175cb8b74ee6144978e7fdeba.diff

[clang] 724f570 - [X86] Add support 'tune' in target attribute

Author: Craig Topper Date: 2020-08-19T15:58:19-07:00 New Revision: 724f570ad25568acc3a33dcdce9cadd776de2382 URL: https://github.com/llvm/llvm-project/commit/724f570ad25568acc3a33dcdce9cadd776de2382 DIFF: https://github.com/llvm/llvm-project/commit/724f570ad25568acc3a33dcdce9cadd776de2382.diff

[clang] c0ec37e - [docs] Move the label for __builtin_shufflevector below __builtin_dump_struct so the see also link in 'vector operations' will go to the right place and have the right name.

Author: Craig Topper Date: 2020-08-21T11:51:15-07:00 New Revision: c0ec37ee65d0d21fddc6194fe1cce9db4107a902 URL: https://github.com/llvm/llvm-project/commit/c0ec37ee65d0d21fddc6194fe1cce9db4107a902 DIFF: https://github.com/llvm/llvm-project/commit/c0ec37ee65d0d21fddc6194fe1cce9db4107a902.diff

[clang] cc7bf9b - [X86] Allow 32-bit mode only CPUs with -mtune on 64-bit targets

Author: Craig Topper Date: 2020-08-22T16:38:05-07:00 New Revision: cc7bf9bcbfbc8d8188d9fe540c2bc1aee23824af URL: https://github.com/llvm/llvm-project/commit/cc7bf9bcbfbc8d8188d9fe540c2bc1aee23824af DIFF: https://github.com/llvm/llvm-project/commit/cc7bf9bcbfbc8d8188d9fe540c2bc1aee23824af.diff

[clang] 01eb123 - [X86] Mention -march=sapphirerapids in the release notes.

Author: Craig Topper Date: 2020-08-25T11:57:34-07:00 New Revision: 01eb1233db54454b146cb1e70d6f810ffbc354e5 URL: https://github.com/llvm/llvm-project/commit/01eb1233db54454b146cb1e70d6f810ffbc354e5 DIFF: https://github.com/llvm/llvm-project/commit/01eb1233db54454b146cb1e70d6f810ffbc354e5.diff

[clang] 71f3169 - [X86] Default to -mtune=generic unless -march is passed to the driver. Add TuneCPU to the AST serialization

Author: Craig Topper Date: 2020-08-26T14:52:03-07:00 New Revision: 71f3169e1baeff262583b35ef88f8fb6df7be85e URL: https://github.com/llvm/llvm-project/commit/71f3169e1baeff262583b35ef88f8fb6df7be85e DIFF: https://github.com/llvm/llvm-project/commit/71f3169e1baeff262583b35ef88f8fb6df7be85e.diff

[clang] 2d13693 - [X86] Update release notes for -mtune support.

Author: Craig Topper Date: 2020-08-26T16:16:56-07:00 New Revision: 2d13693bfce9b6c2c706f3ea6745ab3fdfa517e1 URL: https://github.com/llvm/llvm-project/commit/2d13693bfce9b6c2c706f3ea6745ab3fdfa517e1 DIFF: https://github.com/llvm/llvm-project/commit/2d13693bfce9b6c2c706f3ea6745ab3fdfa517e1.diff

[clang] 17ceda9 - [CodeGen] Use an AttrBuilder to bulk remove 'target-cpu', 'target-features', and 'tune-cpu' before re-adding in CodeGenModule::setNonAliasAttributes.

Author: Craig Topper Date: 2020-08-27T12:54:20-07:00 New Revision: 17ceda99d32035dc654b45ef7af62c571d8a8273 URL: https://github.com/llvm/llvm-project/commit/17ceda99d32035dc654b45ef7af62c571d8a8273 DIFF: https://github.com/llvm/llvm-project/commit/17ceda99d32035dc654b45ef7af62c571d8a8273.diff

[clang] ca13437 - [X86] Add a /tune: option for clang-cl

Author: Craig Topper Date: 2020-09-02T20:27:38-07:00 New Revision: ca134374b74e2c2c6e96695502f3a0974c1da4c1 URL: https://github.com/llvm/llvm-project/commit/ca134374b74e2c2c6e96695502f3a0974c1da4c1 DIFF: https://github.com/llvm/llvm-project/commit/ca134374b74e2c2c6e96695502f3a0974c1da4c1.diff

[clang] e6bb4c8 - [X86] SSE4_A should only imply SSE3 not SSSE3 in the frontend.

Author: Craig Topper Date: 2020-09-08T10:50:59-07:00 New Revision: e6bb4c8e7b3e27f214c9665763a2dd09aa96a5ac URL: https://github.com/llvm/llvm-project/commit/e6bb4c8e7b3e27f214c9665763a2dd09aa96a5ac DIFF: https://github.com/llvm/llvm-project/commit/e6bb4c8e7b3e27f214c9665763a2dd09aa96a5ac.diff

[clang] c103f9e - [RISCV] Use default member initializers for the feature flags in RISCVTargetInfo. NFC

Author: Craig Topper Date: 2020-12-15T12:37:47-08:00 New Revision: c103f9ef5a0e3180db8c9e94f9cd0b0e2a65375f URL: https://github.com/llvm/llvm-project/commit/c103f9ef5a0e3180db8c9e94f9cd0b0e2a65375f DIFF: https://github.com/llvm/llvm-project/commit/c103f9ef5a0e3180db8c9e94f9cd0b0e2a65375f.diff

[clang] 288c577 - [X86] Use inlineasm flag output for the _bittest* intrinsics.

Author: Craig Topper Date: 2020-09-28T13:33:22-07:00 New Revision: 288c5776c9d3cb14abe1c86f961c8ff166772d28 URL: https://github.com/llvm/llvm-project/commit/288c5776c9d3cb14abe1c86f961c8ff166772d28 DIFF: https://github.com/llvm/llvm-project/commit/288c5776c9d3cb14abe1c86f961c8ff166772d28.diff

[clang] 28595cb - [X86] Synchronize the loadiwkey builtin operand order with gcc version.

Author: Craig Topper Date: 2020-10-04T12:09:29-07:00 New Revision: 28595cbbeb2cc75584410b8b974f67ec99a853f2 URL: https://github.com/llvm/llvm-project/commit/28595cbbeb2cc75584410b8b974f67ec99a853f2 DIFF: https://github.com/llvm/llvm-project/commit/28595cbbeb2cc75584410b8b974f67ec99a853f2.diff

[clang] 6c6cd5f - [X86] Consolidate wide Key Locker intrinsics into the same header as the other Key Locker intrinsics.

Author: Craig Topper Date: 2020-10-04T12:09:21-07:00 New Revision: 6c6cd5f8a9750865800ce26bdeacd8455db3 URL: https://github.com/llvm/llvm-project/commit/6c6cd5f8a9750865800ce26bdeacd8455db3 DIFF: https://github.com/llvm/llvm-project/commit/6c6cd5f8a9750865800ce26bdeacd8455db3.diff

[clang] a02b449 - [X86] Sync AESENC/DEC Key Locker builtins with gcc.

Author: Craig Topper Date: 2020-10-04T12:09:41-07:00 New Revision: a02b449bb1556fe0f17b86eaa69f6bcda945d123 URL: https://github.com/llvm/llvm-project/commit/a02b449bb1556fe0f17b86eaa69f6bcda945d123 DIFF: https://github.com/llvm/llvm-project/commit/a02b449bb1556fe0f17b86eaa69f6bcda945d123.diff

[clang] 230c57b - [X86] Synchronize the encodekey builtins with gcc. Don't assume void* is 16 byte aligned.

Author: Craig Topper Date: 2020-10-04T12:09:35-07:00 New Revision: 230c57b0bd8321085a5e0339baf37b509d5c76f6 URL: https://github.com/llvm/llvm-project/commit/230c57b0bd8321085a5e0339baf37b509d5c76f6 DIFF: https://github.com/llvm/llvm-project/commit/230c57b0bd8321085a5e0339baf37b509d5c76f6.diff

[clang] b3f1b19 - [AArch64] Update clang CodeGen tests I missed in 4252f7773a5b98b825d17e5f77c7d349cb2fb7c7.

Author: Craig Topper Date: 2020-11-23T11:10:27-08:00 New Revision: b3f1b19c9cecd2ac8f8153aa25f8025dbd5702b8 URL: https://github.com/llvm/llvm-project/commit/b3f1b19c9cecd2ac8f8153aa25f8025dbd5702b8 DIFF: https://github.com/llvm/llvm-project/commit/b3f1b19c9cecd2ac8f8153aa25f8025dbd5702b8.diff

[clang] 4e6ad11 - [RISCV] Add Zba feature and move add.uw and slli.uw to it.

Author: Craig Topper Date: 2021-01-22T12:49:10-08:00 New Revision: 4e6ad11bc6f29eecfbef7f5d5b7e581dd26e2024 URL: https://github.com/llvm/llvm-project/commit/4e6ad11bc6f29eecfbef7f5d5b7e581dd26e2024 DIFF: https://github.com/llvm/llvm-project/commit/4e6ad11bc6f29eecfbef7f5d5b7e581dd26e2024.diff

[clang] a21c557 - [RISCV] Remove Zbproposedc extension

Author: Craig Topper Date: 2021-09-30T14:23:05-07:00 New Revision: a21c557955c6ea5cd02b9a145ad6469c608446c7 URL: https://github.com/llvm/llvm-project/commit/a21c557955c6ea5cd02b9a145ad6469c608446c7 DIFF: https://github.com/llvm/llvm-project/commit/a21c557955c6ea5cd02b9a145ad6469c608446c7.diff

[clang] 081ae5f - [RISCV] Remove extra assignment of intrinsic ID in ManualCodegen. NFC

Author: Craig Topper Date: 2021-06-10T20:46:34-07:00 New Revision: 081ae5fe1aa3ead6d9da75747d3698f09ff89cb9 URL: https://github.com/llvm/llvm-project/commit/081ae5fe1aa3ead6d9da75747d3698f09ff89cb9 DIFF: https://github.com/llvm/llvm-project/commit/081ae5fe1aa3ead6d9da75747d3698f09ff89cb9.diff

[clang] 618543b - [clang][NFC] Fix a -Wparentheses warning.

Author: Craig Topper Date: 2021-08-07T08:56:31-07:00 New Revision: 618543bb120b5c92e692a4b22deb59012e047c9d URL: https://github.com/llvm/llvm-project/commit/618543bb120b5c92e692a4b22deb59012e047c9d DIFF: https://github.com/llvm/llvm-project/commit/618543bb120b5c92e692a4b22deb59012e047c9d.diff

[clang] 6171f84 - [RISCV] Use getNaturalPointeeTypeAlignment to get alignment for stores created for vector builtins.

Author: Craig Topper Date: 2021-08-12T10:05:27-07:00 New Revision: 6171f84942ce2136b464ac0e8e620c6908f64cc6 URL: https://github.com/llvm/llvm-project/commit/6171f84942ce2136b464ac0e8e620c6908f64cc6 DIFF: https://github.com/llvm/llvm-project/commit/6171f84942ce2136b464ac0e8e620c6908f64cc6.diff

[clang] f66ba5f - [Sema] Fix -Wparentheses warning from gcc. NFC

Author: Craig Topper Date: 2021-08-12T10:05:27-07:00 New Revision: f66ba5fcef19ff03532d993ac4af1362a89b833f URL: https://github.com/llvm/llvm-project/commit/f66ba5fcef19ff03532d993ac4af1362a89b833f DIFF: https://github.com/llvm/llvm-project/commit/f66ba5fcef19ff03532d993ac4af1362a89b833f.diff

[clang] 4190d99 - [X86] Add parentheses around casts in some of the X86 intrinsic headers.

Author: Craig Topper Date: 2021-08-13T09:36:16-07:00 New Revision: 4190d99dfcab45cd67c32030d363f391c35570f2 URL: https://github.com/llvm/llvm-project/commit/4190d99dfcab45cd67c32030d363f391c35570f2 DIFF: https://github.com/llvm/llvm-project/commit/4190d99dfcab45cd67c32030d363f391c35570f2.diff

[clang] 606735c - [Clang] Add an explicit makeArrayRef to appease gcc 5.4.

Author: Craig Topper Date: 2021-08-13T09:42:28-07:00 New Revision: 606735c045b93cafe17bacbad10352b5a1c35cc0 URL: https://github.com/llvm/llvm-project/commit/606735c045b93cafe17bacbad10352b5a1c35cc0 DIFF: https://github.com/llvm/llvm-project/commit/606735c045b93cafe17bacbad10352b5a1c35cc0.diff

[clang] 73c4c32 - [X86] Use __builtin_bit_cast _mm_extract_ps instead of type punning through a union. NFC

Author: Craig Topper Date: 2021-08-14T16:35:55-07:00 New Revision: 73c4c3276720b20525ce9ef5f8e4f0c20fd93862 URL: https://github.com/llvm/llvm-project/commit/73c4c3276720b20525ce9ef5f8e4f0c20fd93862 DIFF: https://github.com/llvm/llvm-project/commit/73c4c3276720b20525ce9ef5f8e4f0c20fd93862.diff

[clang] d2cb189 - [X86] Use a do {} while (0) in the _MM_EXTRACT_FLOAT implementation.

Author: Craig Topper Date: 2021-08-14T16:41:55-07:00 New Revision: d2cb18918498b8a39657af2a495eba3e983c159b URL: https://github.com/llvm/llvm-project/commit/d2cb18918498b8a39657af2a495eba3e983c159b DIFF: https://github.com/llvm/llvm-project/commit/d2cb18918498b8a39657af2a495eba3e983c159b.diff

[clang] f225367 - [RISCV] Add vget/vset intrinsics for inserting and extracting between different lmuls.

Author: Craig Topper Date: 2021-06-24T18:06:36-07:00 New Revision: f225367305c82ce391bb470f735b19e924ff7372 URL: https://github.com/llvm/llvm-project/commit/f225367305c82ce391bb470f735b19e924ff7372 DIFF: https://github.com/llvm/llvm-project/commit/f225367305c82ce391bb470f735b19e924ff7372.diff

[clang] 7a11235 - [X86] Correct the conversion of VALIGND/Q intrinsics to shufflevector.

Author: Craig Topper Date: 2021-06-26T19:06:00-07:00 New Revision: 7a112356e4a19c0e63f533548fa95a03a5537fb9 URL: https://github.com/llvm/llvm-project/commit/7a112356e4a19c0e63f533548fa95a03a5537fb9 DIFF: https://github.com/llvm/llvm-project/commit/7a112356e4a19c0e63f533548fa95a03a5537fb9.diff

[clang] 670c72f - [RISCV] Restore tests for vf(w)redusum.

Author: Craig Topper Date: 2021-11-01T14:35:22-07:00 New Revision: 670c72f6f70434500d1475e1524a7088814fbc73 URL: https://github.com/llvm/llvm-project/commit/670c72f6f70434500d1475e1524a7088814fbc73 DIFF: https://github.com/llvm/llvm-project/commit/670c72f6f70434500d1475e1524a7088814fbc73.diff

[clang] 98b761f - [RISCV] Rename vfredusum/vfredosum intrinsic test files. Merge some tests. NFC

Author: Craig Topper Date: 2021-11-02T10:33:20-07:00 New Revision: 98b761fce68b194674a98f347c641f8ce3e85eff URL: https://github.com/llvm/llvm-project/commit/98b761fce68b194674a98f347c641f8ce3e85eff DIFF: https://github.com/llvm/llvm-project/commit/98b761fce68b194674a98f347c641f8ce3e85eff.diff

[clang] 893efd0 - [X86] Honor command line features along with cpu_specific attribute

Author: Craig Topper Date: 2021-11-11T09:06:22-08:00 New Revision: 893efd0d665becb3478c750b2b4d3751c20ff39d URL: https://github.com/llvm/llvm-project/commit/893efd0d665becb3478c750b2b4d3751c20ff39d DIFF: https://github.com/llvm/llvm-project/commit/893efd0d665becb3478c750b2b4d3751c20ff39d.diff

[clang] 201ebf2 - [RISCV] Make use of the required features in BuiltinInfo to store that V extension builtins require 'experimental-v'.

Author: Craig Topper Date: 2021-03-03T16:24:08-08:00 New Revision: 201ebf211f9772ef19abac82170b9b06fe2ccf2b URL: https://github.com/llvm/llvm-project/commit/201ebf211f9772ef19abac82170b9b06fe2ccf2b DIFF: https://github.com/llvm/llvm-project/commit/201ebf211f9772ef19abac82170b9b06fe2ccf2b.diff

[clang] 9773cad - [RISCV] Add additional checking to tablgen RISCVVEmitter requested in D95016.

Author: Craig Topper Date: 2021-03-10T19:46:25-08:00 New Revision: 9773cad51939d3980d841876d77064eb7a11002f URL: https://github.com/llvm/llvm-project/commit/9773cad51939d3980d841876d77064eb7a11002f DIFF: https://github.com/llvm/llvm-project/commit/9773cad51939d3980d841876d77064eb7a11002f.diff

[clang] c3ead85 - [RISCV][clang] Support RISC-V vectors in UninitializedValues.

Author: Craig Topper Date: 2022-10-24T12:38:32-07:00 New Revision: c3ead85e2f1c94b9be40d6c24532f2b932c8bfc7 URL: https://github.com/llvm/llvm-project/commit/c3ead85e2f1c94b9be40d6c24532f2b932c8bfc7 DIFF: https://github.com/llvm/llvm-project/commit/c3ead85e2f1c94b9be40d6c24532f2b932c8bfc7.diff

[clang] 974e2e6 - [RISCV] Adjust RV64I data layout by using n32:64 in layout string

Author: Craig Topper Date: 2022-10-28T08:27:03-07:00 New Revision: 974e2e690b4024c2677dde26cc76ec31e0047c1d URL: https://github.com/llvm/llvm-project/commit/974e2e690b4024c2677dde26cc76ec31e0047c1d DIFF: https://github.com/llvm/llvm-project/commit/974e2e690b4024c2677dde26cc76ec31e0047c1d.diff

[clang] 06f640d - [X86] Enable EVEX GFNI instructions without avx512bw.

Author: Craig Topper Date: 2022-10-31T10:31:45-07:00 New Revision: 06f640d3fb060e2e9cfed1d7c44636c7ffe3308b URL: https://github.com/llvm/llvm-project/commit/06f640d3fb060e2e9cfed1d7c44636c7ffe3308b DIFF: https://github.com/llvm/llvm-project/commit/06f640d3fb060e2e9cfed1d7c44636c7ffe3308b.diff

[clang] 6fa0e3d - [X86][Driver] Remove stale FIXME. NFC

Author: Craig Topper Date: 2022-10-31T10:41:40-07:00 New Revision: 6fa0e3df97ac1280da98bd1bc156dad5e036246b URL: https://github.com/llvm/llvm-project/commit/6fa0e3df97ac1280da98bd1bc156dad5e036246b DIFF: https://github.com/llvm/llvm-project/commit/6fa0e3df97ac1280da98bd1bc156dad5e036246b.diff

[clang] dacbddf - [RISCV] Move isValidCPUName to RISCVTargetInfo. NFC

Author: Craig Topper Date: 2022-08-11T10:01:56-07:00 New Revision: dacbddf56205f90e33d39575fc9d8455458d851e URL: https://github.com/llvm/llvm-project/commit/dacbddf56205f90e33d39575fc9d8455458d851e DIFF: https://github.com/llvm/llvm-project/commit/dacbddf56205f90e33d39575fc9d8455458d851e.diff

[clang] 37c47b2 - [RISCV] Change how mtune aliases are implemented.

Author: Craig Topper Date: 2022-08-18T16:22:25-07:00 New Revision: 37c47b2cacae99d65b4b82eb41655f0820100677 URL: https://github.com/llvm/llvm-project/commit/37c47b2cacae99d65b4b82eb41655f0820100677 DIFF: https://github.com/llvm/llvm-project/commit/37c47b2cacae99d65b4b82eb41655f0820100677.diff

[clang] 1a60e00 - [RISCV] Use Triple::isRISCV/isRISCV32/isRISCV64 helps in some places. NFC

Author: Craig Topper Date: 2022-08-19T09:11:22-07:00 New Revision: 1a60e003df8a8c03aae123bdec77e6a9db690862 URL: https://github.com/llvm/llvm-project/commit/1a60e003df8a8c03aae123bdec77e6a9db690862 DIFF: https://github.com/llvm/llvm-project/commit/1a60e003df8a8c03aae123bdec77e6a9db690862.diff

[clang] 549231d - [RISCV] Support -mno-implicit-float.

Author: Craig Topper Date: 2022-09-20T13:32:40-07:00 New Revision: 549231d38e10de7371adb85f5452d42ad42f4201 URL: https://github.com/llvm/llvm-project/commit/549231d38e10de7371adb85f5452d42ad42f4201 DIFF: https://github.com/llvm/llvm-project/commit/549231d38e10de7371adb85f5452d42ad42f4201.diff

[clang] 52708be - [RISCV] Remove support for the unratified Zbe, Zbf, and Zbm extensions.

Author: Craig Topper Date: 2022-09-22T13:04:41-07:00 New Revision: 52708be182e57dbe98972815ca807dc762dced12 URL: https://github.com/llvm/llvm-project/commit/52708be182e57dbe98972815ca807dc762dced12 DIFF: https://github.com/llvm/llvm-project/commit/52708be182e57dbe98972815ca807dc762dced12.diff

[clang] d1ad006 - [Driver] Prevent Mips specific code from claiming -mabi argument on other targets.

Author: Craig Topper Date: 2022-09-27T10:07:20-07:00 New Revision: d1ad006a8f64bdc17f618deffa9e7c91d82c444d URL: https://github.com/llvm/llvm-project/commit/d1ad006a8f64bdc17f618deffa9e7c91d82c444d DIFF: https://github.com/llvm/llvm-project/commit/d1ad006a8f64bdc17f618deffa9e7c91d82c444d.diff

[clang] cbbce9b - [Driver] Silence a -Wparentheses error. NFC

Author: Craig Topper Date: 2022-09-27T10:25:23-07:00 New Revision: cbbce9b537adfbc2271424ab66b3f2d818a2499f URL: https://github.com/llvm/llvm-project/commit/cbbce9b537adfbc2271424ab66b3f2d818a2499f DIFF: https://github.com/llvm/llvm-project/commit/cbbce9b537adfbc2271424ab66b3f2d818a2499f.diff

[clang] 6b24bdb - [RISCV] Remove some vsetvli intrinsics under Zve32*.

Author: Craig Topper Date: 2022-10-09T20:40:38-07:00 New Revision: 6b24bdb4a5ecc2f27bfe6aa992e6686bc40c995a URL: https://github.com/llvm/llvm-project/commit/6b24bdb4a5ecc2f27bfe6aa992e6686bc40c995a DIFF: https://github.com/llvm/llvm-project/commit/6b24bdb4a5ecc2f27bfe6aa992e6686bc40c995a.diff

[clang] 71a9b88 - [X86] Use unsigned int for return type of __get_cpuid_max.

Author: Craig Topper Date: 2022-10-14T11:45:20-07:00 New Revision: 71a9b8833231a285b4d8d5587c699ed45881624b URL: https://github.com/llvm/llvm-project/commit/71a9b8833231a285b4d8d5587c699ed45881624b DIFF: https://github.com/llvm/llvm-project/commit/71a9b8833231a285b4d8d5587c699ed45881624b.diff

[clang] 6d323e7 - [RISCV] Use SmallVector::append to replace some for loops in intrinsic creation. NFC

Author: Craig Topper Date: 2022-12-27T09:57:05-08:00 New Revision: 6d323e7e51c6a58b44b6b1a982bbda7edfd962fb URL: https://github.com/llvm/llvm-project/commit/6d323e7e51c6a58b44b6b1a982bbda7edfd962fb DIFF: https://github.com/llvm/llvm-project/commit/6d323e7e51c6a58b44b6b1a982bbda7edfd962fb.diff

[clang] 6254495 - [RISCV] Move RVVBitsPerBlock to TargetParser.h so we can use it in clang. NFC

Author: Craig Topper Date: 2022-11-02T13:09:14-07:00 New Revision: 6254495c6b4f35ad862c9a5fc28720664d28d816 URL: https://github.com/llvm/llvm-project/commit/6254495c6b4f35ad862c9a5fc28720664d28d816 DIFF: https://github.com/llvm/llvm-project/commit/6254495c6b4f35ad862c9a5fc28720664d28d816.diff

[clang] b6ad7ab - [RISCV] Prevent autovectorization using vscale with Zvl32b.

Author: Craig Topper Date: 2022-11-02T13:55:21-07:00 New Revision: b6ad7ab89ef5e1772e90248ee728fd955089c949 URL: https://github.com/llvm/llvm-project/commit/b6ad7ab89ef5e1772e90248ee728fd955089c949 DIFF: https://github.com/llvm/llvm-project/commit/b6ad7ab89ef5e1772e90248ee728fd955089c949.diff

[clang] 0453857 - [clang] Mention vector in the description for -mno-implict-float.

Author: Craig Topper Date: 2022-11-09T11:32:19-08:00 New Revision: 0453857d740248a8991ac28981784445dffa8dee URL: https://github.com/llvm/llvm-project/commit/0453857d740248a8991ac28981784445dffa8dee DIFF: https://github.com/llvm/llvm-project/commit/0453857d740248a8991ac28981784445dffa8dee.diff

[clang] c9320bc - [X86] Use correctly sized floating point literals in *zero_ps/pd.

Author: Craig Topper Date: 2022-11-17T14:28:52-08:00 New Revision: c9320bc87121af2a198f174c8d58f75295efbbd7 URL: https://github.com/llvm/llvm-project/commit/c9320bc87121af2a198f174c8d58f75295efbbd7 DIFF: https://github.com/llvm/llvm-project/commit/c9320bc87121af2a198f174c8d58f75295efbbd7.diff

[clang] 42c36da - [RISCV] Add MC support of RISCV Zcb Extension

Author: WuXinlong Date: 2023-01-26T12:54:00-08:00 New Revision: 42c36da9c99b84ca7bc843a27ff0da29f5bf8a74 URL: https://github.com/llvm/llvm-project/commit/42c36da9c99b84ca7bc843a27ff0da29f5bf8a74 DIFF: https://github.com/llvm/llvm-project/commit/42c36da9c99b84ca7bc843a27ff0da29f5bf8a74.diff LOG

[clang] 3d7a59b - [RISCV] Bump Zca, Zcb, Zcd, Zcf version to 1.0.

Author: Craig Topper Date: 2023-01-28T22:04:34-08:00 New Revision: 3d7a59bdc0850fee0ad31686f038ae5abf88b7f2 URL: https://github.com/llvm/llvm-project/commit/3d7a59bdc0850fee0ad31686f038ae5abf88b7f2 DIFF: https://github.com/llvm/llvm-project/commit/3d7a59bdc0850fee0ad31686f038ae5abf88b7f2.diff

[clang] 089bfed - [RISCV][Driver] Add -mrvv-vector-bits= option similar to -msve-vector-bits=

Author: Craig Topper Date: 2023-02-02T10:32:14-08:00 New Revision: 089bfedfb828c2675f3cc57d6ecac1a87ca243a1 URL: https://github.com/llvm/llvm-project/commit/089bfedfb828c2675f3cc57d6ecac1a87ca243a1 DIFF: https://github.com/llvm/llvm-project/commit/089bfedfb828c2675f3cc57d6ecac1a87ca243a1.diff

[clang] 226ceeb - [RISCV] Use Zvl*b as a lower bound for VScaleRange.

Author: Craig Topper Date: 2023-01-17T11:32:29-08:00 New Revision: 226ceebfa232492d0c4613cd6c9f8e72b970fe08 URL: https://github.com/llvm/llvm-project/commit/226ceebfa232492d0c4613cd6c9f8e72b970fe08 DIFF: https://github.com/llvm/llvm-project/commit/226ceebfa232492d0c4613cd6c9f8e72b970fe08.diff

[clang] ff80dc8 - [X86] Add __extension__ to f16c macro intrinsics to suppress warnings about compound literals

Author: Craig Topper Date: 2022-06-11T08:34:37-07:00 New Revision: ff80dc85449307d90e5276cd8f41825ace9b8594 URL: https://github.com/llvm/llvm-project/commit/ff80dc85449307d90e5276cd8f41825ace9b8594 DIFF: https://github.com/llvm/llvm-project/commit/ff80dc85449307d90e5276cd8f41825ace9b8594.diff

[clang] [RISCV] Install sifive_vector.h to riscv-resource-headers (PR #66330)

https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/66330 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV] Move sifive_files to riscv_files (PR #66872)

https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/66872 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV] Fix wrong implication for zvknhb. (PR #66860)

@@ -599,15 +599,21 @@ def HasStdExtZvkned : Predicate<"Subtarget->hasStdExtZvkned()">, def FeatureStdExtZvknha : SubtargetFeature<"experimental-zvknha", "HasStdExtZvknha", "true", "'Zvknha' (Vector SHA-2 (SHA-256 only))">; - -def FeatureStdExtZvknhb

[clang] [RISCV] Fix wrong implication for zvknhb. (PR #66860)

@@ -599,15 +599,21 @@ def HasStdExtZvkned : Predicate<"Subtarget->hasStdExtZvkned()">, def FeatureStdExtZvknha : SubtargetFeature<"experimental-zvknha", "HasStdExtZvknha", "true", "'Zvknha' (Vector SHA-2 (SHA-256 only))">; - -def FeatureStdExtZvknhb

[clang] [RISCV] Fix wrong implication for zvknhb. (PR #66860)

@@ -599,15 +599,21 @@ def HasStdExtZvkned : Predicate<"Subtarget->hasStdExtZvkned()">, def FeatureStdExtZvknha : SubtargetFeature<"experimental-zvknha", "HasStdExtZvknha", "true", "'Zvknha' (Vector SHA-2 (SHA-256 only))">; - -def FeatureStdExtZvknhb

[clang] [Clang][RISCV] Handle RVV tuple types correctly as OutputOperands for inline asm (PR #67018)

topperc wrote: Does this mean the backend register allocation will pick a large LMUL register the same size as the whole tuple and force the register to be overly aligned? For example an lmul=1 seg2 tuple can use v0+v1, or v1+v2, or v2+v3, etc. But lmul=2 can only use v0+v1, v2+v3, v4+v5, etc.

[clang] [clang-format] Correctly annotate keyword operator function name (PR #66904)

https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/66904 >From 95780df0571c27453b77e893e5020d9b451b0e6d Mon Sep 17 00:00:00 2001 From: Owen Pan Date: Wed, 20 Sep 2023 05:56:27 -0700 Subject: [PATCH 1/2] [clang-format] Correctly annotate keyword operator function name

[clang] [RISCV][NFC] Move some common class/multiclass from riscv_vector.td to riscv_vector_common.td (PR #67587)

https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/67587 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV][AArch64] Don't allow -mvscale-min/max options to be passed to the clang driver. (PR #68065)

https://github.com/topperc created https://github.com/llvm/llvm-project/pull/68065 The driver doesn't have code to pass these down to cc1. It just prints an unused option warning. Remove them from the driver. >From b6be263a9b07425471f17e66b506bb805f29b8a0 Mon Sep 17 00:00:00 2001 From: Craig T

[clang] [RISCV][AArch64] Don't allow -mvscale-min/max options to be passed to the clang driver. (PR #68065)

https://github.com/topperc closed https://github.com/llvm/llvm-project/pull/68065 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV] Mark the Zfa extension as non-experimental (PR #68113)

https://github.com/topperc requested changes to this pull request. Please update the header comment at the top of RISCVInstrInfoZfa.td https://github.com/llvm/llvm-project/pull/68113 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists

[clang] [RISCV] Update Zfa extension version to 1.0 (PR #67964)

https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/67964 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV] Mark the Zfa extension as non-experimental (PR #68113)

https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/68113 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang-tools-extra] [RISCV][GISel] Select G_SELECT (PR #67614)

https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/67614 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV] Add MC layer support for Zicfiss. (PR #66043)

@@ -0,0 +1,86 @@ +//===-- RISCVInstrInfoZicfiss.td - RISC-V Zicfiss -*- tablegen -*--===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [RISCV] Add MC layer support for Zicfiss. (PR #66043)

@@ -0,0 +1,86 @@ +//===-- RISCVInstrInfoZicfiss.td - RISC-V Zicfiss -*- tablegen -*--===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [RISCV] Add MC layer support for Zicfiss. (PR #66043)

@@ -0,0 +1,86 @@ +//===-- RISCVInstrInfoZicfiss.td - RISC-V Zicfiss -*- tablegen -*--===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [RISCV] Add MC layer support for Zicfiss. (PR #66043)

@@ -0,0 +1,86 @@ +//===-- RISCVInstrInfoZicfiss.td - RISC-V Zicfiss -*- tablegen -*--===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [RISCV] Fix wrong implication for zvknhb. (PR #66860)

https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/66860 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV] Fix wrong implication for zvknhb. (PR #66860)

https://github.com/topperc edited https://github.com/llvm/llvm-project/pull/66860 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV] Fix wrong implication for zvknhb. (PR #66860)

@@ -1013,7 +1013,6 @@ static const char *ImpliedExtsZvfhmin[] = {"zve32f"}; static const char *ImpliedExtsZvkn[] = {"zvkb", "zvkned", "zvknhb", "zvkt"}; static const char *ImpliedExtsZvknc[] = {"zvbc", "zvkn"}; static const char *ImpliedExtsZvkng[] = {"zvkg", "zvkn"}; -static c

[clang] [RISCV] Fix wrong implication for zvknhb. (PR #66860)

https://github.com/topperc requested changes to this pull request. https://github.com/llvm/llvm-project/pull/66860 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)

@@ -318,6 +345,16 @@ multiclass VPseudoVC_XVW { + def "Pseudo" # NAME # "_VV_" # mx : VPseudoTernaryNoMaskWithPolicy; topperc wrote: 80 characters https://github.com/llvm/llvm-project/pull/68295 ___ cfe-commits mailin

[clang] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)

@@ -318,6 +345,16 @@ multiclass VPseudoVC_XVW { + def "Pseudo" # NAME # "_VV_" # mx : VPseudoTernaryNoMaskWithPolicy; topperc wrote: I don't believe tblgen is meant to be exempt from the 80 column rule. Lack of a clang-format is the reason there are files over

[clang] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)

https://github.com/topperc edited https://github.com/llvm/llvm-project/pull/68295 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] d53d842 - [RISCV][AArch64][IRGen] Add a special case to CodeGenFunction::EmitCall for scalable vector return being coerced to fixed vector.

Author: Craig Topper Date: 2023-07-18T10:04:33-07:00 New Revision: d53d842d12ceb182f1f5c12cc001b09f9000dbf4 URL: https://github.com/llvm/llvm-project/commit/d53d842d12ceb182f1f5c12cc001b09f9000dbf4 DIFF: https://github.com/llvm/llvm-project/commit/d53d842d12ceb182f1f5c12cc001b09f9000dbf4.diff

[clang] 97c5381 - [RISCV] Remove 'Z' from Zbb builtin type strings. NFC

Author: Craig Topper Date: 2023-07-18T12:07:50-07:00 New Revision: 97c5381879d41cafaf36793e57e236da8a81791f URL: https://github.com/llvm/llvm-project/commit/97c5381879d41cafaf36793e57e236da8a81791f DIFF: https://github.com/llvm/llvm-project/commit/97c5381879d41cafaf36793e57e236da8a81791f.diff

[clang] 8e64821 - [RISCV] Remove unnecessary _32 and _64 suffixes from some scalar crypto builtins.

Author: Craig Topper Date: 2023-07-18T12:56:01-07:00 New Revision: 8e6482115c242543471efabf7fd82338f76ddd04 URL: https://github.com/llvm/llvm-project/commit/8e6482115c242543471efabf7fd82338f76ddd04 DIFF: https://github.com/llvm/llvm-project/commit/8e6482115c242543471efabf7fd82338f76ddd04.diff

[clang] 7fb0f4a - [RISCV] Run mem2reg on the scalar C builtin tests to remove allocas and simplify checks. NFC

Author: Craig Topper Date: 2023-07-19T10:30:42-07:00 New Revision: 7fb0f4a6eba2351da8ef993d2b488d7dc5827b44 URL: https://github.com/llvm/llvm-project/commit/7fb0f4a6eba2351da8ef993d2b488d7dc5827b44 DIFF: https://github.com/llvm/llvm-project/commit/7fb0f4a6eba2351da8ef993d2b488d7dc5827b44.diff

[clang] ee6befe - [RISCV] Rewrite CheckInvalidVLENandLMUL to avoid floating point.

Author: Craig Topper Date: 2023-08-12T11:14:51-07:00 New Revision: ee6befe26437034be84bf4785127b397afb9dfcb URL: https://github.com/llvm/llvm-project/commit/ee6befe26437034be84bf4785127b397afb9dfcb DIFF: https://github.com/llvm/llvm-project/commit/ee6befe26437034be84bf4785127b397afb9dfcb.diff

[clang] 33af2f1 - [RISCV] Check type size for lax conversions between RVV builtin types and VectorType::RVVFixedLengthDataVector.

Author: Craig Topper Date: 2023-08-21T14:28:57-07:00 New Revision: 33af2f131db71a18aefc5469129540e2097a537f URL: https://github.com/llvm/llvm-project/commit/33af2f131db71a18aefc5469129540e2097a537f DIFF: https://github.com/llvm/llvm-project/commit/33af2f131db71a18aefc5469129540e2097a537f.diff

[clang] [RISCV][GlobalISel] Select G_FRAME_INDEX (PR #68254)

https://github.com/topperc requested changes to this pull request. Missing test for register bank selection https://github.com/llvm/llvm-project/pull/68254 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/l

[clang] [RISCV] Implement shadow stack on shadow stack mode with Zicfiss. (PR #68075)

@@ -106,9 +111,14 @@ static void emitSCSEpilogue(MachineFunction &MF, MachineBasicBlock &MBB, CSI, [&](CalleeSavedInfo &CSR) { return CSR.getReg() == RAReg; })) return; + const RISCVInstrInfo *TII = STI.getInstrInfo(); + if (STI.hasFeature(RISCV::FeatureStdExt

[clang] [RISCV] Implement shadow stack on shadow stack mode with Zicfiss. (PR #68075)

@@ -106,9 +111,14 @@ static void emitSCSEpilogue(MachineFunction &MF, MachineBasicBlock &MBB, CSI, [&](CalleeSavedInfo &CSR) { return CSR.getReg() == RAReg; })) return; + const RISCVInstrInfo *TII = STI.getInstrInfo(); + if (STI.hasFeature(RISCV::FeatureStdExt

[clang] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)

@@ -558,6 +558,12 @@ DecodeStatus RISCVDisassembler::getInstruction(MCInst &MI, uint64_t &Size, "XTHeadVdot custom opcode table"); TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXSfvcp, DecoderTableXSfvcp32, "SiFive VCIX custo

[clang] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)

@@ -476,6 +524,31 @@ class GetFTypeInfo { !eq(Scalar, f64) : "FPR64"); } +multiclass VPatVMACC info_pairs, ValueType vec_m1> { + foreach pair = info_pairs in { +defvar VdInfo = pair.Wti; +defvar Vs2Info = pair.Vti; +let Predicates = [

[clang] [RISCV] Implement shadow stack on shadow stack mode with Zicfiss. (PR #68075)

@@ -106,9 +111,14 @@ static void emitSCSEpilogue(MachineFunction &MF, MachineBasicBlock &MBB, CSI, [&](CalleeSavedInfo &CSR) { return CSR.getReg() == RAReg; })) return; + const RISCVInstrInfo *TII = STI.getInstrInfo(); + if (STI.hasFeature(RISCV::FeatureStdExt

[clang] [RISCV] Implement shadow stack on shadow stack mode with Zicfiss. (PR #68075)

@@ -106,9 +111,14 @@ static void emitSCSEpilogue(MachineFunction &MF, MachineBasicBlock &MBB, CSI, [&](CalleeSavedInfo &CSR) { return CSR.getReg() == RAReg; })) return; + const RISCVInstrInfo *TII = STI.getInstrInfo(); + if (STI.hasFeature(RISCV::FeatureStdExt

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