r353555 - [X86] Add explicit alignment to __m128/__m128i/__m128d/etc. to allow matching of MSVC behavior with #pragma pack.

2019-02-08 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri Feb 8 11:45:08 2019 New Revision: 353555 URL: http://llvm.org/viewvc/llvm-project?rev=353555&view=rev Log: [X86] Add explicit alignment to __m128/__m128i/__m128d/etc. to allow matching of MSVC behavior with #pragma pack. Summary: With MSVC, #pragma pack is ignored when

r353802 - [X86] Use the new unaligned vector typedefs for the loadu/storeu intrinsics pointer arguments.

2019-02-11 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Feb 11 23:44:40 2019 New Revision: 353802 URL: http://llvm.org/viewvc/llvm-project?rev=353802&view=rev Log: [X86] Use the new unaligned vector typedefs for the loadu/storeu intrinsics pointer arguments. This matches what gcc does and what was suggested by rnk in PR20670

r353887 - [X86] Follow up to r353878, add MSVC compatibility command lines to other intrinsic tests that uses packed structs to control alignment.

2019-02-12 Thread Craig Topper via cfe-commits
Author: ctopper Date: Tue Feb 12 14:12:19 2019 New Revision: 353887 URL: http://llvm.org/viewvc/llvm-project?rev=353887&view=rev Log: [X86] Follow up to r353878, add MSVC compatibility command lines to other intrinsic tests that uses packed structs to control alignment. r353878 fixed a bug in _m

r311874 - [X86] Add support for __builtin_cpu_init

2017-08-27 Thread Craig Topper via cfe-commits
Author: ctopper Date: Sun Aug 27 22:43:23 2017 New Revision: 311874 URL: http://llvm.org/viewvc/llvm-project?rev=311874&view=rev Log: [X86] Add support for __builtin_cpu_init This adds builtin_cpu_init which will emit a call to cpu_indicator_init in libgcc or compiler-rt. This is needed to supp

r312135 - [X86] Implement broadcastf32x2 and broadcasti32x2 intrinsics using __builtin_shufflevector instead builtins

2017-08-30 Thread Craig Topper via cfe-commits
Author: ctopper Date: Wed Aug 30 09:15:12 2017 New Revision: 312135 URL: http://llvm.org/viewvc/llvm-project?rev=312135&view=rev Log: [X86] Implement broadcastf32x2 and broadcasti32x2 intrinsics using __builtin_shufflevector instead builtins This patch implements the broadcastf32x2/broadcasti32x

r313392 - [X86] Disable _mm512_maskz_set1_epi64 intrinsic on 32-bit targets to prevent a backend isel failure.

2017-09-15 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri Sep 15 13:27:59 2017 New Revision: 313392 URL: http://llvm.org/viewvc/llvm-project?rev=313392&view=rev Log: [X86] Disable _mm512_maskz_set1_epi64 intrinsic on 32-bit targets to prevent a backend isel failure. The __builtin_ia32_pbroadcastq512_mem_mask we were previously

r313418 - [X86] Use native shuffle vector for the perm2f128 intrinsics

2017-09-15 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri Sep 15 16:00:59 2017 New Revision: 313418 URL: http://llvm.org/viewvc/llvm-project?rev=313418&view=rev Log: [X86] Use native shuffle vector for the perm2f128 intrinsics This patch replaces the perm2f128 intrinsics with native shuffle vectors. This uses a pretty simple a

r313462 - [X86] Remove unnecessary extra encodings from the CPU name enum in clang

2017-09-16 Thread Craig Topper via cfe-commits
Author: ctopper Date: Sat Sep 16 09:44:39 2017 New Revision: 313462 URL: http://llvm.org/viewvc/llvm-project?rev=313462&view=rev Log: [X86] Remove unnecessary extra encodings from the CPU name enum in clang Summary: For a lot of older CPUs we have a 1:1 mapping between CPU name and enum name. Bu

r313497 - [X86] Move even more of our CPU to feature mapping switch to use fallthroughs

2017-09-17 Thread Craig Topper via cfe-commits
Author: ctopper Date: Sun Sep 17 12:05:46 2017 New Revision: 313497 URL: http://llvm.org/viewvc/llvm-project?rev=313497&view=rev Log: [X86] Move even more of our CPU to feature mapping switch to use fallthroughs This arranges more of the Intel and AMD CPUs into fallthrough positions based on the

r362965 - [X86] Attempt to make the Intel core CPU inheritance a little more readable and maintainable

2019-06-10 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Jun 10 09:59:28 2019 New Revision: 362965 URL: http://llvm.org/viewvc/llvm-project?rev=362965&view=rev Log: [X86] Attempt to make the Intel core CPU inheritance a little more readable and maintainable The recently added cooperlake CPU has made our already ugly switch st

r363472 - [X86] Add checks that immediate for reducesd/ss fits in 8-bits.

2019-06-14 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri Jun 14 16:23:19 2019 New Revision: 363472 URL: http://llvm.org/viewvc/llvm-project?rev=363472&view=rev Log: [X86] Add checks that immediate for reducesd/ss fits in 8-bits. Modified: cfe/trunk/lib/Sema/SemaChecking.cpp Modified: cfe/trunk/lib/Sema/SemaChecking.cpp UR

r363890 - [X86] Correct the __min_vector_width__ attribute on a few intrinsics.

2019-06-19 Thread Craig Topper via cfe-commits
Author: ctopper Date: Wed Jun 19 16:27:04 2019 New Revision: 363890 URL: http://llvm.org/viewvc/llvm-project?rev=363890&view=rev Log: [X86] Correct the __min_vector_width__ attribute on a few intrinsics. Modified: cfe/trunk/lib/Headers/avx512bwintrin.h cfe/trunk/lib/Headers/avx512vlintrin

r363961 - [X86] Make _mm_mask_cvtps_ph, _mm_maskz_cvtps_ph, _mm256_mask_cvtps_ph, and _mm256_maskz_cvtps_ph aliases for their corresponding cvt_roundps_ph intrinsic.

2019-06-20 Thread Craig Topper via cfe-commits
Author: ctopper Date: Thu Jun 20 11:24:29 2019 New Revision: 363961 URL: http://llvm.org/viewvc/llvm-project?rev=363961&view=rev Log: [X86] Make _mm_mask_cvtps_ph, _mm_maskz_cvtps_ph, _mm256_mask_cvtps_ph, and _mm256_maskz_cvtps_ph aliases for their corresponding cvt_roundps_ph intrinsic. These

r368635 - [X86] Remove 'Server' from Tigerlake description comments.

2019-08-12 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Aug 12 17:00:27 2019 New Revision: 368635 URL: http://llvm.org/viewvc/llvm-project?rev=368635&view=rev Log: [X86] Remove 'Server' from Tigerlake description comments. Tigerlake is a client CPU not a server CPU. Modified: cfe/trunk/include/clang/Basic/X86Target.def

r368969 - [X86] Add test cases for _mm_movepi64_pi64 and _mm_movpi64_epi64.

2019-08-14 Thread Craig Topper via cfe-commits
Author: ctopper Date: Wed Aug 14 23:20:33 2019 New Revision: 368969 URL: http://llvm.org/viewvc/llvm-project?rev=368969&view=rev Log: [X86] Add test cases for _mm_movepi64_pi64 and _mm_movpi64_epi64. Modified: cfe/trunk/test/CodeGen/sse2-builtins.c Modified: cfe/trunk/test/CodeGen/sse2-built

r363994 - [X86] Change LL to O in the definitions for the vp2intersect builtins.

2019-06-20 Thread Craig Topper via cfe-commits
Author: ctopper Date: Thu Jun 20 15:19:16 2019 New Revision: 363994 URL: http://llvm.org/viewvc/llvm-project?rev=363994&view=rev Log: [X86] Change LL to O in the definitions for the vp2intersect builtins. This is needed to support OpenCL where long long is 128 bits. This was done for the other b

r365669 - [X86] Change the IR sequence for _mm_storeh_pi and _mm_storel_pi to perform the store as a <2 x float> instead of i64.

2019-07-10 Thread Craig Topper via cfe-commits
Author: ctopper Date: Wed Jul 10 10:11:29 2019 New Revision: 365669 URL: http://llvm.org/viewvc/llvm-project?rev=365669&view=rev Log: [X86] Change the IR sequence for _mm_storeh_pi and _mm_storel_pi to perform the store as a <2 x float> instead of i64. This is similar to what we do for loadl_pi

r365668 - [X86] Add guards to some of the x86 intrinsic tests to skip 64-bit mode only intrinsics when compiled for 32-bit mode.

2019-07-10 Thread Craig Topper via cfe-commits
Author: ctopper Date: Wed Jul 10 10:11:23 2019 New Revision: 365668 URL: http://llvm.org/viewvc/llvm-project?rev=365668&view=rev Log: [X86] Add guards to some of the x86 intrinsic tests to skip 64-bit mode only intrinsics when compiled for 32-bit mode. All the command lines are for 64-bit mode,

r360918 - [X86] Update doxygen comments for AVX512BF16 to not refer to masks as 'immediates'. Refer to parameter names instead of 'src', 'src1', 'src2'. NFC

2019-05-16 Thread Craig Topper via cfe-commits
Author: ctopper Date: Thu May 16 10:34:35 2019 New Revision: 360918 URL: http://llvm.org/viewvc/llvm-project?rev=360918&view=rev Log: [X86] Update doxygen comments for AVX512BF16 to not refer to masks as 'immediates'. Refer to parameter names instead of 'src', 'src1', 'src2'. NFC Modified: c

r360924 - [X86] Stop implicitly enabling avx512vl when avx512bf16 is enabled.

2019-05-16 Thread Craig Topper via cfe-commits
Author: ctopper Date: Thu May 16 11:28:17 2019 New Revision: 360924 URL: http://llvm.org/viewvc/llvm-project?rev=360924&view=rev Log: [X86] Stop implicitly enabling avx512vl when avx512bf16 is enabled. Previously we were doing this so that the 256 bit selectw builtin could be used in the impleme

r361109 - [X86] Remove semicolons at the end of intrinsics implemented as macros so they can be used as arguments to other intrinsics.

2019-05-18 Thread Craig Topper via cfe-commits
Author: ctopper Date: Sat May 18 18:01:52 2019 New Revision: 361109 URL: http://llvm.org/viewvc/llvm-project?rev=361109&view=rev Log: [X86] Remove semicolons at the end of intrinsics implemented as macros so they can be used as arguments to other intrinsics. Also fix one intrinsic that was using

r361169 - [Intrinsics] Merge lround.i32 and lround.i64 into a single intrinsic with overloaded result type. Make result type for llvm.llround overloaded instead of fixing to i64

2019-05-20 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon May 20 09:27:09 2019 New Revision: 361169 URL: http://llvm.org/viewvc/llvm-project?rev=361169&view=rev Log: [Intrinsics] Merge lround.i32 and lround.i64 into a single intrinsic with overloaded result type. Make result type for llvm.llround overloaded instead of fixing t

r361187 - [X86] Check the alignment argument for the masked.load/store for the _mm_mask_store_ss/sd and _mm_mask(z)_load_ss/sd intrinsics.

2019-05-20 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon May 20 11:48:31 2019 New Revision: 361187 URL: http://llvm.org/viewvc/llvm-project?rev=361187&view=rev Log: [X86] Check the alignment argument for the masked.load/store for the _mm_mask_store_ss/sd and _mm_mask(z)_load_ss/sd intrinsics. Modified: cfe/trunk/test/Code

r361557 - [X86] Split multi-line chained assignments into single lines to avoid making clang-format create triangle shaped indentation. Simplify one if statement to remove a bunch of string matches. N

2019-05-23 Thread Craig Topper via cfe-commits
Author: ctopper Date: Thu May 23 14:34:36 2019 New Revision: 361557 URL: http://llvm.org/viewvc/llvm-project?rev=361557&view=rev Log: [X86] Split multi-line chained assignments into single lines to avoid making clang-format create triangle shaped indentation. Simplify one if statement to remove

r361897 - [X86] Fix the Sema checks for getmant builtins to only allow 4 and 8 for rounding immediates.

2019-05-28 Thread Craig Topper via cfe-commits
Author: ctopper Date: Tue May 28 16:26:22 2019 New Revision: 361897 URL: http://llvm.org/viewvc/llvm-project?rev=361897&view=rev Log: [X86] Fix the Sema checks for getmant builtins to only allow 4 and 8 for rounding immediates. These don't support embedded rounding so we shouldn't be setting Has

r349098 - [Builltins][X86] Provide implementations of __lzcnt16, __lzcnt, __lzcnt64 for MS compatibility. Remove declarations from intrin.h and implementations from lzcntintrin.h

2018-12-13 Thread Craig Topper via cfe-commits
Author: ctopper Date: Thu Dec 13 16:21:02 2018 New Revision: 349098 URL: http://llvm.org/viewvc/llvm-project?rev=349098&view=rev Log: [Builltins][X86] Provide implementations of __lzcnt16, __lzcnt, __lzcnt64 for MS compatibility. Remove declarations from intrin.h and implementations from lzcntin

r350506 - [X86] Update VBMI2 vshld/vshrd tests to use an immediate that doesn't require a modulo.

2019-01-06 Thread Craig Topper via cfe-commits
Author: ctopper Date: Sun Jan 6 22:01:58 2019 New Revision: 350506 URL: http://llvm.org/viewvc/llvm-project?rev=350506&view=rev Log: [X86] Update VBMI2 vshld/vshrd tests to use an immediate that doesn't require a modulo. Planning to replace these with funnel shift intrinsics which would mask ou

r350555 - [X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd builtins.

2019-01-07 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Jan 7 11:10:22 2019 New Revision: 350555 URL: http://llvm.org/viewvc/llvm-project?rev=350555&view=rev Log: [X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd builtins. Differential Revision: https://reviews.llvm.org/D56365 Modified: cfe/trunk/include/clang

r350563 - Revert r350555 "[X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd builtins."

2019-01-07 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Jan 7 11:39:25 2019 New Revision: 350563 URL: http://llvm.org/viewvc/llvm-project?rev=350563&view=rev Log: Revert r350555 "[X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd builtins." Had to revert the LLVM patch this depends on to fix a MSVC compiler limit i

r350568 - Recommit r350555 "[X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd builtins."

2019-01-07 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Jan 7 13:00:41 2019 New Revision: 350568 URL: http://llvm.org/viewvc/llvm-project?rev=350568&view=rev Log: Recommit r350555 "[X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd builtins." The MSVC limit hit in AutoUpgrade.cpp has been worked around for now. Mo

r350696 - [X86] Make the pointer arguments to avx512 gather/scatter intrinsics 'void*' to match gcc and Intel's documentation.

2019-01-08 Thread Craig Topper via cfe-commits
Author: ctopper Date: Tue Jan 8 23:36:01 2019 New Revision: 350696 URL: http://llvm.org/viewvc/llvm-project?rev=350696&view=rev Log: [X86] Make the pointer arguments to avx512 gather/scatter intrinsics 'void*' to match gcc and Intel's documentation. The avx2 gather intrinsics are documented to

r350785 - [X86] Really make the pointer arguments to avx512 gather/scatter intrinsics 'void*' to match gcc and Intel's documentation.

2019-01-09 Thread Craig Topper via cfe-commits
Author: ctopper Date: Wed Jan 9 16:47:25 2019 New Revision: 350785 URL: http://llvm.org/viewvc/llvm-project?rev=350785&view=rev Log: [X86] Really make the pointer arguments to avx512 gather/scatter intrinsics 'void*' to match gcc and Intel's documentation. The avx2 gather intrinsics are documen

r371694 - [X86] Enable -mprefer-vector-width=256 by default for Skylake-avx512 and later Intel CPUs.

2019-09-11 Thread Craig Topper via cfe-commits
Author: ctopper Date: Wed Sep 11 16:54:36 2019 New Revision: 371694 URL: http://llvm.org/viewvc/llvm-project?rev=371694&view=rev Log: [X86] Enable -mprefer-vector-width=256 by default for Skylake-avx512 and later Intel CPUs. AVX512 instructions can cause a frequency drop on these CPUs. This can

r372197 - [X86] Prevent assertion when calling a function that returns double with -mno-sse2 on x86-64.

2019-09-17 Thread Craig Topper via cfe-commits
Author: ctopper Date: Tue Sep 17 18:57:46 2019 New Revision: 372197 URL: http://llvm.org/viewvc/llvm-project?rev=372197&view=rev Log: [X86] Prevent assertion when calling a function that returns double with -mno-sse2 on x86-64. As seen in the most recent updates to PR10498 Added: cfe/trunk/

r372534 - [X86] Require last argument to LWPINS/LWPVAL builtins to be an ICE. Add ImmArg to the llvm intrinsics.

2019-09-22 Thread Craig Topper via cfe-commits
Author: ctopper Date: Sun Sep 22 16:48:50 2019 New Revision: 372534 URL: http://llvm.org/viewvc/llvm-project?rev=372534&view=rev Log: [X86] Require last argument to LWPINS/LWPVAL builtins to be an ICE. Add ImmArg to the llvm intrinsics. Update the isel patterns to use timm instead of imm. Modif

r330654 - [Docs] Regenerate command line documentation.

2018-04-23 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Apr 23 14:41:06 2018 New Revision: 330654 URL: http://llvm.org/viewvc/llvm-project?rev=330654&view=rev Log: [Docs] Regenerate command line documentation. Modified: cfe/trunk/docs/ClangCommandLineReference.rst Modified: cfe/trunk/docs/ClangCommandLineReference.rst UR

r330657 - [X86] Move __builtin_ia32_movnti64 andd __builtin_ia32_rdrand64_step to BuiltinsX86_64.def to make them unavailable in 32-bit mode.

2018-04-23 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Apr 23 15:18:34 2018 New Revision: 330657 URL: http://llvm.org/viewvc/llvm-project?rev=330657&view=rev Log: [X86] Move __builtin_ia32_movnti64 andd __builtin_ia32_rdrand64_step to BuiltinsX86_64.def to make them unavailable in 32-bit mode. Modified: cfe/trunk/includ

r330658 - [X86] Move the 32-bit versions of rdfsbase/rdgsbase/wrfsbase/wrgsbase to BuiltinsX86_64.def.

2018-04-23 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Apr 23 15:18:36 2018 New Revision: 330658 URL: http://llvm.org/viewvc/llvm-project?rev=330658&view=rev Log: [X86] Move the 32-bit versions of rdfsbase/rdgsbase/wrfsbase/wrgsbase to BuiltinsX86_64.def. The 32-bit refers to their input/output type, but the instructions ar

r330681 - [X86] Remove '#ifdef __x86_64__' around mask_set1_epi64 intrinsics.

2018-04-23 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Apr 23 20:36:08 2018 New Revision: 330681 URL: http://llvm.org/viewvc/llvm-project?rev=330681&view=rev Log: [X86] Remove '#ifdef __x86_64__' around mask_set1_epi64 intrinsics. The unmasked versions already didn't have this restrction. I don't think gcc or icc limit thes

r330744 - [X86] Add recently added intrinsic headers to the module map.

2018-04-24 Thread Craig Topper via cfe-commits
Author: ctopper Date: Tue Apr 24 10:40:49 2018 New Revision: 330744 URL: http://llvm.org/viewvc/llvm-project?rev=330744&view=rev Log: [X86] Add recently added intrinsic headers to the module map. Modified: cfe/trunk/lib/Headers/module.modulemap Modified: cfe/trunk/lib/Headers/module.modulema

r330743 - [X86] Consistently use double underscore at the beginning of the include guards in our intrinsic headers.

2018-04-24 Thread Craig Topper via cfe-commits
Author: ctopper Date: Tue Apr 24 10:40:47 2018 New Revision: 330743 URL: http://llvm.org/viewvc/llvm-project?rev=330743&view=rev Log: [X86] Consistently use double underscore at the beginning of the include guards in our intrinsic headers. Most files used double underscore, but a few used single

r330842 - [Builtins] Fix typos in a comment. NFC

2018-04-25 Thread Craig Topper via cfe-commits
Author: ctopper Date: Wed Apr 25 09:57:46 2018 New Revision: 330842 URL: http://llvm.org/viewvc/llvm-project?rev=330842&view=rev Log: [Builtins] Fix typos in a comment. NFC Modified: cfe/trunk/include/clang/Basic/Builtins.h Modified: cfe/trunk/include/clang/Basic/Builtins.h URL: http://llvm

r330923 - [X86] Add support for _mm512_mullox_epi64 and _mm512_mask_mullox_epi64 intrinsics to match icc.

2018-04-25 Thread Craig Topper via cfe-commits
Author: ctopper Date: Wed Apr 25 22:38:39 2018 New Revision: 330923 URL: http://llvm.org/viewvc/llvm-project?rev=330923&view=rev Log: [X86] Add support for _mm512_mullox_epi64 and _mm512_mask_mullox_epi64 intrinsics to match icc. On AVX512F targets we'll produce an emulated sequence using 3 pmul

r330987 - [X86] Make __builtin_ia32_readeflags_u32 and __builtin_ia32_writeeflags_u32 only available on 32-bit targets.

2018-04-26 Thread Craig Topper via cfe-commits
Author: ctopper Date: Thu Apr 26 13:14:46 2018 New Revision: 330987 URL: http://llvm.org/viewvc/llvm-project?rev=330987&view=rev Log: [X86] Make __builtin_ia32_readeflags_u32 and __builtin_ia32_writeeflags_u32 only available on 32-bit targets. These builtins can't be handled by the backend on 64

r331231 - [CodeGen] Fix typo in comment form->from. NFC

2018-04-30 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Apr 30 15:02:48 2018 New Revision: 331231 URL: http://llvm.org/viewvc/llvm-project?rev=331231&view=rev Log: [CodeGen] Fix typo in comment form->from. NFC Modified: cfe/trunk/lib/CodeGen/CGCall.cpp Modified: cfe/trunk/lib/CodeGen/CGCall.cpp URL: http://llvm.org/view

r331482 - [CodeGenFunction] Use the StringRef::split function that takes a char separator instead of StringRef separator. NFC

2018-05-03 Thread Craig Topper via cfe-commits
Author: ctopper Date: Thu May 3 14:01:33 2018 New Revision: 331482 URL: http://llvm.org/viewvc/llvm-project?rev=331482&view=rev Log: [CodeGenFunction] Use the StringRef::split function that takes a char separator instead of StringRef separator. NFC The char separator version should be a little

r331483 - [X86] Make __builtin_ia32_directstore_u32 and __builtin_ia32_movdir64b 'nothrow'

2018-05-03 Thread Craig Topper via cfe-commits
Author: ctopper Date: Thu May 3 14:01:35 2018 New Revision: 331483 URL: http://llvm.org/viewvc/llvm-project?rev=331483&view=rev Log: [X86] Make __builtin_ia32_directstore_u32 and __builtin_ia32_movdir64b 'nothrow' These builtins snuck in while I was in the middle of adding nothrow to the other

r331559 - [X86] Fix some inconsistent formatting in the first line of our intrinsics headers.

2018-05-04 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri May 4 14:45:25 2018 New Revision: 331559 URL: http://llvm.org/viewvc/llvm-project?rev=331559&view=rev Log: [X86] Fix some inconsistent formatting in the first line of our intrinsics headers. Some were too long and some were too short. Modified: cfe/trunk/lib/Heade

r331560 - [X86] Correct the attributes on the incssp and rdssp builtins to only have 'nothrow'

2018-05-04 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri May 4 14:56:43 2018 New Revision: 331560 URL: http://llvm.org/viewvc/llvm-project?rev=331560&view=rev Log: [X86] Correct the attributes on the incssp and rdssp builtins to only have 'nothrow' Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/inc

r331578 - Fix a couple places that immediately called operator-> on the result of dyn_cast.

2018-05-04 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri May 4 18:58:26 2018 New Revision: 331578 URL: http://llvm.org/viewvc/llvm-project?rev=331578&view=rev Log: Fix a couple places that immediately called operator-> on the result of dyn_cast. It looks like it safe to just use cast for both cases. Modified: cfe/trunk/

r331682 - [X86] Make _mm256_gf2p8mul_epi8 require avx features since its 256 bits.

2018-05-07 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon May 7 14:47:11 2018 New Revision: 331682 URL: http://llvm.org/viewvc/llvm-project?rev=331682&view=rev Log: [X86] Make _mm256_gf2p8mul_epi8 require avx features since its 256 bits. Without this we throw an error on the header file instead of the user code when the right

r331683 - [X86] Use target feature defines in tests instead of defining our own flag on the command line. NFCI

2018-05-07 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon May 7 14:47:13 2018 New Revision: 331683 URL: http://llvm.org/viewvc/llvm-project?rev=331683&view=rev Log: [X86] Use target feature defines in tests instead of defining our own flag on the command line. NFCI Modified: cfe/trunk/test/CodeGen/gfni-builtins.c cfe/

r335564 - [X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and implement the mask input argument using an 'and' IR instruction.

2018-06-25 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Jun 25 17:44:02 2018 New Revision: 335564 URL: http://llvm.org/viewvc/llvm-project?rev=335564&view=rev Log: [X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and implement the mask input argument using an 'and' IR instruction. Additional IR is emitte

r335745 - [X86] Rename llvm.x86.avx512.mask.fpclass.p* to exclude 'mask.' from the name to match llvm.

2018-06-27 Thread Craig Topper via cfe-commits
Author: ctopper Date: Wed Jun 27 08:57:57 2018 New Revision: 335745 URL: http://llvm.org/viewvc/llvm-project?rev=335745&view=rev Log: [X86] Rename llvm.x86.avx512.mask.fpclass.p* to exclude 'mask.' from the name to match llvm. Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp cfe/trunk/test/

r335945 - [X86] Remove masking from the avx512 packed sqrt builtins. Use select builtins instead.

2018-06-28 Thread Craig Topper via cfe-commits
Author: ctopper Date: Thu Jun 28 22:43:33 2018 New Revision: 335945 URL: http://llvm.org/viewvc/llvm-project?rev=335945&view=rev Log: [X86] Remove masking from the avx512 packed sqrt builtins. Use select builtins instead. Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/

r336036 - [X86] Remove masking from the avx512 rotate builtins. Use a select builtin instead.

2018-06-29 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri Jun 29 18:32:14 2018 New Revision: 336036 URL: http://llvm.org/viewvc/llvm-project?rev=336036&view=rev Log: [X86] Remove masking from the avx512 rotate builtins. Use a select builtin instead. Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/lib/

r336042 - [X86] Correct the width of mask arguments in intrinsic headers and tests.

2018-06-29 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri Jun 29 23:05:17 2018 New Revision: 336042 URL: http://llvm.org/viewvc/llvm-project?rev=336042&view=rev Log: [X86] Correct the width of mask arguments in intrinsic headers and tests. All of these found by grepping through IR from the builtin tests for extra trunc and zex

r336388 - [X86] Use shufflevector instead of a select with a constant mask for fmaddsub/fmsubadd IR emission.

2018-07-05 Thread Craig Topper via cfe-commits
Author: ctopper Date: Thu Jul 5 13:38:31 2018 New Revision: 336388 URL: http://llvm.org/viewvc/llvm-project?rev=336388&view=rev Log: [X86] Use shufflevector instead of a select with a constant mask for fmaddsub/fmsubadd IR emission. Shufflevector is easier to generate and matches what the backe

r336417 - [X86] Implement _builtin_ia32_vfmaddss and _builtin_ia32_vfmaddsd with native IR using llvm.fma intrinsic.

2018-07-06 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri Jul 6 00:14:47 2018 New Revision: 336417 URL: http://llvm.org/viewvc/llvm-project?rev=336417&view=rev Log: [X86] Implement _builtin_ia32_vfmaddss and _builtin_ia32_vfmaddsd with native IR using llvm.fma intrinsic. This generates some extra zeroing currently, but we sho

r336470 - [X86] Add missing scalar fma intrinsics with rounding, but no mask.

2018-07-06 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri Jul 6 15:08:43 2018 New Revision: 336470 URL: http://llvm.org/viewvc/llvm-project?rev=336470&view=rev Log: [X86] Add missing scalar fma intrinsics with rounding, but no mask. We had the mask versions of the rounding intrinsics, but not one without masking. Also change

r336472 - [X86] When creating a select for scalar masked sqrt and div builtins make sure we optimize the all ones mask case.

2018-07-06 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri Jul 6 15:46:52 2018 New Revision: 336472 URL: http://llvm.org/viewvc/llvm-project?rev=336472&view=rev Log: [X86] When creating a select for scalar masked sqrt and div builtins make sure we optimize the all ones mask case. This case occurs in the intrinsic headers so we

r336487 - [X86] Fix various type mismatches in intrinsic headers and intrinsic tests that cause extra bitcasts to be emitted in the IR.

2018-07-07 Thread Craig Topper via cfe-commits
Author: ctopper Date: Sat Jul 7 10:03:32 2018 New Revision: 336487 URL: http://llvm.org/viewvc/llvm-project?rev=336487&view=rev Log: [X86] Fix various type mismatches in intrinsic headers and intrinsic tests that cause extra bitcasts to be emitted in the IR. Found via imprecise grepping of the

r336488 - [X86] Change _mm512_shuffle_pd and _mm512_shuffle_ps to use target specific shuffle builtins instead of generic __builtin_shufflevector.

2018-07-07 Thread Craig Topper via cfe-commits
Author: ctopper Date: Sat Jul 7 10:03:34 2018 New Revision: 336488 URL: http://llvm.org/viewvc/llvm-project?rev=336488&view=rev Log: [X86] Change _mm512_shuffle_pd and _mm512_shuffle_ps to use target specific shuffle builtins instead of generic __builtin_shufflevector. I added the builtins for

r336500 - [X86] Remove __builtin_ia32_vfnmsubsd3_mask3 and __builtin_ia32_vfnmsubss3_mask3 from clang.

2018-07-07 Thread Craig Topper via cfe-commits
Author: ctopper Date: Sat Jul 7 15:03:20 2018 New Revision: 336500 URL: http://llvm.org/viewvc/llvm-project?rev=336500&view=rev Log: [X86] Remove __builtin_ia32_vfnmsubsd3_mask3 and __builtin_ia32_vfnmsubss3_mask3 from clang. They are no longer used by clang. Modified: cfe/trunk/include/cl

r336498 - [X86] Fix a few intrinsics that were ignoring their rounding mode argument and hardcoded _MM_FROUND_CUR_DIRECTION internally.

2018-07-07 Thread Craig Topper via cfe-commits
Author: ctopper Date: Sat Jul 7 15:03:16 2018 New Revision: 336498 URL: http://llvm.org/viewvc/llvm-project?rev=336498&view=rev Log: [X86] Fix a few intrinsics that were ignoring their rounding mode argument and hardcoded _MM_FROUND_CUR_DIRECTION internally. I believe these have been broken sin

r336499 - [X86] Remove some unnecessarily escaped new lines from avx512fintrin.h

2018-07-07 Thread Craig Topper via cfe-commits
Author: ctopper Date: Sat Jul 7 15:03:19 2018 New Revision: 336499 URL: http://llvm.org/viewvc/llvm-project?rev=336499&view=rev Log: [X86] Remove some unnecessarily escaped new lines from avx512fintrin.h Modified: cfe/trunk/lib/Headers/avx512fintrin.h Modified: cfe/trunk/lib/Headers/avx512f

r336507 - [X86] Add new scalar fma intrinsics with rounding mode that use f32/f64 types.

2018-07-07 Thread Craig Topper via cfe-commits
Author: ctopper Date: Sat Jul 7 18:10:47 2018 New Revision: 336507 URL: http://llvm.org/viewvc/llvm-project?rev=336507&view=rev Log: [X86] Add new scalar fma intrinsics with rounding mode that use f32/f64 types. This allows us to handle masking in a very similar way to the default rounding vers

r336622 - [X86] Add __builtin_ia32_selectss_128 and __builtin_ia32_selectsd_128 that is suitable for use in scalar mask intrinsics.

2018-07-09 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Jul 9 17:37:25 2018 New Revision: 336622 URL: http://llvm.org/viewvc/llvm-project?rev=336622&view=rev Log: [X86] Add __builtin_ia32_selectss_128 and __builtin_ia32_selectsd_128 that is suitable for use in scalar mask intrinsics. This will convert the i8 mask argument t

r336628 - [X86] Remove custom handling for __builtin_ia32_divss_round_mask and __builtin_ia32_divsd_round_mask.

2018-07-09 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Jul 9 17:50:03 2018 New Revision: 336628 URL: http://llvm.org/viewvc/llvm-project?rev=336628&view=rev Log: [X86] Remove custom handling for __builtin_ia32_divss_round_mask and __builtin_ia32_divsd_round_mask. Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp Modified:

r336637 - [X86] Use masked the masked scalar fma builtins to implement the default rounding version of the fma intrinsics.

2018-07-09 Thread Craig Topper via cfe-commits
Author: ctopper Date: Mon Jul 9 21:38:29 2018 New Revision: 336637 URL: http://llvm.org/viewvc/llvm-project?rev=336637&view=rev Log: [X86] Use masked the masked scalar fma builtins to implement the default rounding version of the fma intrinsics. The rounding mode is checked in CGBuiltin.cpp to

r336739 - [X86] Fix the test for _mm512_mullox_epi64 to test the intrinsic instead of a copy of the intrinsic implementation.

2018-07-10 Thread Craig Topper via cfe-commits
Author: ctopper Date: Tue Jul 10 16:13:01 2018 New Revision: 336739 URL: http://llvm.org/viewvc/llvm-project?rev=336739&view=rev Log: [X86] Fix the test for _mm512_mullox_epi64 to test the intrinsic instead of a copy of the intrinsic implementation. Modified: cfe/trunk/test/CodeGen/avx512f-b

r336740 - [X86] Also fix the test for _mm512_mullo_epi64 to test the intrinsic instead of a copy of the intrinsic implementation.

2018-07-10 Thread Craig Topper via cfe-commits
Author: ctopper Date: Tue Jul 10 16:28:05 2018 New Revision: 336740 URL: http://llvm.org/viewvc/llvm-project?rev=336740&view=rev Log: [X86] Also fix the test for _mm512_mullo_epi64 to test the intrinsic instead of a copy of the intrinsic implementation. This had the same issue I just fixed in r3

r337040 - [X86] Change the rounding mode used when testing the sqrt_round intrinsics.

2018-07-13 Thread Craig Topper via cfe-commits
Author: ctopper Date: Fri Jul 13 13:16:38 2018 New Revision: 337040 URL: http://llvm.org/viewvc/llvm-project?rev=337040&view=rev Log: [X86] Change the rounding mode used when testing the sqrt_round intrinsics. Using CUR_DIRECTION is not a realistic scenario. That is equivalent to the intrinsic w

r374516 - [X86] Always define the tzcnt intrinsics even when _MSC_VER is defined.

2019-10-10 Thread Craig Topper via cfe-commits
Author: ctopper Date: Thu Oct 10 23:07:53 2019 New Revision: 374516 URL: http://llvm.org/viewvc/llvm-project?rev=374516&view=rev Log: [X86] Always define the tzcnt intrinsics even when _MSC_VER is defined. These intrinsics use llvm.cttz intrinsics so are always available even without the bmi feat

Re: r374449 - Add -fgnuc-version= to control __GNUC__ and other GCC macros

2019-10-11 Thread Craig Topper via cfe-commits
I think _MSC_VER is controlled by -ms-compatiblity-version based on what I found when I was missing with the bmiintrin.h header yesterday. ~Craig On Fri, Oct 11, 2019 at 3:05 PM Reid Kleckner via cfe-commits < cfe-commits@lists.llvm.org> wrote: > I think overloading zero to mean "don't define _

[clang] 4cd696f - [X86] Allow avx512vp2intersect to be used with __builtin_cpu_supports.

2020-05-21 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-05-21T21:54:54-07:00 New Revision: 4cd696f92fde5fa0bc570ca059e0f1ce7344c807 URL: https://github.com/llvm/llvm-project/commit/4cd696f92fde5fa0bc570ca059e0f1ce7344c807 DIFF: https://github.com/llvm/llvm-project/commit/4cd696f92fde5fa0bc570ca059e0f1ce7344c807.diff

[clang] 1b02db5 - [X86] Update some av512 shift intrinsics to use "unsigned int" parameter instead of int to match Intel documentation

2020-05-22 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-05-22T20:12:57-07:00 New Revision: 1b02db52b79e01f038775f59193a49850a34184d URL: https://github.com/llvm/llvm-project/commit/1b02db52b79e01f038775f59193a49850a34184d DIFF: https://github.com/llvm/llvm-project/commit/1b02db52b79e01f038775f59193a49850a34184d.diff

[clang] bb1d8bf - [X86] Add CLWB to Tremont CPU. Remove CLDEMOTE, MOVDIRI, MOVDIR64B, and WAITPKG to match gcc.

2020-06-02 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-06-02T22:38:51-07:00 New Revision: bb1d8bf2707bdca89c1f5e719057f1000232ccc3 URL: https://github.com/llvm/llvm-project/commit/bb1d8bf2707bdca89c1f5e719057f1000232ccc3 DIFF: https://github.com/llvm/llvm-project/commit/bb1d8bf2707bdca89c1f5e719057f1000232ccc3.diff

[clang] 00f3579 - Revert "[InstSimplify] Remove select ?, undef, X -> X and select ?, X, undef -> X transforms" and subsequent patches

2020-07-15 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-07-15T22:02:33-07:00 New Revision: 00f3579aea6e3d4a4b7464c3db47294f71cef9e4 URL: https://github.com/llvm/llvm-project/commit/00f3579aea6e3d4a4b7464c3db47294f71cef9e4 DIFF: https://github.com/llvm/llvm-project/commit/00f3579aea6e3d4a4b7464c3db47294f71cef9e4.diff

[clang] c74dd64 - [X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) Gadgets

2020-04-03 Thread Craig Topper via cfe-commits
Author: Scott Constable Date: 2020-04-03T13:02:04-07:00 New Revision: c74dd640fd740c6928f66a39c7c15a014af3f66f URL: https://github.com/llvm/llvm-project/commit/c74dd640fd740c6928f66a39c7c15a014af3f66f DIFF: https://github.com/llvm/llvm-project/commit/c74dd640fd740c6928f66a39c7c15a014af3f66f.dif

[clang] 1d42c0d - Revert "[X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) Gadgets"

2020-04-03 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-04-03T16:56:08-07:00 New Revision: 1d42c0db9a2b27c149c5bac373caa5a6d38d1f74 URL: https://github.com/llvm/llvm-project/commit/1d42c0db9a2b27c149c5bac373caa5a6d38d1f74 DIFF: https://github.com/llvm/llvm-project/commit/1d42c0db9a2b27c149c5bac373caa5a6d38d1f74.diff

[clang] 539163a - [X86] Add tests to clang Driver to ensure that SLH/Retpoline features are not enabled with LVI-CFI

2020-04-14 Thread Craig Topper via cfe-commits
Author: Scott Constable Date: 2020-04-14T10:47:27-07:00 New Revision: 539163affea7dc006c341ec82d80aece26a3c643 URL: https://github.com/llvm/llvm-project/commit/539163affea7dc006c341ec82d80aece26a3c643 DIFF: https://github.com/llvm/llvm-project/commit/539163affea7dc006c341ec82d80aece26a3c643.dif

[clang] dd863cc - [X86] Separate X86_CPU_TYPE_COMPAT_WITH_ALIAS from X86_CPU_TYPE_COMPAT. NFC

2020-06-03 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-06-03T14:13:12-07:00 New Revision: dd863ccae1346a44e4380fb17d22ae7041fee898 URL: https://github.com/llvm/llvm-project/commit/dd863ccae1346a44e4380fb17d22ae7041fee898 DIFF: https://github.com/llvm/llvm-project/commit/dd863ccae1346a44e4380fb17d22ae7041fee898.diff

[clang] d5c28c4 - [X86] Move CPUKind enum from clang to llvm/lib/Support. NFCI

2020-06-09 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-06-09T12:52:41-07:00 New Revision: d5c28c4094324e94f6eee403022ca21c8d76998e URL: https://github.com/llvm/llvm-project/commit/d5c28c4094324e94f6eee403022ca21c8d76998e DIFF: https://github.com/llvm/llvm-project/commit/d5c28c4094324e94f6eee403022ca21c8d76998e.diff

[clang] 641d5ac - [X86] Assign a feature to tremont, goldmont, goldmont-plus, icelake-client, and icelake for target multiversioning priority.

2020-06-09 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-06-09T16:39:41-07:00 New Revision: 641d5ac4d1965990fcf981f153369b038816cd16 URL: https://github.com/llvm/llvm-project/commit/641d5ac4d1965990fcf981f153369b038816cd16 DIFF: https://github.com/llvm/llvm-project/commit/641d5ac4d1965990fcf981f153369b038816cd16.diff

[clang] ed34140 - [X86] Move X86 stuff out of TargetParser.h and into the recently created X86TargetParser.h. NFC

2020-06-10 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-06-10T22:06:34-07:00 New Revision: ed34140e1146e188686f479bd954dea11a2d26d8 URL: https://github.com/llvm/llvm-project/commit/ed34140e1146e188686f479bd954dea11a2d26d8 DIFF: https://github.com/llvm/llvm-project/commit/ed34140e1146e188686f479bd954dea11a2d26d8.diff

[clang] c359c5d - [X86] Centalize the 'sse4' hack to a single place in X86TargetInfo::setFeatureEnabledImpl. NFCI

2020-07-06 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-07-06T15:00:32-07:00 New Revision: c359c5d534429c96f1cebdf8d845b8120e9c2ef0 URL: https://github.com/llvm/llvm-project/commit/c359c5d534429c96f1cebdf8d845b8120e9c2ef0 DIFF: https://github.com/llvm/llvm-project/commit/c359c5d534429c96f1cebdf8d845b8120e9c2ef0.diff

[clang] 16f3d69 - [X86] Move the feature dependency handling in X86TargetInfo::setFeatureEnabledImpl to a table based lookup in X86TargetParser.cpp

2020-07-06 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-07-06T23:14:02-07:00 New Revision: 16f3d698f2afbbea43e0c3df81df6f2a640ce806 URL: https://github.com/llvm/llvm-project/commit/16f3d698f2afbbea43e0c3df81df6f2a640ce806 DIFF: https://github.com/llvm/llvm-project/commit/16f3d698f2afbbea43e0c3df81df6f2a640ce806.diff

[clang] 3cbfe98 - [X86] Merge X86TargetInfo::setFeatureEnabled and X86TargetInfo::setFeatureEnabledImpl. NFC

2020-07-07 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-07-06T23:54:56-07:00 New Revision: 3cbfe988bc5cd366fb0f62e597f899b489c3834d URL: https://github.com/llvm/llvm-project/commit/3cbfe988bc5cd366fb0f62e597f899b489c3834d DIFF: https://github.com/llvm/llvm-project/commit/3cbfe988bc5cd366fb0f62e597f899b489c3834d.diff

[clang] 01d5cc5 - hwasan: Don't pass the tagged-globals target-feature to non-aarch64 backends.

2020-07-08 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-07-08T10:36:48-07:00 New Revision: 01d5cc5386affeda878e7e21b57c2a7e050d7b0a URL: https://github.com/llvm/llvm-project/commit/01d5cc5386affeda878e7e21b57c2a7e050d7b0a DIFF: https://github.com/llvm/llvm-project/commit/01d5cc5386affeda878e7e21b57c2a7e050d7b0a.diff

[clang] 82206e7 - [X86] Enabled a bunch of 64-bit Interlocked* functions intrinsics on 32-bit Windows to match recent MSVC

2020-07-08 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-07-08T10:39:56-07:00 New Revision: 82206e7fb49d9593d946599b107e8a8ad29a7d22 URL: https://github.com/llvm/llvm-project/commit/82206e7fb49d9593d946599b107e8a8ad29a7d22 DIFF: https://github.com/llvm/llvm-project/commit/82206e7fb49d9593d946599b107e8a8ad29a7d22.diff

[clang] 9b1e953 - [InstSimplify] Remove select ?, undef, X -> X and select ?, X, undef -> X transforms

2020-07-08 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-07-08T12:53:05-07:00 New Revision: 9b1e95329af7bb005275f18225b2c130ec3ea98d URL: https://github.com/llvm/llvm-project/commit/9b1e95329af7bb005275f18225b2c130ec3ea98d DIFF: https://github.com/llvm/llvm-project/commit/9b1e95329af7bb005275f18225b2c130ec3ea98d.diff

[clang] b4dbb37 - [X86] Rename X86_CPU_TYPE_COMPAT_ALIAS/X86_CPU_TYPE_COMPAT/X86_CPU_SUBTYPE_COMPAT macros. NFC

2020-07-12 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-07-12T17:00:24-07:00 New Revision: b4dbb37f32e554e4d6f118d9ddd87717721ea664 URL: https://github.com/llvm/llvm-project/commit/b4dbb37f32e554e4d6f118d9ddd87717721ea664 DIFF: https://github.com/llvm/llvm-project/commit/b4dbb37f32e554e4d6f118d9ddd87717721ea664.diff

[clang] 42c176c - [X86] Add 'cooperlake' and 'tigerlake' to __builtin_cpu_is.

2020-06-21 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-06-21T13:03:18-07:00 New Revision: 42c176c32851833f32863412e74235f085adc801 URL: https://github.com/llvm/llvm-project/commit/42c176c32851833f32863412e74235f085adc801 DIFF: https://github.com/llvm/llvm-project/commit/42c176c32851833f32863412e74235f085adc801.diff

[clang] 1d4c873 - [X86] Assign a feature priority to 'tigerlake' so it won't assert when used with function multiversioning

2020-06-21 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-06-21T13:24:58-07:00 New Revision: 1d4c87335d5236ea1f35937e1014980ba961ae34 URL: https://github.com/llvm/llvm-project/commit/1d4c87335d5236ea1f35937e1014980ba961ae34 DIFF: https://github.com/llvm/llvm-project/commit/1d4c87335d5236ea1f35937e1014980ba961ae34.diff

[clang] 0dfc8e1 - [X86] Remove encoding value from the X86_FEATURE and X86_FEATURE_COMPAT macro. NFCI

2020-06-22 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-06-22T11:46:21-07:00 New Revision: 0dfc8e1837e3e3ac06ab8c08fdc08b15e0ae1c2d URL: https://github.com/llvm/llvm-project/commit/0dfc8e1837e3e3ac06ab8c08fdc08b15e0ae1c2d DIFF: https://github.com/llvm/llvm-project/commit/0dfc8e1837e3e3ac06ab8c08fdc08b15e0ae1c2d.diff

[clang] 8dc9214 - [X86] Replace PROC macros with an enum and a lookup table of processor information.

2020-06-24 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-06-24T10:46:25-07:00 New Revision: 8dc92142e3c5332d741aff4bc81ee6aeed7784b2 URL: https://github.com/llvm/llvm-project/commit/8dc92142e3c5332d741aff4bc81ee6aeed7784b2 DIFF: https://github.com/llvm/llvm-project/commit/8dc92142e3c5332d741aff4bc81ee6aeed7784b2.diff

[clang] 636d31a - [X86] Don't imply -mprfchw when -m3dnow is specified. Enable prefetchw in the backend with 3dnow feature.

2020-06-25 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-06-25T11:25:35-07:00 New Revision: 636d31a5c341ff2ca5eefd6075ff059eb60b5a80 URL: https://github.com/llvm/llvm-project/commit/636d31a5c341ff2ca5eefd6075ff059eb60b5a80 DIFF: https://github.com/llvm/llvm-project/commit/636d31a5c341ff2ca5eefd6075ff059eb60b5a80.diff

[clang] 01c18f9 - Revert "[X86] Don't imply -mprfchw when -m3dnow is specified. Enable prefetchw in the backend with 3dnow feature."

2020-06-25 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-06-25T11:43:02-07:00 New Revision: 01c18f9199ace4cb15a7c82a4163c9ef84972342 URL: https://github.com/llvm/llvm-project/commit/01c18f9199ace4cb15a7c82a4163c9ef84972342 DIFF: https://github.com/llvm/llvm-project/commit/01c18f9199ace4cb15a7c82a4163c9ef84972342.diff

[clang] 6673d69 - [X86] Don't imply -mprfchw when -m3dnow is specified. Enable prefetchw in the backend with 3dnow feature.

2020-06-25 Thread Craig Topper via cfe-commits
Author: Craig Topper Date: 2020-06-25T12:46:52-07:00 New Revision: 6673d69226d86f4906dca4b627d6e0582486d072 URL: https://github.com/llvm/llvm-project/commit/6673d69226d86f4906dca4b627d6e0582486d072 DIFF: https://github.com/llvm/llvm-project/commit/6673d69226d86f4906dca4b627d6e0582486d072.diff

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