Author: ctopper
Date: Wed Apr 25 22:38:39 2018
New Revision: 330923
URL: http://llvm.org/viewvc/llvm-project?rev=330923&view=rev
Log:
[X86] Add support for _mm512_mullox_epi64 and _mm512_mask_mullox_epi64
intrinsics to match icc.
On AVX512F targets we'll produce an emulated sequence using 3 pmuludqs with
shifts and adds. On AVX512DQ we'll use vpmulld.
Fixes PR37140.
Modified:
cfe/trunk/lib/Headers/avx512fintrin.h
cfe/trunk/test/CodeGen/avx512f-builtins.c
Modified: cfe/trunk/lib/Headers/avx512fintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=330923&r1=330922&r2=330923&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512fintrin.h Wed Apr 25 22:38:39 2018
@@ -1581,6 +1581,18 @@ _mm512_mask_mullo_epi32(__m512i __W, __m
(__v16si)__W);
}
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_mullox_epi64 (__m512i __A, __m512i __B) {
+ return (__m512i) ((__v8du) __A * (__v8du) __B);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_mask_mullox_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {
+ return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
+ (__v8di)_mm512_mullox_epi64(__A,
__B),
+ (__v8di)__W);
+}
+
#define _mm512_mask_sqrt_round_pd(W, U, A, R) __extension__ ({ \
(__m512d)__builtin_ia32_sqrtpd512_mask((__v8df)(__m512d)(A), \
(__v8df)(__m512d)(W), (__mmask8)(U), \
Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=330923&r1=330922&r2=330923&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512f-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512f-builtins.c Wed Apr 25 22:38:39 2018
@@ -1952,6 +1952,19 @@ __m512i test_mm512_mullo_epi32(__m512i _
return _mm512_mullo_epi32(__A,__B);
}
+__m512i test_mm512_mullox_epi64 (__m512i __A, __m512i __B) {
+ // CHECK-LABEL: @test_mm512_mullox_epi64
+ // CHECK: mul <8 x i64>
+ return (__m512i) ((__v8di) __A * (__v8di) __B);
+}
+
+__m512i test_mm512_mask_mullox_epi64 (__m512i __W, __mmask8 __U, __m512i __A,
__m512i __B) {
+ // CHECK-LABEL: @test_mm512_mask_mullox_epi64
+ // CHECK: mul <8 x i64> %{{.*}}, %{{.*}}
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
+ return (__m512i) _mm512_mask_mullox_epi64(__W, __U, __A, __B);
+}
+
__m512d test_mm512_add_round_pd(__m512d __A, __m512d __B) {
// CHECK-LABEL: @test_mm512_add_round_pd
// CHECK: @llvm.x86.avx512.mask.add.pd.512
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