[PATCH] D56571: [RFC prototype] Implementation of asm-goto support in LLVM

craig.topper created this revision. craig.topper added reviewers: erichkeane, nickdesaulniers, chandlerc, jyu2. Herald added a subscriber: eraman. Herald added a reviewer: shafik. This patch accompanies the RFC posted here: http://lists.llvm.org/pipermail/llvm-dev/2018-October/127239.html This is

[PATCH] D45561: NFC - Indentation fixes in predefined-arch-macros.c

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rC Clang https://reviews.llvm.org/D45561 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llv

[PATCH] D45613: [X86] Introduce archs: goldmont-plus & tremont

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rC Clang https://reviews.llvm.org/D45613 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llv

[PATCH] D45720: [X86] Lowering PACK*S (pack with saturation) intrinsics to native IR (clang side)

craig.topper added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:8420 + if (IsUnsigned) { +MinVal = (IsDW) ? llvm::APInt::getMinValue(16).getZExtValue() +: llvm::APInt::getMinValue(8).getZExtValue(); Why can't these just be APInt

[PATCH] D45722: [X86] Lowering SAD (sum of absolute differences) intrinsics to native IR (clang side)

craig.topper added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:8427 + SmallVector ShuffleMask; + ShuffleMask.clear(); + for (unsigned i = 0; i < N; ++i) This clear isn't needed. Comment at: lib/CodeGen/CGBuiltin.cpp:8432 + CG

[PATCH] D45720: [X86] Lowering PACK*S (pack with saturation) intrinsics to native IR (clang side)

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D45720 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D45254: [X86][WAITPKG] WaitPKG intrinsics

craig.topper added inline comments. Comment at: lib/Headers/waitpkgintrin.h:41 +static __inline__ __UINT8_TYPE__ __DEFAULT_FN_ATTRS +_umwait (__UINT32_TYPE__ __CONTROL, __UINT64_TYPE__ __COUNTER) +{ I think we should use "unsigned int" and "unsigned long long" ex

[PATCH] D45254: [X86] WaitPKG intrinsics

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D45254 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D45722: [X86] Lowering SAD (sum of absolute differences) intrinsics to native IR (clang side)

craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:8426 + llvm::Type *BTy = llvm::VectorType::get(CGF.Builder.getInt8Ty(), N * 8); + SmallVector ShuffleMask; + for (unsigned i = 0; i < N; ++i) Size the ShuffleMask to N when it's cr

[PATCH] D45722: [X86] Lowering SAD (sum of absolute differences) intrinsics to native IR (clang side)

craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:8431 + CGF.Builder.CreateZExt(CGF.Builder.CreateShuffleVector( + AD, llvm::UndefValue::get(BTy), ShuffleMask), + VTy);

[PATCH] D45984: [X86] directstore and movdir64b intrinsics

craig.topper added inline comments. Comment at: docs/ClangCommandLineReference.rst:2465 +.. option:: -mmovdiri, -mno-movdiri + Please alphabetize this correctly. Comment at: include/clang/Basic/BuiltinsX86.def:1896 +TARGET_BUILTIN(__builtin_i

[PATCH] D45984: [X86] directstore and movdir64b intrinsics

craig.topper added inline comments. Comment at: lib/Headers/movdirintrin.h:39 +// Move quadword as direct store +static __inline__ void +__attribute__((__always_inline__, __nodebug__, __target__("movdiri"))) Sorry, the X86_64 preprocessor check should have staye

[PATCH] D45984: [X86] directstore and movdir64b intrinsics

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D45984 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D45722: [X86] Lowering SAD (sum of absolute differences) intrinsics to native IR (clang side)

craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:8425 + llvm::Type *VTy = llvm::VectorType::get(QTy, N); + llvm::Type *BTy = llvm::VectorType::get(CGF.Builder.getInt8Ty(), N * 8); + SmallVector ShuffleMask; Is this not a dead var

[PATCH] D44387: [x86] Introduce the pconfig/encl[u|s|v] intrinsics

craig.topper added a comment. I see that gcc implements all of this with wrappers around inline assembly. Any reason we couldn't just do that? Comment at: lib/Headers/pconfigintrin.h:31 + +#define MKTME_KEY_PROGRAM 0x0001 + This doesn't match the name used

[PATCH] D45722: [X86] Lowering SAD (sum of absolute differences) intrinsics to native IR (clang side)

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D45722 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D44387: [x86] Introduce the pconfig/encl[u|s|v] intrinsics

craig.topper added inline comments. Comment at: lib/Headers/pconfigintrin.h:28 + +#ifndef _PCONFIGINTRIN_H +#define _PCONFIGINTRIN_H I think all our other headers use double underscore here. Comment at: lib/Headers/sgxintrin.h:28 + +#ifndef _SG

[PATCH] D44387: [x86] Introduce the pconfig/encl[u|s|v] intrinsics

craig.topper added a comment. I didn't see an answer to the inline assembly question. Comment at: lib/Headers/pconfigintrin.h:31 + +#define MKTME_KEY_PROGRAM 0x0001 + craig.topper wrote: > This doesn't match the name used by gcc. It also needs to start with

[PATCH] D46132: [X86] Make __builtin_ia32_readeflags_u32 and __builtin_ia32_writeeflags_u32 only available on 32-bit targets.

craig.topper created this revision. craig.topper added reviewers: rnk, echristo, chandlerc. These builtins can't be handled by the backend on 64-bit targets. So error up front instead of throwing an isel error. Fixes PR37225 Repository: rC Clang https://reviews.llvm.org/D46132 Files: inc

[PATCH] D46323: [compiler-rt][X86][AMD][Bulldozer] Fix Bulldozer Model 2 detection.

craig.topper added inline comments. Comment at: lib/builtins/cpu_model.c:421 *Subtype = AMDFAM15H_BDVER2; break; // "bdver2"; 10h-1Fh: Piledriver } Update the comment please. Repository: rCRT Compiler Runtime https://reviews.llvm.org/D4632

[PATCH] D46323: [compiler-rt][X86][AMD][Bulldozer] Fix Bulldozer Model 2 detection.

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rL LLVM https://reviews.llvm.org/D46323 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm

[PATCH] D46332: [X86] Only enable the __ud2 and __int2c builtins if intrin.h has been included.

craig.topper created this revision. craig.topper added a reviewer: rnk. Every other builtin that uses TARGET_HEADER_BUILTIN has an 'h' in their attribute string. Assume this is an oversight here. https://reviews.llvm.org/D46332 Files: include/clang/Basic/BuiltinsX86.def Index: include/clan

[PATCH] D46328: [X86] Mark all x86 specific builtins as nothrow.

craig.topper added a subscriber: eli.friedman. craig.topper added a comment. @eli.friedman is that test worth doing? Would we do it for every builtin? Repository: rC Clang https://reviews.llvm.org/D46328 ___ cfe-commits mailing list cfe-commits@l

[PATCH] D46328: [X86] Mark all x86 specific builtins as nothrow.

craig.topper added a comment. Is this ok to go in then? Repository: rC Clang https://reviews.llvm.org/D46328 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D46410: [Target] Diagnose mismatch in required CPU for always_inline functions

craig.topper created this revision. craig.topper added reviewers: echristo, erichkeane. If an always inline function requests a different CPU than its caller we should probably error. If the callee CPU has features that the caller CPU doesn't we would already error for the feature mismatch, but

[PATCH] D46410: [Target] Diagnose mismatch in required CPU for always_inline functions

craig.topper added a comment. From the backend codegen perspective it would be fine if the callees instruction features were a subset. So it really depends on why the user wrote the different arch on the callee in the first place. If they did it because of one of the various tuning flags in the

[PATCH] D46435: [x86] Introduce the encl[u|s|v] intrinsics

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rC Clang https://reviews.llvm.org/D46435 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llv

[PATCH] D46431: [x86] Introduce the pconfig intrinsic

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D46431 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D46541: [CodeGen] Improve diagnostics related to target attributes

craig.topper added inline comments. Comment at: lib/CodeGen/CodeGenFunction.cpp:2271 +static bool hasRequiredFeature(StringRef Feature, + llvm::StringMap& CallerFeatureMap, + std::string &Missing) { '&'

[PATCH] D48617: [Builtins][Attributes][X86] Tag all X86 builtins with their required vector width. Add a min_vector_width function attribute and tag all x86 instrinsics with it.

craig.topper created this revision. craig.topper added reviewers: rsmith, chandlerc, echristo, rnk. This is part of an ongoing attempt at making 512 bit vectors illegal in the X86 backend type legalizer due to CPU frequency penalties associated with wide vectors on Skylake Server CPUs. We want t

[PATCH] D48712: [X86] Lowering integer truncation intrinsics to native IR

craig.topper added inline comments. Comment at: clang/lib/Headers/avx512vlintrin.h:7421 + __builtin_convertvector((__v4si)__A, __v4qi), (__v4qi){0, 0, 0, 0}, 0, 1, + 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); } If you need to add more zeroes than the w

[PATCH] D48712: [X86] Lowering integer truncation intrinsics to native IR

craig.topper added inline comments. Comment at: clang/lib/Headers/avx512vlintrin.h:33 +typedef short __v2hi __attribute__((__vector_size__(4))); +typedef char __v4qi __attribute__((__vector_size__(4))); Can you just do a local typedef in the functions that need

[PATCH] D48617: [Builtins][Attributes][X86] Tag all X86 builtins with their required vector width. Add a min_vector_width function attribute and tag all x86 instrinsics with it.

craig.topper added inline comments. Comment at: test/Sema/attr-min-vector-width.c:8 + +void f3(void) __attribute__((__min_vector_width__(128), __min_vector_width__(256))); /* expected-warning {{attribute '__min_vector_width__' is already applied with different parameters}} */ -

[PATCH] D48617: [Builtins][Attributes][X86] Tag all X86 builtins with their required vector width. Add a min_vector_width function attribute and tag all x86 instrinsics with it.

craig.topper updated this revision to Diff 153763. craig.topper added a comment. -Rebase the intrinsic headers and builtins file -Add documentation for the attribute. Open to feedback on improvements here -Add tests for wrong number of arguments to the attribute. https://reviews.llvm.org/D48617

[PATCH] D48617: [Builtins][Attributes][X86] Tag all X86 builtins with their required vector width. Add a min_vector_width function attribute and tag all x86 instrinsics with it.

craig.topper added inline comments. Comment at: include/clang/Basic/Attr.td:1949 + let Args = [UnsignedArgument<"VectorWidth">]; + let Subjects = SubjectList<[Function], ErrorDiag>; + let Documentation = [Undocumented]; aaron.ballman wrote: > Should this apply

[PATCH] D48617: [Builtins][Attributes][X86] Tag all X86 builtins with their required vector width. Add a min_vector_width function attribute and tag all x86 instrinsics with it.

craig.topper updated this revision to Diff 153786. craig.topper marked 4 inline comments as done. craig.topper added a comment. -Added a negative test -Hopefully fixed all the grammatical/spelling errors. -Attempted to clarify some more about prefer-vector-width and builtins. https://reviews.llv

[PATCH] D48712: [X86] Lowering integer truncation intrinsics to native IR

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D48712 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D68627: [Sema][X86] Consider target attribute into the checks in validateOutputSize and validateInputSize.

craig.topper created this revision. craig.topper added reviewers: rnk, echristo, erichkeane, RKSimon, spatel. Herald added a project: clang. The validateOutputSize and validateInputSize need to check whether AVX or AVX512 are enabled. But this can be affected by the target attribute so we need to

[PATCH] D68255: [X86] Remove AVX/AVX512 check from validateOperandSize, just always accept 512

craig.topper added a comment. New patch to factor in the target attribute D68627 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D68255/new/ https://reviews.llvm.org/D68255 ___ cfe-commits mailing list cfe-co

[PATCH] D80251: [X86] Update some av512 shift intrinsics to use "unsigned int" parameter instead of int to match Intel documentaiton

craig.topper created this revision. craig.topper added reviewers: RKSimon, spatel. There are 65 that take a scalar shift amount. Intel documentation shows 60 of them taking unsigned int. There are 5 versions of srli_epi16 that use int, the 512-bit maskz and 128/256 mask/maskz. Fixes PR45931 h

[PATCH] D80251: [X86] Update some av512 shift intrinsics to use "unsigned int" parameter instead of int to match Intel documentaiton

craig.topper added a comment. In D80251#2046564 , @spatel wrote: > Is it possible to fix those other 5 in the Intel docs for consistency, or is > there some functional reason that those are different? I think it was just a mistake. The docs are derived

[PATCH] D80251: [X86] Update some av512 shift intrinsics to use "unsigned int" parameter instead of int to match Intel documentaiton

craig.topper added a comment. In D80251#2049418 , @RKSimon wrote: > Can we add -Wsign-conversion checks to the tests? That was mentioned on > PR45931 I can. Will that do anything other than show that my test_* functions were updated to match the new ty

[PATCH] D80251: [X86] Update some av512 shift intrinsics to use "unsigned int" parameter instead of int to match Intel documentaiton

craig.topper updated this revision to Diff 265787. craig.topper added a comment. Add -Wsign-conversion. Fix two test issues that exposed. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80251/new/ https://reviews.llvm.org/D80251 Files: clang/lib/Headers/avx512bwintrin.h clang/lib/Hea

[PATCH] D80251: [X86] Update some av512 shift intrinsics to use "unsigned int" parameter instead of int to match Intel documentaiton

This revision was automatically updated to reflect the committed changes. Closed by commit rG1b02db52b79e: [X86] Update some av512 shift intrinsics to use "unsigned int" parameter… (authored by craig.topper). Herald added a project: clang. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D79322: [FEnv] Small fixes to implementation of flt.rounds

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D79322/new/ https://reviews.llvm.org/D79322 ___

[PATCH] D83360: [InstSimplify] Remove select ?, undef, X -> X and select ?, X, undef -> X

craig.topper added a comment. I'm going to revert this as Eric requested. And I'll ask to merge the revert to the 11 branch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83360/new/ https://reviews.llvm.org/D83360 __

[PATCH] D83360: [InstSimplify] Remove select ?, undef, X -> X and select ?, X, undef -> X

craig.topper reopened this revision. craig.topper added a comment. This revision is now accepted and ready to land. Reverted in 00f3579aea6e3d4a4b7464c3db47294f71cef9e4 Repository: rG LLVM Github Monorepo CHANGES SINCE LAS

[PATCH] D83360: [InstSimplify] Remove select ?, undef, X -> X and select ?, X, undef -> X

craig.topper added a comment. Merge request for 11.0 https://bugs.llvm.org/show_bug.cgi?id=46740 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83360/new/ https://reviews.llvm.org/D83360 ___ cfe-commits

[PATCH] D83360: [InstSimplify] Remove select ?, undef, X -> X and select ?, X, undef -> X

craig.topper added a comment. @aqjune did you put a patch for InstSimplify doing distribution over undef yet? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83360/new/ https://reviews.llvm.org/D83360 __

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

This revision was automatically updated to reflect the committed changes. Closed by commit rGc74dd640fd74: [X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI)… (authored by sconstab, committed by craig.topper). Herald added a project: clang. Changed prior to commit: htt

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper added inline comments. Comment at: llvm/lib/Target/X86/ImmutableGraph.h:46-56 + using NodeValueT = _NodeValueT; + using EdgeValueT = _EdgeValueT; + using size_type = _SizeT; + class Node; + class Edge { +friend class ImmutableGraph; +template friend cla

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 254962. craig.topper marked an inline comment as done. craig.topper added a comment. Fix include guard on ImmutableGraph.h CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75936/new/ https://reviews.llvm.org/D75936 Files: clang/include/clang/Dr

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 255000. craig.topper added a comment. Remove underscores from names. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75936/new/ https://reviews.llvm.org/D75936 Files: clang/include/clang/Driver/Options.td clang/lib/Driver/ToolChains/Arch/X86

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 255008. craig.topper added a comment. This revision is now accepted and ready to land. Use std::unique_ptr for arrays in the graph. I started trying to use std::vector, but it kept crashing. Which initially I thought was some issue with the fact that we

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 255011. craig.topper added a comment. Use unique_ptr::operator[] in a few places. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75936/new/ https://reviews.llvm.org/D75936 Files: clang/include/clang/Driver/Options.td clang/lib/Driver/ToolCh

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 255028. craig.topper added a comment. -Add edge_begin()/edge_end()/edges() to Node class. Hides the N+1 trick used to find the end of a Node's edges. -Add nodes()/edges() and use range-based for loops. -Stop using things in the traits class since it does

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper marked 2 inline comments as done. craig.topper added inline comments. Comment at: llvm/lib/Target/X86/ImmutableGraph.h:285 + std::unique_ptr Edges; + size_type EdgesSize; +}; sconstab wrote: > @craig.topper It now occurs to me that these fields sho

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper marked 2 inline comments as done. craig.topper added inline comments. Comment at: llvm/lib/Target/X86/ImmutableGraph.h:329 +size_type VI = 0, EI = 0; +for (; VI < static_cast(AdjList.size()); ++VI) { + VertexArray[VI].Value = std::move(AdjList[VI].first)

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 255084. craig.topper added a comment. -Apply updates to comments. -Use nodes()/edges() to implement nodes_begin/end and edges_begin/end to simplify the code a little -Reorder fields in the Graph class. CHANGES SINCE LAST ACTION https://reviews.llvm.o

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 255086. craig.topper added a comment. -Add methods to get the index of a Node or Edge to remove calls to std::distance in various places CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75936/new/ https://reviews.llvm.org/D75936 Files: clang/i

[PATCH] D77393: [X86] Fix implicit sign conversion warnings in X86 headers.

craig.topper added a comment. Seems fine to me. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77393/new/ https://reviews.llvm.org/D77393 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 256073. craig.topper added a comment. Address review comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75936/new/ https://reviews.llvm.org/D75936 Files: clang/include/clang/Driver/Options.td clang/lib/Driver/ToolChains/Arch/X86.cpp

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper marked an inline comment as done. craig.topper added inline comments. Comment at: llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp:83-85 +#define ARG_NODE nullptr +#define GADGET_EDGE ((int)(-1)) +#define WEIGHT(EdgeValue) ((double)(2 * (EdgeValue) + 1)) --

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper marked 37 inline comments as done and an inline comment as not done. craig.topper added inline comments. Comment at: llvm/lib/Target/X86/ImmutableGraph.h:41 +class ImmutableGraph { + using Traits = GraphTraits *>; + template friend class ImmutableGraphBuilder; --

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 256103. craig.topper marked 5 inline comments as done. craig.topper added a comment. -Replace ARG_NODE and GADGET_EDGE defines with static constexpr members CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75936/new/ https://reviews.llvm.org/D7593

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 256106. craig.topper added a comment. -Put llvm:: on the for_each calls in this patch instead of D75937 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75936/new/ https://reviews.llvm.org/D75936 Files: clang/

[PATCH] D77205: [X86] Add TSXLDTRK instructions.

craig.topper accepted this revision. craig.topper added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77205/new/ https://reviews.llvm.org/D77205 ___ cfe-commits mailing list cfe-commits

[PATCH] D75934: Add Indirect Thunk Support to X86 to mitigate Load Value Injection (LVI) [2/6]

craig.topper abandoned this revision. craig.topper added a comment. This was superceded by D76812 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75934/new/ https://reviews.llvm.org/D75934 ___ cfe-commits mai

[PATCH] D77427: [X86] Add tests to clang Driver to ensure that SLH/Retpoline features are not enabled with LVI-CFI

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77427/new/ https://reviews.llvm.org/D77427 ___ cfe-commits mailing list c

[PATCH] D77427: [X86] Add tests to clang Driver to ensure that SLH/Retpoline features are not enabled with LVI-CFI

This revision was automatically updated to reflect the committed changes. Closed by commit rG539163affea7: [X86] Add tests to clang Driver to ensure that SLH/Retpoline features are not… (authored by sconstab, committed by craig.topper). Herald added a project: clang. Repository: rG LLVM Github

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 257465. craig.topper added a comment. Address some of the review comments. Primarily the ones in ImmutableGraph. I did de-templatize the method in X86LoadValueInjectionLoadHardening.cpp CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75936/new/

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper marked 6 inline comments as done. craig.topper added inline comments. Comment at: llvm/lib/Target/X86/ImmutableGraph.h:366 +std::vector TrimmedNodes(TrimNodes.size()); +for (size_type I = 0; I < TrimNodes.size(); ++I) { + TrimmedNodes[I] = TrimmedNodesSo

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 257488. craig.topper marked an inline comment as done. craig.topper added a comment. Fix some mistakes I made in the previous upload where I accidentally deleted the pipeline tests instead of updating them. CHANGES SINCE LAST ACTION https://reviews.l

[PATCH] D77431: [X86] Add tests to clang Driver to ensure that SLH/Retpoline features are not enabled with LVI-hardening

craig.topper commandeered this revision. craig.topper edited reviewers, added: sconstab; removed: craig.topper. craig.topper added a comment. Merged into D75936 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77431/new/ https://reviews.llvm.org/D77431

[PATCH] D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/6]

craig.topper updated this revision to Diff 257549. craig.topper added a comment. Merge in test case from D77431 since it logically belongs with these changes. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75936/new/ https://reviews.llvm.org/D75936 Fil

[PATCH] D81439: [X86] Move CPUKind enum from clang to llvm/lib/Support. NFCI

craig.topper created this revision. craig.topper added reviewers: erichkeane, echristo, RKSimon, spatel, LuoYuanke. Herald added subscribers: hiraditya, mgorny. Herald added projects: clang, LLVM. Similar to what some other targets have done. This information could be reused by other frontends so

[PATCH] D81439: [X86] Move CPUKind enum from clang to llvm/lib/Support. NFCI

craig.topper marked 2 inline comments as done. craig.topper added inline comments. Comment at: clang/lib/Basic/Targets/X86.h:132 protected: - /// Enumeration of all of the X86 CPUs supported by Clang. - /// - /// Each enumeration represents a particular CPU supported by Clang

[PATCH] D81439: [X86] Move CPUKind enum from clang to llvm/lib/Support. NFCI

craig.topper updated this revision to Diff 269610. craig.topper added a comment. Flip polarity of the bool and rename it. Add doxygen comments. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81439/new/ https://reviews.llvm.org/D81439 Files: clang/include/clang/Basic/X86Target.def cl

[PATCH] D81439: [X86] Move CPUKind enum from clang to llvm/lib/Support. NFCI

This revision was automatically updated to reflect the committed changes. Closed by commit rGd5c28c409432: [X86] Move CPUKind enum from clang to llvm/lib/Support. NFCI (authored by craig.topper). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81439/ne

[PATCH] D83254: [X86] Enabled a bunch of 64-bit Interlocked* functions intrinsics on 32-bit Windows to match recent MSVC

craig.topper created this revision. craig.topper added reviewers: RKSimon, spatel, rnk, erichkeane. Herald added a subscriber: jfb. This enables _InterlockedAnd64/_InterlockedOr64/_InterlockedXor64/_InterlockedDecrement64/_InterlockedIncrement64/_InterlockedExchange64/_InterlockedExchangeAdd64/_I

[PATCH] D83273: [X86] Remove the feature dependency handling in X86TargetInfo::setFeatureEnabledImpl to a table based lookup in X86TargetParser.cpp

craig.topper created this revision. craig.topper added reviewers: RKSimon, spatel, echristo, erichkeane, LuoYuanke, LiuChen3, FreddyYe, xiangzhangllvm. Herald added subscribers: jfb, hiraditya. Herald added a project: LLVM. Previously we had to specify the forward and backwards feature dependenci

[PATCH] D83273: [X86] Remove the feature dependency handling in X86TargetInfo::setFeatureEnabledImpl to a table based lookup in X86TargetParser.cpp

craig.topper updated this revision to Diff 275883. craig.topper added a comment. Drop two header includes I was using for debugging CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83273/new/ https://reviews.llvm.org/D83273 Files: clang/lib/Basic/Targets/X86.cpp clang/lib/Basic/Target

[PATCH] D83273: [X86] Remove the feature dependency handling in X86TargetInfo::setFeatureEnabledImpl to a table based lookup in X86TargetParser.cpp

This revision was automatically updated to reflect the committed changes. Closed by commit rG16f3d698f2af: [X86] Move the feature dependency handling in X86TargetInfo… (authored by craig.topper). Herald added a project: clang. Changed prior to commit: https://reviews.llvm.org/D83273?vs=275883&i

[PATCH] D83369: hwasan: Don't pass the tagged-globals target-feature to non-aarch64 backends.

craig.topper created this revision. craig.topper added reviewers: pcc, vitalybuka, hctim. Herald added subscribers: danielkiss, kristof.beyls. Herald added a project: clang. The other backends don't know what this feature is and print a message to stderr. I recently tried to rework some target fe

[PATCH] D83369: hwasan: Don't pass the tagged-globals target-feature to non-aarch64 backends.

This revision was automatically updated to reflect the committed changes. Closed by commit rG01d5cc5386af: hwasan: Don't pass the tagged-globals target-feature to non-aarch64 backends. (authored by craig.topper). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.l

[PATCH] D83254: [X86] Enabled a bunch of 64-bit Interlocked* functions intrinsics on 32-bit Windows to match recent MSVC

This revision was automatically updated to reflect the committed changes. Closed by commit rG82206e7fb49d: [X86] Enabled a bunch of 64-bit Interlocked* functions intrinsics on 32-bit… (authored by craig.topper). Herald added a project: clang. Repository: rG LLVM Github Monorepo CHANGES SINCE L

[PATCH] D83360: [InstSimplify] Remove select ?, undef, X -> X and select ?, X, undef -> X

This revision was automatically updated to reflect the committed changes. Closed by commit rG9b1e95329af7: [InstSimplify] Remove select ?, undef, X -> X and select ?, X, undef -> X… (authored by craig.topper). Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG

[PATCH] D83360: [InstSimplify] Remove select ?, undef, X -> X and select ?, X, undef -> X

craig.topper added a comment. In D83360#2139933 , @efriedma wrote: > Please also add testcases with select constant expressions, to test constant > folding. Should we remove the handling from llvm::ConstantFoldSelectInstruction Repository: rG LLVM G

[PATCH] D83360: [InstSimplify] Remove select ?, undef, X -> X and select ?, X, undef -> X

craig.topper added a comment. Wasn't @majnemer asking about define i32 @src(i1 %cond, i32 %x) { %xf = freeze i32 %x %s = select i1 %cond, i32 %xf, i32 undef ret i32 %s } which is legal. I'm going to work on supporting known non-poison cases. Repository: rG LLVM Github Monorep

[PATCH] D83360: [InstSimplify] Remove select ?, undef, X -> X and select ?, X, undef -> X

craig.topper added a comment. Alive does like this https://alive2.llvm.org/ce/z/yhibbe which is what I was going to implement. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83360/new/ https://reviews.llvm.org/D83360

[PATCH] D83897: [X86] Add a generic 32-bit CPU with sse2 with modern tuning flags to be used as the default for the 32-bit targets instead of pentium4

craig.topper created this revision. craig.topper added reviewers: RKSimon, spatel, echristo, andreadb. Herald added subscribers: jfb, hiraditya. Herald added a project: LLVM. Currently our default 32-bit CPU on Linux and Windows is "pentium4" which comes with pentium4 tuning settings and almost n

[PATCH] D82414: [X86] Replace PROC macros with an enum and a lookup table of processor information.

craig.topper marked an inline comment as done. craig.topper added inline comments. Comment at: llvm/lib/Support/X86TargetParser.cpp:36 + // i386-generation processors. + { "i386", CK_i386, ~0U, PROC_32_BIT }, + // i486-generation processors. Once we have featu

[PATCH] D82414: [X86] Replace PROC macros with an enum and a lookup table of processor information.

craig.topper created this revision. craig.topper added reviewers: echristo, erichkeane, LuoYuanke. Herald added a subscriber: hiraditya. Herald added projects: clang, LLVM. craig.topper added reviewers: RKSimon, spatel. craig.topper marked an inline comment as done. craig.topper added inline commen

[PATCH] D82414: [X86] Replace PROC macros with an enum and a lookup table of processor information.

This revision was automatically updated to reflect the committed changes. Closed by commit rG8dc92142e3c5: [X86] Replace PROC macros with an enum and a lookup table of processor… (authored by craig.topper). Changed prior to commit: https://reviews.llvm.org/D82414?vs=272837&id=273101#toc Reposi

[PATCH] D79472: [X86] Remove support some inline assembly constraints that are no longer supported by gcc.

craig.topper planned changes to this revision. craig.topper added a comment. I committed part of this, but got nervous when I found icc supported some of this. Still need to check our internal tests to see if they are used. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION http

[PATCH] D82731: [X86] Move frontend CPU feature initialization to a look up table based implementation.

craig.topper created this revision. craig.topper added reviewers: RKSimon, spatel, LuoYuanke, LiuChen3, echristo, FreddyYe. Herald added subscribers: jfb, hiraditya. Herald added projects: clang, LLVM. craig.topper added a reviewer: erichkeane. This replaces the switch statement implementation in

[PATCH] D82562: Implement AVX ABI Warning/error

craig.topper added inline comments. Comment at: clang/include/clang/Basic/DiagnosticFrontendKinds.td:246 + "enabled changes the ABI">, + InGroup>; +def err_avx_calling_convention : Error; Should this be -Wpsabi to match gcc? I think that's what

[PATCH] D82388: move "basic" builtins to TableGen

craig.topper added inline comments. Comment at: llvm/include/llvm/TableGen/Record.h:1777 /// string manipulation. struct LessRecordByID { bool operator()(const Record *LHS, const Record *RHS) const { Here’s the sort predicate for it. Repository: rG LLVM

[PATCH] D82388: move "basic" builtins to TableGen

craig.topper added a comment. Every Record has an ID that is assigned in order. You can just sort the Records based on that in your emitter Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82388/new/ https://reviews.llvm.org/D82388 ___

[PATCH] D82731: [X86] Move frontend CPU feature initialization to a look up table based implementation.

craig.topper updated this revision to Diff 274161. craig.topper added a comment. -Run clang-format. Some lines in the table are still slightly over 80 columns. -Fix the number of words in the FeatureBitset. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.o

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