[PATCH] D75723: [X86] Enable intrinsics _BitScan*

craig.topper added inline comments. Comment at: clang/lib/Headers/ia32intrin.h:417 +#define _BitScanForward(a, b) \ + __extension__({ \ +int c = (int)(b);

[PATCH] D75723: [X86] Enable intrinsics _BitScan*

craig.topper added inline comments. Comment at: clang/lib/Headers/ia32intrin.h:421 +if (__c != 0) { \ + *(a) = (unsigned)__bsfd(__c); \ + __d = 1;

[PATCH] D75723: [X86] Enable intrinsics _BitScan*

craig.topper added inline comments. Comment at: clang/lib/Headers/ia32intrin.h:421 +if (__c != 0) { \ + *(a) = (unsigned)__bsfd(__c); \ + __d = 1;

[PATCH] D76077: [ARM] Add __bf16 as new Bfloat16 C Type

craig.topper added inline comments. Comment at: clang/lib/Basic/Targets/AArch64.cpp:69 + Bfloat16Width = Bfloat16Align = 16; + Bfloat16Format = &llvm::APFloat::IEEEhalf(); + Doesn't Bfloat16 have a different number of mantissa and exponent bits than IEEEhalf?

[PATCH] D75934: Add Indirect Thunk Support to X86 to mitigate Load Value Injection (LVI) [2/6]

craig.topper added inline comments. Comment at: llvm/lib/Target/X86/X86LoadValueInjectionIndirectThunks.cpp:92 + + // Don't skip functions with the "optnone" attr but participate in opt-bisect. + const Function &F = MF.getFunction(); zbrid wrote: > Why did you

[PATCH] D73570: [FPEnv][X86] Platform-specific builtin constrained FP enablement

craig.topper added a comment. LGTM to me with that FIXME added. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D73570/new/ https://reviews.llvm.org/D73570 ___ cfe-commits mailing list cfe-commits@lists.l

[PATCH] D68720: Support -fstack-clash-protection for x86

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D68720/new/ https://reviews.llvm.org/D68720 ___

[PATCH] D68720: Support -fstack-clash-protection for x86

craig.topper added inline comments. Comment at: clang/include/clang/Basic/DiagnosticCommonKinds.td:243 + + def warn_fe_stack_clash_protection_inline_asm : Warning< + "Unable to protect inline asm that clobbers stack pointer against stack clash">; Remove "f

[PATCH] D72722: [FPEnv] [SystemZ] Platform-specific builtin constrained FP enablement

craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:13347 case SystemZ::BI__builtin_s390_vfnmadb: { llvm::Type *ResultType = ConvertType(E->getType()); Value *X = EmitScalarExpr(E->getArg(0)); What are the semantics of vfn

[PATCH] D72906: [X86] Improve X86 cmpps/cmppd/cmpss/cmpsd intrinsics with strictfp

craig.topper added a comment. In D72906#1826061 , @uweigand wrote: > > The constrained fcmp intrinsics don't allow the TRUE/FALSE predicates. > > Hmm, maybe they should then? The only reason I didn't add them initially > was that I wasn't sure they were

[PATCH] D68720: Support -fstack-clash-protection for x86

craig.topper added inline comments. Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:31080 + + BuildMI(blockMBB, DL, TII->get(IsLP64 ? X86::SUB64ri32 : X86::SUB32ri), + physSPReg) serge-sans-paille wrote: > craig.topper wrote: > > This uses physSPReg

[PATCH] D72114: [MS] Overhaul how clang passes overaligned args on x86_32

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72114/new/ https://reviews.llvm.org/D72114 ___

[PATCH] D72824: [X86] Add combination for fma and fneg on X86 under strict FP.

craig.topper added a comment. Are we missing tests for the vector instructions? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72824/new/ https://reviews.llvm.org/D72824 ___ cfe-commits mailing list cfe

[PATCH] D72906: [X86] Improve X86 cmpps/cmppd/cmpss/cmpsd intrinsics with strictfp

craig.topper added a comment. In D72906#1826849 , @uweigand wrote: > In D72906#1826122 , @craig.topper > wrote: > > > In D72906#1826061 , @uweigand > > wrote: > > > > > > T

[PATCH] D72820: [FPEnv] Add pragma FP_CONTRACT support under strict FP.

craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:3381 + "constrained mode"); +FMulAdd = Builder.CreateCall( +CGF.CGM.getIntrinsic(llvm::Intrinsic::experimental_constrained_fmuladd, Doesn't this need to be Cr

[PATCH] D72820: [FPEnv] Add pragma FP_CONTRACT support under strict FP.

craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:3381 + "constrained mode"); +FMulAdd = Builder.CreateCall( +CGF.CGM.getIntrinsic(llvm::Intrinsic::experimental_constrained_fmuladd, kpn wrote: > craig.topper

[PATCH] D72906: [X86] Improve X86 cmpps/cmppd/cmpss/cmpsd intrinsics with strictfp

craig.topper added a comment. In D72906#1838532 , @uweigand wrote: > In D72906#1837905 , @craig.topper > wrote: > > > In D72906#1826849 , @uweigand > > wrote: > > > > > In

[PATCH] D72820: [FPEnv] Add pragma FP_CONTRACT support under strict FP.

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72820/new/ https://reviews.llvm.org/D72820 ___

[PATCH] D72824: [X86] Add combination for fma and fneg on X86 under strict FP.

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72824/new/ https://reviews.llvm.org/D72824 ___

[PATCH] D73570: [FPEnv][X86] Platform-specific builtin constrained FP enablement

craig.topper added inline comments. Comment at: clang/test/CodeGen/fma-builtins-constrained.c:4 +// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +fma -S -o - | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s +// RUN: %clang_cc1 -ffre

[PATCH] D72906: [X86] Improve X86 cmpps/cmppd/cmpss/cmpsd intrinsics with strictfp

craig.topper marked 2 inline comments as done. craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:12363 +Cmp = Builder.CreateFCmp(Pred, Ops[0], Ops[1]); return EmitX86MaskedCompareResult(*this, Cmp, NumElts, Ops[3]); }

[PATCH] D44786: Lowering x86 adds/addus/subs/subus intrinsics (clang)

craig.topper added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:7897 + Value *MaxVec = CGF.Builder.CreateVectorSplat(NumElements, Max); + Value *ExtMaxVec = Signed ? CGF.Builder.CreateSExt(MaxVec, ExtType) +: CGF.Builder.CreateZExt(MaxVec,

[PATCH] D44786: Lowering x86 adds/addus/subs/subus intrinsics (clang)

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM with that one comment. Comment at: lib/CodeGen/CGBuiltin.cpp:8288 +llvm::Type *ElementType = ResultType->getVectorElementType(); +llvm::Type *ExtElem

[PATCH] D45058: [X86] Disable SGX for Skylake Server

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rC Clang https://reviews.llvm.org/D45058 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llv

[PATCH] D44559: [Sema] Wrong width of result of mul operation

craig.topper added a comment. While X86 does have multiplies that return double width results, it also has 16/32/64-bit forms of imul that only return the lower portion of the result. Those multiplies are typically faster and have fewer uops than the double width multiplies so we prefer to use

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

craig.topper added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:8904 +unsigned CC = cast(Ops[4])->getZExtValue(); +// Support only if the rounding mode is 4 (AKA CUR_DIRECTION), otherwise keep the intrinsic. +if (CC != 4) { 80 columns? ==

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

craig.topper added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:8901 } - + case X86::BI__builtin_ia32_sqrtsd_round_mask: + case X86::BI__builtin_ia32_sqrtss_round_mask: { What about __builtin_ia32_sqrtsd and __builtin_ia32_sqrtss? Repository: r

[PATCH] D45202: [X86] Replacing X86-specific floor and ceil vector intrinsics with generic LLVM intrinsics

craig.topper added inline comments. Comment at: include/clang/Basic/BuiltinsX86.def:951 TARGET_BUILTIN(__builtin_ia32_rndscalepd_mask, "V8dV8dIiV8dUcIi", "", "avx512f") +TARGET_BUILTIN(__builtin_ia32_floorps_mask, "V16fV16fV16fUs", "", "avx512f") +TARGET_BUILTIN(__builtin_ia32_

[PATCH] D45056: [X86] Split up -march=icelake to -client & -server

craig.topper added inline comments. Comment at: test/Preprocessor/predefined-arch-macros.c:1164 +// CHECK_ICX_M32: #define __corei7 1 +// CHECK_ICX_M32: #define __corei7__ 1 +// CHECK_ICX_M32: #define __i386 1 The ICX_M32 and ICX_M64 should be contiguous in the f

[PATCH] D45257: [X86] Introduce cldemote intrinsic

craig.topper added inline comments. Comment at: include/clang/Driver/Options.td:2583 def mno_clzero : Flag<["-"], "mno-clzero">, Group; +def mcldemote : Flag<["-"], "mcldemote">, Group; +def mno_cldemote : Flag<["-"], "mno-cldemote">, Group; This should be above

[PATCH] D45202: [X86] Replacing X86-specific floor and ceil vector intrinsics with generic LLVM intrinsics

craig.topper added a comment. What about rndscaless/rndscalesd? Comment at: clang/lib/CodeGen/CGBuiltin.cpp:8307 +Dst = Ops[0]; +Mask = llvm::ConstantInt::get(CGF.Builder.getInt32Ty(), 1); + } else { I'm not sure we should even try to emit a mask for t

[PATCH] D45254: [X86][WAITPKG] WaitPKG intrinsics

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rC Clang https://reviews.llvm.org/D45254 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llv

[PATCH] D45056: [X86] Split up -march=icelake to -client & -server

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D45056 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rC Clang https://reviews.llvm.org/D41168 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llv

[PATCH] D45257: [X86] Introduce cldemote intrinsic

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D45257 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D45202: [X86] Replacing X86-specific floor and ceil vector intrinsics with generic LLVM intrinsics

craig.topper added a comment. But it’s not really consistent because the mask is being removed early for the packed intrinsics, but late for the scalar intrinsics. Doesn’t it also introduce extra code for fast isel? https://reviews.llvm.org/D45202 ___

[PATCH] D45202: [X86] Replacing X86-specific floor and ceil vector intrinsics with generic LLVM intrinsics

craig.topper added a comment. There's a similar patch for sqrt here https://reviews.llvm.org/D41168 and it uses a scalar sqrt and insert element for the scalar case. I think we need a consistent direction here. https://reviews.llvm.org/D45202 ___

[PATCH] D45254: [X86][WAITPKG] WaitPKG intrinsics

craig.topper accepted this revision. craig.topper added a comment. LGTM Comment at: lib/Headers/waitpkgintrin.h:41 +static __inline__ void __DEFAULT_FN_ATTRS +_umwait (__SIZE_TYPE__ __CONTROL, __UINT64_TYPE__ __COUNTER) +{ Why does the intrinsic take size_t b

[PATCH] D45311: Introduce wbinvd intrinsic

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rC Clang https://reviews.llvm.org/D45311 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llv

[PATCH] D45421: [X86] Emit native IR for pmuldq/pmuludq builtins.

craig.topper created this revision. craig.topper added reviewers: RKSimon, spatel. Herald added a subscriber: cfe-commits. I believe all the pieces are now in place in the backend to make this correctly. We can truncate the vXi64 type to vXi32, extend it back up to the original width and multipl

[PATCH] D45421: [X86] Emit native IR for pmuldq/pmuludq builtins.

craig.topper added a comment. Yes. @RKSimon is correct. pmovzx/pmovsx do use illegal types already. Repository: rC Clang https://reviews.llvm.org/D45421 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman

[PATCH] D45421: [X86] Emit native IR for pmuldq/pmuludq builtins.

craig.topper added a comment. Yes. I'll make the llvm changes before committing this. Just wanted to make sure this direction was ok first. Repository: rC Clang https://reviews.llvm.org/D45421 ___ cfe-commits mailing list cfe-commits@lists.llvm.

[PATCH] D45421: [X86] Emit native IR for pmuldq/pmuludq builtins.

craig.topper updated this revision to Diff 141691. craig.topper added a comment. Use shifts or and to match what InstCombine will do. This sidesteps the illegal type question. https://reviews.llvm.org/D45421 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx2-builtins.c test/CodeGen/avx51

[PATCH] D43817: [x86] wbnoinvd intrinsic

craig.topper added inline comments. Comment at: lib/Basic/Targets/X86.cpp:188 setFeatureEnabledImpl(Features, "mpx", true); if (Kind != CK_SkylakeServer) // SKX inherits all SKL features, except SGX setFeatureEnabledImpl(Features, "sgx", true); N

[PATCH] D43817: [x86] wbnoinvd intrinsic

craig.topper accepted this revision. craig.topper added a comment. LGTM https://reviews.llvm.org/D43817 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D38824: [X86] Synchronize the existing CPU predefined macros with the cases that gcc defines them

craig.topper added a comment. Ping https://reviews.llvm.org/D38824 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D39341: [X86][Driver] Move all of the X86 feature flags to one spot in the Options.td file and pair them up with their negations.

craig.topper created this revision. It looks like at one time Options.td was in alphabetical order, but that looks to have long been broken. The result is that it all the no- x86 options got separated from their other friends for no good reason. This patch puts them all together in one place wi

[PATCH] D38824: [X86] Synchronize the existing CPU predefined macros with the cases that gcc defines them

craig.topper updated this revision to Diff 120469. craig.topper added a comment. Fix Simon's comment https://reviews.llvm.org/D38824 Files: lib/Basic/Targets/X86.cpp test/Preprocessor/predefined-arch-macros.c Index: test/Preprocessor/predefined-arch-macros.c ===

[PATCH] D39349: [X86] Make -march=i686 an alias of -march=pentiumpro

craig.topper created this revision. I think the only reason they are different is because we don't set __tune_i686__ for -march=i686 to match GCC. But GCC 4.9.0 seems to have changed this behavior and they do set it now. So I think they can aliases now. https://reviews.llvm.org/D39349 Files:

[PATCH] D39349: [X86] Make -march=i686 an alias of -march=pentiumpro

craig.topper added a comment. I suspect the gcc behavior changed when this bug was fixed https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59588 https://reviews.llvm.org/D39349 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.or

[PATCH] D39357: Filter out invalid 'target' items from being passed to LLVM

craig.topper added inline comments. Comment at: lib/CodeGen/CodeGenModule.cpp:4586 +ParsedAttr.Features.erase( +remove_if(ParsedAttr.Features.begin(), ParsedAttr.Features.end(), +[&](const std::string &Feat) { Use llvm::remove_if which takes a

[PATCH] D39378: Remove x86,x86_32/64 from isValidFeatureName

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D39378 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D39357: Filter out invalid 'target' items from being passed to LLVM

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D39357 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D39481: [CodeGen] fix const-ness of builtin equivalents of and functions that might set errno

craig.topper added a comment. There's an oddity with fma. The version without __builtin has 'e' already LIBBUILTIN(fma, "", "fne", "math.h", ALL_LANGUAGES) LIBBUILTIN(fmaf, "", "fne", "math.h", ALL_LANGUAGES) LIBBUILTIN(fmal, "LdLdLdLd", "fne", "math.h", ALL_LANGUAGES) But we don't

[PATCH] D39631: [X86] Add 3dnow and 3dnowa to the list of valid target features

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D39631 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D39631: [X86] Add 3dnow and 3dnowa to the list of valid target features

craig.topper requested changes to this revision. craig.topper added a comment. This revision now requires changes to proceed. Can we just add -Werror to test/CodeGen/3dnow-builtins.c to test this? I believe it should be throwing a warning currently. Can we also remove mm3dnow and mm3dnowa from

[PATCH] D39631: [X86] Add 3dnow and 3dnowa to the list of valid target features

craig.topper added a comment. Ok then we can keep the new test. I believe the isValidFeature list was copied from the list in hasFeature. But isValidFeature should match the names used by initFeatureMap since that's what we use to look them up. https://reviews.llvm.org/D39631 _

[PATCH] D39631: [X86] Fix the spelling of 3dnow and 3dnowa in isValidFeatureName

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D39631 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D38737: [X86] test/testn intrinsics lowering to IR. clang side

craig.topper added inline comments. Comment at: lib/Headers/avx512vlbwintrin.h:2801 + return _mm_mask_cmp_epi8_mask (__U, _mm_and_si128 (__A, __B), + _mm_setzero_hi(), 4); } Sorry I didn't catch this before, but can you use _MM_C

[PATCH] D38737: [X86] test/testn intrinsics lowering to IR. clang side

craig.topper added inline comments. Comment at: lib/Headers/avx512vlbwintrin.h:2801 + return _mm_mask_cmp_epi8_mask (__U, _mm_and_si128 (__A, __B), + _mm_setzero_hi(), 4); } craig.topper wrote: > Sorry I didn't catch this before,

[PATCH] D39719: [X86][AVX512] lowering kunpack intrinsic - clang part

craig.topper added inline comments. Comment at: test/CodeGen/avx512f-builtins.c:6231 + // CHECK: bitcast <16 x i1> %{{.*}} to i16 + // CHECK: and i32 %{{.*}}, 255 + // CHECK: shl i32 %{{.*}}, 8 Does this really produce kunpackb in the backend? The type promoti

[PATCH] D38737: [X86] test/testn intrinsics lowering to IR. clang side

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D38737 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D40007: [NewPassManager] Pass the -fdebug-pass-manager flag setting into the Analysis managers to match what we do in opt

craig.topper created this revision. Currently the -fdebug-pass-manager flag for clang doesn't enable the debug logging in the analysis managers. This is different than what the switch does when passed to opt. https://reviews.llvm.org/D40007 Files: lib/CodeGen/BackendUtil.cpp Index: lib/Co

[PATCH] D40054: Simplify CpuIs code to use include from LLVM

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D40054 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D40093: Split x86 "Processor" info into its own def file. [NFC]

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D40093 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D38824: [X86] Synchronize the existing CPU predefined macros with the cases that gcc defines them

craig.topper abandoned this revision. craig.topper added a comment. All skylake-avx512 and cannonlake now set __corei7__ as of r318616. Abandoning this. https://reviews.llvm.org/D38824 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://

[PATCH] D40226: [CodeGen] Move Reciprocals option from TargetOptions to CodeGenOptions

craig.topper created this revision. Based on how this is currently used I think it just belongs in CodeGenOptions. It doesn't interact with any of the other target code. https://reviews.llvm.org/D40226 Files: include/clang/Basic/TargetOptions.h include/clang/Frontend/CodeGenOptions.h lib

[PATCH] D40228: [Target] Keep the TargetOptions feature list sorted instead of sorting during CodeGen

craig.topper created this revision. Herald added a subscriber: nhaehnle. Currently CodeGen is calling std::sort on the features vector in TargetOptions for every function, but I don't think CodeGen should be modifying TargetOptions. This moves the sorting up to the creation/modification of Targe

[PATCH] D40230: Add -mprefer-vector-width driver option and attribute during CodeGen.

craig.topper created this revision. This adds a new command line option -mprefer-vector-width to specify a preferred vector width for the vectorizers. Valid values are 'none' and unsigned integers. The driver will check that it meets those constraints. Specific supported integers will be manage

[PATCH] D40226: [CodeGen] Move Reciprocals option from TargetOptions to CodeGenOptions

craig.topper closed this revision. craig.topper added a comment. Committed in r318662, but I botched the "Differential Revision" in the commit message. https://reviews.llvm.org/D40226 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://l

[PATCH] D40230: Add -mprefer-vector-width driver option and attribute during CodeGen.

craig.topper updated this revision to Diff 123614. craig.topper added a comment. Address comments. The value of 'none' is intended to cancel out any other option specified. I've changed it so that we no longer pass 'none' to llvm and instead suppress the attribute. https://reviews.llvm.org/D4

[PATCH] D40228: [Target] Keep the TargetOptions feature list sorted instead of sorting during CodeGen

craig.topper added a comment. Yeah don't like it either, but was surprised to find that CodeGen even had a non-const reference to TargetOptions. Would it be better to make a copy and sort the copy during CodeGen? https://reviews.llvm.org/D40228 __

[PATCH] D40224: [X86] Control-Flow Enforcement Technology - Shadow Stack and Indirect Branch Tracking support (Clang side)

craig.topper added inline comments. Comment at: include/clang/Basic/BuiltinsX86.def:642 +// SHSTK +TARGET_BUILTIN(__builtin_ia32_incsspd, "vUi","u","shstk") +TARGET_BUILTIN(__builtin_ia32_rdsspd, "UiUi","Un","shstk") Space after commas to match the rest of the fi

[PATCH] D40230: Add -mprefer-vector-width driver option and attribute during CodeGen.

craig.topper updated this revision to Diff 123709. craig.topper added a comment. Still pass the attribute the backend if the value is 'none'. We actually need this to know if the user specified the command line option at all. The value of 'none' should disable limits and prevents needing to pick

[PATCH] D40228: [Target] Make a copy of TargetOptions feature list before sorting during CodeGen

craig.topper updated this revision to Diff 123862. craig.topper retitled this revision from "[Target] Keep the TargetOptions feature list sorted instead of sorting during CodeGen" to "[Target] Make a copy of TargetOptions feature list before sorting during CodeGen". craig.topper edited the summar

[PATCH] D40224: [X86] Control-Flow Enforcement Technology - Shadow Stack and Indirect Branch Tracking support (Clang side)

craig.topper added inline comments. Comment at: include/clang/Basic/BuiltinsX86_64.def:63 TARGET_BUILTIN(__builtin_ia32_xsaves64, "vv*ULLi", "", "xsaves") +TARGET_BUILTIN(__builtin_ia32_incsspq, "vULLi","u","shstk") +TARGET_BUILTIN(__builtin_ia32_rdsspq, "ULLiULLi","Un","shstk")

[PATCH] D146054: [RISCV] Add -print-supported-marchs and -march=help support

craig.topper added inline comments. Comment at: clang/lib/Driver/Driver.cpp:110 +extern void RISCVMarchHelp(); + Can we declare this in RISCVISAInfo.h and include that here? Comment at: llvm/lib/Support/RISCVISAInfo.cpp:143 +void RISCVMarch

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

craig.topper created this revision. craig.topper added reviewers: aaron.ballman, erichkeane. Herald added a project: All. craig.topper requested review of this revision. Herald added a project: clang. It's possible for `getCalleeDecl()` to return a null pointer. This was encountered by a user of

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

craig.topper updated this revision to Diff 505249. craig.topper added a comment. Add a test case Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D146089/new/ https://reviews.llvm.org/D146089 Files: clang/lib/Sema/SemaStmtAttr.cpp clang/test/Sema/

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

craig.topper added inline comments. Comment at: clang/test/Sema/attr-alwaysinline.cpp:36 +return x; +} + erichkeane wrote: > Can you add a test that shows that we warn on instantiation? This shouldn't > be a dependent declrefexpr when instantiated. > >

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

craig.topper added inline comments. Comment at: clang/test/Sema/attr-alwaysinline.cpp:36 +return x; +} + erichkeane wrote: > craig.topper wrote: > > erichkeane wrote: > > > Can you add a test that shows that we warn on instantiation? This > > > shouldn'

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

craig.topper added inline comments. Comment at: clang/test/Sema/attr-alwaysinline.cpp:32 +int foo(int x) { +if constexpr (D > 1) +[[clang::always_inline]] return foo(x + 1); erichkeane wrote: > Also, I note the 'if constexpr' branch is unnecessary to

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

craig.topper added inline comments. Comment at: clang/test/Sema/attr-alwaysinline.cpp:36 +return x; +} + erichkeane wrote: > erichkeane wrote: > > craig.topper wrote: > > > erichkeane wrote: > > > > craig.topper wrote: > > > > > erichkeane wrote: > > > >

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

craig.topper updated this revision to Diff 505596. craig.topper added a comment. Fix the same bug for noinline attribute Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D146089/new/ https://reviews.llvm.org/D146089 Files: clang/lib/Sema/SemaStmtAtt

[PATCH] D145088: [RISCV] Add attribute(riscv_rvv_vector_bits(N)) based on AArch64 arm_sve_vector_bits.

craig.topper added inline comments. Comment at: clang/lib/AST/ItaniumMangle.cpp:3897-3899 + } else if (T->getVectorKind() == VectorType::RVVFixedLengthDataVector) { +mangleRISCVFixedRVVVectorType(T); +return; aaron.ballman wrote: > Should there be corres

[PATCH] D141672: [RISCV] Support vector crypto extension ISA string and assembly

craig.topper added inline comments. Comment at: llvm/lib/Support/RISCVISAInfo.cpp:893 +errc::invalid_argument, +"'zvknhb' requires 'zve64x' extension to also be specified"); + For consistency with the Zvk* error, use `"'zvknhb' requires 'v' or 'z

[PATCH] D146054: [RISCV] Add -print-supported-marchs and -march=help support

craig.topper added inline comments. Comment at: llvm/lib/Support/RISCVISAInfo.cpp:153 + std::set TempSet(Cmp); + for (auto E : SupportedExtensions) +TempSet.insert(E); Question for the community. Should we maintain SupportedExtensions in the order we want

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

craig.topper added inline comments. Comment at: clang/test/Sema/attr-alwaysinline.cpp:36 +return x; +} + erichkeane wrote: > craig.topper wrote: > > erichkeane wrote: > > > erichkeane wrote: > > > > craig.topper wrote: > > > > > erichkeane wrote: > > > >

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

craig.topper added inline comments. Comment at: clang/test/Sema/attr-alwaysinline.cpp:36 +return x; +} + erichkeane wrote: > craig.topper wrote: > > erichkeane wrote: > > > craig.topper wrote: > > > > erichkeane wrote: > > > > > erichkeane wrote: > > > >

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

This revision was automatically updated to reflect the committed changes. Closed by commit rG10297470e953: [Sema] Fix null pointer dereference handleAlwaysInlineAttr. (authored by craig.topper). Changed prior to commit: https://reviews.llvm.org/D146089?vs=505596&id=505961#toc Repository: rG

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

craig.topper added a comment. Recommitted at e82d2e8c9ca34bcccb8fef67a8727543a978 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D146089/new/ https://reviews.llvm.org/D146089

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

craig.topper added a comment. In D146089#4202037 , @erichkeane wrote: > Please add a release note as requested. To highlight the fix or highlight the missing warning? Or both? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://

[PATCH] D146089: [Sema] Fix null pointer dereference handleAlwaysInlineAttr.

craig.topper added a comment. In D146089#4202374 , @erichkeane wrote: > To highlight the fix. See the rest of our release notes. 4743c03ca8fcb61b8fa4022c38cf93cf55d7f6fd Repositor

[PATCH] D146054: [RISCV] Add -print-supported-marchs and -march=help support

craig.topper added inline comments. Comment at: llvm/lib/Support/RISCVISAInfo.cpp:143 +namespace llvm { +void RISCVMarchHelp() { + errs() << "All available -march extensions for RISC-V\n\n"; `void llvm::RISCVMarchHelp` and remove the `namespace llvm {` Reposit

[PATCH] D146054: [RISCV] Add -print-supported-marchs and -march=help support

craig.topper added inline comments. Comment at: clang/tools/driver/cc1_main.cpp:197 + if (TargetStr.find("riscv") == std::string::npos) { +llvm::errs() << "The -march=help only supports for RISCV target.\n"; +return 1; MaskRay wrote: > The check should b

[PATCH] D146449: [RISCV] Replace RISCV -> RISC-V in comments. NFC

craig.topper updated this revision to Diff 506669. craig.topper added a comment. Herald added a project: clang. Herald added a subscriber: cfe-commits. Update a few more files. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D146449/new/ https://revie

[PATCH] D146449: [RISCV] Replace RISCV -> RISC-V in comments. NFC

craig.topper updated this revision to Diff 506670. craig.topper added a comment. Herald added subscribers: Sanitizers, Enna1, emaste. Herald added a reviewer: MaskRay. Herald added a project: Sanitizers. More files Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://review

[PATCH] D146451: [RISCV] Replace RISCV->RISC-V in strings.

craig.topper created this revision. craig.topper added reviewers: reames, asb, jrtc27, kito-cheng, luismarques. Herald added subscribers: jobnoorman, luke, VincentWu, vkmr, frasercrmck, evandro, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck

[PATCH] D146451: [RISCV] Replace RISCV->RISC-V in strings.

craig.topper added a comment. In D146451#4207261 , @asb wrote: > The logic I saw with the pass names is that the backend for the RISC-V > architecture is called "RISCV". But I've got no objection to changing. Yeah. I also wasn't sure which is best. Re

[PATCH] D146463: [CodeGen][RISCV] Change Shadow Call Stack Register to S11

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:58 const auto *RVFI = MF.getInfo(); if (RVFI->useSaveRestoreLibCalls(MF)) { Can you add a FIXME here? Using x27 should hopefully remove this restriction ===

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