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https://github.com/llvm/llvm-project/pull/129304
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https://github.com/bcardosolopes approved this pull request.
LGTM after any extra feedback on format
https://github.com/llvm/llvm-project/pull/129304
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LGTM if Erich has no further comments
https://github.com/llvm/llvm-project/pull/128792
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@@ -0,0 +1,119 @@
+//===- CIROpsEnumsDialect.h - MLIR Dialect for CIR --*- C++
bcardosolopes wrote:
TIL
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https://github.com/bcardosolopes commented:
Great to see this PR Morris! You should also add CIR <-> CIR tests for the
linkage types, incubator has some of them.
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@@ -0,0 +1,11 @@
+// Linkage types of global variables
+// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -fclangir
-emit-cir %s -o - | FileCheck %s
+
+int ;
bcardosolopes wrote:
This new tests uses_this_convention and while the existing-uses-t
https://github.com/bcardosolopes approved this pull request.
LGTM, same observation as Erich regarding CMAKE stuff tho
https://github.com/llvm/llvm-project/pull/130322
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https://github.com/bcardosolopes approved this pull request.
LGTM
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@@ -0,0 +1,114 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -428,6 +428,46 @@ def ScopeOp : CIR_Op<"scope", [
];
}
+//===--===//
+// BrOp
+//===--===//
+
+def BrOp : CIR_Op<"br",
@@ -280,6 +280,25 @@ def CIR_BoolType :
}];
}
+//===--===//
+// ArrayType
+//===--===//
+
+def CIR_ArrayType : CIR_Type<"Array", "array",
+
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@@ -117,6 +117,24 @@ static void
printOmittedTerminatorRegion(mlir::OpAsmPrinter &printer,
/*printBlockTerminators=*/!omitRegionTerm(region));
}
+//===--===//
+// AllocaOp
+//===
@@ -0,0 +1,82 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apac
https://github.com/bcardosolopes approved this pull request.
LGTM pending on question left in one comment
https://github.com/llvm/llvm-project/pull/130690
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@@ -0,0 +1,58 @@
+// RUN: %clang_cc1 -std=c++17 -triple x86_64-unknown-linux-gnu -fclangir
-emit-cir %s -o %t.cir
bcardosolopes wrote:
Has this been addressed?
https://github.com/llvm/llvm-project/pull/130690
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@@ -0,0 +1,166 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -11,6 +11,9 @@ add_clang_library(clangCIRFrontendAction
DEPENDS
MLIRCIROpsIncGen
MLIRCIROpInterfacesIncGen
+ # Add mlir-generic-headers dependency as the header CIRGenAction.h needs to
+ # include BuiltinOps.h
+ mlir-generic-headers
bcardosolopes wr
@@ -1,7 +1,9 @@
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value
-fclangir -emit-cir %s -o %t.cir
// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR
-// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value
-fclangir -emit-llvm %s -o %
bcardosolopes wrote:
Looks like ready to land, @mmha do you have landing permission?
https://github.com/llvm/llvm-project/pull/129072
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@@ -0,0 +1,53 @@
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value
-fclangir -emit-cir %s -o %t.cir
+// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value
-fclangir -emit-llvm %s -o
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@@ -2958,8 +2958,13 @@ defm clangir : BoolFOption<"clangir",
BothFlags<[], [ClangOption, CC1Option], "">>;
def emit_cir : Flag<["-"], "emit-cir">, Visibility<[ClangOption, CC1Option]>,
Group, HelpText<"Build ASTs and then lower to ClangIR">;
-def emit_core_mlir : Flag<["-"]
https://github.com/bcardosolopes approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/128254
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@@ -331,9 +335,38 @@ FuncType FuncType::clone(TypeRange inputs, TypeRange
results) const {
return get(llvm::to_vector(inputs), results[0], isVarArg());
}
-mlir::ParseResult parseFuncTypeArgs(mlir::AsmParser &p,
-llvm::SmallVector ¶ms,
-
bcardosolopes wrote:
Thanks for the update @dkolsen-pgi, reviewing the incubator change today
https://github.com/llvm/llvm-project/pull/128089
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@@ -273,29 +273,36 @@ def CIR_PointerType : CIR_Type<"Pointer", "ptr",
def CIR_FuncType : CIR_Type<"Func", "func"> {
let summary = "CIR function type";
let description = [{
-The `!cir.func` is a function type. It consists of a single return type, a
-list of paramete
@@ -2958,8 +2958,13 @@ defm clangir : BoolFOption<"clangir",
BothFlags<[], [ClangOption, CC1Option], "">>;
def emit_cir : Flag<["-"], "emit-cir">, Visibility<[ClangOption, CC1Option]>,
Group, HelpText<"Build ASTs and then lower to ClangIR">;
-def emit_core_mlir : Flag<["-"]
https://github.com/bcardosolopes approved this pull request.
LGTM once remaining comments from others are addressed.
https://github.com/llvm/llvm-project/pull/127835
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@@ -2958,6 +2958,8 @@ defm clangir : BoolFOption<"clangir",
BothFlags<[], [ClangOption, CC1Option], "">>;
def emit_cir : Flag<["-"], "emit-cir">, Visibility<[ClangOption, CC1Option]>,
Group, HelpText<"Build ASTs and then lower to ClangIR">;
+def emit_cir_mlir : Flag<["-"],
@@ -0,0 +1,82 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apac
@@ -0,0 +1,82 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apac
https://github.com/bcardosolopes approved this pull request.
LGTM after applying @erichkeane reviews and @xlauko tablegen suggestion
https://github.com/llvm/llvm-project/pull/128787
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@@ -115,6 +115,149 @@ def ConstantOp : CIR_Op<"const",
let hasFolder = 1;
}
+//===--===//
+// AllocaOp
+//===--===//
+
+class AllocaTypesMa
https://github.com/bcardosolopes approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/128601
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https://github.com/bcardosolopes approved this pull request.
I don't have anything else to add, LGTM!
https://github.com/llvm/llvm-project/pull/132974
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@@ -710,6 +710,89 @@ class ScalarExprEmitter : public
StmtVisitor {
HANDLEBINOP(Xor)
HANDLEBINOP(Or)
#undef HANDLEBINOP
+
+ mlir::Value emitCmp(const BinaryOperator *e) {
+mlir::Value result;
+QualType lhsTy = e->getLHS()->getType();
+QualType rhsTy = e->getRH
https://github.com/bcardosolopes edited
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https://github.com/bcardosolopes approved this pull request.
LGTM after other reviews are applied.
https://github.com/llvm/llvm-project/pull/134181
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https://github.com/bcardosolopes approved this pull request.
Thanks for the updates, LGTM!
https://github.com/llvm/llvm-project/pull/133100
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@@ -759,6 +761,84 @@ def BrCondOp : CIR_Op<"brcond",
}];
}
+//===--===//
+// While & DoWhileOp
+//===--===//
+
+class WhileOpBase : CIR_Op
@@ -759,6 +762,46 @@ LogicalResult cir::BinOp::verify() {
return mlir::success();
}
+//===--===//
+// ShiftOp
+//===--===//
+LogicalResult
@@ -1117,6 +1117,91 @@ mlir::LogicalResult
CIRToLLVMBinOpLowering::matchAndRewrite(
return mlir::LogicalResult::success();
}
+mlir::LogicalResult CIRToLLVMShiftOpLowering::matchAndRewrite(
+cir::ShiftOp op, OpAdaptor adaptor,
+mlir::ConversionPatternRewriter &rewrit
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https://github.com/bcardosolopes requested changes to this pull request.
Looks reasonable to add vector support later for shifts. Because `SelectOp` is
independent of `ShiftOp`, one possibility would have been to split it in two
PRs to land them faster, but wouldn't bother changing for this rou
@@ -405,3 +405,45 @@ float fpPostInc2() {
// OGCG: store float %[[A_INC]], ptr %[[A]], align 4
// OGCG: store float %[[A_LOAD]], ptr %[[B]], align 4
// OGCG: %[[B_TO_OUTPUT:.*]] = load float, ptr %[[B]], align 4
+
+_Float16 fp16UPlus(_Float16 f) {
+ return +f;
+}
+
+// C
@@ -405,3 +405,45 @@ float fpPostInc2() {
// OGCG: store float %[[A_INC]], ptr %[[A]], align 4
// OGCG: store float %[[A_LOAD]], ptr %[[B]], align 4
// OGCG: %[[B_TO_OUTPUT:.*]] = load float, ptr %[[B]], align 4
+
+_Float16 fp16UPlus(_Float16 f) {
+ return +f;
+}
+
+// C
@@ -265,3 +265,125 @@ void test_empty_while_true() {
// OGCG: br label %[[WHILE_BODY:.*]]
// OGCG: [[WHILE_BODY]]:
// OGCG: ret void
+
+void unreachable_after_continue() {
+ for (;;) {
+continue;
+int x = 1;
+ }
+}
+
+// CIR: cir.func @unreachable_after_continue
+
@@ -265,3 +265,125 @@ void test_empty_while_true() {
// OGCG: br label %[[WHILE_BODY:.*]]
// OGCG: [[WHILE_BODY]]:
// OGCG: ret void
+
+void unreachable_after_continue() {
+ for (;;) {
+continue;
+int x = 1;
+ }
+}
+
+// CIR: cir.func @unreachable_after_continue
+
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https://github.com/llvm/llvm-project/pull/133829
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@@ -135,6 +135,55 @@ mlir::Location CIRGenFunction::getLoc(mlir::Location lhs,
mlir::Location rhs) {
return mlir::FusedLoc::get(locs, metadata, &getMLIRContext());
}
+bool CIRGenFunction::ContainsLabel(const Stmt *s, bool ignoreCaseStmts) {
bcardosolopes wr
@@ -135,6 +135,55 @@ mlir::Location CIRGenFunction::getLoc(mlir::Location lhs,
mlir::Location rhs) {
return mlir::FusedLoc::get(locs, metadata, &getMLIRContext());
}
+bool CIRGenFunction::ContainsLabel(const Stmt *s, bool ignoreCaseStmts) {
+ // Null statement, not a label
bcardosolopes wrote:
@Andres-Salamanca thanks for working on this. We usually write tests that
exercise any possible different paths codegen can take. For next rounds: it's
fine if you add less things in one go and make it more incremental with the use
of (a) errorNYI and (b) assert on missing
@@ -263,6 +264,72 @@ static void terminateBody(CIRGenBuilderTy &builder,
mlir::Region &r,
b->erase();
}
+mlir::LogicalResult CIRGenFunction::emitIfStmt(const IfStmt &s) {
+ mlir::LogicalResult res = mlir::success();
+ // The else branch of a consteval if statement is al
@@ -442,6 +457,25 @@ class CIRGenFunction : public CIRGenTypeCache {
mlir::LogicalResult emitDeclStmt(const clang::DeclStmt &s);
LValue emitDeclRefLValue(const clang::DeclRefExpr *e);
+ /// Emit an if on a boolean condition to the specified blocks.
+ /// FIXME: Based on
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@@ -263,6 +264,72 @@ static void terminateBody(CIRGenBuilderTy &builder,
mlir::Region &r,
b->erase();
}
+mlir::LogicalResult CIRGenFunction::emitIfStmt(const IfStmt &s) {
+ mlir::LogicalResult res = mlir::success();
+ // The else branch of a consteval if statement is al
@@ -462,6 +462,58 @@ def ReturnOp : CIR_Op<"return", [ParentOneOf<["FuncOp",
"ScopeOp", "DoWhileOp",
let hasVerifier = 1;
}
+//===--===//
+// IfOp
+//===-
@@ -193,8 +334,23 @@ LValue CIRGenFunction::emitUnaryOpLValue(const
UnaryOperator *e) {
switch (op) {
case UO_Deref: {
-cgm.errorNYI(e->getSourceRange(), "UnaryOp dereference");
-return LValue();
+QualType t = e->getSubExpr()->getType()->getPointeeType();
+
https://github.com/bcardosolopes approved this pull request.
LGTM pending discussion with Eli
https://github.com/llvm/llvm-project/pull/134317
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@@ -1969,6 +1969,43 @@ def VecCreateOp : CIR_Op<"vec.create", [Pure]> {
let hasVerifier = 1;
}
+//===--===//
+// VecInsertOp
+//===--===//
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https://github.com/llvm/llvm-project/pull/139146
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LGTM after nits
https://github.com/llvm/llvm-project/pull/139146
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https://github.com/bcardosolopes approved this pull request.
https://github.com/llvm/llvm-project/pull/139159
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https://github.com/bcardosolopes commented:
This is also missing a end-to-end test that proves we generate switchflatop if
we are coming all the way from source code. There are examples in the incubator
on how to check if a pass runs (you can use print-before/after) and the IR for
it.
https:/
@@ -0,0 +1,68 @@
+// RUN: cir-opt %s | FileCheck %s
+!s32i = !cir.int
+
+cir.func @FlatSwitchWithoutDefault(%arg0: !s32i) {
+ cir.switch.flat %arg0 : !s32i, ^bb2 [
+1: ^bb1
+ ]
+ ^bb1:
+cir.br ^bb2
+ ^bb2:
+cir.return
+}
+
+// CHECK: cir.switch.flat %arg0 : !s32i,
@@ -171,6 +171,232 @@ class CIRScopeOpFlattening : public
mlir::OpRewritePattern {
}
};
+class CIRSwitchOpFlattening : public mlir::OpRewritePattern {
+public:
+ using OpRewritePattern::OpRewritePattern;
+
+ inline void rewriteYieldOp(mlir::PatternRewriter &rewriter,
+
@@ -1395,6 +1395,26 @@ LogicalResult cir::VecCreateOp::verify() {
return success();
}
+//===--===//
+// VecExtractOp
+//===--===//
+
+OpFol
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@@ -0,0 +1,20 @@
+// RUN: cir-opt %s -cir-canonicalize -o - | FileCheck %s
+
+!s32i = !cir.int
+
+module {
+ cir.func @fold_extract_vector_op_test() {
+%init = cir.alloca !s32i, !cir.ptr, ["e", init]
+%const_vec = cir.const #cir.const_vector<[#cir.int<1> : !s32i, #cir.int
https://github.com/bcardosolopes approved this pull request.
Pretty straightforward, LGTM
https://github.com/llvm/llvm-project/pull/138873
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https://github.com/bcardosolopes approved this pull request.
LG(ang)TM, some minor suggestion
https://github.com/llvm/llvm-project/pull/138968
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@@ -424,6 +436,42 @@ class OpenACCClauseCIREmitter final
return clauseNotImplemented(clause);
}
}
+
+ void VisitGangClause(const OpenACCGangClause &clause) {
+if constexpr (isOneOfTypes) {
+ if (clause.getNumExprs() == 0) {
+operation.addEmptyGang(
https://github.com/bcardosolopes edited
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https://github.com/bcardosolopes approved this pull request.
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https://github.com/bcardosolopes commented:
Thanks for following up on this!
Once it lands we should probably backport to incubator too.
https://github.com/llvm/llvm-project/pull/139304
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@@ -1395,6 +1395,26 @@ LogicalResult cir::VecCreateOp::verify() {
return success();
}
+//===--===//
+// VecExtractOp
+//===--===//
+
+OpFol
https://github.com/bcardosolopes approved this pull request.
Neat unit tests! LGTM
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@@ -1500,6 +1507,14 @@ static void prepareTypeConverter(mlir::LLVMTypeConverter
&converter,
converter.addConversion([&](cir::BF16Type type) -> mlir::Type {
return mlir::BFloat16Type::get(type.getContext());
});
+ converter.addConversion([&](cir::FuncType type) -> mlir
@@ -1500,6 +1507,14 @@ static void prepareTypeConverter(mlir::LLVMTypeConverter
&converter,
converter.addConversion([&](cir::BF16Type type) -> mlir::Type {
return mlir::BFloat16Type::get(type.getContext());
});
+ converter.addConversion([&](cir::FuncType type) -> mlir
@@ -1837,16 +1835,24 @@ class CIR_CallOpBase
extra_traits = []>
// the upstreaming process moves on. The verifiers is also missing for now,
// will add in the future.
- dag commonArgs = (ins FlatSymbolRefAttr:$callee,
-Variadic:$args);
+ dag comm
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https://github.com/bcardosolopes commented:
Mostly good, some nits!
https://github.com/llvm/llvm-project/pull/139748
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@@ -0,0 +1,160 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
https://github.com/bcardosolopes closed
https://github.com/llvm/llvm-project/pull/139304
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https://github.com/bcardosolopes approved this pull request.
LGTM, thanks
https://github.com/llvm/llvm-project/pull/139304
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https://github.com/bcardosolopes edited
https://github.com/llvm/llvm-project/pull/139444
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@@ -54,10 +54,10 @@ namespace direct {
namespace {
/// If the given type is a vector type, return the vector's element type.
/// Otherwise return the given type unchanged.
-// TODO(cir): Return the vector element type once we have support for vectors
-// instead of the identity
https://github.com/bcardosolopes approved this pull request.
LGTM after minor nit
https://github.com/llvm/llvm-project/pull/139444
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https://github.com/bcardosolopes edited
https://github.com/llvm/llvm-project/pull/139444
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https://github.com/bcardosolopes approved this pull request.
Nothing to add on top of Andy's review. LGTM
https://github.com/llvm/llvm-project/pull/139465
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https://github.com/bcardosolopes commented:
A question in the comments but otherwise PR looks good: adds boilerplate and
initial cases, deferring more work for incremental PRs, way to go.
https://github.com/llvm/llvm-project/pull/140304
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https://github.com/bcardosolopes approved this pull request.
LGTM. Is there an easy to add a test for this? I understand sometimes it's
hard, but just double checking.
https://github.com/llvm/llvm-project/pull/140322
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@@ -112,8 +112,16 @@ class CIRGenFunctionInfo final
// NOLINTNEXTLINE(readability-identifier-naming)
void Profile(llvm::FoldingSetNodeID &id) {
-id.AddBoolean(required.getOpaqueData());
-getReturnType().Profile(id);
+// It's unfortunate that we are looping over
@@ -1500,6 +1507,14 @@ static void prepareTypeConverter(mlir::LLVMTypeConverter
&converter,
converter.addConversion([&](cir::BF16Type type) -> mlir::Type {
return mlir::BFloat16Type::get(type.getContext());
});
+ converter.addConversion([&](cir::FuncType type) -> mlir
@@ -135,4 +135,38 @@ cir.func @vector_insert_element_test() {
// CHECK:cir.return
// CHECK: }
+cir.func @vector_splat_test() {
+%0 = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr>,
["a", init]
+%1 = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr>,
["shl", init]
+
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