@@ -36,6 +47,146 @@ static std::string normalizeForBundler(const llvm::Triple
&T,
: T.normalize();
}
+// Collect undefined __hip_fatbin* and __hip_gpubin_handle* symbols from all
+// input object or archive files.
+class HIPUndefinedFatBinSymbols {
+publi
https://github.com/Artem-B approved this pull request.
Overall LGTM. Please wait for @jhuber6's to double check the partial linking
mechanics details.
https://github.com/llvm/llvm-project/pull/81700
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https://github.com/llvm/llvm-project/pull/73030
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https://github.com/Artem-B approved this pull request.
https://github.com/llvm/llvm-project/pull/82436
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Artem-B wrote:
> This PR is redundant, closing.
I think the patch was perfectly fine. Considering that other NVIDIA open-source
projects already mention sm_100 (E.g.
https://github.com/NVIDIA/cccl/blob/5efe53dbd71ea3e4bc4fdbb73edc001e0bf81547/libcudacxx/include/nv/detail/__target_macros#L241),
https://github.com/Artem-B created
https://github.com/llvm/llvm-project/pull/107483
Right now we're bailing out too early, and `-cuid` does not get set for the
host-only compilations.
>From 52a27293d1c93a7ed4dcef845f705808afa3c273 Mon Sep 17 00:00:00 2001
From: Artem Belevich
Date: Thu, 5 Se
https://github.com/Artem-B closed
https://github.com/llvm/llvm-project/pull/107483
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https://github.com/Artem-B approved this pull request.
https://github.com/llvm/llvm-project/pull/107734
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Artem-B wrote:
It may be worth adding a note about this in the release notes.
https://github.com/llvm/llvm-project/pull/107936
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https://github.com/Artem-B created
https://github.com/llvm/llvm-project/pull/102661
Fixes https://github.com/llvm/llvm-project/issues/101560
>From 6ee0add21bd2a9b25d28640c91de2fc6dab7fa72 Mon Sep 17 00:00:00 2001
From: Artem Belevich
Date: Fri, 9 Aug 2024 11:51:23 -0700
Subject: [PATCH] [CUDA]
https://github.com/Artem-B updated
https://github.com/llvm/llvm-project/pull/102661
>From 0f3944e1c12baa958f52c3c015a0cf5f9aeff1ed Mon Sep 17 00:00:00 2001
From: Artem Belevich
Date: Fri, 9 Aug 2024 11:51:23 -0700
Subject: [PATCH] [CUDA] Emit used function list in deterministic order.
Fixes ht
@@ -950,6 +950,9 @@ void CodeGenModule::Release() {
UsedArray.push_back(llvm::ConstantExpr::getPointerBitCastOrAddrSpaceCast(
GetAddrOfGlobal(GD), Int8PtrTy));
}
+// Sort decls by name to always emit them in deterministic order.
Artem-B
https://github.com/Artem-B edited
https://github.com/llvm/llvm-project/pull/102661
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https://github.com/Artem-B updated
https://github.com/llvm/llvm-project/pull/102661
>From 0f3944e1c12baa958f52c3c015a0cf5f9aeff1ed Mon Sep 17 00:00:00 2001
From: Artem Belevich
Date: Fri, 9 Aug 2024 11:51:23 -0700
Subject: [PATCH 1/2] [CUDA] Emit used function list in deterministic order.
Fixe
https://github.com/Artem-B closed
https://github.com/llvm/llvm-project/pull/102661
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Artem-B wrote:
OK, I've reworked the patch, and it appears to correctly propagate arbitrary
SM/PTX versions from clang, down to the LLVM and generated PTX, and to ptxas
and fatbinary command line options.
PTAL.
https://github.com/llvm/llvm-project/pull/100247
https://github.com/Artem-B updated
https://github.com/llvm/llvm-project/pull/100247
>From 44a1045eee71777fa916e2a8043b2f99afc96a96 Mon Sep 17 00:00:00 2001
From: Artem Belevich
Date: Thu, 18 Jul 2024 15:05:01 -0700
Subject: [PATCH 1/4] [CUDA] Add a pseudo GPU sm_next which allows overrides
for
https://github.com/Artem-B updated
https://github.com/llvm/llvm-project/pull/100247
>From da1ac9d36bd284dc607b7366ff83ba556fb64fb5 Mon Sep 17 00:00:00 2001
From: Artem Belevich
Date: Thu, 18 Jul 2024 15:05:01 -0700
Subject: [PATCH] [CUDA] Add a pseudo GPU sm_next which allows overrides for
SM/
https://github.com/Artem-B updated
https://github.com/llvm/llvm-project/pull/100247
>From da1ac9d36bd284dc607b7366ff83ba556fb64fb5 Mon Sep 17 00:00:00 2001
From: Artem Belevich
Date: Thu, 18 Jul 2024 15:05:01 -0700
Subject: [PATCH 1/2] [CUDA] Add a pseudo GPU sm_next which allows overrides
for
https://github.com/Artem-B edited
https://github.com/llvm/llvm-project/pull/102969
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https://github.com/Artem-B approved this pull request.
LGTM with a couple of nits.
https://github.com/llvm/llvm-project/pull/102969
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@@ -722,6 +722,37 @@ let hasSideEffects = false in {
defm CVT_f16x2 : CVT_FROM_FLOAT_V2_SM80<"f16x2", Int32Regs>;
defm CVT_bf16x2 : CVT_FROM_FLOAT_V2_SM80<"bf16x2", Int32Regs>;
+
+ // FP8 conversions.
+ multiclass CVT_TO_F8X2 {
+def _f32 :
+ NVPTXInst<(outs Int1
@@ -968,6 +971,39 @@ __device__ void nvvm_cvt_sm80() {
// CHECK: ret void
}
+// CHECK-LABEL: nvvm_cvt_sm89
+__device__ void nvvm_cvt_sm89() {
+#if __CUDA_ARCH__ >= 890
+ // CHECK_PTX81_SM89: call i16 @llvm.nvvm.ff.to.e4m3x2.rn(float 1.00e+00,
float 1.00e+00)
+ __n
@@ -722,6 +722,37 @@ let hasSideEffects = false in {
defm CVT_f16x2 : CVT_FROM_FLOAT_V2_SM80<"f16x2", Int32Regs>;
defm CVT_bf16x2 : CVT_FROM_FLOAT_V2_SM80<"bf16x2", Int32Regs>;
+
+ // FP8 conversions.
+ multiclass CVT_TO_F8X2 {
+def _f32 :
+ NVPTXInst<(outs Int1
@@ -722,6 +722,37 @@ let hasSideEffects = false in {
defm CVT_f16x2 : CVT_FROM_FLOAT_V2_SM80<"f16x2", Int32Regs>;
defm CVT_bf16x2 : CVT_FROM_FLOAT_V2_SM80<"bf16x2", Int32Regs>;
+
+ // FP8 conversions.
+ multiclass CVT_TO_F8X2 {
+def _f32 :
+ NVPTXInst<(outs Int1
https://github.com/Artem-B approved this pull request.
https://github.com/llvm/llvm-project/pull/102969
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@@ -7163,24 +7163,27 @@ void Sema::ProcessDeclAttributeList(
} else if (const auto *A = D->getAttr()) {
Diag(D->getLocation(), diag::err_opencl_kernel_attr) << A;
D->setInvalidDecl();
-} else if (!D->hasAttr()) {
- if (const auto *A = D->getAttr()) {
-
@@ -7163,24 +7163,27 @@ void Sema::ProcessDeclAttributeList(
} else if (const auto *A = D->getAttr()) {
Diag(D->getLocation(), diag::err_opencl_kernel_attr) << A;
D->setInvalidDecl();
-} else if (!D->hasAttr()) {
- if (const auto *A = D->getAttr()) {
-
@@ -7163,24 +7163,27 @@ void Sema::ProcessDeclAttributeList(
} else if (const auto *A = D->getAttr()) {
Diag(D->getLocation(), diag::err_opencl_kernel_attr) << A;
D->setInvalidDecl();
-} else if (!D->hasAttr()) {
- if (const auto *A = D->getAttr()) {
-
@@ -6867,8 +6867,14 @@ void Clang::ConstructJob(Compilation &C, const JobAction
&JA,
CmdArgs.push_back("-nogpulib");
if (Arg *A = Args.getLastArg(options::OPT_fcf_protection_EQ)) {
-CmdArgs.push_back(
-Args.MakeArgString(Twine("-fcf-protection=") + A->getVal
https://github.com/Artem-B edited
https://github.com/llvm/llvm-project/pull/88402
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https://github.com/Artem-B commented:
LGTM in principle.
https://github.com/llvm/llvm-project/pull/88402
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@@ -6867,8 +6867,14 @@ void Clang::ConstructJob(Compilation &C, const JobAction
&JA,
CmdArgs.push_back("-nogpulib");
if (Arg *A = Args.getLastArg(options::OPT_fcf_protection_EQ)) {
-CmdArgs.push_back(
-Args.MakeArgString(Twine("-fcf-protection=") + A->getVal
https://github.com/Artem-B approved this pull request.
LGTM. The changes appear to be mechanical in nature, so `check clang` tests
should be sufficient to verify we've re-connected things correctly.
https://github.com/llvm/llvm-project/pull/88559
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Artem-B wrote:
> I've also re-enabled this pass in the TM, it was disabled years ago due to
> "numerical discrepancies" https://reviews.llvm.org/D96166. In our testing we
> haven't seen any issues with adding ranges to intrinsics, and I cannot find
> any further info about what issues were enc
@@ -128,6 +128,15 @@ bool findOneNVVMAnnotation(const GlobalValue *gv, const
std::string &prop,
return true;
}
+static std::optional
+findOneNVVMAnnotation(const GlobalValue &GV, const std::string &PropName) {
+ unsigned RetVal;
+ bool Found = findOneNVVMAnnotation(&GV, P
https://github.com/Artem-B edited
https://github.com/llvm/llvm-project/pull/94422
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https://github.com/Artem-B commented:
Nice.
https://github.com/llvm/llvm-project/pull/94422
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@@ -1,50 +1,51 @@
-//===- NVVMIntrRange.cpp - Set !range metadata for NVVM intrinsics
===//
+//===- NVVMIntrRange.cpp - Set range attributes for NVVM intrinsics
---===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
// See ht
@@ -0,0 +1,60 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --check-attributes --version 5
+; RUN: opt < %s -S -mtriple=nvptx-nvidia-cuda -mcpu=sm_20
-passes=nvvm-intr-range | FileCheck %s
+
+define i32 @test_maxntid() {
+; CHECK-LABEL:
https://github.com/Artem-B approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/94422
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https://github.com/llvm/llvm-project/pull/94422
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@@ -1,15 +1,15 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck
-allow-deprecated-dag-overlap %s
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck
-allow-deprecated-dag-overlap %s
; RUN: opt < %s -S -mtriple=nvptx-nvidia-cuda -passes=nvvm-intr-range \
-; RUN: |
@@ -139,24 +138,23 @@ define ptx_device i32 @test_ctaid_w() {
define ptx_device i32 @test_nctaid_y() {
; CHECK: mov.u32 %r{{[0-9]+}}, %nctaid.y;
-; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.nctaid.y(), !range
![[GRID_SIZE_YZ:[0-9]+]]
+; RANGE: call range(i32 1, 65536) i32 @llv
@@ -139,24 +138,23 @@ define ptx_device i32 @test_ctaid_w() {
define ptx_device i32 @test_nctaid_y() {
; CHECK: mov.u32 %r{{[0-9]+}}, %nctaid.y;
-; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.nctaid.y(), !range
![[GRID_SIZE_YZ:[0-9]+]]
+; RANGE: call range(i32 1, 65536) i32 @llv
https://github.com/Artem-B edited
https://github.com/llvm/llvm-project/pull/77359
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https://github.com/Artem-B approved this pull request.
LGTM with some wording/namiung nits.
https://github.com/llvm/llvm-project/pull/77359
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@@ -9013,6 +9013,12 @@ def err_cuda_ovl_target : Error<
"cannot overload %select{__device__|__global__|__host__|__host__
__device__}2 function %3">;
def note_cuda_ovl_candidate_target_mismatch : Note<
"candidate template ignored: target attributes do not match">;
+def wa
@@ -9013,6 +9013,12 @@ def err_cuda_ovl_target : Error<
"cannot overload %select{__device__|__global__|__host__|__host__
__device__}2 function %3">;
def note_cuda_ovl_candidate_target_mismatch : Note<
"candidate template ignored: target attributes do not match">;
+def wa
Artem-B wrote:
Ooh... I think I know exactly what may be causing this.
On machines where NVIDIA GPUs are used for compute only (e.g. a headless server
machine), NVIDIA drivers are not always loaded by default and may not have
driver persistence enabled. The drivers get loaded when GPU is acces
Artem-B wrote:
> What's the config to set this by default without any graphics?
https://docs.nvidia.com/deploy/driver-persistence/index.html
I usually use "nvidia-smi -i -pm ENABLED" to force the driver to
be loaded permanently.
As for `__nvcc_device_query`, my guess is that it just uses a
https://github.com/Artem-B edited
https://github.com/llvm/llvm-project/pull/94549
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@@ -,17 +6684,26 @@ void Clang::ConstructJob(Compilation &C, const
JobAction &JA,
break;
}
} else {
+if (Args.hasFlag(options::OPT_foffload_via_llvm,
+ options::OPT_fno_offload_via_llvm, false))
+ Args.AddLastArg(CmdArgs, options::O
@@ -1125,6 +1125,22 @@ void Clang::AddPreprocessingOptions(Compilation &C,
const JobAction &JA,
CmdArgs.push_back("__clang_openmp_device_functions.h");
}
+ if (Args.hasArg(options::OPT_foffload_via_llvm)) {
+// Add llvm_wrappers/* to our system include path. This
https://github.com/Artem-B approved this pull request.
LGTM in principle.
Will kernels in TUs compiled with `-foffload-via-llvm` be interoperable with
code that wants to launch them from another TU compiled w/o
`-foffload-via-llvm` ?
E.g.:
- a.cu: `__global__ void kernel() { ... }`
- b.cu: `e
@@ -0,0 +1,31 @@
+/*===-- LLVM/Offload helpers for kernel languages (CUDA/HIP) -*- c++ -*-===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apach
Artem-B wrote:
> Therefore, the following code would cause a deprecation warning during host
> compilation, even though val is only used as part of a device function:
This is where we may need help from @zygoloid.
> __attribute__((device)) std::enable_if<(val() > 0), int>::type fun(void)
Here
https://github.com/Artem-B approved this pull request.
LGTM for following the standard c++ library.
Floating point is an endless stream of surprises.
E.g.
https://pixorblog.wordpress.com/2016/06/27/some-remarks-about-minmax-functions/
> For instance, min() is not commutative and is not equiv
https://github.com/Artem-B approved this pull request.
https://github.com/llvm/llvm-project/pull/94113
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@@ -50,6 +50,10 @@ const char *CudaVersionToString(CudaVersion V);
// Input is "Major.Minor"
CudaVersion CudaStringToVersion(const llvm::Twine &S);
+// We have a name conflict with sys/mac.h on AIX
+#ifdef SM_32
+#undef SM_32
+#endif
Artem-B wrote:
Ugh. What
https://github.com/Artem-B edited
https://github.com/llvm/llvm-project/pull/88644
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@@ -50,6 +50,10 @@ const char *CudaVersionToString(CudaVersion V);
// Input is "Major.Minor"
CudaVersion CudaStringToVersion(const llvm::Twine &S);
+// We have a name conflict with sys/mac.h on AIX
+#ifdef SM_32
+#undef SM_32
+#endif
Artem-B wrote:
> We could
@@ -50,6 +50,10 @@ const char *CudaVersionToString(CudaVersion V);
// Input is "Major.Minor"
CudaVersion CudaStringToVersion(const llvm::Twine &S);
+// We have a name conflict with sys/mac.h on AIX
+#ifdef SM_32
+#undef SM_32
+#endif
Artem-B wrote:
Deprecatin
@@ -50,6 +50,10 @@ const char *CudaVersionToString(CudaVersion V);
// Input is "Major.Minor"
CudaVersion CudaStringToVersion(const llvm::Twine &S);
+// We have a name conflict with sys/mac.h on AIX
+#ifdef SM_32
+#undef SM_32
+#endif
Artem-B wrote:
SGTM. Than
https://github.com/Artem-B approved this pull request.
https://github.com/llvm/llvm-project/pull/88779
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@@ -86,7 +88,7 @@ static const CudaArchToStringMap arch_names[] = {
// clang-format off
{CudaArch::UNUSED, "", ""},
SM2(20, "compute_20"), SM2(21, "compute_20"), // Fermi
-SM(30), SM(32), SM(35), SM(37), // Kepler
+SM(30), SM3(32, "compute_32"), SM(35), SM(
https://github.com/Artem-B approved this pull request.
https://github.com/llvm/llvm-project/pull/87651
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https://github.com/Artem-B approved this pull request.
https://github.com/llvm/llvm-project/pull/100170
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Artem-B wrote:
@nico:
> Why do we need a new binary for this, instead of having something like `clang
> -cc1_nvlink` that calls a custom mode within clang?
Do we have existing precedents for such built-in tools, other than cc1 itself?
If the linker wrapper can be part of clang itself, it woul
https://github.com/Artem-B created
https://github.com/llvm/llvm-project/pull/100247
Sometimes users may need to use older clang with newer SM/PTX versions which
clang does not know anything about, yet.
--offload-arch=sm_next, combined with --cuda-next-sm=X and --cuda-next-ptx=Y
allows passing
Artem-B wrote:
@sergey-kozub FYI, https://github.com/llvm/llvm-project/pull/100247 should
allow forward-testing CUDA w/o relying on specific GPU/PTX variant being
hardcoded in clang.
https://github.com/llvm/llvm-project/pull/97402
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https://github.com/Artem-B updated
https://github.com/llvm/llvm-project/pull/100247
>From 44a1045eee71777fa916e2a8043b2f99afc96a96 Mon Sep 17 00:00:00 2001
From: Artem Belevich
Date: Thu, 18 Jul 2024 15:05:01 -0700
Subject: [PATCH 1/2] [CUDA] Add a pseudo GPU sm_next which allows overrides
for
@@ -96,6 +96,7 @@ static const OffloadArchToStringMap arch_names[] = {
SM(89), // Ada Lovelace
SM(90), // Hopper
SM(90a), // Hopper
+SM(next),// Placeholder for a n
@@ -648,6 +658,13 @@ void NVPTX::getNVPTXTargetFeatures(const Driver &D, const
llvm::Triple &Triple,
Features.push_back(Args.MakeArgString(PtxFeature));
return;
}
+ // Add --cuda-next-ptx to the list of features, but carry on to add the
+ // default PTX feature for
https://github.com/Artem-B edited
https://github.com/llvm/llvm-project/pull/100247
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@@ -26,24 +27,38 @@ static cl::opt
NoF16Math("nvptx-no-f16-math", cl::Hidden,
cl::desc("NVPTX Specific: Disable generation of f16 math ops."),
cl::init(false));
+static cl::opt
+NextSM("nvptx-next-sm", cl::Hidden,
+ cl::desc("NVPTX
https://github.com/Artem-B approved this pull request.
https://github.com/llvm/llvm-project/pull/100438
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Artem-B wrote:
The patch seems to change only the test file. Should there be more changes in
the patch?
https://github.com/llvm/llvm-project/pull/100607
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https://github.com/Artem-B approved this pull request.
https://github.com/llvm/llvm-project/pull/100607
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https://github.com/llvm/llvm-project/pull/96561
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@@ -0,0 +1,64 @@
+
+Clang nvlink Wrapper
+
+
+.. contents::
+ :local:
+
+.. _clang-nvlink-wrapper:
+
+Introduction
+
+
+This tools works as a wrapper around the NVIDIA ``nvlink`` linker. The purpose
+of this wrapper is to prov
@@ -0,0 +1,776 @@
+//===-- clang-nvlink-wrapper/ClangNVLinkWrapper.cpp - NVIDIA linker util
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,776 @@
+//===-- clang-nvlink-wrapper/ClangNVLinkWrapper.cpp - NVIDIA linker util
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/Artem-B commented:
First batch of comments on the patch -- I only got till about the middle of
ClangNVLinkWrapper.cpp. Will continue reviewing tomorrow.
https://github.com/llvm/llvm-project/pull/96561
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@@ -0,0 +1,776 @@
+//===-- clang-nvlink-wrapper/ClangNVLinkWrapper.cpp - NVIDIA linker util
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,64 @@
+
+Clang nvlink Wrapper
+
+
+.. contents::
+ :local:
+
+.. _clang-nvlink-wrapper:
+
+Introduction
+
+
+This tools works as a wrapper around the NVIDIA ``nvlink`` linker. The purpose
+of this wrapper is to prov
https://github.com/Artem-B edited
https://github.com/llvm/llvm-project/pull/96561
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@@ -0,0 +1,778 @@
+//===-- clang-nvlink-wrapper/ClangNVLinkWrapper.cpp - NVIDIA linker util
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,778 @@
+//===-- clang-nvlink-wrapper/ClangNVLinkWrapper.cpp - NVIDIA linker util
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/Artem-B approved this pull request.
LGTM for the patch in general, though I can't vouch for the details of the
linking process. I'll defer to @MaskRay on that.
https://github.com/llvm/llvm-project/pull/96561
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@@ -0,0 +1,778 @@
+//===-- clang-nvlink-wrapper/ClangNVLinkWrapper.cpp - NVIDIA linker util
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,778 @@
+//===-- clang-nvlink-wrapper/ClangNVLinkWrapper.cpp - NVIDIA linker util
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,778 @@
+//===-- clang-nvlink-wrapper/ClangNVLinkWrapper.cpp - NVIDIA linker util
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,778 @@
+//===-- clang-nvlink-wrapper/ClangNVLinkWrapper.cpp - NVIDIA linker util
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,64 @@
+
+Clang nvlink Wrapper
+
+
+.. contents::
+ :local:
+
+.. _clang-nvlink-wrapper:
+
+Introduction
+
+
+This tools works as a wrapper around the NVIDIA ``nvlink`` linker. The purpose
+of this wrapper is to prov
@@ -504,18 +511,23 @@ Expected clang(ArrayRef InputFiles,
const ArgList &Args) {
llvm::copy(LinkerArgs, std::back_inserter(CmdArgs));
}
- // Pass on -mllvm options to the clang invocation.
- for (const opt::Arg *Arg : Args.filtered(OPT_mllvm)) {
-CmdArgs.push_back
@@ -504,18 +511,23 @@ Expected clang(ArrayRef InputFiles,
const ArgList &Args) {
llvm::copy(LinkerArgs, std::back_inserter(CmdArgs));
}
- // Pass on -mllvm options to the clang invocation.
- for (const opt::Arg *Arg : Args.filtered(OPT_mllvm)) {
-CmdArgs.push_back
https://github.com/Artem-B closed
https://github.com/llvm/llvm-project/pull/99646
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https://github.com/Artem-B edited
https://github.com/llvm/llvm-project/pull/96015
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