[clang] 482d22d - [clang][test] Fix -DBUILD_SHARED_LIBS build by adding depency on MC from clangTesting

Author: Alex Bradbury Date: 2023-03-17T14:45:48Z New Revision: 482d22d05a4a30a4f8594273bd359f7d311c9d4c URL: https://github.com/llvm/llvm-project/commit/482d22d05a4a30a4f8594273bd359f7d311c9d4c DIFF: https://github.com/llvm/llvm-project/commit/482d22d05a4a30a4f8594273bd359f7d311c9d4c.diff LOG:

[clang] c39dd7c - [RISCV][MC] Add support for RV64E

Author: Job Noorman Date: 2023-03-23T12:32:25Z New Revision: c39dd7c1db97fa367cb6282067b74cd8e55ef09a URL: https://github.com/llvm/llvm-project/commit/c39dd7c1db97fa367cb6282067b74cd8e55ef09a DIFF: https://github.com/llvm/llvm-project/commit/c39dd7c1db97fa367cb6282067b74cd8e55ef09a.diff LOG: [

[clang] e54cdd0 - [RISCV][clang][test] Fix missed test

Author: Job Noorman Date: 2023-03-23T12:49:06Z New Revision: e54cdd058e223bd62840e901b8b462c011d2fae5 URL: https://github.com/llvm/llvm-project/commit/e54cdd058e223bd62840e901b8b462c011d2fae5 DIFF: https://github.com/llvm/llvm-project/commit/e54cdd058e223bd62840e901b8b462c011d2fae5.diff LOG: [

[clang] a742511 - [clang][RISCV][test] Add test cases for empty structs and the FP calling conventions

Author: Alex Bradbury Date: 2023-03-26T16:11:18+01:00 New Revision: a742511cbe9ada478e8a42847f443aa807bb147c URL: https://github.com/llvm/llvm-project/commit/a742511cbe9ada478e8a42847f443aa807bb147c DIFF: https://github.com/llvm/llvm-project/commit/a742511cbe9ada478e8a42847f443aa807bb147c.diff

[clang] 938deaa - [clang][RISCV] Fix ABI lowering for _Float16 for FP ABIs

Author: Alex Bradbury Date: 2023-03-26T16:18:47+01:00 New Revision: 938deaad8ac92d9a45db8ef2d8a71fbf04958d90 URL: https://github.com/llvm/llvm-project/commit/938deaad8ac92d9a45db8ef2d8a71fbf04958d90 DIFF: https://github.com/llvm/llvm-project/commit/938deaad8ac92d9a45db8ef2d8a71fbf04958d90.diff

[clang] d3291c6 - [RISCV][MC] Add support for the experimental zicond extension

Author: Alex Bradbury Date: 2023-03-29T12:17:50+01:00 New Revision: d3291c692c0a83b8b60e13ad1326e2b7d61e5f34 URL: https://github.com/llvm/llvm-project/commit/d3291c692c0a83b8b60e13ad1326e2b7d61e5f34 DIFF: https://github.com/llvm/llvm-project/commit/d3291c692c0a83b8b60e13ad1326e2b7d61e5f34.diff

[clang] 570995e - [clang][test][RISCV] Add RISC-V to clang/test/Sema/Float16.c

Author: Alex Bradbury Date: 2023-03-01T11:33:30Z New Revision: 570995eba2f93d639e69b6b12817d44a3b26cc72 URL: https://github.com/llvm/llvm-project/commit/570995eba2f93d639e69b6b12817d44a3b26cc72 DIFF: https://github.com/llvm/llvm-project/commit/570995eba2f93d639e69b6b12817d44a3b26cc72.diff LOG:

[clang] 81979c3 - [clang][RISCV][test] Add further test coverage for _Float16 on RISC-V

Author: Alex Bradbury Date: 2023-03-01T13:32:49Z New Revision: 81979c3038defe8653b62ba05517ee6d6b3eb976 URL: https://github.com/llvm/llvm-project/commit/81979c3038defe8653b62ba05517ee6d6b3eb976 DIFF: https://github.com/llvm/llvm-project/commit/81979c3038defe8653b62ba05517ee6d6b3eb976.diff LOG:

[clang] 34b412d - [clang][RISCV][test] Add coverage for __fp16 support in arguments/returns

Author: Alex Bradbury Date: 2023-03-01T15:20:15Z New Revision: 34b412dc0efe898b18b7afcf02d9e44d7e05b5ec URL: https://github.com/llvm/llvm-project/commit/34b412dc0efe898b18b7afcf02d9e44d7e05b5ec DIFF: https://github.com/llvm/llvm-project/commit/34b412dc0efe898b18b7afcf02d9e44d7e05b5ec.diff LOG:

[clang] 6101d72 - [RISCV] Relax rules for ordering s/z/x prefixed extensions in ISA naming strings

Author: Alex Bradbury Date: 2023-06-27T13:32:11+01:00 New Revision: 6101d720cb499f5ad19293475b429828fa3dbd75 URL: https://github.com/llvm/llvm-project/commit/6101d720cb499f5ad19293475b429828fa3dbd75 DIFF: https://github.com/llvm/llvm-project/commit/6101d720cb499f5ad19293475b429828fa3dbd75.diff

[clang] 574d0c2 - [clang][test][RISCV] Fix precision of CHECK-NOT lines in riscv-target-features.c

Author: Alex Bradbury Date: 2023-02-14T16:55:03Z New Revision: 574d0c2ec107cd3bfb753424150624276fe43813 URL: https://github.com/llvm/llvm-project/commit/574d0c2ec107cd3bfb753424150624276fe43813 DIFF: https://github.com/llvm/llvm-project/commit/574d0c2ec107cd3bfb753424150624276fe43813.diff LOG:

[clang] d05e1e9 - [clang][test][RISCV] Check for __riscv_i in riscv-target-features.c

Author: Alex Bradbury Date: 2023-02-14T17:02:32Z New Revision: d05e1e99b1d62cf1f8ab37f83dd2f377328dd9c5 URL: https://github.com/llvm/llvm-project/commit/d05e1e99b1d62cf1f8ab37f83dd2f377328dd9c5 DIFF: https://github.com/llvm/llvm-project/commit/d05e1e99b1d62cf1f8ab37f83dd2f377328dd9c5.diff LOG:

Re: [clang] d05e1e9 - [clang][test][RISCV] Check for __riscv_i in riscv-target-features.c

On 2023-02-14 19:56, Craig Topper wrote: > How does this interact with the CHECK-NOTs above it. Does it check > that they don't appear before the __riscv_i but would be allowed after > it? Thanks for the post-commit review. I think you're right. It looks like the easiest fix is probably move the

[clang] ddb7042 - [clang][test][RISCV] Introduce separate RUN lines for __risv_i test in riscv-target-features.c

Author: Alex Bradbury Date: 2023-02-14T21:06:44Z New Revision: ddb704247b16002d916bba67e3aa9f54fd4bbace URL: https://github.com/llvm/llvm-project/commit/ddb704247b16002d916bba67e3aa9f54fd4bbace DIFF: https://github.com/llvm/llvm-project/commit/ddb704247b16002d916bba67e3aa9f54fd4bbace.diff LOG:

Re: [clang] d05e1e9 - [clang][test][RISCV] Check for __riscv_i in riscv-target-features.c

Addressed in ddb704247b16002d916bba67e3aa9f54fd4bbace - thanks again. Best, Alex On 2023-02-14 20:58, Craig Topper wrote: > I don't have a better idea. > > ~Craig > > On Tue, Feb 14, 2023 at 12:32 PM Alex Bradbury wrote: > >> On 2023-02-14 19:56, Craig Topper wrote: >>> How does this interac

[clang] d41a73a - [RISCV][MC] Mark Zawrs extension as non-experimental

Author: Alex Bradbury Date: 2023-02-19T20:43:03Z New Revision: d41a73aa94cb8945dcd0f2906992c2fcea6ed001 URL: https://github.com/llvm/llvm-project/commit/d41a73aa94cb8945dcd0f2906992c2fcea6ed001 DIFF: https://github.com/llvm/llvm-project/commit/d41a73aa94cb8945dcd0f2906992c2fcea6ed001.diff LOG:

[clang] c7cd7a0 - [clang][test][RISCV] Pre-commit test for HasLegalHalfType patch

Author: Alex Bradbury Date: 2023-05-05T13:55:20+01:00 New Revision: c7cd7a050acb98b9d1df895c4b009c7c7078d917 URL: https://github.com/llvm/llvm-project/commit/c7cd7a050acb98b9d1df895c4b009c7c7078d917 DIFF: https://github.com/llvm/llvm-project/commit/c7cd7a050acb98b9d1df895c4b009c7c7078d917.diff

[clang] 560065b - [clang][RISCV] Set HasLegalHalfType to true if zfh is enabled

Author: Alex Bradbury Date: 2023-05-05T13:55:43+01:00 New Revision: 560065b6ecd539862fbc61401b02a1d5faea1ad1 URL: https://github.com/llvm/llvm-project/commit/560065b6ecd539862fbc61401b02a1d5faea1ad1 DIFF: https://github.com/llvm/llvm-project/commit/560065b6ecd539862fbc61401b02a1d5faea1ad1.diff

[clang] 86221a1 - [clang][test][RISCV] Precommit zhinx coverage in Float16-arith.c test

Author: Alex Bradbury Date: 2023-05-17T14:45:02+01:00 New Revision: 86221a1281cf640814daa928fbfc15f6e45a0bed URL: https://github.com/llvm/llvm-project/commit/86221a1281cf640814daa928fbfc15f6e45a0bed DIFF: https://github.com/llvm/llvm-project/commit/86221a1281cf640814daa928fbfc15f6e45a0bed.diff

[clang] 8e82376 - [clang][RISCV] Set HasLegalHalfType to true if zhinx is enabled

Author: Alex Bradbury Date: 2023-05-18T15:01:48+01:00 New Revision: 8e82376863460f6dc2dbb7fe6754af3ba69cc9c4 URL: https://github.com/llvm/llvm-project/commit/8e82376863460f6dc2dbb7fe6754af3ba69cc9c4 DIFF: https://github.com/llvm/llvm-project/commit/8e82376863460f6dc2dbb7fe6754af3ba69cc9c4.diff

[clang] 35ff5eb - [RISCV][MC] Add support for experimental Zfbfmin extension

Author: Alex Bradbury Date: 2023-05-19T15:17:56+01:00 New Revision: 35ff5eba16465bd4116db266c01cbabebd500484 URL: https://github.com/llvm/llvm-project/commit/35ff5eba16465bd4116db266c01cbabebd500484 DIFF: https://github.com/llvm/llvm-project/commit/35ff5eba16465bd4116db266c01cbabebd500484.diff

[clang] b18a819 - [RISCV][MC] Add support for experimental Zvfbfmin extension

Author: Alex Bradbury Date: 2023-05-19T15:26:25+01:00 New Revision: b18a81966499cad0eed44cbbbce5bb45460be132 URL: https://github.com/llvm/llvm-project/commit/b18a81966499cad0eed44cbbbce5bb45460be132 DIFF: https://github.com/llvm/llvm-project/commit/b18a81966499cad0eed44cbbbce5bb45460be132.diff

[clang] a1455de - [RISCV][MC] Add support for experimental Zvfbfwma extension

Author: Alex Bradbury Date: 2023-05-19T15:37:26+01:00 New Revision: a1455de74d959793104eb62236312a7fc7c67c58 URL: https://github.com/llvm/llvm-project/commit/a1455de74d959793104eb62236312a7fc7c67c58 DIFF: https://github.com/llvm/llvm-project/commit/a1455de74d959793104eb62236312a7fc7c67c58.diff

[clang] 2a5661c - [RISCV] Bump Zfa version to 0.2 and correct RISCVUsage description

Author: Alex Bradbury Date: 2023-04-19T06:27:35+01:00 New Revision: 2a5661c8415876be3fbd56ce90c2031e89ba0ef3 URL: https://github.com/llvm/llvm-project/commit/2a5661c8415876be3fbd56ce90c2031e89ba0ef3 DIFF: https://github.com/llvm/llvm-project/commit/2a5661c8415876be3fbd56ce90c2031e89ba0ef3.diff

[clang] cb7dffd - [RISCV] Zvk (vector crypto) specification update to 0.5.1 (Zvbb/Zvbc/Zvkt/Zvkng/Zvksg)

Author: Eric Gouriou Date: 2023-04-20T18:25:19+01:00 New Revision: cb7dffdc9a83f400410657431bda14e79f6e0176 URL: https://github.com/llvm/llvm-project/commit/cb7dffdc9a83f400410657431bda14e79f6e0176 DIFF: https://github.com/llvm/llvm-project/commit/cb7dffdc9a83f400410657431bda14e79f6e0176.diff

r322396 - Refactor handling of signext/zeroext in ABIArgInfo

Author: asb Date: Fri Jan 12 12:08:16 2018 New Revision: 322396 URL: http://llvm.org/viewvc/llvm-project?rev=322396&view=rev Log: Refactor handling of signext/zeroext in ABIArgInfo As @rjmccall suggested in D40023, we can get rid of ABIInfo::shouldSignExtUnsignedType (used to handle cases like t

r322435 - Fix test/Driver/riscv32-toolchain.c for builds setting CLANG_DEFAULT_LINKER

Author: asb Date: Sat Jan 13 01:21:11 2018 New Revision: 322435 URL: http://llvm.org/viewvc/llvm-project?rev=322435&view=rev Log: Fix test/Driver/riscv32-toolchain.c for builds setting CLANG_DEFAULT_LINKER Petr Hosek reported an external buildbot was failing on riscv32-toolchain.c, seemingly as

r322494 - [RISCV] Implement RISCV ABI lowering

Author: asb Date: Mon Jan 15 09:54:52 2018 New Revision: 322494 URL: http://llvm.org/viewvc/llvm-project?rev=322494&view=rev Log: [RISCV] Implement RISCV ABI lowering RISCVABIInfo is implemented in terms of XLen, supporting both RV32 and RV64. Unfortunately we need to count argument registers in

r322514 - [RISCV] Fix test failures on non-assert builds introduced in r322494

Author: asb Date: Mon Jan 15 12:45:15 2018 New Revision: 322514 URL: http://llvm.org/viewvc/llvm-project?rev=322514&view=rev Log: [RISCV] Fix test failures on non-assert builds introduced in r322494 Thanks to Eli Friedman, who suggested the reason these tests failed on a few buildbots yet works

Re: r322769 - [RISCV] Propagate -mabi and -march values to GNU assembler.

On 18 January 2018 at 00:38, Rafael Avila de Espindola via cfe-commits wrote: > With this I am getting a test failure on linux: > > TEST 'Clang :: Driver/riscv-gnutools.c' FAILED > > Script: > -- > /home/admin/llvm/build/bin/clang -target riscv32-linux-un

r324170 - [RISCV] Create a LinuxTargetInfo when targeting Linux

Author: asb Date: Sat Feb 3 03:56:11 2018 New Revision: 324170 URL: http://llvm.org/viewvc/llvm-project?rev=324170&view=rev Log: [RISCV] Create a LinuxTargetInfo when targeting Linux Previously, RISCV32TargetInfo or RISCV64TargetInfo were created unconditionally. Use LinuxTargetInfo to ensure t

[clang] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal (PR #81727)

asb wrote: CC @petrhosek too who I know [hopes to merge the RISCVToolChain and BareMetal toolchains](https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524). Matching the GCC behaviour seems sensible to me, and I'm hopeful that the planned future refactoring will av

[clang] [clang] Define SwiftInfo for RISCVTargetCodeGenInfo (PR #82152)

asb wrote: Yes, please add a trivial test if at all possible. https://github.com/llvm/llvm-project/pull/82152 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV] Allow -mcmodel= to accept large for RV64 (PR #107817)

asb wrote: I think we want to set a define for this as well, for consistency with medany and medlow (as tested in test/Preprocessor/riscv-cmodel.c). I submitted a trivial PR to riscv-c-api-doc to add this https://github.com/riscv-non-isa/riscv-c-api-doc/pull/86 which I'd hope lands quickly.

[clang] [RISCV] Add testcase for -mcmodel= (PR #107816)

https://github.com/asb approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/107816 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 3f0d3fd - [clang][test][RISCV] Add simple litmus test for --print-enabled-extensions

Author: Alex Bradbury Date: 2024-08-14T14:09:17+01:00 New Revision: 3f0d3fd3dea659330025712ea7fa914fd6af038b URL: https://github.com/llvm/llvm-project/commit/3f0d3fd3dea659330025712ea7fa914fd6af038b DIFF: https://github.com/llvm/llvm-project/commit/3f0d3fd3dea659330025712ea7fa914fd6af038b.diff

[clang] [llvm] [RISCV] Add Hazard3 CPU (PR #102452)

asb wrote: I think our conclusion from the sync-up call discussion matches what we'd roughly concluded in this thread, which is that with an instantiation of Hazard3 shipping in the RP2350 this isn't really a good test case for questions about when it's worth including a CPU definition for an

[clang] [llvm] [RISCV] Add B extension (PR #76893)

asb wrote: > It passed public review[1] and merged into riscv-isa-manual[2], so I think > it's time to mark it as 1.0 and moving forward :) > > [1] > https://groups.google.com/a/groups.riscv.org/g/isa-dev/c/KetVUCQkfK4/m/Y3Dbd2pvAAAJ?utm_medium=email&utm_source=footer > [2] > [riscv/riscv-is

[clang] [llvm] [RISCV] Add riscv_atomic.h and Zawrs/Zalrsc builtins (PR #94578)

asb wrote: My understanding from the sync-up call just now is you're planning to drop lr/sc intrinsics due to the concerns listed in this thread (which I share), but will keep pushing the zawrs intrinsics. https://github.com/llvm/llvm-project/pull/94578

[clang] [llvm] [RISCV] Mark zacas as experimental again due to unresolved ABI issue (PR #99898)

https://github.com/asb updated https://github.com/llvm/llvm-project/pull/99898 >From 7862d7e5fc63749f68bfdc0f0d8c226d341c55e1 Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: Mon, 22 Jul 2024 17:58:05 +0100 Subject: [PATCH 1/3] [RISCV] Mark zacas as experimental again due to unresolved ABI is

[clang] [llvm] [RISCV] Mark zacas as experimental again due to unresolved ABI issue (PR #99898)

https://github.com/asb closed https://github.com/llvm/llvm-project/pull/99898 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Mark zacas as experimental again due to unresolved ABI issue (PR #99898)

asb wrote: > It seems that this broke the CI: > https://lab.llvm.org/buildbot/#/builders/153/builds/3898 It did (apologies), but 2de1333af9a76fbdc46e117bebb3513e8991cd1f committed ~30 mins later should have fixed it. https://github.com/llvm/llvm-project/pull/99898

[clang] [llvm] [RISCV] Mark zacas as experimental again due to unresolved ABI issue (PR #99898)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/99898 As discussed at the last sync-up call, mark Zacas as experimental until this ABI issue is resolved . >From 7862d7e5fc63749f68bfdc0f0d8c226d341c55e1 Mon

[clang] [llvm] [RISCV] Mark zacas as experimental again due to unresolved ABI issue (PR #99898)

https://github.com/asb updated https://github.com/llvm/llvm-project/pull/99898 >From 7862d7e5fc63749f68bfdc0f0d8c226d341c55e1 Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: Mon, 22 Jul 2024 17:58:05 +0100 Subject: [PATCH 1/2] [RISCV] Mark zacas as experimental again due to unresolved ABI is

[clang] [llvm] [RISCV] Mark zacas as experimental again due to unresolved ABI issue (PR #99898)

asb wrote: > Please update this line :) > > https://github.com/llvm/llvm-project/blob/90569e02e63ff5d0915446919f564e9b3638fe2a/llvm/lib/TargetParser/Host.cpp#L2070 I've tentatively removed the line, on the basis that even when requesting "native" detection, the user probably doesn't want exper

[clang] [llvm] [RISCV] Add generic CPUs for profiles (PR #84877)

asb wrote: We discussed again in the sync-up call to try to move this forwards and per a discussion with @topperc and @preames were wondering if relying on -mattr and a corresponding feature for the profile might be the better approach after all. * There's not a lot of instances of this, but I

[clang] [llvm] [llvm][RISCV] Improve error message for invalid extension letters (PR #90468)

https://github.com/asb approved this pull request. LGTM, thanks. https://github.com/llvm/llvm-project/pull/90468 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Refactor profile selection in RISCVISAInfo::parseArchString. (PR #90700)

https://github.com/asb approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/90700 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add smstateen extension (PR #90818)

https://github.com/asb approved this pull request. Release note and RISCVUsage and it LGTM. https://github.com/llvm/llvm-project/pull/90818 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-comm

[clang] [llvm] [RISCV] Gate unratified profiles behind -menable-experimental-extensions (PR #92167)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/92167 As discussed in the last sync-up call, because these profiles are not yet finalised they shouldn't be exposed to users unless they opt-in to them (much like experimental extensions). We may later want to add a more s

[clang] [llvm] [RISCV] Gate unratified profiles behind -menable-experimental-extensions (PR #92167)

https://github.com/asb updated https://github.com/llvm/llvm-project/pull/92167 >From 5159fce9b2cca245335e124f7f0cd2149cdbcb2a Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: Tue, 14 May 2024 20:45:41 +0100 Subject: [PATCH] [RISCV] Gate unratified profiles behind -menable-experimental-extensi

[clang] [llvm] [RISCV] Gate unratified profiles behind -menable-experimental-extensions (PR #92167)

https://github.com/asb closed https://github.com/llvm/llvm-project/pull/92167 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Gate unratified profiles behind -menable-experimental-extensions (PR #92167)

asb wrote: Thank you for the reviews - I've gone ahead and merged. One thing from the added tests that's worth highlighting perhaps is `RejectsProfilesWithAdditionalExtensionsGivenAlreadyInProfile` which documents that currently if you specify an extension that's already part of the profile t

[clang] [llvm] [AArch64] Add support for Qualcomm Oryon processor (PR #91022)

@@ -0,0 +1,1664 @@ +//=- AArch64SchedOryon.td - Nuvia Inc Oryon CPU 001 ---*- tablegen -*-=// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.

[clang] [llvm] [AArch64] Add support for Qualcomm Oryon processor (PR #91022)

https://github.com/asb edited https://github.com/llvm/llvm-project/pull/91022 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AArch64] Add support for Qualcomm Oryon processor (PR #91022)

https://github.com/asb edited https://github.com/llvm/llvm-project/pull/91022 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AArch64] Add support for Qualcomm Oryon processor (PR #91022)

@@ -0,0 +1,1664 @@ +//=- AArch64SchedOryon.td - Nuvia Inc Oryon CPU 001 ---*- tablegen -*-=// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.

[clang] [RISCV] Allow YAML file to control multilib selection (PR #98856)

asb wrote: CC @MaskRay and @petrhosek - might you be able to help review this, or nominate someone else who can? Thanks! https://github.com/llvm/llvm-project/pull/98856 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi

[clang] [llvm] [RISCV] Add Hazard3 CPU (PR #102452)

asb wrote: > I do have some worries about the definition as-is, as the core in the repo > has optional features (configurable at tape-out time). Reading the RP2350 > datasheet, not all of the optional features for Hazard3 are enabled (and I'm > of the opinion that the lack of arm-like `-mcpu=+

[clang] 33d008b - [RISCV] Update recently ratified Zb{a,b,c,s} extensions to no longer be experimental

Author: Alex Bradbury Date: 2022-01-12T19:33:44Z New Revision: 33d008b169f3c813a4a45da220d0952f795ac477 URL: https://github.com/llvm/llvm-project/commit/33d008b169f3c813a4a45da220d0952f795ac477 DIFF: https://github.com/llvm/llvm-project/commit/33d008b169f3c813a4a45da220d0952f795ac477.diff LOG:

[clang] [modules][test] Bump maximum size for embed-files-compressed.cpp for the sake of RISC-V (PR #111360)

asb wrote: In terms of why it's larger on RISC-V and has got bigger, I don't know enough about C++ modules to investigate much. `-module-file-info` wasn't very informative. The last commit that bumped up the maximum size was fa45f81ff7ea9fc2a2a40fea8dd7626ecc3a8dbb suggesting it may be increas

[clang] [clang][python] Add CLANG_DISABLE_RUN_PYTHON_TESTS CMake option to disable clang python bindings tests (PR #111367)

asb wrote: > > We already have hard-coded logic to disable adding these tests to the > > `check-all` target in various cases. > > Why do you have to do that? I've never worked with the clang python bindings before, but you can basically see the reasoning in https://github.com/llvm/llvm-proje

[clang] [clang][python] Don't add check-clang-python to check-all if cross-compiling (PR #111657)

https://github.com/asb updated https://github.com/llvm/llvm-project/pull/111657 >From afd9488eb0b69c5375f7259a02581389c5003917 Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: Wed, 9 Oct 2024 11:09:44 +0100 Subject: [PATCH 1/4] [clang][python] Don't add check-clang-python to check-all if cros

[clang] [clang][python] Don't add check-clang-python to check-all if cross-compiling (PR #111657)

@@ -47,6 +47,14 @@ if(${LLVM_NATIVE_ARCH} MATCHES "^(AArch64|Hexagon|Sparc|SystemZ)$") set(RUN_PYTHON_TESTS FALSE) endif() +# Tests will fail if cross-compiling for a different target, as tests will try +# to use the host Python3_EXECUTABLE and make FFI calls to functions i

[clang] [clang][python] Don't add check-clang-python to check-all if cross-compiling (PR #111657)

https://github.com/asb closed https://github.com/llvm/llvm-project/pull/111657 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Add Smrnmi extension (PR #111668)

asb wrote: Welcome to the project @dong-miao! I'm not sure why the auto-labeler didn't kick in to attach the backend:RISC-V label (this is used to help ping the right people), but I've added that now. Just two quick comments as it's end of day here so I can't review properly right now: * We t

[clang] [clang][python] Don't add check-clang-python to check-all if cross-compiling (PR #111657)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/111657 Consistent with other cases for these tests, we opt not to add the target to check-all if they're known to fail. The tests fail when cross compiling for a different architecture because the host Python3_EXECUTABLE i

[clang] [clang][python] Add CLANG_DISABLE_RUN_PYTHON_TESTS CMake option to disable clang python bindings tests (PR #111367)

asb wrote: > > Though now I write this, I'm thinking it would make more sense to set > > RUN_PYTHON_TESTS to FALSE if CMAKE_CROSSCOMPILING is set. What do you think? > > Yes, I like this direction much more. Probably you should also print a > message during configuration saying that those test

[clang] [clang][python] Add CLANG_DISABLE_RUN_PYTHON_TESTS CMake option to disable clang python bindings tests (PR #111367)

https://github.com/asb edited https://github.com/llvm/llvm-project/pull/111367 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][python] Add CLANG_DISABLE_RUN_PYTHON_TESTS CMake option to disable clang python bindings tests (PR #111367)

https://github.com/asb closed https://github.com/llvm/llvm-project/pull/111367 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][python] Add CLANG_DISABLE_RUN_PYTHON_TESTS CMake option to disable clang python bindings tests (PR #111367)

https://github.com/asb edited https://github.com/llvm/llvm-project/pull/111367 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][python] Don't add check-clang-python to check-all if cross-compiling (PR #111657)

@@ -47,6 +47,14 @@ if(${LLVM_NATIVE_ARCH} MATCHES "^(AArch64|Hexagon|Sparc|SystemZ)$") set(RUN_PYTHON_TESTS FALSE) endif() +# Tests will fail if cross-compiling for a different target, as tests will try +# to use the host Python3_EXECUTABLE and make FFI calls to functions i

[clang] [clang][python] Don't add check-clang-python to check-all if cross-compiling (PR #111657)

@@ -47,6 +47,14 @@ if(${LLVM_NATIVE_ARCH} MATCHES "^(AArch64|Hexagon|Sparc|SystemZ)$") set(RUN_PYTHON_TESTS FALSE) endif() +# Tests will fail if cross-compiling for a different target, as tests will try +# to use the host Python3_EXECUTABLE and make FFI calls to functions i

[clang] [clang][python] Add CLANG_DISABLE_RUN_PYTHON_TESTS CMake option to disable clang python bindings tests (PR #111367)

asb wrote: > Sorry, I'm asking for the use case for the particular CMake knob you're > adding. If there are more platforms that those tests are not working on, we > should simply expand the pre-existing list Ah sorry for misunderstanding you - good question. In my case it's a cross setup. The

[clang] [clang][OpenMP][test] Use x86_64-linux-gnu triple for test referencing avx512f feature (PR #111337)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/111337 This test passes as-is on non-X86 hosts only because almost no target implements `isValidFeatureName` (the default implementation unconditionally returns true). RISC-V does implement it, and like X86 checks that the

[clang] [clang][OpenMP][test] Use x86_64-linux-gnu triple for test referencing avx512f feature (PR #111337)

https://github.com/asb closed https://github.com/llvm/llvm-project/pull/111337 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [modules][test] Bump maximum size for embed-files-compressed.cpp for the sake of RISC-V (PR #111360)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/111360 The size of a.pcm produced by an RV64 clang running natively is 67416 bytes, causing this test to fail. Bump up the maximum size. The test still retains its original intent as far as I can see, as it's really trying

[clang] [clang][python] Add CLANG_DISABLE_RUN_PYTHON_TESTS CMake option to disable clang python bindings tests (PR #111367)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/111367 We already have hard-coded logic to disable adding these tests to the `check-all` target in various cases. It's handy to have a CMake option to disable if in an environment where the tests don't work and you want `

[clang] [llvm] [RISCV] Add Smdbltrp and Ssdbltrp extension (PR #111837)

asb wrote: > > Personally I don't like to add a privileged extension if it doesn't > > introduce new CSRs/instructions. > > I'd actually put that on the > [agenda](https://docs.google.com/document/d/1G3ocHm2zE6AYTS2N3_3w2UxFnSEyKkcF57siLWe-NVs/edit?tab=t.0) > for today's sync-up call already.

[clang] [modules][test] Bump maximum size for embed-files-compressed.cpp for the sake of RISC-V (PR #111360)

https://github.com/asb closed https://github.com/llvm/llvm-project/pull/111360 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Mark RVB23U64 and RVB23S64 as non-experimental (PR #113918)

https://github.com/asb closed https://github.com/llvm/llvm-project/pull/113918 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add Supm extension to RVA23 profiles (PR #113619)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/113619 This is mandatory for both RVA23U64 and RVA23S64 in the ratified version of the specification . >From 32239ed67654c71f04dd66ccd602e8d9641330a

[clang] [llvm] [RISCV] Mark pointer masking extensions as non-experimental (PR #113618)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/113618 These extensions were ratified very recently. I've ensured we have definitions for all extensions in the document

[clang] [llvm] [RISCV] Mark pointer masking extensions as non-experimental (PR #113618)

https://github.com/asb updated https://github.com/llvm/llvm-project/pull/113618 >From d76f4183a875b1ad0483ca2b97211c26065e9d34 Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: Thu, 24 Oct 2024 13:43:22 -0700 Subject: [PATCH 1/2] [RISCV] Mark pointer masking extensions as non-experimental The

[clang] [RISCV] Add sha and supm to checks in riscv-profiles.c (PR #114123)

https://github.com/asb approved this pull request. Thanks. https://github.com/llvm/llvm-project/pull/114123 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add the Sha extension (PR #113820)

https://github.com/asb closed https://github.com/llvm/llvm-project/pull/113820 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Use Sha extension in RVA23S64 profile (PR #113823)

https://github.com/asb closed https://github.com/llvm/llvm-project/pull/113823 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Mark the RVA23S64 and RVA23U64 profiles as non-experimental (PR #113826)

https://github.com/asb updated https://github.com/llvm/llvm-project/pull/113826 >From 9bba67ede7450699bfa095c69e24f052a8ef36c7 Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: Sun, 27 Oct 2024 17:54:47 + Subject: [PATCH] [RISCV] Mark the RVA23S64 and RVA23U64 profiles as non-experimental

[clang] [llvm] [RISCV] Mark the RVA23S64 and RVA23U64 profiles as non-experimental (PR #113826)

https://github.com/asb closed https://github.com/llvm/llvm-project/pull/113826 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RFC][RISCV] Use the 'B' extension in RISC-V profile definitions (PR #113942)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/113942 Stacks on top of #113918. RVA22 has retroactively been defined as including 'B' (as it's a shorthand for Zba+Zbb+Zbs, which were previously explicitly enumerated) and RV{A,B,M}23 are defined featuring B. We don't cur

[clang] [llvm] [RISCV] Add the Sha extension (PR #113820)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/113820 This was introduced in the now-ratified RVA23 profile (and also added to the RVA22 text) as a simple way of referring to H plus the set of supervisor extensions required by RVA23. https://github.com/riscv/riscv-pro

[clang] [llvm] [RISCV] Add the Sha extension (PR #113820)

asb wrote: > > I haven't made it so if you enable all extensions that constitute Sha, Sha > > is implied. > > Great! I think it's most clear if we have "extensions only require things > they are made up of" (i.e. all the implications/requirements point to > earlier/lesser extensions) and "pro

[clang] [llvm] [RISCV] Mark RVB23U64 and RVB23S64 as non-experimental (PR #113918)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/113918 The specification was recently ratified . >From 47418b35a6e3e02eb20ff7b81f45571bf1322f5b Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: M

[clang] [llvm] [RISCV] Mark the RVA23S64 and RVA23U64 profiles as non-experimental (PR #113826)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/113826 All of the extensions used by these profile are themselves non-experimental, and RVA23 was just ratified .

[clang] [llvm] [RISCV] Use Sha extension in RVA23S64 profile (PR #113823)

https://github.com/asb created https://github.com/llvm/llvm-project/pull/113823 Stacks on top of #113820 In the ratified version of the RVA23S64 definition, the Sha extension is now used to group together the set of hypervisor related extensions.

[clang] [llvm] [RFC][RISCV] Use the 'B' extension in RISC-V profile definitions (PR #113942)

https://github.com/asb updated https://github.com/llvm/llvm-project/pull/113942 >From 47418b35a6e3e02eb20ff7b81f45571bf1322f5b Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: Mon, 28 Oct 2024 14:42:44 + Subject: [PATCH 1/3] [RISCV] Mark RVB23U64 and RVB23S64 as non-experimental The speci

[clang] [llvm] [RISCV] Use the 'B' extension in RISC-V profile definitions (PR #113942)

asb wrote: I've added the CHECK lines to riscv-profiles.c as spotted by @topperc, and based on the above discussion I think this is now ready to review. https://github.com/llvm/llvm-project/pull/113942 ___ cfe-commits mailing list cfe-commits@lists.ll

[clang] [llvm] [RFC][RISCV] Use the 'B' extension in RISC-V profile definitions (PR #113942)

https://github.com/asb edited https://github.com/llvm/llvm-project/pull/113942 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Use the 'B' extension in RISC-V profile definitions (PR #113942)

https://github.com/asb edited https://github.com/llvm/llvm-project/pull/113942 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Mark pointer masking extensions as non-experimental (PR #113618)

https://github.com/asb updated https://github.com/llvm/llvm-project/pull/113618 >From 32239ed67654c71f04dd66ccd602e8d9641330ae Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: Thu, 24 Oct 2024 13:43:22 -0700 Subject: [PATCH] [RISCV] Mark pointer masking extensions as non-experimental These ex

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