Author: Alex Bradbury Date: 2023-05-05T13:55:43+01:00 New Revision: 560065b6ecd539862fbc61401b02a1d5faea1ad1
URL: https://github.com/llvm/llvm-project/commit/560065b6ecd539862fbc61401b02a1d5faea1ad1 DIFF: https://github.com/llvm/llvm-project/commit/560065b6ecd539862fbc61401b02a1d5faea1ad1.diff LOG: [clang][RISCV] Set HasLegalHalfType to true if zfh is enabled The desired semantics for HasLegalHalfType are slightly unclear in that the comment for HasLegalHalfType says "True if the backend supports operations on the half LLVM IR type." Which operations? We get very limited scalar operations with zfhmin, more with zfh, and vector support with zvfh. While the comment for hasLegalHalfType() says "Determine whether _Float16 is supported on this target." This patch sets HasLegalHalfType to true for zfh. Differential Revision: https://reviews.llvm.org/D145071 Added: Modified: clang/lib/Basic/Targets/RISCV.cpp clang/test/CodeGen/RISCV/Float16-arith.c Removed: ################################################################################ diff --git a/clang/lib/Basic/Targets/RISCV.cpp b/clang/lib/Basic/Targets/RISCV.cpp index 6720fcd567ac8..bb61d75372667 100644 --- a/clang/lib/Basic/Targets/RISCV.cpp +++ b/clang/lib/Basic/Targets/RISCV.cpp @@ -320,6 +320,9 @@ bool RISCVTargetInfo::handleTargetFeatures(std::vector<std::string> &Features, if (ABI.empty()) ABI = ISAInfo->computeDefaultABI().str(); + if (ISAInfo->hasExtension("zfh")) + HasLegalHalfType = true; + return true; } diff --git a/clang/test/CodeGen/RISCV/Float16-arith.c b/clang/test/CodeGen/RISCV/Float16-arith.c index 63097de2fabb4..8fb3c1b146179 100644 --- a/clang/test/CodeGen/RISCV/Float16-arith.c +++ b/clang/test/CodeGen/RISCV/Float16-arith.c @@ -11,8 +11,7 @@ _Float16 x, y, z; // With no native half type support (no zfh), f16 will be promoted to f32. -// With zfh, it shouldn't be (FIXME: set HasLegalHalfType = true in order to -// get this behaviour for zfh). +// With zfh, it shouldn't be. // NOZFH-LABEL: define dso_local void @f16_add // NOZFH-SAME: () #[[ATTR0:[0-9]+]] { @@ -30,12 +29,9 @@ _Float16 x, y, z; // ZFH-SAME: () #[[ATTR0:[0-9]+]] { // ZFH-NEXT: entry: // ZFH-NEXT: [[TMP0:%.*]] = load half, ptr @y, align 2 -// ZFH-NEXT: [[EXT:%.*]] = fpext half [[TMP0]] to float // ZFH-NEXT: [[TMP1:%.*]] = load half, ptr @z, align 2 -// ZFH-NEXT: [[EXT1:%.*]] = fpext half [[TMP1]] to float -// ZFH-NEXT: [[ADD:%.*]] = fadd float [[EXT]], [[EXT1]] -// ZFH-NEXT: [[UNPROMOTION:%.*]] = fptrunc float [[ADD]] to half -// ZFH-NEXT: store half [[UNPROMOTION]], ptr @x, align 2 +// ZFH-NEXT: [[ADD:%.*]] = fadd half [[TMP0]], [[TMP1]] +// ZFH-NEXT: store half [[ADD]], ptr @x, align 2 // ZFH-NEXT: ret void // void f16_add() { _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
