jwnrt wrote:
CC @benshi001
To be 100% honest I haven't tested this on AVR silicon yet. My motivation for
the change is to allow for non-zero data address spaces in Rust which parses
these LLVM address spaces, but would then use both 64-bit and 16-bit pointers
for AVR. Apologies if this is bad
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benshi001 wrote:
> CC @benshi001
>
> To be 100% honest I haven't tested this on AVR silicon yet. My motivation for
> the change is to allow for non-zero data address spaces in Rust which parses
> these LLVM data format specs, but would then use both 64-bit and 16-bit
> pointers for AVR. Apolo
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: James Wainwright (jwnrt)
Changes
AVR uses separate address spaces for data (0) and program (1) memory, however
pointer layout is only defined for address space 0 in the data layout string.
The `p[n]` directive defines pointer layouts wher
llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: James Wainwright (jwnrt)
Changes
AVR uses separate address spaces for data (0) and program (1) memory, however
pointer layout is only defined for address space 0 in the data layout string.
The `p[n]` directive defines pointer la
https://github.com/jwnrt created
https://github.com/llvm/llvm-project/pull/134254
AVR uses separate address spaces for data (0) and program (1) memory, however
pointer layout is only defined for address space 0 in the data layout string.
The `p[n]` directive defines pointer layouts where `n` d