jwnrt wrote: CC @benshi001
To be 100% honest I haven't tested this on AVR silicon yet. My motivation for the change is to allow for non-zero data address spaces in Rust which parses these LLVM address spaces, but would then use both 64-bit and 16-bit pointers for AVR. Apologies if this is bad practice! https://github.com/llvm/llvm-project/pull/134254 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
