[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-04-07 Thread Sam Elliott via cfe-commits
lenary wrote: ping? https://github.com/llvm/llvm-project/pull/132481 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-04-05 Thread Jessica Clarke via cfe-commits
jrtc27 wrote: Is there a reason why these aren't lowercase like the rest? https://github.com/llvm/llvm-project/pull/132481 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-04-05 Thread Craig Topper via cfe-commits
@@ -230,10 +230,16 @@ bool PEI::runOnMachineFunction(MachineFunction &MF) { // with stack arguments. TFI->spillFPBP(MF); + LLVM_DEBUG(llvm::dbgs() << "Before calculateCallFrameInfo \n"); topperc wrote: Leftover debug code? https://github.com/llvm/llvm-p

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-04-04 Thread Kito Cheng via cfe-commits
@@ -486,6 +486,24 @@ def : SysReg<"mctrctl", 0x34e>; // Vendor CSRs //===--- +// XSfmclic +let FeaturesRequired = [{ {RISCV::FeatureVendorXSfmclic} }] in { +def : SysReg<"mtvt", 0x307>; +def : SysReg<"mnxti", 0x345>; +def : SysReg<"m

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-03-27 Thread Alex Bradbury via cfe-commits
@@ -486,6 +486,24 @@ def : SysReg<"mctrctl", 0x34e>; // Vendor CSRs //===--- +// XSfmclic +let FeaturesRequired = [{ {RISCV::FeatureVendorXSfmclic} }] in { +def : SysReg<"mtvt", 0x307>; +def : SysReg<"mnxti", 0x345>; +def : SysReg<"m

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-03-27 Thread Sam Elliott via cfe-commits
@@ -486,6 +486,24 @@ def : SysReg<"mctrctl", 0x34e>; // Vendor CSRs //===--- +// XSfmclic +let FeaturesRequired = [{ {RISCV::FeatureVendorXSfmclic} }] in { +def : SysReg<"mtvt", 0x307>; +def : SysReg<"mnxti", 0x345>; +def : SysReg<"m

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-03-21 Thread Sam Elliott via cfe-commits
@@ -230,10 +230,16 @@ bool PEI::runOnMachineFunction(MachineFunction &MF) { // with stack arguments. TFI->spillFPBP(MF); + LLVM_DEBUG(llvm::dbgs() << "Before calculateCallFrameInfo \n"); lenary wrote: Oh yeah, oops, lots of it. will remove. https://gith

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-03-21 Thread Craig Topper via cfe-commits
@@ -1502,6 +1659,9 @@ void RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF, auto *RVFI = MF.getInfo(); if (RVFI->isPushable(MF) && SavedRegs.test(RISCV::X26)) SavedRegs.set(RISCV::X27); + + // SiFive Preemptible Interrupt Handlers need additional frame en

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-03-21 Thread Sam Elliott via cfe-commits
@@ -1502,6 +1659,9 @@ void RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF, auto *RVFI = MF.getInfo(); if (RVFI->isPushable(MF) && SavedRegs.test(RISCV::X26)) SavedRegs.set(RISCV::X27); + + // SiFive Preemptible Interrupt Handlers need additional frame en

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-03-21 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-clang-driver @llvm/pr-subscribers-clang Author: Sam Elliott (lenary) Changes This Change adds support for two SiFive vendor attributes in clang: - "SiFive-CLIC-preemptible" - "SiFive-CLIC-stack-swap" These can be given together, and can be combined with

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-03-21 Thread Sam Elliott via cfe-commits
@@ -1502,6 +1659,9 @@ void RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF, auto *RVFI = MF.getInfo(); if (RVFI->isPushable(MF) && SavedRegs.test(RISCV::X26)) SavedRegs.set(RISCV::X27); + + // SiFive Preemptible Interrupt Handlers need additional frame en

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-03-21 Thread Craig Topper via cfe-commits
@@ -1502,6 +1659,9 @@ void RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF, auto *RVFI = MF.getInfo(); if (RVFI->isPushable(MF) && SavedRegs.test(RISCV::X26)) SavedRegs.set(RISCV::X27); + + // SiFive Preemptible Interrupt Handlers need additional frame en

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-03-21 Thread Sam Elliott via cfe-commits
lenary wrote: For Info, the last time this was proposed was in 2020: https://reviews.llvm.org/D79521 - at that time, no vendor extensions had been accepted upstream, and there was not yet a policy for upstream supporting vendor extensions. https://github.com/llvm/llvm-project/pull/132481

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-03-21 Thread Sam Elliott via cfe-commits
lenary wrote: > Is there a reason why these aren't lowercase like the rest? They match the existing names documented in https://starfivetech.com/uploads/sifive-interrupt-cookbook-v1p2.pdf - we could check them in clang case-insensitively, though. https://github.com/llvm/llvm-project/pull/1324

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-03-21 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-mc Author: Sam Elliott (lenary) Changes This Change adds support for two SiFive vendor attributes in clang: - "SiFive-CLIC-preemptible" - "SiFive-CLIC-stack-swap" These can be given together, and can be combined with "machine", but cannot be combined wi

[clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)

2025-03-21 Thread Sam Elliott via cfe-commits
https://github.com/lenary created https://github.com/llvm/llvm-project/pull/132481 This Change adds support for two SiFive vendor attributes in clang: - "SiFive-CLIC-preemptible" - "SiFive-CLIC-stack-swap" These can be given together, and can be combined with "machine", but cannot be combined w