================
@@ -1502,6 +1659,9 @@ void
RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF,
auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
if (RVFI->isPushable(MF) && SavedRegs.test(RISCV::X26))
SavedRegs.set(RISCV::X27);
+
+ // SiFive Preemptible Interrupt Handlers need additional frame entries
+ createSiFivePreemptibleInterruptFrameEntries(MF, *RVFI);
----------------
lenary wrote:
This has to be called here. `assignCalleeSavedSpillSlots` in
PrologEpilogInserter.cpp will return before calling the target-specific
`assignCalleeSavedSpillSlots` if `SavedRegs` (the bitmap of registers to save)
is empty, which it could be. Because we don't model mepc/mcause state as a
register, we don't have a bit in the bitmap to use to say we're saving it.
https://github.com/llvm/llvm-project/pull/132481
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