[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-16 Thread Tobias Hieta via cfe-commits
tru wrote: Create a branch from `release/19.x` in your own fork, then cherry-pick over the changes from `main`, edit them to match the things we talked about above (and fix any merge problems). Then submit a PR that wants to merge `yourbranch` into `release/19.x`. And check the checkbox `maint

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-16 Thread via cfe-commits
ganeshgit wrote: > @ganeshgit or @RKSimon can one of you put up a PR against release/19.x with > the abi compatible changes so that we have chance to look at it and approve > it before the release tomorrow. I will submit the changes shortly. Probably I will create a branch with a base commit

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-15 Thread Tobias Hieta via cfe-commits
tru wrote: @ganeshgit or @RKSimon can one of you put up a PR against release/19.x with the abi compatible changes so that we have chance to look at it and approve it before the release tomorrow. https://github.com/llvm/llvm-project/pull/107964 ___ cf

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-15 Thread Simon Pilgrim via cfe-commits
https://github.com/RKSimon demilestoned https://github.com/llvm/llvm-project/pull/107964 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread Simon Pilgrim via cfe-commits
RKSimon wrote: @ganeshgit OK to commit? https://github.com/llvm/llvm-project/pull/107964 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread via cfe-commits
https://github.com/ganeshgit updated https://github.com/llvm/llvm-project/pull/107964 >From b68bcc1415151bd84b5868aa2c98663069f45469 Mon Sep 17 00:00:00 2001 From: Ganesh Gopalasubramanian Date: Thu, 29 Aug 2024 08:54:35 + Subject: [PATCH 1/3] [X86] AMD Zen 5 Initial enablement --- clang/

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread via cfe-commits
https://github.com/ganeshgit updated https://github.com/llvm/llvm-project/pull/107964 >From b68bcc1415151bd84b5868aa2c98663069f45469 Mon Sep 17 00:00:00 2001 From: Ganesh Gopalasubramanian Date: Thu, 29 Aug 2024 08:54:35 + Subject: [PATCH 1/2] [X86] AMD Zen 5 Initial enablement --- clang/

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread Tobias Hieta via cfe-commits
tru wrote: I think it's better it land as it should be in `main` and then you can create a new PR against the ` release/19.x` branch with the different enum layout. https://github.com/llvm/llvm-project/pull/107964 ___ cfe-commits mailing list cfe-comm

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread via cfe-commits
ganeshgit wrote: > It would be messy, but could we not place the CK_ZNVER5 enum entry at the end > of the enum list just for 19.x and then fix the sorting in trunk? > > It would be messy, but could we not place the CK_ZNVER5 enum entry at the > > end of the enum list just for 19.x and then fix

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread Tobias Hieta via cfe-commits
tru wrote: > It would be messy, but could we not place the CK_ZNVER5 enum entry at the end > of the enum list just for 19.x and then fix the sorting in trunk? I would be fine with that. WDYT @nikic ? https://github.com/llvm/llvm-project/pull/107964 _

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread Aaron Ballman via cfe-commits
AaronBallman wrote: > It would be messy, but could we not place the CK_ZNVER5 enum entry at the end > of the enum list just for 19.x and then fix the sorting in trunk? Seems better than an ABI break this late in the cycle, but I don't have *super* strong feelings. https://github.com/llvm/llvm

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread Simon Pilgrim via cfe-commits
RKSimon wrote: It would be messy, but could we not place the CK_ZNVER5 enum entry at the end of the enum list just for 19.x and then fix the sorting in trunk? https://github.com/llvm/llvm-project/pull/107964 ___ cfe-commits mailing list cfe-commits@li

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread Tobias Hieta via cfe-commits
tru wrote: > The change to X86TargetParser.h looks ABI breaking to me. This seems unfortunate to me. But I don't think it would be good to insert the enum at the end of the list and changing the sorting order. How big of a problem would it be with a ABI break now? I know you have requested th

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread via cfe-commits
ganeshgit wrote: > Zen 5 support in GCC was upstreamed more than half a year ago -- why is the > LLVM support being upstreamed only now, after missing the 19.x window? What > steps are being taken to ensure this does not happen again? > > The change to X86TargetParser.h looks ABI breaking to m

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread via cfe-commits
ganeshgit wrote: > @ganeshgit Ignore what I said earlier about waiting for the tuning patches :) > Please can we get this committed to trunk, we'll let it brew for a few days > and then cherry pick for 19.x - if you can create PRs for the tuning changes > as soon as possible we can review them

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread Nikita Popov via cfe-commits
nikic wrote: Zen 5 support in GCC was upstreamed more than half a year ago -- why is the LLVM support being upstreamed only now, after missing the 19.x window? What steps are being taken to ensure this does not happen again? The change to X86TargetParser.h looks ABI breaking to me. https://gi

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread Simon Pilgrim via cfe-commits
RKSimon wrote: @ganeshgit Ignore what I said earlier about waiting for the tuning patches :) Please can we get this committed to trunk, we'll let it brew for a few days and then cherry pick for 19.x - if you can create PRs for the tuning changes as soon as possible we can review them for 19.x

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-13 Thread Simon Pilgrim via cfe-commits
RKSimon wrote: @tru This patch at the very least needs to make it for 19.x but I was hoping we'd get some of the tuning improvements in as well - should we wait for those PRs or just get this committed and cherry picked straight away? https://github.com/llvm/llvm-project/pull/107964 __

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-10 Thread Simon Pilgrim via cfe-commits
RKSimon wrote: @ganeshgit Can you address the clang-format warnings please? https://github.com/llvm/llvm-project/pull/107964 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-10 Thread Simon Pilgrim via cfe-commits
https://github.com/RKSimon approved this pull request. LGTM as a base patch (znver4 + extra isas) - we should hold off from cherry picking into 19.x until we see the scope of the follow up patches. https://github.com/llvm/llvm-project/pull/107964 ___

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-09 Thread via cfe-commits
ganeshgit wrote: > This patch enables the basic skeleton enablement of AMD next gen zen5 CPUs. @RKSimon Pl post your comments. I have few subsequent patches for scheduler enablement, and some tuning patches lined up as well. https://github.com/llvm/llvm-project/pull/107964

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-09 Thread Aiden Grossman via cfe-commits
@@ -1151,6 +1151,25 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family, break; // "znver4" } break; // family 19h + case 26: boomanaiden154 wrote: Oh, looks like I missed it. Sorry about that! There's https://github.com/llvm/

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-09 Thread via cfe-commits
@@ -1151,6 +1151,25 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family, break; // "znver4" } break; // family 19h + case 26: ganeshgit wrote: > I posted some patches a while ago to start unifying things so that there's a > si

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-09 Thread Aiden Grossman via cfe-commits
@@ -1151,6 +1151,25 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family, break; // "znver4" } break; // family 19h + case 26: boomanaiden154 wrote: I posted some patches a while ago to start unifying things so that there's a s

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-09 Thread via cfe-commits
@@ -1151,6 +1151,25 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family, break; // "znver4" } break; // family 19h + case 26: ganeshgit wrote: Will do! https://github.com/llvm/llvm-project/pull/107964 _

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-09 Thread Aiden Grossman via cfe-commits
@@ -1151,6 +1151,25 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family, break; // "znver4" } break; // family 19h + case 26: boomanaiden154 wrote: Can you bump the equivalent code in `compiler-rt` too? https://github.com/llvm

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-09 Thread via cfe-commits
github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff 88bd507dc2dd9c235b54d718cf84e4ef80d94bc9 b68bcc1415151bd84b5868aa2c98663069f45469 --e

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-09 Thread via cfe-commits
https://github.com/ganeshgit created https://github.com/llvm/llvm-project/pull/107964 This patch enables the basic skeleton enablement of AMD next gen zen5 CPUs. >From b68bcc1415151bd84b5868aa2c98663069f45469 Mon Sep 17 00:00:00 2001 From: Ganesh Gopalasubramanian Date: Thu, 29 Aug 2024 08:54:

[clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)

2024-09-09 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-mc @llvm/pr-subscribers-clang-driver Author: Ganesh (ganeshgit) Changes This patch enables the basic skeleton enablement of AMD next gen zen5 CPUs. --- Patch is 31.47 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-projec