github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff 88bd507dc2dd9c235b54d718cf84e4ef80d94bc9
b68bcc1415151bd84b5868aa2c98663069f45469 --extensions c,h,cpp --
clang/lib/Basic/Targets/X86.cpp clang/test/CodeGen/target-builtin-noerror.c
clang/test/Driver/x86-march.c clang/test/Frontend/x86-target-cpu.c
clang/test/Misc/target-invalid-cpu-note/x86.c
clang/test/Preprocessor/predefined-arch-macros.c
compiler-rt/lib/builtins/cpu_model/x86.c
llvm/include/llvm/TargetParser/X86TargetParser.h llvm/lib/TargetParser/Host.cpp
llvm/lib/TargetParser/X86TargetParser.cpp
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c
b/compiler-rt/lib/builtins/cpu_model/x86.c
index e5d74daf26..dbe6094541 100644
--- a/compiler-rt/lib/builtins/cpu_model/x86.c
+++ b/compiler-rt/lib/builtins/cpu_model/x86.c
@@ -754,18 +754,18 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned
Family,
CPU = "znver5";
*Type = AMDFAM1AH;
if (Model <= 0x77) {
- // Models 00h-0Fh (Breithorn).
- // Models 10h-1Fh (Breithorn-Dense).
- // Models 20h-2Fh (Strix 1).
- // Models 30h-37h (Strix 2).
- // Models 38h-3Fh (Strix 3).
- // Models 40h-4Fh (Granite Ridge).
- // Models 50h-5Fh (Weisshorn).
- // Models 60h-6Fh (Krackan1).
- // Models 70h-77h (Sarlak).
- CPU = "znver5";
- *Subtype = AMDFAM1AH_ZNVER5;
- break; // "znver5"
+ // Models 00h-0Fh (Breithorn).
+ // Models 10h-1Fh (Breithorn-Dense).
+ // Models 20h-2Fh (Strix 1).
+ // Models 30h-37h (Strix 2).
+ // Models 38h-3Fh (Strix 3).
+ // Models 40h-4Fh (Granite Ridge).
+ // Models 50h-5Fh (Weisshorn).
+ // Models 60h-6Fh (Krackan1).
+ // Models 70h-77h (Sarlak).
+ CPU = "znver5";
+ *Subtype = AMDFAM1AH_ZNVER5;
+ break; // "znver5"
}
break;
default:
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index a85d28d830..b2c4f9ee00 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -1155,19 +1155,19 @@ static const char
*getAMDProcessorTypeAndSubtype(unsigned Family,
CPU = "znver5";
*Type = X86::AMDFAM1AH;
if (Model <= 0x77) {
- // Models 00h-0Fh (Breithorn).
- // Models 10h-1Fh (Breithorn-Dense).
- // Models 20h-2Fh (Strix 1).
- // Models 30h-37h (Strix 2).
- // Models 38h-3Fh (Strix 3).
- // Models 40h-4Fh (Granite Ridge).
- // Models 50h-5Fh (Weisshorn).
- // Models 60h-6Fh (Krackan1).
- // Models 70h-77h (Sarlak).
- CPU = "znver5";
- *Subtype = X86::AMDFAM1AH_ZNVER5;
- break; // "znver5"
- }
+ // Models 00h-0Fh (Breithorn).
+ // Models 10h-1Fh (Breithorn-Dense).
+ // Models 20h-2Fh (Strix 1).
+ // Models 30h-37h (Strix 2).
+ // Models 38h-3Fh (Strix 3).
+ // Models 40h-4Fh (Granite Ridge).
+ // Models 50h-5Fh (Weisshorn).
+ // Models 60h-6Fh (Krackan1).
+ // Models 70h-77h (Sarlak).
+ CPU = "znver5";
+ *Subtype = X86::AMDFAM1AH_ZNVER5;
+ break; // "znver5"
+ }
break;
default:
diff --git a/llvm/lib/TargetParser/X86TargetParser.cpp
b/llvm/lib/TargetParser/X86TargetParser.cpp
index 27feb9c789..09d4312918 100644
--- a/llvm/lib/TargetParser/X86TargetParser.cpp
+++ b/llvm/lib/TargetParser/X86TargetParser.cpp
@@ -240,7 +240,7 @@ static constexpr FeatureBitset FeaturesZNVER4 =
static constexpr FeatureBitset FeaturesZNVER5 =
FeaturesZNVER4 | FeatureAVXVNNI | FeatureMOVDIRI | FeatureMOVDIR64B |
- FeatureAVX512VP2INTERSECT | FeaturePREFETCHI | FeatureAVXVNNI ;
+ FeatureAVX512VP2INTERSECT | FeaturePREFETCHI | FeatureAVXVNNI;
// D151696 tranplanted Mangling and OnlyForCPUDispatchSpecific from
// X86TargetParser.def to here. They are assigned by following ways:
``````````
</details>
https://github.com/llvm/llvm-project/pull/107964
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