[PATCH] D136571: [RISCV] add svinval extension

This revision was automatically updated to reflect the committed changes. Closed by commit rG7d7940fd7761: [RISCV] add svinval extension (authored by BeMg). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136571/new/ https://reviews.llvm.org/D136571

[PATCH] D136571: [RISCV] add svinval extension

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136571/new/ https://reviews.llvm.org/D136571 ___

[PATCH] D136571: [RISCV] add svinval extension

BeMg updated this revision to Diff 470722. BeMg marked 2 inline comments as done. BeMg added a comment. rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136571/new/ https://reviews.llvm.org/D136571 Files: clang/test/Preprocessor/riscv-target

[PATCH] D136571: [RISCV] add svinval extension

BeMg updated this revision to Diff 470559. BeMg added a comment. Update RISCVUsage.rst Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136571/new/ https://reviews.llvm.org/D136571 Files: clang/test/Preprocessor/riscv-target-features.c llvm/docs/

[PATCH] D136571: [RISCV] add svinval extension

reames added inline comments. Comment at: llvm/docs/RISCVUsage.rst:56 ``V``Supported + ``Svinval`` Assembly Support ``Zba`` Supported This table is sorted alphabetically, please move above V. Repository: rG LLVM Git

[PATCH] D136571: [RISCV] add svinval extension

BeMg updated this revision to Diff 470428. BeMg added a comment. Update RISCVUsage.html Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136571/new/ https://reviews.llvm.org/D136571 Files: clang/test/Preprocessor/riscv-target-features.c llvm/docs

[PATCH] D136571: [RISCV] add svinval extension

reames added a comment. Please update https://llvm.org/docs/RISCVUsage.html#extensions It seems like we'd previously accept these instruction without the extension being explicitly named? If so, this is probably worth a release note to document the change in user behavior. Repository: rG L

[PATCH] D136571: [RISCV] add svinval extension

BeMg updated this revision to Diff 470046. BeMg added a comment. Reorder the def then use the same let Predicates Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136571/new/ https://reviews.llvm.org/D136571 Files: clang/test/Preprocessor/riscv-tar

[PATCH] D136571: [RISCV] add svinval extension

jrtc27 added a comment. Hm, we only have two uses of Requires currently, both of which aren't really for any good reason as far as I can see. It'd be better to keep things uniform with Predicates IMO. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D

[PATCH] D136571: [RISCV] add svinval extension

BeMg updated this revision to Diff 470041. BeMg added a comment. Use Requires<[HasStdSvinval]> instead of using let Predicates Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136571/new/ https://reviews.llvm.org/D136571 Files: clang/test/Preproces

[PATCH] D136571: [RISCV] add svinval extension

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:814 def SFENCE_VMA : Priv_rr<"sfence.vma", 0b0001001>, Sched<[]>; +let Predicates = [HasStdExtSvinval] in { def SINVAL_VMA : Priv_rr<"sinval.vma", 0b0001011>, Sched<[]>; C

[PATCH] D136571: [RISCV] add svinval extension

BeMg created this revision. Herald added subscribers: sunshaoce, VincentWu, vkmr, frasercrmck, jdoerfert, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, n