[PATCH] D108886: Add RISC-V sifive-s51 cpu

This revision was automatically updated to reflect the committed changes. Closed by commit rG6cd4b508a8a5: [RISCV] Add SiFive core S51 (authored by apivovarov). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D1088

[PATCH] D108886: Add RISC-V sifive-s51 cpu

evandro added a comment. In D108886#2978169 , @apivovarov wrote: > Add Cortex-A78C Support for Clang and LLVM > > is similar to this patch. As we can see `cortex-a7

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov added a comment. Add Cortex-A78C Support for Clang and LLVM is similar to this patch. As we can see `cortex-a78c` support was included to the ReleaseNotes 12.x

[PATCH] D108886: Add RISC-V sifive-s51 cpu

evandro added a comment. In D108886#2978038 , @apivovarov wrote: > Evandro, similar notes have been made in the past for Release Notes 12.x and > 11.x for Arm and RISC-V processors: > https://github.com/llvm/llvm-project/blob/release/12.x/clang/docs/Rel

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov added a comment. Evandro, similar notes have been made in the past for Release Notes 12.x and 11.x for Arm and RISC-V processors: https://github.com/llvm/llvm-project/blob/release/12.x/clang/docs/ReleaseNotes.rst#modified-compiler-flags https://github.com/llvm/llvm-project/blob/release

[PATCH] D108886: Add RISC-V sifive-s51 cpu

evandro added a comment. I don't think that such a minor change makes sense to be added to the release notes. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108886 _

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov updated this revision to Diff 370072. apivovarov added a comment. Added a note to Release Notes Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108886 Files: clang/docs/ReleaseNotes.rst clang/test

[PATCH] D108886: Add RISC-V sifive-s51 cpu

jrtc27 added a comment. In D108886#2977873 , @apivovarov wrote: > In D108886#2977733 , @jrtc27 wrote: > >> You don't need to tag people as well as adding them as reviewers, it's just >> annoying. Also, it's only

[PATCH] D108886: Add RISC-V sifive-s51 cpu

evandro accepted this revision. evandro added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108886 _

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov added a comment. In D108886#2977733 , @jrtc27 wrote: > You don't need to tag people as well as adding them as reviewers, it's just > annoying. Also, it's only been four days; the developer policy is that for > non-urgent patches you shouldn't

[PATCH] D108886: Add RISC-V sifive-s51 cpu

MaskRay added a comment. Looks reasonable. You can add a bullet point to clang/docs/ReleaseNotes.rst Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108886 ___ cfe-com

[PATCH] D108886: Add RISC-V sifive-s51 cpu

jrtc27 added a comment. In D108886#2977730 , @apivovarov wrote: > @evandro @kito-cheng @kito.cheng @khchen @MaskRay Could you review this > patch? Thank you You don't need to tag people as well as adding them as reviewers, it's just annoying. Also, it

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov added a subscriber: kito.cheng. apivovarov added a comment. @evandro @kito-cheng @kito.cheng @khchen @MaskRay Could you review this patch? Thank you Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov updated this revision to Diff 369745. apivovarov added a comment. Add `sifive-s51` to test `target-invalid-cpu-note.c` error messages match string Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108886

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov updated this revision to Diff 369635. apivovarov added a comment. update the patch Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108886 Files: clang/test/Driver/riscv-cpus.c llvm/include/llvm/Su

[PATCH] D108886: Add RISC-V sifive-s51 cpu

craig.topper added a comment. Please upload patches with full context. Using -U99 as documented here https://llvm.org/docs/Phabricator.html#requesting-a-review-via-the-web-interface Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ htt

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov updated this revision to Diff 369369. apivovarov added a comment. fix typo in MCPU-ABI-SIFIVE-S51 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108886 Files: clang/test/Driver/riscv-cpus.c llvm/

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov created this revision. apivovarov added reviewers: evandro, kito-cheng, khchen. Herald added subscribers: vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, niosHD,