[PATCH] D157479: [Clang][DebugInfo] Emit narrower base types for structured binding declarations that bind to struct bitfields

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. LGTM with a few cosmetic suggestions. Comment at: clang/lib/CodeGen/CGDebugInfo.cpp:4772 +QualType FinalTy = Context.getQualifiedType(IntTy, Quals); +Ty

[PATCH] D154915: [ARM][AArch64] Add ARM specific builtin for clz that is not undefined for 0 in ubsan.

tmatheson added a comment. Also thanks for fixing this! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154915/new/ https://reviews.llvm.org/D154915 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D154915: [ARM][AArch64] Add ARM specific builtin for clz that is not undefined for 0 in ubsan.

tmatheson added a comment. I would prefer the simplicity of adding a check in the intrinsic itself, rather than adding the target-specific builtins. Slightly worse codegen at -O0 doesn't matter imho. However I don't feel very strongly about it, so if others are happy with this then LGTM. Repo

[PATCH] D154910: [ARM][AArch64] Make ACLE __clzl/__clzll return unsigned int instead of unsigned long/uint64_t.

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. LGTM, thanks. Seems odd that the ACLE mixes `uint32_t` and `unsigned int`. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154910/new/ https

[PATCH] D153130: [Clang][AArch64] Implement ACLE feature macro for FEAT_LRCPC3

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. LGTM Comment at: clang/lib/Basic/Targets/AArch64.cpp:420 +Builder.defineMacro("__ARM_FEATURE_RCPC", "3"); + else if (HasRCPC) Builder.defineMacro("__ARM_FEATU

[PATCH] D153128: [AArch64][RCPC3] Add Neon intrinsics for LDAP1 and STL2

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. LGTM. ACLE PR here: https://github.com/ARM-software/acle/pull/265 Comment at: clang/lib/CodeGen/CGBuiltin.cpp:6769 + // and vstl1(q)_lane, but codegen is equivalent fo

[PATCH] D146242: [ARM] Fixing ABI mismatch for packed structs passed as function arguments

tmatheson added a comment. The description/commit message should reflect the final reasoning behind the change. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D146242/new/ https://reviews.llvm.org/D146242 ___

[PATCH] D146242: [ARM] Fixing ABI mismatch for packed structs passed as function arguments

tmatheson accepted this revision. tmatheson added a comment. This revision now requires review to proceed. In D146242#4428051 , @chill wrote: > But there isn't any other power of two between 8 and 16. Ok, I see where I was going wrong, misreading C4 (it'

[PATCH] D146242: [ARM] Fixing ABI mismatch for packed structs passed as function arguments

tmatheson added a comment. In D146242#4427707 , @chill wrote: > I was just thinking to LGTM it :) > > IMHO, the alignment adjustment happens because of C.4 (B.3 indeed leave the > HFA/HVA unmodified). > >> C.4 If the argument is an HFA, an HVA, a Quad-

[PATCH] D146242: [ARM] Fixing ABI mismatch for packed structs passed as function arguments

tmatheson requested changes to this revision. tmatheson added a comment. This revision now requires changes to proceed. I think the current patch is wrong for a couple of reasons. Firstly the data types being tested, e.g. `struct S { int8x16_t m; }` etc, are not just composite types, but HVAs: h

[PATCH] D146242: [ARM] Fixing ABI mismatch for packed structs passed as function arguments

tmatheson added inline comments. Comment at: clang/test/CodeGen/aarch64-ABI-align-packed.cpp:6 +// These tests check the ABI alignment of packed structs and packed fields +// are consistent with the AAPCS64 document. +extern "C" { tmatheson wrote: > The filename

[PATCH] D146242: [ARM] Fixing ABI mismatch for packed structs passed as function arguments

tmatheson added a reviewer: stuij. tmatheson added inline comments. Comment at: clang/test/CodeGen/aarch64-ABI-align-packed.cpp:6 +// These tests check the ABI alignment of packed structs and packed fields +// are consistent with the AAPCS64 document. +extern "C" { --

[PATCH] D152023: [UBSan] Consider zero input to __builtin_clz/ctz to be undefined independent of the target.

tmatheson added a comment. I think this breaks the ACLE header, see https://github.com/llvm/llvm-project/issues/63113 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152023/new/ https://reviews.llvm.org/D152023 _

[PATCH] D146242: [ARM] Fixing ABI mismatch for packed structs and fields

tmatheson added a comment. Reverse-ping @JiruiWu Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D146242/new/ https://reviews.llvm.org/D146242 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https:

[PATCH] D149119: [CMake] Use LLVM own tools in extract_symbols.py

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. LGTM, thank you for doing this. Please give it a couple of days in case others have comments. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D149119/new/ https://reviews.llvm.org

[PATCH] D149119: [CMake] Use llvm-nm to extract symbols for staged LTO builds on Windows

tmatheson added a comment. In D149119#4297540 , @ikudrin wrote: > If I understand it right, we might not be able to build `llvm-nm` in cases > like cross-platform building, right? LLVM has a way to build tools that need to run on the build machine as pa

[PATCH] D149119: [CMake] Use llvm-nm to extract symbols for staged LTO builds on Windows

tmatheson added a comment. This looks like a nice addition. Would it make sense to use llvm-nm always, not restricted to bootstrap builds? And would that work on Windows and allow us to simplify this script substantially by using one tool for all platforms? Repository: rG LLVM Github Monorep

[PATCH] D146242: [ARM] Fixing ABI mismatch for packed structs and fields

tmatheson added a comment. LGTM, but I'm not that familiar with the code that selects the alignment so it would be good to get a second opinion. Comment at: clang/lib/CodeGen/TargetInfo.cpp:5806 if (!IsWinVariadic && isHomogeneousAggregate(Ty, Base, Members)) { if (Kin

[PATCH] D146242: [ARM] Fixing ABI mismatch for packed structs and fields

tmatheson added a comment. Looks sensible but I don't fully understand the context of the change. Please could you explain more what is wrong with the current behaviour, and which parts of the AAPCS you are referring to. Comment at: clang/lib/CodeGen/TargetInfo.cpp:5811 +

[PATCH] D145781: [AArch64] Don't #define __ARM_FP when there's no FPU.

tmatheson accepted this revision. tmatheson added a comment. LGTM Comment at: clang/lib/Basic/Targets/AArch64.h:29 - enum FPUModeEnum { FPUMode, NeonMode = (1 << 0), SveMode = (1 << 1) }; + enum FPUModeEnum { FPUMode = (1 << 0), NeonMode = (1 << 1), SveMode = (1 << 2) };

[PATCH] D145538: [NFC][AArch64] Document and improve FMV code.

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. LGTM, thanks for making these changes. Comment at: llvm/include/llvm/TargetParser/AArch64TargetParser.h:567-568 + +// For given features returns a mask to check if CPU

[PATCH] D142963: [AArch64] Handle negative architecture features

tmatheson added a comment. In D142963#4094545 , @andrewrk wrote: > Speaking as the one who filed the motivating bug report, all of the above > behaviors are fine. The motivating use case is explicitly specifying a //full > set// of enabled/disabled feat

[PATCH] D127812: [AArch64] FMV support and necessary target features dependencies.

tmatheson added a comment. This patch has made it considerably harder to understand what is going on in the TargetParser. If you get a chance, please could you add some clarifying comments and tidy-ups. I appreciate that a lot of this is following the lead of the pre-existing TargetParser code,

[PATCH] D142540: [NFC][AArch64] Get default features directly from ArchInfo and CpuInfo objects

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. Looks great, thanks Comment at: llvm/include/llvm/TargetParser/AArch64TargetParser.h:338 + + uint64_t getDefaultExtensions() const { +return DefaultExtensions | Ar

[PATCH] D142539: [NFC][AArch64] Use optional returns in target parser instead of 'invalid' objects

tmatheson added inline comments. Comment at: llvm/unittests/TargetParser/TargetParserTest.cpp:1456 + std::optional Extension = + AArch64::parseArchExtension(ArchExt); + if (!Extension) I think we still need to test getDefaultExtensions, unless we're deleti

[PATCH] D141404: [AArch64][Clang] Adjust default features for v8.9-A/v9.4-A in clang driver

tmatheson added inline comments. Comment at: clang/test/Driver/aarch64-cssc.c:11 +// RUN: %clang -S -o - -emit-llvm -target aarch64-none-none-eabi -march=armv9.4-a+cssc %s 2>&1 | FileCheck %s +// RUN: %clang -S -o - -emit-llvm -target aarch64-none-none-eabi -march=armv9.4-a+n

[PATCH] D138792: [AArch64] Improve TargetParser API

tmatheson added inline comments. Comment at: clang/lib/Basic/Targets/AArch64.cpp:532 getTargetDefinesARMV81A(Opts, Builder); -break; - case llvm::AArch64::ArchKind::ARMV8_2A: + if (*ArchInfo == llvm::AArch64::ARMV8_2A) getTargetDefinesARMV82A(Opts, Builder); -

[PATCH] D138792: [AArch64] Improve TargetParser API

tmatheson added a comment. Worth noting that this had to be reworked because both D127812 and D137838 went in since this was reverted. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.o

[PATCH] D138792: [AArch64] Improve TargetParser API

tmatheson added a comment. The most recent versions of this patch contains squashed changes from these reviews: - D139278 "[AArch64] Use string comparison for ArchInfo equality." This fixes the test failures with shared libraries, which were caused by each sh

[PATCH] D141404: [AArch64][Clang] Adjust default features for v8.9-A/v9.4-A in clang driver

tmatheson added a comment. I agree the approach in D141518 makes more sense Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D141404/new/ https://reviews.llvm.org/D141404

[PATCH] D140222: [AArch64] Check 128-bit Sysreg Builtins

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. Couple of nits, since you will be updating this anyway after dropping D140221 , otherwise LGTM. Comment at: clang/lib/Sema/SemaChecki

[PATCH] D138792: [AArch64] Improve TargetParser API

tmatheson added a comment. @MaskRay I reverted that commit because it broke important functionality (comparison by address) to fix an issue in an unsupported C++ version, it wasn't reviewed, and it was not clear from the commit message what it was fixing. I explained this in a comment on the or

[PATCH] D138792: [AArch64] Improve TargetParser API

tmatheson added inline comments. Comment at: llvm/include/llvm/Support/AArch64TargetParser.h:154-160 +// Create ArchInfo structs named +#define AARCH64_ARCH(MAJOR, MINOR, PROFILE, NAME, ID, ARCH_FEATURE, \ + ARCH_BASE_EXT)

[PATCH] D138792: [AArch64] Improve TargetParser API

tmatheson added a comment. Yes I will look into it and address the other comments when I have more time tomorrow or later this week. However I'm starting to think that the comparison by address is too easy to subtly break, and not immediately obvious to debug, and is therefore not worth it in t

[PATCH] D138792: [AArch64] Improve TargetParser API

tmatheson added a comment. @Hahnfeld, @mgorny I was able to reproduce the failures with LLVM_LINK_LLVM_DYLIB, and they are failing because the comparison is failing because copies are being created. I don't fully understand how but presumably we are still ending up with one object per shared li

[PATCH] D138792: [AArch64] Improve TargetParser API

tmatheson added a comment. In D138792#3966920 , @Hahnfeld wrote: > Hi, I bisected this change to lead to a couple of test failures when building > with `LLVM_LINK_LLVM_DYLIB`. In the past, this had to do with global variable > initialization order, but

[PATCH] D138792: [AArch64] Improve TargetParser API

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG450de8008bb0: [AArch64] Improve TargetParser API (authored by tmatheson). Changed prior to commit: https://reviews.llvm.org/D138792?vs=478617&id=4

[PATCH] D138753: [AArch64TargetParser] getArchFeatures -> getArchFeature

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGf57f086714bc: [AArch64TargetParser] getArchFeatures -> getArchFeature (authored by tmatheson). Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D138792: [AArch64] Improve TargetParser API

tmatheson marked an inline comment as done. tmatheson added a comment. Thanks for the review! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138792/new/ https://reviews.llvm.org/D138792 ___ cfe-commits ma

[PATCH] D138792: [AArch64] Improve TargetParser API

tmatheson updated this revision to Diff 478617. tmatheson added a comment. Rename AI -> ArchInfo and delete move constructor/assignment Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138792/new/ https://reviews.llvm.org/D138792 Files: clang/lib/B

[PATCH] D138753: [AArch64TargetParser] getArchFeatures -> getArchFeature

tmatheson updated this revision to Diff 478540. tmatheson added a comment. Reinstate unit test Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138753/new/ https://reviews.llvm.org/D138753 Files: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Driv

[PATCH] D138792: [AArch64] Improve TargetParser API

tmatheson created this revision. tmatheson added reviewers: lenary, pratlucas, dmgreen, tschuett, DavidSpickett, danielkiss. Herald added subscribers: hiraditya, kristof.beyls. Herald added a project: All. tmatheson requested review of this revision. Herald added subscribers: llvm-commits, cfe-com

[PATCH] D138753: [AArch64TargetParser] getArchFeatures -> getArchFeature

tmatheson added inline comments. Comment at: llvm/unittests/Support/TargetParserTest.cpp:1686 -TEST(TargetParserTest, AArch64ArchFeatures) { - std::vector Features; pratlucas wrote: > Can you keep a unit test covering the new version of the function? The old v

[PATCH] D138753: [AArch64TargetParser] getArchFeatures -> getArchFeature

tmatheson created this revision. tmatheson added reviewers: lenary, pratlucas, dmgreen, tschuett, DavidSpickett. Herald added subscribers: hiraditya, kristof.beyls. Herald added a project: All. tmatheson requested review of this revision. Herald added subscribers: llvm-commits, cfe-commits, MaskRay

[PATCH] D137836: [Support] Move getHostNumPhysicalCores to Threading.h

tmatheson accepted this revision. tmatheson added a comment. One thought about returning -1 but otherwise LGTM Comment at: llvm/lib/Support/Threading.cpp:59 if (MaxThreadCount <= 0) MaxThreadCount = 1; if (ThreadsRequested == 0) It looks like this is

[PATCH] D138579: [AArch64] Assembly support for FEAT_LRCPC3

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGa6aaa969f7ca: [AArch64] Assembly support for FEAT_LRCPC3 (authored by tmatheson). Changed prior to commit: https://reviews.llvm.org/D138579?vs=478

[PATCH] D138579: [AArch64] Assembly support for FEAT_LRCPC3

tmatheson updated this revision to Diff 478001. tmatheson marked 3 inline comments as done. tmatheson added a comment. Address comments and change instruction names Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138579/new/ https://reviews.llvm.org/

[PATCH] D138579: [AArch64] Assembly support for FEAT_LRCPC3

tmatheson created this revision. Herald added subscribers: hiraditya, kristof.beyls. Herald added a project: All. tmatheson requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. This patch implements assembly support for the 202

[PATCH] D138010: [AArch64][ARM] add Armv8.9-a/Armv9.4-a identifier support

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138010/new/ https://reviews.llvm.org/D138010 _

[PATCH] D138010: [AArch64][ARM] add Armv8.9-a/Armv9.4-a identifier support

tmatheson added inline comments. Comment at: llvm/include/llvm/Support/ARMTargetParser.def:127 + ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS | + ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM)) ARM_ARCH("armv9-a", ARMV9A, "9-A", "v9a", --

[PATCH] D137836: [Support] Move getHostNumPhysicalCores to Threading.h

tmatheson added a comment. Makes sense since it is so similar to `get_cpus()` and is only used in Threading. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D137836/new/ https://reviews.llvm.org/D137836 __

[PATCH] D137835: [ARM] Move ARM::parseBranchProtection into ARMTargetParser

tmatheson accepted this revision. tmatheson added inline comments. This revision is now accepted and ready to land. Comment at: clang/lib/Driver/ToolChains/Clang.cpp:47 #include "llvm/Option/ArgList.h" +#include "llvm/Support/ARMTargetParser.h" #include "llvm/Support/CodeGen.h"

[PATCH] D137564: [ARM] Move Triple::getARMCPUForArch into ARMTargetParser

This revision was automatically updated to reflect the committed changes. Closed by commit rG103bbddde66f: [ARM] Move Triple::getARMCPUForArch into ARMTargetParser (authored by tmatheson). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D137564/new/ ht

[PATCH] D137564: [ARM] Move Triple::getARMCPUForArch into ARMTargetParser

tmatheson created this revision. tmatheson added reviewers: lenary, pratlucas, DavidSpickett. Herald added subscribers: hiraditya, kristof.beyls, dschuff. Herald added a project: All. tmatheson requested review of this revision. Herald added subscribers: llvm-commits, lldb-commits, cfe-commits, Mas

[PATCH] D137517: [TargetSupport] Generate the defs for RISCV CPUs using llvm-tblgen.

tmatheson added inline comments. Comment at: llvm/lib/TargetSupport/CMakeLists.txt:2 + +set(LLVM_TARGET_DEFINITIONS ${CMAKE_SOURCE_DIR}/lib/Target/RISCV/RISCV.td) + Here `RISCVTargetSupportTableGen` depends on files in `lib/Target/RISCV`, meaning the folder stru

[PATCH] D132003: [clang][ARM][NFC] Clean up signed conversion and undefined macros in builtin header

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. LGTM, thanks! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132003/new/ https://reviews.llvm.org/D132003

[PATCH] D132003: [clang][ARM][NFC] Clean up signed conversion and undefined macros in builtin header

tmatheson added inline comments. Comment at: clang/lib/Headers/arm_acle.h:219 __revsh(int16_t __t) { - return __builtin_bswap16(__t); + return (int16_t)__builtin_bswap16((int16_t)__t); } Should the second cast be (uint16_t)__t? Repository: rG LLVM Github

[PATCH] D123296: [llvm][AArch64] Generate getExtensionFeatures from the list of extensions

tmatheson accepted this revision. tmatheson added inline comments. This revision is now accepted and ready to land. Comment at: llvm/unittests/Support/TargetParserTest.cpp:1474 EXPECT_FALSE(AArch64::getExtensionFeatures(AArch64::AEK_INVALID, Features)); EXPECT_TRUE(!Feature

[PATCH] D121093: [Driver][AArch64] Split up aarch64-cpus.c test further

tmatheson added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D121093/new/ https://reviews.llvm.org/D121093 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/c

[PATCH] D121093: [Driver][AArch64] Split up aarch64-cpus.c test further

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. Thanks for picking this up, LGTM Comment at: clang/test/Driver/aarch64-archs.c:296 -// NO-LS64-NOT: "-target-feature" "+ls64" -// LS64: "-target-feature" "+ls64" -

[PATCH] D120111: [AArch64] Default HBC/MOPS features in clang

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. LGTM, please give @nickdesaulniers some time to respond though. I do agree that iterating over the features repeatedly is less than ideal, but also that this patch is probably not the pl

[PATCH] D120111: [AArch64] Default HBC/MOPS features in clang

tmatheson requested changes to this revision. tmatheson added inline comments. This revision now requires changes to proceed. Comment at: clang/lib/Driver/ToolChains/Arch/AArch64.cpp:269 success = getAArch64MicroArchFeaturesFromMcpu( -D, getAArch64TargetCPU(Args, Tri

[PATCH] D116415: [Arm] Remove duplicate CPU tests

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG8aea5d5951dc: [Arm] Remove duplicate CPU tests (authored by tmatheson). Changed prior to commit: https://reviews.llvm.org/D116415?vs=396681&id=397

[PATCH] D116154: [ARM] Adding macros for coprocessor intrinsics as per ACLE

tmatheson updated this revision to Diff 397127. tmatheson added a comment. Combine V8 and V9 macros Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D116154/new/ https://reviews.llvm.org/D116154 Files: clang/lib/Basic/Targets/ARM.cpp clang/lib/Hea

[PATCH] D116154: [ARM] Adding macros for coprocessor intrinsics as per ACLE

tmatheson updated this revision to Diff 397071. tmatheson added a comment. Add 8.8 and 9.3; patches adding these were merged first in the end. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D116154/new/ https://reviews.llvm.org/D116154 Files: clan

[PATCH] D116159: [ARM][AArch64] clang support for Armv9.3-A

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG4435d1819efe: [ARM][AArch64] clang support for Armv9.3-A (authored by tmatheson). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D116159: [ARM][AArch64] clang support for Armv9.3-A

tmatheson updated this revision to Diff 397044. tmatheson added a comment. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D116159/new/ https://reviews.llvm.org/D116159 Files: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Basic/Targets/AAr

[PATCH] D115694: [ARM] Introduce an empty "armv8.8-a" architecture.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGd50072f74e3e: [ARM] Introduce an empty "armv8.8-a" architecture. (authored by simon_tatham, committed by tmatheson). Repository: rG LLVM Github Mo

[PATCH] D115694: [ARM] Introduce an empty "armv8.8-a" architecture.

tmatheson updated this revision to Diff 396780. tmatheson added a comment. Minor fix after rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115694/new/ https://reviews.llvm.org/D115694 Files: clang/lib/Basic/Targets/AArch64.cpp clang/lib/B

[PATCH] D115694: [ARM] Introduce an empty "armv8.8-a" architecture.

tmatheson updated this revision to Diff 396779. tmatheson added a comment. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115694/new/ https://reviews.llvm.org/D115694 Files: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Basic/Targets/AAr

[PATCH] D116415: [Arm] Remove duplicate CPU tests

tmatheson added reviewers: lenary, dmgreen, cpirker, olista01, vsukharev, SjoerdMeijer. tmatheson added a comment. Thanks for the review @nickdesaulniers. Adding a few more reviewers just to check that I'm not missing something. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D116415: [Arm] Remove duplicate CPU tests

tmatheson added inline comments. Comment at: clang/test/Driver/arm-cortex-cpus.c:217 // RUN: %clang -target arm -march=armv8.1-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V81A %s -// RUN: %clang -target arm -march=armv8.1a -mlittle-endian -### -c %s 2>&1 | FileCheck -che

[PATCH] D116159: [ARM][AArch64] clang support for Armv9.3-A

tmatheson added inline comments. Comment at: clang/test/Driver/arm-cortex-cpus.c:445 +// RUN: %clang -target armv9.3a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V93A %s +// RUN: %clang -target arm -march=armv9.3a -mlittle-endian -### -c %s 2>&1 | FileCheck

[PATCH] D116415: [Arm] Remove duplicate CPU tests

tmatheson created this revision. Herald added a subscriber: kristof.beyls. tmatheson requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. There are some duplicate test lines in clang/test/Driver/arm-cortex-cpus.c. Looks like these were duplicate

[PATCH] D116159: [ARM][AArch64] clang support for Armv9.3-A

tmatheson updated this revision to Diff 396679. tmatheson marked 2 inline comments as done. tmatheson added a comment. Remove redundancies in arm tests Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D116159/new/ https://reviews.llvm.org/D116159 File

[PATCH] D116160: [AArch64] ACLE feature macro for Armv8.8-A MOPS

tmatheson created this revision. Herald added a subscriber: kristof.beyls. tmatheson requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. This introduces the new `__ARM_FEATURE_MOPS` ACLE feature test macro, which signals the a

[PATCH] D116159: [ARM][AArch64] clang support for Armv9.3-A

tmatheson created this revision. Herald added a subscriber: kristof.beyls. tmatheson requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. This patch introduces support for targetting the Armv9.3-A architecture, which should map to the existing A

[PATCH] D116154: [ARM] Adding macros for coprocessor intrinsics as per ACLE

tmatheson created this revision. Herald added a subscriber: kristof.beyls. tmatheson requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Patch by Ranjeet Singh and Son Tuan Vu. Change-Id: Ic18ffda35760587673b30c166ac145b0df038973 Repository:

[PATCH] D116153: [ARM][AArch64] Add missing v8.x checks

tmatheson created this revision. Herald added a subscriber: kristof.beyls. tmatheson requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D116153 Files: clang/lib/Basic/Targets/A

[PATCH] D115694: [ARM] Introduce an empty "armv8.8-a" architecture.

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115694/new/ https://reviews.llvm.org/D115694 _

[PATCH] D114703: [AArch64] Use Feature for A53 Erratum 835769 Fix

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. Makes sense to me Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D114703/new/ https://reviews.llvm.org/D114703

[PATCH] D110065: [AArch64] Add support for the 'R' architecture profile.

tmatheson added inline comments. Comment at: clang/lib/Basic/Targets/AArch64.h:62 std::string ABI; + StringRef getArchProfile() const; tmatheson wrote: > The equivalent in the ARM backend is named `getCPUProfile` That's arguably a worse name though. CHANG

[PATCH] D110065: [AArch64] Add support for the 'R' architecture profile.

tmatheson added inline comments. Comment at: clang/lib/Basic/Targets/AArch64.h:62 std::string ABI; + StringRef getArchProfile() const; The equivalent in the ARM backend is named `getCPUProfile` CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110065/

[PATCH] D105498: [clang] Remove assumption about SourceLocation alignment.

tmatheson accepted this revision. tmatheson added a subscriber: efriedma. tmatheson added a comment. This revision is now accepted and ready to land. LGTM, but it would be good to have someone else comment on the increased number of allocations (maybe @rsmith or @efriedma?) Co

[PATCH] D105498: [clang] Remove assumption about SourceLocation alignment.

tmatheson added inline comments. Comment at: clang/lib/AST/DeclObjC.cpp:880-882 - unsigned Size = sizeof(ParmVarDecl *) * NumParams + - sizeof(SourceLocation) * SelLocs.size(); ParamsAndSelLocs = C.Allocate(Size); Since we know the number of

[PATCH] D105495: [clang] Make negative getLocWithOffset widening-safe.

tmatheson added a comment. I'm not a huge fan of this as an API; it is not obvious what the function and parameters do without reading the comment or implementation (e.g. whether `Offset` is ignored if `NegOffset` is given, and what it means to pass offsets to both). It moves the subtraction lo

[PATCH] D105491: [clang] Use i64 for the !srcloc metadata on asm IR nodes.

tmatheson added a comment. @dexonsmith I don't think they need upgraded. Most of the places I can see referencing `!srcloc` are copying it around and will preserve the i32 type. Cases which actually read the value are already reading it as 64 bit via `getZExtValue` and have been updated here, e

[PATCH] D105493: [clang] Change set type used for SourceLocation.

tmatheson added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105493/new/ https://reviews.llvm.org/D105493 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/c

[PATCH] D105492: [clang] Introduce SourceLocation::[U]IntType typedefs.

tmatheson added a comment. LGTM Comment at: clang/include/clang/Basic/SourceLocation.h:97 + using UIntType = uint32_t; + using IntType = int32_t; Nit: the `Ty` suffix seems to be slightly more common than `Type` Repository: rG LLVM Github Monorepo CHAN

[PATCH] D105491: [clang] Use i64 for the !srcloc metadata on asm IR nodes.

tmatheson added a comment. Looks sensible to me, I don't think slightly expanding the size of the metadata and the diagnostic will be an issue. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105491/new/ https://reviews.llvm.org/D105491 ___

[PATCH] D97187: [Clang][Sema] Warn when function argument is less aligned than parameter

tmatheson added a comment. I believe PR49534 was fixed by D98548 above Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D97187/new/ https://reviews.llvm.org/D97187 ___ cfe-c

[PATCH] D101606: [ARM][MVE] vcreateq lane ordering for big endian

This revision was automatically updated to reflect the committed changes. Closed by commit rGb14a6f06cc87: [ARM][MVE] vcreateq lane ordering for big endian (authored by tmatheson). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D101606/new/ https://re

[PATCH] D101606: [ARM][MVE] vcreateq lane ordering for big endian

tmatheson marked 2 inline comments as done. tmatheson added a comment. In D101606#2728320 , @dmgreen wrote: > Sounds good to me. > > Whilst we are here, are any of the other uses of bitcast in arm_mve.td > potentially a problem? I took a quick look and b

[PATCH] D101606: [ARM][MVE] vcreateq lane ordering for big endian

tmatheson updated this revision to Diff 341823. tmatheson added a comment. Use --check-prefixes=CHECK,CHECK-BE etc to combine common blocks. Sorry for the churn. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D101606/new/ https://reviews.llvm.org/D10

[PATCH] D101606: [ARM][MVE] vcreateq lane ordering for big endian

tmatheson updated this revision to Diff 341819. tmatheson added a comment. remove old check lines that were not automatically removed Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D101606/new/ https://reviews.llvm.org/D101606 Files: clang/include

[PATCH] D101606: [ARM][MVE] vcreateq lane ordering for big endian

tmatheson updated this revision to Diff 341818. tmatheson edited the summary of this revision. tmatheson added a comment. Use update_cc_test_checks Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D101606/new/ https://reviews.llvm.org/D101606 Files:

[PATCH] D101606: [ARM][MVE] vcreateq lane ordering for big endian

tmatheson added inline comments. Comment at: clang/test/CodeGen/arm-mve-intrinsics/admin.c:66 // CHECK-NEXT:[[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1 // CHECK-NEXT:ret <2 x i64> [[TMP1]] // MarkMurrayARM wrote: > dmgreen wr

[PATCH] D101606: [ARM] vcreateq lane ordering for big endian

tmatheson created this revision. Herald added subscribers: danielkiss, dmgreen, kristof.beyls. tmatheson requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Use of bitcast resulted in lanes being swapped for vcreateq with big endian. Fix this b

[PATCH] D98548: [clang][Sema] Don't try to initialize implicit variable of invalid anonymous union/struct

tmatheson accepted this revision. tmatheson added a comment. This revision is now accepted and ready to land. That makes sense, you are correct that that warning is not prevented. I'm not sure what I did differently when I checked. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D98548: [clang][Sema] Don't try to initialize implicit variable of invalid anonymous union/struct

tmatheson added a comment. This seems quite an early point to bail out, so it will prevent some errors/warnings associated with initialization from being emitted. For example, this warning is currently emitted but would be suppressed by this patch: union { virtual int a(); int b = 'c'

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