[clang] [Clang][OpenCL][AMDGPU] Use `byref` for aggregate OpenCL kernel arguments (PR #134892)

2025-04-13 Thread Shilei Tian via cfe-commits
https://github.com/shiltian closed https://github.com/llvm/llvm-project/pull/134892 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AMDGPU] vmem-to-lds-load-insts incoherence between TargetParser and AMDGPU.td (PR #135376)

2025-04-11 Thread Shilei Tian via cfe-commits
https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/135376 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AMDGPU][Clang] Add builtins for gfx12 ray tracing intrinsics (PR #135224)

2025-04-11 Thread Shilei Tian via cfe-commits
https://github.com/shiltian closed https://github.com/llvm/llvm-project/pull/135224 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AMDGPU][Clang] Add builtins for gfx12 ray tracing intrinsics (PR #135224)

2025-04-10 Thread Shilei Tian via cfe-commits
shiltian wrote: FWIW, this is part of the gfx12 upstream. https://github.com/llvm/llvm-project/pull/135224 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AMDGPU][Clang] Add builtins for gfx12 ray tracing intrinsics (PR #135224)

2025-04-10 Thread Shilei Tian via cfe-commits
https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/135224 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AMDGPU][Clang] Add builtins for gfx12 ray tracing intrinsics (PR #135224)

2025-04-10 Thread Shilei Tian via cfe-commits
shiltian wrote: * **#135224** https://app.graphite.dev/github/pr/llvm/llvm-project/135224?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/135

[clang] [AMDGPU][Clang] Add builtins for gfx12 ray tracing intrinsics (PR #135224)

2025-04-10 Thread Shilei Tian via cfe-commits
https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/135224 __builtin_amdgcn_image_bvh8_intersect_ray __builtin_amdgcn_image_bvh_dual_intersect_ray For the above two builtins, the second and third return values of the intrinsics are returned through pointer-type functio

[clang] [Clang][AMDGPU] Accept builtins in lambda declarations (PR #135027)

2025-04-09 Thread Shilei Tian via cfe-commits
@@ -27,7 +27,7 @@ bool SemaAMDGPU::CheckAMDGCNBuiltinFunctionCall(unsigned BuiltinID, // position of memory order and scope arguments in the builtin unsigned OrderIndex, ScopeIndex; - const auto *FD = SemaRef.getCurFunctionDecl(); + const auto *FD = SemaRef.getCurFuncti

[clang] [Clang][OpenCL][AMDGPU] Use `byref` for OpenCL kernel arguments (PR #134892)

2025-04-08 Thread Shilei Tian via cfe-commits
shiltian wrote: > The question isn't byval or byref, we already don't use byval. The important > ABI piece is the alignment of a pointer value passed indirectly. > > We lose all parameter attributes by going through indirect passing, but some > of those can be recovered by putting the metadata

[clang] [Clang][OpenCL][AMDGPU] Use `byref` for OpenCL kernel arguments (PR #134892)

2025-04-08 Thread Shilei Tian via cfe-commits
https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/134892 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] clang/AMDGPU: Stop looking for hip.bc in device libs (PR #134801)

2025-04-08 Thread Shilei Tian via cfe-commits
https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/134801 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][OpenCL][AMDGPU] Use `byref` for OpenCL kernel arguments (PR #134892)

2025-04-08 Thread Shilei Tian via cfe-commits
shiltian wrote: * **#134892** https://app.graphite.dev/github/pr/llvm/llvm-project/134892?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/134

[clang] [Clang][OpenCL][AMDGPU] Use `byref` for OpenCL kernel arguments (PR #134892)

2025-04-08 Thread Shilei Tian via cfe-commits
https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/134892 Due to a previous workaround allowing kernels to be called from other functions, Clang currently doesn't use the `byref` attribute for aggregate kernel arguments. The issue was recently resolved in https://githu

[clang] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP (PR #134476)

2025-04-08 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/134476 >From d508aa41f7eb7767953c3eec745300c678029c04 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Tue, 8 Apr 2025 10:47:47 -0400 Subject: [PATCH] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP

[clang] [Clang][AMDGPU] Improve error message when device libraries for COV6 are missing (PR #134745)

2025-04-08 Thread Shilei Tian via cfe-commits
https://github.com/shiltian closed https://github.com/llvm/llvm-project/pull/134745 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang] Unify 'nvptx-arch' and 'amdgpu-arch' into 'offload-arch' (PR #134713)

2025-04-07 Thread Shilei Tian via cfe-commits
@@ -0,0 +1,78 @@ +//===- OffloadArch.cpp - list available GPUs *- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP (PR #134476)

2025-04-06 Thread Shilei Tian via cfe-commits
shiltian wrote: Hmm, the failure is weird. I can't reproduce it locally. Change it to something else and hopefully this can "resolve" the issue. https://github.com/llvm/llvm-project/pull/134476 ___ cfe-commits mailing list cfe-commits@lists.llvm.org h

[clang] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP (PR #134476)

2025-04-06 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/134476 >From b537a910f5869c9267ba20793d1531d63a205fdb Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Sun, 6 Apr 2025 11:24:24 -0400 Subject: [PATCH] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP

[clang] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP (PR #134476)

2025-04-06 Thread Shilei Tian via cfe-commits
shiltian wrote: https://github.com/llvm/llvm-project/pull/134541 resolves the missing `__assert_fail` issue. https://github.com/llvm/llvm-project/pull/134476 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailma

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

2025-04-05 Thread Shilei Tian via cfe-commits
https://github.com/shiltian closed https://github.com/llvm/llvm-project/pull/122629 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AMDGPU] Remove outdated COV6 warning (PR #132814)

2025-04-05 Thread Shilei Tian via cfe-commits
shiltian wrote: * **#132814** https://app.graphite.dev/github/pr/llvm/llvm-project/132814?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/132

[clang] [llvm] [Clang][AMDGPU] Add __builtin_amdgcn_cvt_off_f32_i4 (PR #133741)

2025-04-05 Thread Shilei Tian via cfe-commits
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel

[clang] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP (PR #134476)

2025-04-04 Thread Shilei Tian via cfe-commits
shiltian wrote: * **#134476** https://app.graphite.dev/github/pr/llvm/llvm-project/134476?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/134

[clang] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP (PR #134476)

2025-04-04 Thread Shilei Tian via cfe-commits
https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/134476 In HIP, the Clang driver already sets `force-import-all` when ThinLTO is enabled. As a result, all imported functions get the `available_externally` linkage. However, these functions are later removed by the `El

[clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)

2025-04-04 Thread Shilei Tian via cfe-commits
https://github.com/shiltian commented: This is worth a release note item. https://github.com/llvm/llvm-project/pull/134016 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [flang] [llvm] [AMDGPU] Use a target feature to enable __builtin_amdgcn_global_load_lds on gfx9/10 (PR #133055)

2025-04-04 Thread Shilei Tian via cfe-commits
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= Message-ID: In-Reply-To: https://github.com/shiltian approved this pull request. https://github.com/llv

[clang] [llvm] [Clang][AMDGPU] Add __builtin_amdgcn_cvt_off_f32_i4 (PR #133741)

2025-04-04 Thread Shilei Tian via cfe-commits
shiltian wrote: Why this lowering? We have a table right? https://github.com/llvm/llvm-project/pull/133741 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

2025-04-02 Thread Shilei Tian via cfe-commits
shiltian wrote: @asb I did receive some emails initially but haven't gotten any lately. I assumed that issue had been fixed, as it seemed like the driver was just unconditionally adding `unknown`. https://github.com/llvm/llvm-project/pull/122629 ___

[clang] [llvm] [Clang][AMDGPU] Add __builtin_amdgcn_cvt_off_f32_i4 (PR #133741)

2025-04-02 Thread Shilei Tian via cfe-commits
Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?=

[clang] [libc] [llvm] [AMDGPU] Use COV6 by default (PR #118515)

2025-03-31 Thread Shilei Tian via cfe-commits
shiltian wrote: > @shiltian Could you update MLIR infrastructure for the new default as well? > `mlir/lib/Target/LLVM/ROCDL/Target.cpp` and > `mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp`, which both keep an ear on the > ABI version, partly for linking in device libraries https://github.com/l

[clang] [flang] [llvm] [AMDGPU] Use a target feature to enable __builtin_amdgcn_global_load_lds on gfx9/10 (PR #133055)

2025-03-28 Thread Shilei Tian via cfe-commits
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= Message-ID: In-Reply-To: @@ -0,0 +1,45 @@ +; RUN: split-file %s %t shiltian wrote: This is an interesting thing that I learned from this PR. :-) https://github.com/l

[clang] [Clang] Handle `-flto-partitions` generically and forward it properly (PR #133283)

2025-03-27 Thread Shilei Tian via cfe-commits
https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/133283 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [libc] [Clang] Make `--lto-partitions` only default for HIP (PR #133164)

2025-03-26 Thread Shilei Tian via cfe-commits
https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/133164 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [libc] [Clang] Make `--lto-partitions` only default for HIP (PR #133164)

2025-03-26 Thread Shilei Tian via cfe-commits
@@ -21,7 +21,7 @@ // RUN: %clang -### --target=amdgcn-amd-amdhsa -mcpu=gfx90a:xnack+:sramecc- -nogpulib \ // RUN: -L. -flto -fconvergent-functions %s 2>&1 | FileCheck -check-prefix=LTO %s // LTO: clang{{.*}} "-flto=full"{{.*}}"-fconvergent-functions" -// LTO: ld.lld{{.*}}"

[clang] [libc] [Clang] Make `--lto-partitions` only default for HIP (PR #133164)

2025-03-26 Thread Shilei Tian via cfe-commits
@@ -38,17 +38,3 @@ // RUN: %clang -target amdgcn-amd-amdhsa -march=gfx90a -stdlib -startfiles \ // RUN: -nogpulib -nogpuinc -### %s 2>&1 | FileCheck -check-prefix=STARTUP %s // STARTUP: ld.lld{{.*}}"-lc" "-lm" "{{.*}}crt1.o" - -// Check --flto-partitions - -// RUN: %clang -##

[clang] [libc] [Clang] Make `--lto-partitions` only default for HIP (PR #133164)

2025-03-26 Thread Shilei Tian via cfe-commits
@@ -33,14 +33,8 @@ function(add_startup_object name) set_target_properties(${fq_target_name}.exe PROPERTIES RUNTIME_OUTPUT_DIRECTORY ${LIBC_LIBRARY_DIR} RUNTIME_OUTPUT_NAME ${name}.o) -# FIXME: A bug in the AMDGPU LTO pass is incorrectly removing the kernels

[clang] [compiler-rt] [libc] [llvm] [Clang][AMDGPU] Remove special handling for COV4 libraries (PR #132870)

2025-03-24 Thread Shilei Tian via cfe-commits
@@ -62,62 +62,23 @@ Value *EmitAMDGPUImplicitArgPtr(CodeGenFunction &CGF) { /// Emit code based on Code Object ABI version. /// COV_4: Emit code to use dispatch ptr shiltian wrote: this as well https://github.com/llvm/llvm-project/pull/132870 _

[clang] [AMDGPU] Remove outdated COV6 warning (PR #132814)

2025-03-24 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/132814 >From c1f916c5cb19c1a816737dbb5cf21e5ac1636de3 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 24 Mar 2025 15:11:55 -0400 Subject: [PATCH 1/2] [AMDGPU] Remove outdated COV6 warning --- clang/include/cla

[clang] [AMDGPU] Remove outdated COV6 warning (PR #132814)

2025-03-24 Thread Shilei Tian via cfe-commits
https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/132814 None >From c1f916c5cb19c1a816737dbb5cf21e5ac1636de3 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 24 Mar 2025 15:11:55 -0400 Subject: [PATCH] [AMDGPU] Remove outdated COV6 warning --- clang/include/c

[clang] [clang][AMDGPU] Enable module splitting by default (PR #128509)

2025-03-24 Thread Shilei Tian via cfe-commits
https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/128509 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [clang][IR] Overload @llvm.thread.pointer to support non-AS0 targets (PR #132489)

2025-03-22 Thread Shilei Tian via cfe-commits
shiltian wrote: > (assuming this intrinsic is supported there) The intrinsic is at least not supported by AMDGPU. :-) https://github.com/llvm/llvm-project/pull/132489 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-b

[clang] [lld] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-21 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/131557 >From b19ed2cc2896b9116264681ea45872c89f605c6c Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 17 Mar 2025 13:52:06 -0400 Subject: [PATCH 1/3] [DataLayout] Introduce sentinel pointer value MIME-Version: 1

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

2025-03-21 Thread Shilei Tian via cfe-commits
https://github.com/shiltian closed https://github.com/llvm/llvm-project/pull/130963 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-21 Thread Shilei Tian via cfe-commits
https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/131557 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

2025-03-21 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/130963 >From 61eac4e7d7f8604021f67c48384f8c09bedd647f Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Fri, 21 Mar 2025 12:16:30 -0400 Subject: [PATCH] Reapply "[AMDGPU] Use COV6 by default (#118515)" This reverts co

[clang] [llvm] [Clang][AMDGPU] Expose buffer load lds as a clang builtin (PR #132048)

2025-03-20 Thread Shilei Tian via cfe-commits
Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?= Message-ID: In-Reply-To: shiltian wrote: > I've also seen that gfx11 seem to have some kind of BUFFER_LOAD_LDS_(SIZE) > instruction (different from the BUFFER_LOAD_(SIZE)_LDS instructions > associated with th

[clang] [NFC][clang] Split clang/lib/CodeGen/CGBuiltin.cpp into target-specific files (PR #132252)

2025-03-20 Thread Shilei Tian via cfe-commits
https://github.com/shiltian commented: I'm super happy to see this change. The AMDGPU part looks good to me! Thanks! https://github.com/llvm/llvm-project/pull/132252 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

2025-03-20 Thread Shilei Tian via cfe-commits
shiltian wrote: Yeah, that needs to be fixed. The command line argument is `--target=hexagon-unknown-elf-unknown`, which is a valid target triple, but the error is `hexagon-unknown-unknown-elf-unknown`. That definitely exposes the issue in the compiler driver. https://github.com/llvm/llvm-pro

[clang] [llvm] [Clang][AMDGPU] Expose buffer load lds as a clang builtin (PR #132048)

2025-03-19 Thread Shilei Tian via cfe-commits
@@ -162,6 +162,8 @@ BUILTIN(__builtin_amdgcn_raw_buffer_load_b64, "V2UiQbiiIi", "n") BUILTIN(__builtin_amdgcn_raw_buffer_load_b96, "V3UiQbiiIi", "n") BUILTIN(__builtin_amdgcn_raw_buffer_load_b128, "V4UiQbiiIi", "n") +BUILTIN(__builtin_amdgcn_raw_ptr_buffer_load_lds, "vQbv*3IU

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

2025-03-19 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/130963 >From 576596fb09e3f497858da0f922d746914a0c5c3d Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Wed, 12 Mar 2025 09:39:45 -0400 Subject: [PATCH] Reapply "[AMDGPU] Use COV6 by default (#118515)" This reverts co

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

2025-03-18 Thread Shilei Tian via cfe-commits
shiltian wrote: It seems like some targets add "-unknown" in the compiler driver. ``` + /local/mnt/workspace/bots/hexagon-build-02/clang-hexagon-elf/stage1/bin/clang --target=hexagon-unknown-elf-unknown -fverbose-asm -g -S /local/mnt/workspace/bots/hexagon-build-02/clang-hexagon-elf/llvm/clan

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

2025-03-18 Thread Shilei Tian via cfe-commits
shiltian wrote: It seems like for some targets the compiler doesn't accept a 4-field triple. Why is that? ``` clang: error: version 'elf-unknown' in target triple 'hexagon-unknown-unknown-elf-unknown' is invalid clang: error: version '-unknown' in target triple 'riscv64-unknown-linux-gnu-unkn

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

2025-03-18 Thread Shilei Tian via cfe-commits
shiltian wrote: > > The OpenMP runtime doesn't know how to handle `generic` ISAs right? > > I don't understand why that is tied to the version It is probably no longer tied to the version since we no longer build one device runtime per target. https://github.com/llvm/llvm-project/pull/130963

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

2025-03-17 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/122629 >From 36c15623d308ecacdfe1fdd18a085dfd3d5c2712 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 17 Mar 2025 12:31:06 -0400 Subject: [PATCH 1/4] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to s

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-17 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/131557 >From 015964e72ebc223bcd191ceb306de8fdbca360f3 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 17 Mar 2025 13:52:06 -0400 Subject: [PATCH] [DataLayout] Introduce sentinel pointer value MIME-Version: 1.0 C

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-17 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/131557 >From efda127ecd06ea966df89425d10bd837c0cafe4e Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Mon, 17 Mar 2025 13:45:09 +0900 Subject: [PATCH] [DataLayout] Introduce sentinel pointer value MIME-Version: 1.

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-17 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/131557 >From 053949d4dd8f28a2daa57a6143f0267c0bd3af6c Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Mon, 17 Mar 2025 13:45:09 +0900 Subject: [PATCH 1/2] [LoopVectorize] Add test for follow-up metadata for loops

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

2025-03-17 Thread Shilei Tian via cfe-commits
@@ -84,31 +84,27 @@ OffloadTargetInfo::OffloadTargetInfo(const StringRef Target, : BundlerConfig(BC) { // TODO: Add error checking from ClangOffloadBundler.cpp - auto TargetFeatures = Target.split(':'); - auto TripleOrGPU = TargetFeatures.first.rsplit('-'); - - if (cl

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

2025-03-17 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/122629 >From ab66262e163a8c63c980d8298480556aad9c5b4c Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 17 Mar 2025 12:31:06 -0400 Subject: [PATCH 1/3] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to s

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

2025-03-17 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/122629 >From 16509121603e55539a5fa26420343d74c39b7963 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 17 Mar 2025 12:31:06 -0400 Subject: [PATCH 1/2] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to s

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

2025-03-17 Thread Shilei Tian via cfe-commits
@@ -84,31 +84,27 @@ OffloadTargetInfo::OffloadTargetInfo(const StringRef Target, : BundlerConfig(BC) { // TODO: Add error checking from ClangOffloadBundler.cpp - auto TargetFeatures = Target.split(':'); - auto TripleOrGPU = TargetFeatures.first.rsplit('-'); - - if (cl

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-17 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/131557 >From 4b8a0c7dc3b9229f43643b2f2937e0607bc0a9c8 Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Mon, 17 Mar 2025 13:45:09 +0900 Subject: [PATCH 1/2] [LoopVectorize] Add test for follow-up metadata for loops

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

2025-03-17 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/122629 >From 16509121603e55539a5fa26420343d74c39b7963 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 17 Mar 2025 12:31:06 -0400 Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to suppo

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-17 Thread Shilei Tian via cfe-commits
@@ -552,6 +553,11 @@ class DataLayout { /// /// This includes an explicitly requested alignment (if the global has one). Align getPreferredAlign(const GlobalVariable *GV) const; + + /// Returns the sentinel pointer value for a given address space. If the + /// address s

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-17 Thread Shilei Tian via cfe-commits
@@ -3143,7 +3143,10 @@ as follows: specified, the default index size is equal to the pointer size. All sizes are in bits. The address space, ``n``, is optional, and if not specified, denotes the default address space 0. The value of ``n`` must be -in the range [

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-17 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/131557 >From bb54cbae9ce77de810736bfb1502e99fccf5a24a Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Sun, 16 Mar 2025 23:51:02 -0400 Subject: [PATCH 1/2] [DataLayout] Introduce sentinel pointer value MIME-Version: 1

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-16 Thread Shilei Tian via cfe-commits
@@ -32,9 +32,9 @@ static const char *const DataLayoutStringR600 = "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1"; static const char *const DataLayoutStringAMDGCN = -"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32" -"-p7:160:25

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-16 Thread Shilei Tian via cfe-commits
@@ -32,9 +32,9 @@ static const char *const DataLayoutStringR600 = "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1"; static const char *const DataLayoutStringAMDGCN = -"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32" -"-p7:160:25

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-16 Thread Shilei Tian via cfe-commits
shiltian wrote: > This needs an RFC. For reference a previous attempt was at #83109 The RFC was posted, as mentioned in a previous comment. https://github.com/llvm/llvm-project/pull/131557 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https:

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-16 Thread Shilei Tian via cfe-commits
https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/131557 The value of a null pointer is not always `0`. For example, on AMDGPU, the null pointer in address spaces 3 and 5 is `0x`. Currently, there is no target-independent way to get this information, making it

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-16 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/131557 >From 86cd48c8f43b34d9fee97137db8abe6454d76268 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Sun, 16 Mar 2025 23:51:02 -0400 Subject: [PATCH] [DataLayout] Introduce sentinel pointer value MIME-Version: 1.0 C

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-16 Thread Shilei Tian via cfe-commits
shiltian wrote: The RFC is posted https://discourse.llvm.org/t/rfc-introduce-sentinel-pointer-value-to-datalayout/85265. https://github.com/llvm/llvm-project/pull/131557 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cg

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

2025-03-16 Thread Shilei Tian via cfe-commits
shiltian wrote: * **#131557** https://app.graphite.dev/github/pr/llvm/llvm-project/131557?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/131

[clang] [flang] [llvm] [NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() (PR #131379)

2025-03-15 Thread Shilei Tian via cfe-commits
shiltian wrote: > I wonder if we should just make all of these `isAMDGPU()` as well. No at the moment, since we still support r600. https://github.com/llvm/llvm-project/pull/131379 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.

[clang] [flang] [llvm] [NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() (PR #131379)

2025-03-14 Thread Shilei Tian via cfe-commits
https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/131379 This is an extension of #131357. Hopefully this would be the last one. >From 59bc234d4a5c343e093417150688a3231a230961 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Fri, 14 Mar 2025 15:06:30 -0400 Subject: [

[clang] [flang] [llvm] [NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() (PR #131379)

2025-03-14 Thread Shilei Tian via cfe-commits
https://github.com/shiltian closed https://github.com/llvm/llvm-project/pull/131379 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [flang] [llvm] [NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() (PR #131379)

2025-03-14 Thread Shilei Tian via cfe-commits
shiltian wrote: * **#131379** https://app.graphite.dev/github/pr/llvm/llvm-project/131379?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/131

[clang] [flang] [llvm] [NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() (PR #131379)

2025-03-14 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/131379 >From 59bc234d4a5c343e093417150688a3231a230961 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Fri, 14 Mar 2025 15:06:30 -0400 Subject: [PATCH 1/2] [NFC][AMDGPU] Replace more direct arch comparison with isAMD

[clang] [Clang][OpenCL] Fix Missing `-fdeclare-opencl-builtins` When Using `--save-temps` (PR #131017)

2025-03-12 Thread Shilei Tian via cfe-commits
https://github.com/shiltian closed https://github.com/llvm/llvm-project/pull/131017 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][OpenCL] Fix Missing `-fdeclare-opencl-builtins` When Using `--save-temps` (PR #131017)

2025-03-12 Thread Shilei Tian via cfe-commits
shiltian wrote: Yeah these are implemented in bitcode file, therefore it needs the front end to be able to recognize it instead of treating it as an unknown symbol. https://github.com/llvm/llvm-project/pull/131017 ___ cfe-commits mailing list cfe-comm

[clang] [Clang][OpenCL] Fix Missing `-fdeclare-opencl-builtins` When Using `--save-temps` (PR #131017)

2025-03-12 Thread Shilei Tian via cfe-commits
https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/131017 When compiling an OpenCL program directly with `clang` using `--save-temps`, an error may occur if the program contains OpenCL builtins: ``` test.cl:3:21: error: use of undeclared identifier 'get_global_id'

[clang] [Clang][OpenCL] Fix Missing `-fdeclare-opencl-builtins` When Using `--save-temps` (PR #131017)

2025-03-12 Thread Shilei Tian via cfe-commits
shiltian wrote: * **#131017** https://app.graphite.dev/github/pr/llvm/llvm-project/131017?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/131

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

2025-03-12 Thread Shilei Tian via cfe-commits
shiltian wrote: > The OpenMP runtime doesn't know how to handle `generic` ISAs right? I think people are working on it? https://github.com/llvm/llvm-project/pull/130963 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

2025-03-12 Thread Shilei Tian via cfe-commits
shiltian wrote: > > CC @jdoerfert @ye-luo Once this is merged, ROCm 6.3 will be needed to run > > any program compiled for AMDGPU. > > Unless you pass `-mcode-object-version=5` right? Yes. https://github.com/llvm/llvm-project/pull/130963 ___ cfe-com

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

2025-03-12 Thread Shilei Tian via cfe-commits
shiltian wrote: CC @jdoerfert @ye-luo Once this is merged, ROCm 6.3 will be needed to run any program compiled for AMDGPU. https://github.com/llvm/llvm-project/pull/130963 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

2025-03-12 Thread Shilei Tian via cfe-commits
shiltian wrote: We will need to wait for the AMD bots to be ready. https://github.com/llvm/llvm-project/pull/130963 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

2025-03-12 Thread Shilei Tian via cfe-commits
shiltian wrote: * **#130963** https://app.graphite.dev/github/pr/llvm/llvm-project/130963?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/130

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

2025-03-12 Thread Shilei Tian via cfe-commits
https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/130963 This reverts commit 68bcba6d7a1cc18996c0bcb7c62267c62d2040d0. >From 0f831a4a78fefcdf0ac973173397325a1f53d393 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Wed, 12 Mar 2025 09:39:45 -0400 Subject: [PATCH] Re

[clang] [clang][AMDGPU] Enable module splitting by default (PR #128509)

2025-03-11 Thread Shilei Tian via cfe-commits
shiltian wrote: I'm okay with this change, but did you run a PSDB or even a full testing cycle? https://github.com/llvm/llvm-project/pull/128509 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe

[clang] [Clang][OpenCL][AMDGPU] Allow a kernel to call another kernel (PR #115821)

2025-03-10 Thread Shilei Tian via cfe-commits
@@ -1582,6 +1582,26 @@ void CodeGenFunction::GenerateCode(GlobalDecl GD, llvm::Function *Fn, // Implicit copy-assignment gets the same special treatment as implicit // copy-constructors. emitImplicitAssignmentOperatorBody(Args); + } else if (FD->hasAttr() && +

[clang] [Offload] Always consider `flto` on for AMDGPU (PR #129118)

2025-02-27 Thread Shilei Tian via cfe-commits
shiltian wrote: We do have some framework teams that are still using non-LTO (or non-gpu-rdc) build. https://github.com/llvm/llvm-project/pull/129118 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listin

[clang] [llvm] [Clang][AMDGPU] Use 32-bit index for SWMMAC builtins (PR #129101)

2025-02-27 Thread Shilei Tian via cfe-commits
https://github.com/shiltian closed https://github.com/llvm/llvm-project/pull/129101 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Clang][AMDGPU] Use 32-bit index for SWMMAC builtins (PR #129101)

2025-02-27 Thread Shilei Tian via cfe-commits
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/129101 >From daec69f37a9b10f4bcf258f3a6f9e45cee72b64d Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Thu, 27 Feb 2025 14:00:05 -0500 Subject: [PATCH] [AMDGPU] Use 32-bit index for SWMMAC builtins Currently, the ind

[clang] [llvm] [Clang][AMDGPU] Use 32-bit index for SWMMAC builtins (PR #129101)

2025-02-27 Thread Shilei Tian via cfe-commits
https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/129101 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AMDGPU] Use 32-bit index for SWMMAC builtins (PR #129101)

2025-02-27 Thread Shilei Tian via cfe-commits
https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/129101 Currently, the index of SWMMAC builtins is of type `short`, likely based on the assumption that K can only be up to 32, meaning there are only 16 non-zero elements. However, this is not future-proof. This patch

[clang] [llvm] [AMDGPU] Use 32-bit index for SWMMAC builtins (PR #129101)

2025-02-27 Thread Shilei Tian via cfe-commits
shiltian wrote: * **#129101** https://app.graphite.dev/github/pr/llvm/llvm-project/129101?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/129

[clang] [clang][AMDGPU] Enable module splitting by default (PR #128509)

2025-02-25 Thread Shilei Tian via cfe-commits
@@ -708,6 +712,34 @@ void amdgpu::getAMDGPUTargetFeatures(const Driver &D, options::OPT_m_amdgpu_Features_Group); } +static unsigned GetFullLTOPartitions(const Driver &D, const ArgList &Args) { + const Arg *A = Args.getLastArg(options::OPT_flto_par

[clang] [clang][AMDGPU] Enable module splitting by default (PR #128509)

2025-02-25 Thread Shilei Tian via cfe-commits
@@ -708,6 +712,34 @@ void amdgpu::getAMDGPUTargetFeatures(const Driver &D, options::OPT_m_amdgpu_Features_Group); } +static unsigned GetFullLTOPartitions(const Driver &D, const ArgList &Args) { + const Arg *A = Args.getLastArg(options::OPT_flto_par

[clang] [clang][AMDGPU] Enable module splitting by default (PR #128509)

2025-02-25 Thread Shilei Tian via cfe-commits
@@ -708,6 +712,34 @@ void amdgpu::getAMDGPUTargetFeatures(const Driver &D, options::OPT_m_amdgpu_Features_Group); } +static unsigned GetFullLTOPartitions(const Driver &D, const ArgList &Args) { shiltian wrote: ```suggestion static

[clang] [clang][AMDGPU] Enable module splitting by default (PR #128509)

2025-02-25 Thread Shilei Tian via cfe-commits
@@ -7417,7 +7419,7 @@ def fuse_register_sized_bitfield_access: Flag<["-"], "fuse-register-sized-bitfie def relaxed_aliasing : Flag<["-"], "relaxed-aliasing">, HelpText<"Turn off Type Based Alias Analysis">, MarshallingInfoFlag>; -defm pointer_tbaa: BoolOption<"", "pointer-

  1   2   3   4   5   6   7   8   9   10   >