@@ -12062,32 +12154,56 @@ bool
OpenMPAtomicCompareCaptureChecker::checkForm3(IfStmt *S,
X = BO->getLHS();
D = BO->getRHS();
- auto *Cond = dyn_cast(S->getCond());
- if (!Cond) {
+ if (auto *Cond = dyn_cast(S->getCond())) {
+C = Cond;
+if (Cond->getOpcode() != B
@@ -991,3 +991,34 @@ int mixed() {
// expected-note@+1 {{in instantiation of function template specialization
'mixed' requested here}}
return mixed();
}
+
+#ifdef OMP51
+struct U {};
+struct U operator<(U, U);
+struct U operator>(U, U);
+struct U operator==(U, U);
+
+templ
https://github.com/jdoerfert closed
https://github.com/llvm/llvm-project/pull/139344
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https://github.com/jdoerfert created
https://github.com/llvm/llvm-project/pull/139344
We are missing a few declerative directives in the parser for executable and
declerative directives causing us to error out if they are inside of functions.
This adds support for begin/end declare variant by
https://github.com/jdoerfert closed
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https://github.com/llvm/llvm-project/pull/139287
Rate limit ยท GitHub
body {
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https://github.com/jdoerfert updated
https://github.com/llvm/llvm-project/pull/139287
>From 4ae732bc3cb75a694e0c527a323459dfe048ea2e Mon Sep 17 00:00:00 2001
From: Johannes Doerfert
Date: Fri, 9 May 2025 09:10:39 -0700
Subject: [PATCH] [OpenMP] implementation set triggers elision for begin
dec
https://github.com/jdoerfert created
https://github.com/llvm/llvm-project/pull/139287
The device and implementation set should trigger elision of tokens if they do
not match statically in a begin/end declare variant. This simply extends the
logic from the device set only and includes the imple
@@ -9820,7 +9822,8 @@ void CGOpenMPRuntime::adjustTargetSpecificDataForLambdas(
void CGOpenMPRuntime::processRequiresDirective(const OMPRequiresDecl *D) {
for (const OMPClause *Clause : D->clauselists()) {
-if (Clause->getClauseKind() == OMPC_unified_shared_memory) {
+
https://github.com/jdoerfert approved this pull request.
https://github.com/llvm/llvm-project/pull/138365
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@@ -259,10 +259,9 @@ static void getAArch64MultilibFlags(const Driver &D,
processMultilibCustomFlags(Result, Args);
}
-static void getARMMultilibFlags(const Driver &D,
- const llvm::Triple &Triple,
- c
@@ -1765,6 +1771,11 @@ def fprofile_use_EQ : Joined<["-"], "fprofile-use=">,
Visibility<[ClangOption, CLOption]>,
MetaVarName<"">,
HelpText<"Use instrumentation data for profile-guided optimization. If
pathname is a directory, it reads from /default.profdata. Other
@@ -1359,4 +1362,107 @@ COMPILER_RT_VISIBILITY int
__llvm_profile_set_file_object(FILE *File,
return 0;
}
+int __llvm_write_custom_profile(const char *Target,
+const __llvm_profile_data *DataBegin,
+const __llv
https://github.com/jdoerfert approved this pull request.
LG, one minor comment
https://github.com/llvm/llvm-project/pull/93365
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jdoerfert wrote:
> I'm concerned about the soundness of our current implementation for these
> assumptions, see my comment at [#120962
> (comment)](https://github.com/llvm/llvm-project/pull/120962#issuecomment-2582864870).
> Not sure we should be exposing the current implementation from clang.
https://github.com/jdoerfert approved this pull request.
LG, one suggestion for the docs.
https://github.com/llvm/llvm-project/pull/121789
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@@ -2761,6 +2761,47 @@ etc.).
Query for this feature with
``__has_builtin(__builtin_assume_separate_storage)``.
+``__builtin_assume_dereferenceable``
+-
+
+``__builtin_assume_dereferenceable`` is used to provide the optimizer with the
+kno
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@@ -0,0 +1,36 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s |
FileCheck %s
+
+// CHECK-LABEL: @test1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[A_ADDR:%.*]] = alloca ptr,
@@ -2761,6 +2761,41 @@ etc.).
Query for this feature with
``__has_builtin(__builtin_assume_separate_storage)``.
+``__builtin_assume_dereferenceable``
+-
+
+``__builtin_assume_derefernceable`` is used to provide the optimizer with the
+know
https://github.com/jdoerfert requested changes to this pull request.
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@@ -0,0 +1,36 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s |
FileCheck %s
+
+// CHECK-LABEL: @test1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[A_ADDR:%.*]] = alloca ptr,
jdoerfert wrote:
> I get it, but that doesn't look like the case. If you look at the test case,
> the `target` region in `bar` is simply ignored. To me this looks like
> treating the entire TU being wrapped into a giant target region instead of
> compiling for host.
That is a good point. I th
jdoerfert wrote:
> I see it in a different way. `#pragma omp target parallel` (let's just assume
> this is valid code) is different from `#pragma omp parallel`, no matter what
> target is. However, this patch is to say, when targeting a GPU, `#pragma omp
> parallel` **is** `#pragma omp target
https://github.com/jdoerfert approved this pull request.
> We can't expect to have regular OpenMP code working in the same way as OpenMP
> offloading code when targeting a GPU meanwhile the code is not wrapped into
> target region or declare target
The way I see this is:
If the target is a GPU
@@ -2761,6 +2761,41 @@ etc.).
Query for this feature with
``__has_builtin(__builtin_assume_separate_storage)``.
+``__builtin_assume_dereferenceable``
+-
+
+``__builtin_assume_derefernceable`` is used to provide the optimizer with the
+know
https://github.com/jdoerfert approved this pull request.
Looks like the old master directive implementation.
https://github.com/llvm/llvm-project/pull/121741
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LG
https://github.com/llvm/llvm-project/pull/110179
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@@ -0,0 +1,191 @@
+//===-- gpuintrin.h - Generic GPU intrinsic functions
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
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@@ -0,0 +1,154 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,184 @@
+//===-- nvptxintrin.h - NVPTX intrinsic functions
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,86 @@
+//===-- gpuintrin.h - Generic GPU intrinsic functions
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,154 @@
+//===-- nvptxintrin.h - NVPTX intrinsic functions
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,154 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,86 @@
+//===-- gpuintrin.h - Generic GPU intrinsic functions
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,154 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,86 @@
+//===-- gpuintrin.h - Generic GPU intrinsic functions
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,154 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,86 @@
+//===-- gpuintrin.h - Generic GPU intrinsic functions
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,154 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/jdoerfert commented:
I left many minor comments but nothing blocking.
@jhuber6 Were there any conceptual concerns in the thread?
https://github.com/llvm/llvm-project/pull/110179
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@@ -164,9 +164,57 @@ uint32_t roundToWarpsize(uint32_t s) {
uint32_t kmpcMin(uint32_t x, uint32_t y) { return x < y ? x : y; }
+static int32_t nvptx_simd_reduce_nowait(void *reduce_data,
+ShuffleReductFnTy shflFct,
+
@@ -287,7 +303,7 @@ __kmpc_parallel_51(IdentTy *ident, int32_t, int32_t if_expr,
// Set to true for workers participating in the parallel region.
uint32_t TId = mapping::getThreadIdInBlock();
- bool ThreadIsActive = TId < state::getEffectivePTeamSize();
+ bool ThreadIsAc
@@ -2974,10 +2974,8 @@ StmtResult
Parser::ParseOpenMPDeclarativeOrExecutableDirective(
Sema::CompoundScopeRAII Scope(Actions);
AssociatedStmt = ParseStatement();
-if (AssociatedStmt.isUsable() && isOpenMPLoopDirective(DKind) &&
-getLangOpts
@@ -1210,12 +1211,16 @@ CallInst
*CodeExtractor::emitCallAndSwitchStatement(Function *newFunction,
if (ArgsInZeroAddressSpace && DL.getAllocaAddrSpace() != 0) {
auto *StructSpaceCast = new AddrSpaceCastInst(
- Struct, PointerType ::get(Context, 0), "structA
@@ -470,6 +484,11 @@ class OpenMPIRBuilder {
/// all functions are finalized.
void finalize(Function *Fn = nullptr);
+ CallInst *globalizeAlloca(AllocaInst *Alloca, SmallVector&);
+ void globalizeParallelVars(Function *CurFn);
+ SmallPtrSet
@@ -790,8 +794,167 @@ void OpenMPIRBuilder::finalize(Function *Fn) {
"OMPIRBuilder finalization \n";
};
- if (!OffloadInfoManager.empty())
+ if (!OffloadInfoManager.empty())
createOffloadEntriesAndInfoMetadata(ErrorReportFn);
+
+ if (Config.EmitLLVMUse
@@ -1033,6 +1033,7 @@ static FieldDecl *addFieldToRecordDecl(ASTContext &C,
DeclContext *DC,
CGOpenMPRuntime::CGOpenMPRuntime(CodeGenModule &CGM)
: CGM(CGM), OMPBuilder(CGM.getModule()) {
+
jdoerfert wrote:
Cleanup the PR please.
https://github.com/llvm
@@ -2824,155 +2829,78 @@ void CGOpenMPRuntimeGPU::emitReduction(
return;
}
- assert((TeamsReduction || ParallelReduction) &&
- "Invalid reduction selection in emitReduction.");
-
- llvm::SmallDenseMap VarFieldMap;
- llvm::SmallVector PrivatesReductions(Private
@@ -1402,6 +1402,7 @@ void CodeGenFunction::EmitOMPReductionClauseInit(
}
const auto *VD = cast(cast(TaskRedRef)->getDecl());
+llvm::dbgs() << "Emitting " << VD->getName() << " " << VD << "\n";
jdoerfert wrote:
leftover, same as all the commented out
@@ -167,6 +167,9 @@ double omp_get_wtick(void);
double omp_get_wtime(void);
///}
+
+int omp_get_simd_lane(void);
jdoerfert wrote:
ompx_, assuming this is not in the standard.
https://github.com/llvm/llvm-project/pull/91261
___
@@ -322,6 +322,40 @@ uint32_t mapping::getNumberOfProcessorElements() {
return static_cast(config::getHardwareParallelism());
}
+uint32_t mapping::getSimdLen() {
+ return 1;
jdoerfert wrote:
How does this work if it's always 1?
https://github.com/llvm/llv
@@ -87,8 +87,10 @@ extern "C" {
int32_t num_threads,
void *fn, void **args,
const int64_t nargs) {
+ //printf("SPMD mode\n")
@@ -336,13 +337,15 @@ class CheckVarsEscapingDeclContext final
return;
if (!D->hasAssociatedStmt())
return;
+
if (const auto *S =
dyn_cast_or_null(D->getAssociatedStmt())) {
// Do not analyze directives that do not actually require captu
@@ -105,6 +105,13 @@ uint32_t getMaxTeamThreads(bool IsSPMD);
/// Return the number of processing elements on the device.
uint32_t getNumberOfProcessorElements();
+uint32_t getSimdLen();
+uint32_t getSimdGroup();
+uint32_t getSimdLane();
+bool isSimdLeader();
+uint32_t getNumS
https://github.com/jdoerfert commented:
There is too much unrelated stuff, printfs, commented code, etc. too review it
properly.
I left high-level comments, including why there is a hardcoded simdlen of 1 and
globalization for all allocas.
https://github.com/llvm/llvm-project/pull/91261
_
@@ -184,7 +196,7 @@ __kmpc_parallel_51(IdentTy *ident, int32_t, int32_t if_expr,
// set, but they do not have individual ThreadStates yet. If they ever
// modify the ICVs beyond this point a ThreadStates will be allocated.
- bool IsActiveParallelRegion = NumThreads > 1;
+
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@@ -0,0 +1,184 @@
+//===-- nvptxintrin.h - NVPTX intrinsic functions
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,184 @@
+//===-- nvptxintrin.h - NVPTX intrinsic functions
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/jdoerfert commented:
I believe this is useful. Left lots of minor comments.
https://github.com/llvm/llvm-project/pull/110179
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jdoerfert wrote:
> This way the common intrinsics would be defined in a single location, and it
> would be harder for someone to add a new intrinsic without realizing that all
> files should implement a common interface.
That's one of the reasons mapping.{h,cpp} in DeviceRTL uses the extra lev
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,18 @@
+//===-- gpuintrin.h - Generic GPU intrinsic functions
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,184 @@
+//===-- nvptxintrin.h - NVPTX intrinsic functions
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/jdoerfert edited
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@@ -0,0 +1,184 @@
+//===-- nvptxintrin.h - NVPTX intrinsic functions
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,187 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
jdoerfert wrote:
> IIUC, the query 1) you were referring to was `Type::canLosslesslyBitCastTo`.
> If that's the case, it does nothing for AS cast.
I don't know what I was thinking of, the above or `CastInst::castIsValid`,
neither is very helpful.
I am personally not opposed to the DL solution
jdoerfert wrote:
> > +1 to @efriedma-quic and @jdoerfert's comments. DataLayout should remain as
> > generic as possible. Trying to encode a concept of "_the_ flat address
> > space" in it seems way too specific to one optimization for one or two
> > targets.
>
> This isn't purely a nice to h
jdoerfert wrote:
@efriedma-quic's comment resonates with me. At least all use cases that come to
my mind right now are basically questions of the following form:
1) Can I transform a pointer lossless from from AS(A) to AS(B)?
2) Is AS(A) "better"/more specialized than AS(B)?
3) Give me the most
jdoerfert wrote:
How many other (codegen) tests would this affect?
https://github.com/llvm/llvm-project/pull/108855
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https://github.com/jdoerfert updated
https://github.com/llvm/llvm-project/pull/95371
>From 34c8bf739040b9d3d0bf625cdadf12b282249ccf Mon Sep 17 00:00:00 2001
From: Johannes Doerfert
Date: Fri, 7 Jun 2024 17:06:02 -0700
Subject: [PATCH 1/2] [Offload][CUDA] Add initial cuda_runtime.h overlay
This
@@ -393,22 +393,17 @@ struct CUDADeviceTy : public GenericDeviceTy {
return Plugin::success();
}
- virtual Error callGlobalConstructors(GenericPluginTy &Plugin,
- DeviceImageTy &Image) override {
-// Check for the presense of gl
https://github.com/jdoerfert approved this pull request.
LG
https://github.com/llvm/llvm-project/pull/104790
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https://github.com/jdoerfert updated
https://github.com/llvm/llvm-project/pull/104168
>From 73daf3f9968f07e7f52b6e2ed956773d873634f3 Mon Sep 17 00:00:00 2001
From: Johannes Doerfert
Date: Mon, 12 Aug 2024 11:53:06 -0700
Subject: [PATCH] [Offload] Provide a kernel library useable by the offload
https://github.com/jdoerfert updated
https://github.com/llvm/llvm-project/pull/104168
>From bda519493667d3554365061475308da3786bfa9d Mon Sep 17 00:00:00 2001
From: Johannes Doerfert
Date: Mon, 12 Aug 2024 11:53:06 -0700
Subject: [PATCH] [Offload] Provide a kernel library useable by the offload
@@ -1533,6 +1533,55 @@ Error GenericDeviceTy::printInfo() {
return Plugin::success();
}
+Expected
+GenericDeviceTy::getKernel(llvm::StringRef Name, DeviceImageTy *ImagePtr) {
+
+ GenericKernelTy *&KernelPtr = KernelMap[Name];
+ if (!KernelPtr) {
jdoerfert
@@ -0,0 +1,53 @@
+//===-- Kenrels/Memory.cpp - Memory related kernel definitions
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -392,25 +392,52 @@ EXTERN void *omp_target_memset(void *Ptr, int ByteVal,
size_t NumBytes,
DP("filling memory on host via memset");
memset(Ptr, ByteVal, NumBytes); // ignore return value, memset() cannot
fail
} else {
-// TODO: replace the omp_target_memset()
https://github.com/jdoerfert updated
https://github.com/llvm/llvm-project/pull/104168
>From 9e529ede3a97513ec0afee6c4538e7299d2933f0 Mon Sep 17 00:00:00 2001
From: Johannes Doerfert
Date: Mon, 12 Aug 2024 11:53:06 -0700
Subject: [PATCH] [Offload] Provide a kernel library useable by the offload
https://github.com/jdoerfert created
https://github.com/llvm/llvm-project/pull/104168
As mentioned in #68706, it is useful to be able to call kernels from the
runtime, e.g., to perform memset. This patch provides a kernel library that can
be invoked from the offload runtime directly and implem
https://github.com/jdoerfert approved this pull request.
https://github.com/llvm/llvm-project/pull/104056
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jdoerfert wrote:
One buildbot error was unrelated, the others where fixed by making the tests
more robust.
https://github.com/llvm/llvm-project/pull/94549
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https://github.com/jdoerfert approved this pull request.
LG, but keep the TODOs.
https://github.com/llvm/llvm-project/pull/102972
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https://github.com/jdoerfert deleted
https://github.com/llvm/llvm-project/pull/102972
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