[Bug binutils/27023] New: [ARM]: ldrd/strd without second transfer register
Component: binutils Assignee: unassigned at sourceware dot org Reporter: husseydevin at gmail dot com Target Milestone: --- ARM objdump annotates ldrd/strd with only one transfer register. So, for example, ldrdr0, r1, [r2] strdr0, r1, [r2] Will dump as
[Bug binutils/27023] [ARM]: ldrd/strd without second transfer register
https://sourceware.org/bugzilla/show_bug.cgi?id=27023 husseydevin at gmail dot com changed: What|Removed |Added CC||husseydevin at gmail