https://sourceware.org/bugzilla/show_bug.cgi?id=27023
Bug ID: 27023 Summary: [ARM]: ldrd/strd without second transfer register Product: binutils Version: 2.35.1 Status: UNCONFIRMED Severity: minor Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: husseydevin at gmail dot com Target Milestone: --- ARM objdump annotates ldrd/strd with only one transfer register. So, for example, ldrd r0, r1, [r2] strd r0, r1, [r2] Will dump as ldrd r0, [r2] strd r0, [r2] Both registers should be annotated: - It matches the ARM documentation - It matches the behavior of llvm-objdump and radare2 - It will be impossible to mix up with ldrb/strb, as they no longer line up visually Additionally, gas *accepts* this one operand syntax. Is this intentional? -- You are receiving this mail because: You are on the CC list for the bug.