[Bug binutils/25202] objcopy --verilog-data-width doesn't respect target's endianness

2022-11-28 Thread olof.kindgren at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=25202 --- Comment #21 from Olof Kindgren --- Thanks for keeping working on this. I'm afraid I haven't had any time to test it myself but it looks like we're on the right track. Yes, the data can be as wide as it needs to be. There's probably some up

[Bug binutils/25202] objcopy --verilog-data-width doesn't respect target's endianness

2022-11-09 Thread olof.kindgren at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=25202 --- Comment #16 from Olof Kindgren --- >> I believe that practically no one has actually used this feature much >> because of this bug > >I weakly remember that someone from the RISC-V community community hacked >their own C program to conve

[Bug binutils/25202] objcopy --verilog-data-width doesn't respect target's endianness

2022-11-08 Thread olof.kindgren at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=25202 --- Comment #13 from Olof Kindgren --- Great to see some activity on this! I haven't compiled and tested it myself yet, but I'm wondering if we got the addressing right. Nick, it's correct that we are dealing with word addresses, but are we ta

[Bug binutils/25202] New: objcopy --verilog-data-width doesn't respect target's endianness

2019-11-18 Thread olof.kindgren at gmail dot com
ty: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: olof.kindgren at gmail dot com Target Milestone: --- I just tried binutils 2.33.1 compiled for riscv32-unknown-elf to test https://sourceware.org/bugzilla/show_

[Bug binutils/19921] enable specification of data width when writing verilog hex format

2016-04-11 Thread olof.kindgren at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=19921 --- Comment #8 from Olof Kindgren --- Full ack from the OpenRISC side. Would be nice to get rid of the Windows (CR-LF) line endings as well in the verilog backend, but that can wait for another patch I guess -- You are receiving this mail b

[Bug binutils/19921] enable specification of data width when writing verilog hex format

2016-04-09 Thread olof.kindgren at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=19921 Olof Kindgren changed: What|Removed |Added CC||olof.kindgren at gmail dot com