https://sourceware.org/bugzilla/show_bug.cgi?id=16017
--- Comment #16 from Markus Mayer ---
Will thinking about it, I came to the following conclusion (only line 2
differs). It safes 2 byte.
1: push{r0}
2: mov r0, pc
3: movwip, #0x ; Lower 16 bits of GOT entry offset from PC
4: m
https://sourceware.org/bugzilla/show_bug.cgi?id=16017
Markus Mayer changed:
What|Removed |Added
Status|WAITING |SUSPENDED
--- Comment #12 from Markus
https://sourceware.org/bugzilla/show_bug.cgi?id=16017
Markus Mayer changed:
What|Removed |Added
CC||lotharlutz at gmx dot de
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https://sourceware.org/bugzilla/show_bug.cgi?id=16017
--- Comment #10 from Markus Mayer ---
Hi Nick,
I have attached a new version of my previous patch.
Changes:
- convert pl0 to thumb
- Show error when using thumb-1 thumb-only targets
- Rename 'elf32_thumb_plt_entry' to 'elf32_thumb2_plt_entry'
https://sourceware.org/bugzilla/show_bug.cgi?id=16017
Markus Mayer changed:
What|Removed |Added
Attachment #7285|0 |1
is obsolete|
https://sourceware.org/bugzilla/show_bug.cgi?id=16017
--- Comment #7 from Markus Mayer ---
I have attached a patch to create thumb plt entries.
The patch has some issues:
- The plt entries are using tumb-2 instructions. When on an thumb only thumb-1
device, an error should be emitted.
- The pl
https://sourceware.org/bugzilla/show_bug.cgi?id=16017
--- Comment #6 from Markus Mayer ---
Created attachment 7285
--> https://sourceware.org/bugzilla/attachment.cgi?id=7285&action=edit
Patch for thumb plt entries
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https://sourceware.org/bugzilla/show_bug.cgi?id=16017
--- Comment #5 from Markus Mayer ---
As I don't know what limitations exists for PLT entries I will provide
different solutions.
Base assumptions:
- The IP register must contain the (absolute)address of the GOT entry (I think
it is needed for
https://sourceware.org/bugzilla/show_bug.cgi?id=16017
--- Comment #3 from Markus Mayer ---
Hi Nick,
thanks for your reply. I have tried to fix it myself, but I am not familiar
enough with the code base.
Is there anything I can do to help with this issue? e.g. providing assembler
code for plt en
: ld
Assignee: unassigned at sourceware dot org
Reporter: lotharlutz at gmx dot de
When compiling a shared library for cortex-M3, ld creates ARM instructions for
jumping to the plt and the plt itself. But the cortex only supports thumb
instructions, which results in a runtime
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