https://sourceware.org/bugzilla/show_bug.cgi?id=16017
Bug ID: 16017
Summary: LD creates invalid PLT instructions on CORTEX-M3
Product: binutils
Version: 2.23
Status: NEW
Severity: normal
Priority: P2
Component: ld
Assignee: unassigned at sourceware dot org
Reporter: lotharlutz at gmx dot de
When compiling a shared library for cortex-M3, ld creates ARM instructions for
jumping to the plt and the plt itself. But the cortex only supports thumb
instructions, which results in a runtime error.
Test case:
compile test.c with
arm-none-eabi-gcc -fPIC -nostartfiles -nostdlib -mcpu=cortex-m3 -mthumb -shared
-o libtest.so test.c
test.c:
int foo();
int bar()
{
return foo();
}
Result:
Disassembly of section .plt:
00000238 <.plt>:
238: e52de004 push {lr} ; (str lr, [sp, #-4]!)
23c: e59fe004 ldr lr, [pc, #4] ; 248 <bar-0x10>
240: e08fe00e add lr, pc, lr
244: e5bef008 ldr pc, [lr, #8]!
248: 00008098 muleq r0, r8, r0
24c: e28fc600 add ip, pc, #0, 12
250: e28cca08 add ip, ip, #8, 20 ; 0x8000
254: e5bcf098 ldr pc, [ip, #152]! ; 0x98
Disassembly of section .text:
00000258 <bar>:
258: b580 push {r7, lr}
25a: af00 add r7, sp, #0
25c: f7ff eff6 blx 24c <bar-0xc>
260: 4603 mov r3, r0
262: 4618 mov r0, r3
264: bd80 pop {r7, pc}
266: bf00 nop
24c, 250, 254 as well as 25c are ARM instructions and therefore invalid on
cortex-m3 cores.
Possible related bugs:
bz#13320: Similar issue on gold
bz#13867: maybe related
bz#15628: similar issue in cortex-m4
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