[Public]
Sorry, you may have misunderstood my thoughts, what I am considering is:
1.Fix the issue first.
2.Then use a new method to unify the visible check logic of all hwmon/sysnodes
to ensure code consistency.
The reason why it is currently not recommended to merge directly is that the
new so
Add nbio common ras functions.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/ras_nbio.c | 95 ++
drivers/gpu/drm/amd/ras/rascore/ras_nbio.h | 46 +++
2 files changed, 141 insertions(+)
create mode 100644 drivers/gpu/drm/amd/ras
On 9/17/25 08:47, Nícolas F. R. A. Prado wrote:
On Tue, 2025-09-16 at 19:54 -0600, Alex Hung wrote:
On 9/5/25 11:12, Louis Chauvet wrote:
Le 15/08/2025 à 05:50, Alex Hung a écrit :
From: Harry Wentland
This patch introduces a VKMS color pipeline that includes two
drm_colorops for name
On Mon, 15 Sep 2025, Ilpo Järvinen wrote:
> PCI core provides pci_rebar_size_supported() that helps in checking if
> a BAR Size is supported for the BAR or not. Use it in
> i915_resize_lmem_bar() to simplify code.
>
> Signed-off-by: Ilpo Järvinen
> Acked-by: Christian König
Reviewed-by: Jani Ni
Add thread to handle ras events.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/ras_process.c | 315 ++
drivers/gpu/drm/amd/ras/rascore/ras_process.h | 53 +++
2 files changed, 368 insertions(+)
create mode 100644 drivers/gpu/drm/amd/ras/r
Add gfx common ras functions.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/ras_gfx.c | 70 +++
drivers/gpu/drm/amd/ras/rascore/ras_gfx.h | 43 ++
2 files changed, 113 insertions(+)
create mode 100644 drivers/gpu/drm/amd/ra
On Mon, Sep 08, 2025 at 07:39:07AM -0500, Mario Limonciello wrote:
>
>
> On 9/8/25 4:19 AM, Greg Kroah-Hartman wrote:
> > On Sat, Sep 06, 2025 at 09:36:31AM -0500, Mario Limonciello (AMD) wrote:
> > > A variety of issues both in function and in power consumption have been
> > > raised as a result
In function 'amdgpu_vm_lock_done_list' update the comment
for the new argument 'vm'.
Reported-by: kernel test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/202509180211.uaqme0zj-...@intel.com/
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 1 +
1 file changed, 1
Add cper conversion function.
V3:
Change commit message and update the calling function.
Signed-off-by: YiPeng Chai
Signed-off-by: Xiang Liu
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/ras_cper.c | 310 +
drivers/gpu/drm/amd/ras/rascore/ras_cper.h | 304 +++
Add nbio v7_9 ras functions.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../gpu/drm/amd/ras/rascore/ras_nbio_v7_9.c | 123 ++
.../gpu/drm/amd/ras/rascore/ras_nbio_v7_9.h | 31 +
2 files changed, 154 insertions(+)
create mode 100644 drivers/gpu/drm/amd/ras/ras
Add umc v12_0 ras functions.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../gpu/drm/amd/ras/rascore/ras_umc_v12_0.c | 511 ++
.../gpu/drm/amd/ras/rascore/ras_umc_v12_0.h | 314 +++
2 files changed, 825 insertions(+)
create mode 100644 drivers/gpu/drm/amd/r
Add rascore status definition.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../gpu/drm/amd/ras/rascore/ras_core_status.h | 37 +++
1 file changed, 37 insertions(+)
create mode 100644 drivers/gpu/drm/amd/ras/rascore/ras_core_status.h
diff --git a/drivers/gpu/drm/amd/ra
Add psp v13_0 ras functions.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../gpu/drm/amd/ras/rascore/ras_psp_v13_0.c | 46 +++
.../gpu/drm/amd/ras/rascore/ras_psp_v13_0.h | 31 +
2 files changed, 77 insertions(+)
create mode 100644 drivers/gpu/drm/amd/r
Add eeprom ras functions.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c | 1368 ++
drivers/gpu/drm/amd/ras/rascore/ras_eeprom.h | 217 +++
2 files changed, 1585 insertions(+)
create mode 100644 drivers/gpu/drm/amd/ras/rascore
[Public]
Regards,
Prike
> -Original Message-
> From: Alex Deucher
> Sent: Wednesday, September 17, 2025 10:10 PM
> To: Liang, Prike
> Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
> ; Koenig, Christian
> Subject: Re: [PATCH v2 9/9] drm/amdgpu: validate userq va for GEM un
On 9/17/25 09:31, Nícolas F. R. A. Prado wrote:
On Tue, 2025-09-16 at 20:01 -0600, Alex Hung wrote:
On 9/5/25 11:12, Louis Chauvet wrote:
Le 15/08/2025 à 05:50, Alex Hung a écrit :
The functions are to clean up color pipeline when a device driver
fails to create its color pipeline.
Sig
The HDP flush page (AMDGPU_PL_MMIO_REMAP) is an MMIO window, not RAM.
It must not be migrated to GTT/VRAM by dma-buf paths.
This change makes pin/unpin no-ops for MMIO_REMAP and skips CPU-access
migration, keeping the object fixed.
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Srinivasan
Replace kzalloc() followed by copy_from_user() with memdup_user() to
improve and simplify ta_if_load_debugfs_write() and
ta_if_invoke_debugfs_write().
No functional changes intended.
Signed-off-by: Thorsten Blum
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c | 20 ++--
1 file ch
Add files to amdgpu ras manager makefile.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/ras_mgr/Makefile | 33
1 file changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/Makefile
b/drivers/gpu/drm/amd/ras/ras_mgr/Makef
Amdgpu handle ras ioctl command.
V2:
Remove non-standard device information.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.c | 363 ++
.../gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.h | 55 +++
2 files changed, 418 insertions(+
From: Taimur Hassan
- Disable stutter when programming watermarks on dcn32
- Improve brightness calculations
- Fix saving vbios clocks during init for DCN314
- Enable DTM 3 on DCN3.1+ dGPUs
- Add new ultra sleep field in DMUB
- Isolate DCN401 SMU functions
- Refactor and add logging of SMU functi
Avoid constant register reloads while emitting IBs by using a local write
pointer and only updating the size at the end of each helper.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 110 +++--
1 file changed, 66 insertions(+), 44 deletions(-)
dif
Add amdgpu ras system functions.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c | 268 ++
drivers/gpu/drm/amd/ras/ras_mgr/ras_sys.h | 109 +++
2 files changed, 377 insertions(+)
create mode 100644 drivers/gpu/drm/amd/r
Add amdgpu nbio v7_9 configuration function.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../amd/ras/ras_mgr/amdgpu_ras_nbio_v7_9.c| 125 ++
.../amd/ras/ras_mgr/amdgpu_ras_nbio_v7_9.h| 30 +
2 files changed, 155 insertions(+)
create mode 100644 drivers/gpu
Add amdgpu eeprom i2c configuration function.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../amd/ras/ras_mgr/amdgpu_ras_eeprom_i2c.c | 181 ++
.../amd/ras/ras_mgr/amdgpu_ras_eeprom_i2c.h | 27 +++
2 files changed, 208 insertions(+)
create mode 100644 drivers/gpu/
Add ras aca parser v1.0.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../gpu/drm/amd/ras/rascore/ras_aca_v1_0.c| 379 ++
.../gpu/drm/amd/ras/rascore/ras_aca_v1_0.h| 71
2 files changed, 450 insertions(+)
create mode 100644 drivers/gpu/drm/amd/ras/rascore/
Add unified ras module top-level makefile.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/Makefile | 34
1 file changed, 34 insertions(+)
create mode 100644 drivers/gpu/drm/amd/ras/Makefile
diff --git a/drivers/gpu/drm/amd/ras/Mak
Amdgpu preprocesses ras interrupts.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../drm/amd/ras/ras_mgr/amdgpu_ras_process.c | 126 ++
.../drm/amd/ras/ras_mgr/amdgpu_ras_process.h | 37 +
2 files changed, 163 insertions(+)
create mode 100644 drivers/gpu/drm/amd/
Add amdgpu system configuration parameters and
functions needed by rascore.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c | 560 ++
.../gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.h | 73 +++
2 files changed, 633 insertions(+)
c
Add amdgpu mp1 v13_0 configuration function.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../amd/ras/ras_mgr/amdgpu_ras_mp1_v13_0.c| 94 +++
.../amd/ras/ras_mgr/amdgpu_ras_mp1_v13_0.h| 30 ++
2 files changed, 124 insertions(+)
create mode 100644 drivers/gpu
Add amdgpu ras manager folder.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/ras_mgr/Makefile | 0
1 file changed, 0 insertions(+), 0 deletions(-)
create mode 100644 drivers/gpu/drm/amd/ras/ras_mgr/Makefile
diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/Makefile
Add files to ras core Makefile.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/Makefile | 44
1 file changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/amd/ras/rascore/Makefile
b/drivers/gpu/drm/amd/ras/rascore/Makefile
index
1. Complete the initialization call of all
sub-functions.
2. Export common interfaces.
V2:
Remove the use of typedef to define function pointer.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/ras.h | 368 +
drivers/gpu/drm/amd/ras/ras
Use ring buffer to record ras ecc data.
V3:
Change commit message and rename the file and
function names.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../gpu/drm/amd/ras/rascore/ras_log_ring.c| 310 ++
.../gpu/drm/amd/ras/rascore/ras_log_ring.h| 93 ++
Add psp ras common functions.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/ras_psp.c | 750
drivers/gpu/drm/amd/ras/rascore/ras_psp.h | 145
drivers/gpu/drm/amd/ras/rascore/ras_ta_if.h | 231 ++
3 files changed, 1126 inse
Add ras ioctl command handler.
V2:
Remove ras global device list.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/ras_cmd.c | 527 ++
drivers/gpu/drm/amd/ras/rascore/ras_cmd.h | 425 +
2 files changed, 952 insertions(+)
Add gfx v9_0 ras functions.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../gpu/drm/amd/ras/rascore/ras_gfx_v9_0.c| 426 ++
.../gpu/drm/amd/ras/rascore/ras_gfx_v9_0.h| 259 +++
2 files changed, 685 insertions(+)
create mode 100644 drivers/gpu/drm/amd/ra
Add umc common ras functions.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/ras_umc.c | 706 ++
drivers/gpu/drm/amd/ras/rascore/ras_umc.h | 166 +
2 files changed, 872 insertions(+)
create mode 100644 drivers/gpu/drm/amd/ras/rascor
Add mp1 common ras functions.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/ras_mp1.c | 81 +++
drivers/gpu/drm/amd/ras/rascore/ras_mp1.h | 50 ++
2 files changed, 131 insertions(+)
create mode 100644 drivers/gpu/drm/amd/ra
Add mp1 v13_0 ras functions.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
.../gpu/drm/amd/ras/rascore/ras_mp1_v13_0.c | 105 ++
.../gpu/drm/amd/ras/rascore/ras_mp1_v13_0.h | 30 +
2 files changed, 135 insertions(+)
create mode 100644 drivers/gpu/drm/amd/ras/ras
Add aca common ras functions:
1. Aca hw init/fini.
2. Get ecc count of each ras block.
3. Update query ecc count from mp1.
4. Clear ras block ecc count.
V3:
Update the calling function.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/ras_aca.c | 661 +
Add unified ras core folder.
Signed-off-by: YiPeng Chai
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/ras/rascore/Makefile | 0
1 file changed, 0 insertions(+), 0 deletions(-)
create mode 100644 drivers/gpu/drm/amd/ras/rascore/Makefile
diff --git a/drivers/gpu/drm/amd/ras/rascore/Makefile
b/
[Why]
When kernel documentation is generated the enum values themselves don't
end up in the documentation. This makes browsing them in HTML a lot
less useful.
[How]
Copy DC_DEBUG_MASK and DC_FEATURE_MASK enum values into matching kdoc
comments.
Signed-off-by: Mario Limonciello
---
Documentatio
On 9/17/25 11:42 AM, Alex Deucher wrote:
When in S0i3, the GFX state is retained, so all we need to do
is stop the runlist so GFX can enter gfxoff.
Signed-off-by: Alex Deucher
Confirmed this doesn't run into the problem we hit with GFX10 on my
attempt. Also it fixes the problem properly on
Add the userq object virtual address get(),mapped() and put()
helpers for tracking the userq obj va address usage.
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c | 66 --
drivers/gpu/drm/amd/amdgpu/
On 9/16/2025 5:41 PM, Philip Yang wrote:
If mmap write lock is taken while draining retry fault, mmap write lock
is not released because svm_range_restore_pages calls mmap_read_unlock
then returns. This causes deadlock and systen hang later because mmap
read or write lock cannot be taken.
Downg
Fill and publish GPU metrics in v1.9 format for SMUv13.0.12 SOCs
Signed-off-by: Lijo Lazar
Reviewed-by: Asad Kamal
---
v2: Keep return type of smu_v13_0_12_get_gpu_metrics as void (Asad)
.../drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c | 89 ---
.../drm/amd/pm/swsmu/smu13/smu_v13_
The I2C init for Arcturus uses i2c_add_adapter() and i2c_del_adapter(),
this commit replaces the use of these two functions with
devm_i2c_add_adapter(). Notice that Arcturus init initializes multiple
I2C buses in a loop; if something goes wrong, the previous adapters are
removed, and the amdgpu loa
On 9/8/2025 4:34 PM, Bjorn Helgaas wrote:
In subject, s|PCI: PM:|PCI/PM:| to follow previous practice.
👍
On Sun, Aug 17, 2025 at 09:00:55PM -0500, Mario Limonciello (AMD) wrote:
PCI devices can be programmed as a wakeup source from low power states
by sysfs. However when using the S4 fl
if destination is on system ram. migrate_vma_pages can fail if a CPU
thread faults on the same page. However, the page table is locked and
only one of the new pages will be inserted. The device driver will see
that the MIGRATE_PFN_MIGRATE bit is cleared if it loses the race.
Signed-off-by: James Z
Hi,
Xaver first reported flickering when changing GAMMA_LUT often in KDE
with an HDR-enabled display:
https://gitlab.freedesktop.org/drm/amd/-/issues/
This issue is reproducible on Fedora 42 from [1], with integrated and/or
external monitors. I was able to reproduce it on DCN3.01, but other
[Public]
Please ignore, misread the patch initially.
The patch is
Reviewed-by: Lijo Lazar
Thanks,
Lijo
From: amd-gfx On Behalf Of Lazar, Lijo
Sent: Tuesday, September 9, 2025 8:35 AM
To: Wang, Yang(Kevin) ; amd-gfx@lists.freedesktop.org
Cc: Kamal, Asad
Subject: Re: [PATCH] drm
[Public]
The intent is to keep hwmon/sysfs attributes based on new RW capabilities of
attributes as in this series and replace existing logic.
This one is kind of urgent, hence the change is specifically done inside
amdgpu_virt.
Thanks,
Lijo
From: Wang, Yang(Ke
From: Charlene Liu
[why]
Log for sequence tracking
Reviewed-by: Ovidiu (Ovi) Bunea
Reviewed-by: Yihan Zhu
Signed-off-by: Charlene Liu
Signed-off-by: Ivan Lipski
---
.../amd/display/dc/dccg/dcn35/dcn35_dccg.c| 24 ---
1 file changed, 21 insertions(+), 3 deletions(-)
diff
Please add:
Fixes: 6716a823d18d ("drm/amdgpu: rework how PTE flags are generated v3")
With that,
Reviewed-by: Alex Deucher
On Wed, Sep 17, 2025 at 4:39 AM Wang, Joe wrote:
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> see attachment for details. Thanks.
>
> Best regards,
>
> J
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Harish Kasiviswanathan
-Original Message-
From: amd-gfx On Behalf Of Philip Yang
Sent: Tuesday, September 16, 2025 6:41 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kuehling, Felix ; Yang, Philip
Subject: [PATCH] drm/a
On Fri, Sep 12, 2025 at 1:55 AM Prike Liang wrote:
>
> Keeping waiting the userq fence infinitely untill
> hang detection, and then suspend the hang queue and
> set the fence error.
>
> Signed-off-by: Prike Liang
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c | 11
On 12/09/2025 15:50, Harry Wentland wrote:
On 2025-09-11 13:21, Melissa Wen wrote:
Don't update DC stream color components during atomic check. The driver
will continue validating the new CRTC color state but will not change DC
stream color components. The DC stream color state will only be
SDMA 4.4.x has increased transfer limits.
v2: fix harder, use shifts to make it more obvious
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
b/drivers/gpu/d
Align data type usage from a mix of explicit widths and native types, and
a mix of signed and unsigned, to always using native int.
Sort declaration blocks by width while at it and drop a few unnecessary
initializations.
Signed-off-by: Tvrtko Ursulin
---
.../amd/display/amdgpu_dm/amdgpu_dm_debu
On 9/10/25 8:58 AM, Rafael J. Wysocki wrote:
On Tue, Sep 9, 2025 at 9:16 PM Mario Limonciello (AMD)
wrote:
PMSG_POWEROFF will be used for the PM core to allow differentiating between
a hibernation or shutdown sequence when re-using callbacks.
This event should not have wakeups enabled
Why?
On 9/5/25 11:12, Louis Chauvet wrote:
Le 15/08/2025 à 05:50, Alex Hung a écrit :
From: Harry Wentland
This patch introduces a VKMS color pipeline that includes two
drm_colorops for named transfer functions. For now the only ones
supported are sRGB EOTF, sRGB Inverse EOTF, and a Linear TF.
On Tue, 2025-09-09 at 09:47 +0800, Xi Ruoyao wrote:
> On Mon, 2025-09-08 at 14:18 -0600, Alex Hung wrote:
> >
> >
> > On 8/25/25 02:52, Xi Ruoyao wrote:
> > > dml21_map_dc_state_into_dml_display_cfg calls (the call is usually
> > > inlined by the compiler) populate_dml21_surface_config_from_plane
On Tue, 2025-09-16 at 19:54 -0600, Alex Hung wrote:
>
>
> On 9/5/25 11:12, Louis Chauvet wrote:
> >
> >
> > Le 15/08/2025 à 05:50, Alex Hung a écrit :
> > > From: Harry Wentland
> > >
> > > This patch introduces a VKMS color pipeline that includes two
> > > drm_colorops for named transfer fun
Fill and publish GPU metrics in v1.9 format for SMUv13.0.12 SOCs
Signed-off-by: Lijo Lazar
---
v2: Keep return type of smu_v13_0_12_get_gpu_metrics as void (Asad)
.../drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c | 89 ---
.../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 25 +++---
.
From: Paul Hsieh
[Why & How]
According to the vendor’s requirement, after each OUI write,
the PSR cap must be read; otherwise, the vendor will default
to using PSRSU. But its PSR cap indicates that it only supports
PSR1.
Reviewed-by: Wenjing Liu
Signed-off-by: Paul Hsieh
Signed-off-by: Ivan Li
This commit refactors the AMDGPU userqueue management subsystem to replace
IDR (ID Allocation) with XArray for improved performance, scalability, and
maintainability. The changes address several issues with the previous IDR
implementation and provide better locking semantics.
Key changes:
1. **Gl
Hi,
I'm wondering if you can give me some guidance.
1. I'm just starting to look at the use of AMD GPUs for AI/ML
workloads, and I'm wondering if there is any documentation available
on the tradeoffs between the in-tree and out-of-tree amdgpu
drivers? For commercial use should we expe
On Tue, 2025-09-16 at 20:01 -0600, Alex Hung wrote:
>
>
> On 9/5/25 11:12, Louis Chauvet wrote:
> >
> >
> > Le 15/08/2025 à 05:50, Alex Hung a écrit :
> > > The functions are to clean up color pipeline when a device driver
> > > fails to create its color pipeline.
> > >
> > > Signed-off-by: Al
On Tue, 16 Sep 2025, Lucas De Marchi wrote:
> On Mon, Sep 15, 2025 at 08:24:06PM +0300, Ilpo Järvinen wrote:
> > On Mon, 15 Sep 2025, Lucas De Marchi wrote:
> >
> > > On Mon, Sep 15, 2025 at 12:13:47PM +0300, Ilpo Järvinen wrote:
> > > > pci.c has been used as catch everything that doesn't fits e
[Public]
Inline.
From: Chris Friesen
Sent: Wednesday, September 17, 2025 11:45 AM
To: Deucher, Alexander ; Koenig, Christian
; xinhui@amd.com; amd-gfx@lists.freedesktop.org
Subject: questions around driver for AMD Instinct GPUs (for AI/ML)
Hi,
I'm wondering if you can give me some guidan
On Wed, Sep 17, 2025 at 04:00:10PM +0300, Ilpo Järvinen wrote:
On Tue, 16 Sep 2025, Lucas De Marchi wrote:
On Mon, Sep 15, 2025 at 08:24:06PM +0300, Ilpo Järvinen wrote:
> On Mon, 15 Sep 2025, Lucas De Marchi wrote:
>
> > On Mon, Sep 15, 2025 at 12:13:47PM +0300, Ilpo Järvinen wrote:
> > > pci.
KFD suspend and resume routines have been disabled since commit
5d3a2d95224da ("drm/amdgpu: skip kfd suspend/resume for S0ix") which
made sense at that time. However there is a problem that if there is
any compute work running there may still be active fences. Running
suspend without draining the
Use pci_rebar_get_max_size() from PCI core in resize_vram_bar() to
simplify code.
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/xe/xe_vram.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c
index 08
Maintain two separate RB trees per order - one for clear (zeroed) blocks
and another for dirty (uncleared) blocks. This separation improves
code clarity and makes it more obvious which tree is being searched
during allocation. It also improves scalability and efficiency when
searching for a specifi
PCI devices can be configured as wakeup sources from low power states.
However, when the system is halting or powering off such wakeups are
not expected and may lead to spurious behavior.
ACPI r6.5, section 16.1.5 notes:
"Hardware does allow a transition to S0 due to power button press
o
On 9/2/25 07:59, Alex Deucher wrote:
On Tue, Aug 26, 2025 at 10:23 AM Alex Deucher wrote:
On Mon, Aug 25, 2025 at 5:56 PM Timur Kristóf wrote:
Compared to the previous version of this series, v2 fixes
the rebase conflicts on amd-staging-drm-next and includes
an additional patch to addres
On Wed, 2025-09-03 at 11:18 +0100, Tvrtko Ursulin wrote:
> There is no need to keep entities with no jobs in the tree so lets remove
> it once the last job is consumed. This keeps the tree smaller which is
> nicer and more efficient as entities are removed and re-added on every
> popped job.
This
On Wed, 2025-09-10 at 11:10 -0400, Marek Olšák wrote:
> I added the comment into Mesa that 0x3fff00 is the limit. I did
> research on that bug separately from PAL, but I don't remember the
> details.
>
> There is no performance to gain here. It's only about consistency and
> clear communication to
For SMU v13.0.6 SOCs, move to partition metrics v1.1 schema
Signed-off-by: Lijo Lazar
Reviewed-by: Asad Kamal
---
.../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 6 ++--
.../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h | 34 +++
2 files changed, 37 insertions(+), 3 deletions(-)
d
SDMA 6.x has increased transfer limits.
v2: fix harder, use shifts to make it more obvious
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
b/drivers/gpu/drm/amd
Instead of using i2c_add_adapter() and i2c_del_adapter(), replace them
with devm_i2c_add_adapter() to simplify the i2c logic.
Signed-off-by: Rodrigo Siqueira
---
.../gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c| 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a
On 2025-09-16 05:29, Rahul Kumar wrote:
Documentation/process/deprecated.rst recommends against the use of
kmalloc with dynamic size calculations due to the risk of overflow and
smaller allocation being made than the caller was expecting.
Replace kmalloc() with kmalloc_array() in amdgpu_amdkfd_g
On Tue, Sep 16, 2025 at 10:57:24AM +0200, Christian König wrote:
> On 16.09.25 10:12, Jani Nikula wrote:
> > On Mon, 15 Sep 2025, Rodrigo Vivi wrote:
> >> On Mon, Sep 15, 2025 at 07:24:10PM +0200, Andi Shyti wrote:
> >>> Hi,
> >>>
> >>> On Mon, Sep 15, 2025 at 03:42:23PM +0300, Jani Nikula wrote:
From: Sridevi Arvindekar
[Why/How]
Call power gating routine only if it is defined.
Reviewed-by: Alvin Lee
Signed-off-by: Sridevi Arvindekar
Signed-off-by: Ivan Lipski
---
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --
On 2025-09-17 13:22, Sunil Khatri wrote:
we dont need to allocate local array of pages to hold
the pages returned by the hmm, instead we could use
the hmm_range structure itself to get to hmm_pfn
and get the required pages directly.
This saved alloc/free a lot of memory without
any impact on per
On Fri, Sep 12, 2025 at 2:04 AM Prike Liang wrote:
>
> Track the userq obj for its life time, and reference and
> dereference the buffer flag at its creating and destroying
> period.
>
> Suggested-by: Alex Deucher
> Signed-off-by: Prike Liang
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c |
we dont need to allocate local array of pages to hold
the pages returned by the hmm, instead we could use
the hmm_range structure itself to get to hmm_pfn
and get the required pages directly.
This saved alloc/free a lot of memory without
any impact on performance.
Signed-off-by: Sunil Khatri
Sug
In S0i3, GFX state is retained, so it's preferrable to
preempt queues rather than unmapping them as the overhead
is lower.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/
When in S0i3, the GFX state is retained, so all we need to do
is stop the runlist so GFX can enter gfxoff.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 16 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 12
drivers/gpu/drm/amd/amdkfd/kfd_device.c
We need to make sure the user queues are preempted so
GFX can enter gfxoff.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 24 +-
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/driver
On Thu, Sep 11, 2025 at 10:09 PM Liang, Prike wrote:
>
> [Public]
>
> Regards,
> Prike
>
> > -Original Message-
> > From: Alex Deucher
> > Sent: Friday, September 12, 2025 2:55 AM
> > To: Liang, Prike
> > Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
> > ; Koenig, Christian
Hi,
On 17/09/2025 10:59, David Rosca wrote:
drm_syncobj_find_fence returns fence chain for timeline syncobjs.
Scheduler expects normal fences as job dependencies to be able to
determine whether the fences come from the same entity or sched
and skip waiting on them.
With fence chain as job depe
On Fri, Sep 12, 2025 at 1:55 AM Prike Liang wrote:
>
> Add the userq object virtual address get(),mapped() and put()
> helpers for tracking the userq obj va address usage.
>
> Signed-off-by: Prike Liang
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 1 +
> drivers/gpu/drm/amd/amdgpu/amdgp
On Fri, Sep 12, 2025 at 2:04 AM Prike Liang wrote:
>
> When an user unmaps a userq VA, the driver must ensure
> the queue has no in-flight jobs. If there is pending work,
> the kernel should wait for the attached eviction (bookkeeping)
> fence to signal before deleting the mapping.
>
> Suggested-b
Replace kcalloc + copy_from_user with memdup_user.
Signed-off-by: Tvrtko Ursulin
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 173 ++
1 file changed, 61 insertions(+), 112 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
b/drivers/gpu/d
Use the previously added common helper for parsing sysfs writes into
arrays of longs.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 236 ++---
1 file changed, 83 insertions(+), 153 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/d
Quite a few instances of local variables needlessly initialized -
remove it.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 62 ++
1 file changed, 28 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu
Move code which parses an input string into array of longs to a shared
location so following patches can make use of it.
QQQ:
Static inline in a header file is not the best. Figure out a better
place.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 36 +
Simplify debugfs token parsing by noticing there is no need to pre-
validate the string. We can let the main strsep driven loop skip
delimiters and check for the maximum supported number of arguments as it
goes through the string.
Signed-off-by: Tvrtko Ursulin
---
.../amd/display/amdgpu_dm/amdgp
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