The HDP flush page (AMDGPU_PL_MMIO_REMAP) is an MMIO window, not RAM. It must not be migrated to GTT/VRAM by dma-buf paths.
This change makes pin/unpin no-ops for MMIO_REMAP and skips CPU-access migration, keeping the object fixed. Cc: Christian König <christian.koe...@amd.com> Cc: Alex Deucher <alexander.deuc...@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmu...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c index 31d78561ab95..4c75e296b57f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c @@ -109,6 +109,11 @@ static int amdgpu_dma_buf_pin(struct dma_buf_attachment *attach) struct amdgpu_bo *bo = gem_to_amdgpu_bo(dmabuf->priv); u32 domains = bo->allowed_domains; + /* Already pinned at export; don't try to move I/O apertures */ + if (bo->tbo.resource && + bo->tbo.resource->mem_type == AMDGPU_PL_MMIO_REMAP) + return 0; + dma_resv_assert_held(dmabuf->resv); /* Try pinning into VRAM to allow P2P with RDMA NICs without ODP @@ -148,6 +153,10 @@ static void amdgpu_dma_buf_unpin(struct dma_buf_attachment *attach) struct drm_gem_object *obj = attach->dmabuf->priv; struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj); + if (bo->tbo.resource && + bo->tbo.resource->mem_type == AMDGPU_PL_MMIO_REMAP) + return; + amdgpu_bo_unpin(bo); } @@ -354,6 +363,11 @@ static int amdgpu_dma_buf_begin_cpu_access(struct dma_buf *dma_buf, bool reads = (direction == DMA_BIDIRECTIONAL || direction == DMA_FROM_DEVICE); + /* Never migrate MMIO_REMAP for CPU access heuristics */ + if (bo->tbo.resource && + bo->tbo.resource->mem_type == AMDGPU_PL_MMIO_REMAP) + return 0; + if (!reads || !(domain & AMDGPU_GEM_DOMAIN_GTT)) return 0; -- 2.34.1