[llvm-branch-commits] [llvm] [AArch64][SME] Support saving/restoring ZT0 in the MachineSMEABIPass (PR #166362)
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/166362
>From 61a5390345e13e8195ad9b2214133914db560ef2 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Mon, 3 Nov 2025 15:41:49 +
Subject: [PATCH 1/5] [AArch64][SME] Support saving/restoring ZT0 in the
MachineSMEABIPass
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This patch extends the MachineSMEABIPass to support ZT0. This is done
with the addition of two new states:
- `ACTIVE_ZT0_SAVED`
* This is used when calling a function that shares ZA, but does
share ZT0 (i.e., no ZT0 attributes).
* This state indicates ZT0 must be saved to the save slot, but
must remain on, with no lazy save setup
- `LOCAL_COMMITTED`
* This is used for saving ZT0 in functions without ZA state.
* This state indicates ZA is off and ZT0 has been saved.
* This state is general enough to support ZA, but those
have not been implemented†
To aid with readability, the state transitions have been reworked to a
switch of `transitionFrom().to()`, rather than
nested ifs, which helps manage more transitions.
† This could be implemented to handle some cases of undefined behavior
better.
Change-Id: I14be4a7f8b998fe667bfaade5088f88039515f91
---
.../AArch64/AArch64ExpandPseudoInsts.cpp | 1 +
.../Target/AArch64/AArch64ISelLowering.cpp| 11 +-
.../lib/Target/AArch64/AArch64SMEInstrInfo.td | 6 +
llvm/lib/Target/AArch64/MachineSMEABIPass.cpp | 176 +++---
.../test/CodeGen/AArch64/sme-peephole-opts.ll | 4 -
.../test/CodeGen/AArch64/sme-za-exceptions.ll | 124 +---
llvm/test/CodeGen/AArch64/sme-zt0-state.ll| 104 ++-
7 files changed, 321 insertions(+), 105 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
index 34d74d04c4419..60e6a82d41cc8 100644
--- a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
@@ -1717,6 +1717,7 @@ bool AArch64ExpandPseudo::expandMI(MachineBasicBlock &MBB,
}
case AArch64::InOutZAUsePseudo:
case AArch64::RequiresZASavePseudo:
+ case AArch64::RequiresZT0SavePseudo:
case AArch64::SMEStateAllocPseudo:
case AArch64::COALESCER_BARRIER_FPR16:
case AArch64::COALESCER_BARRIER_FPR32:
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index c4ae8ea7a8a69..6dc01597cf0f5 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -9524,6 +9524,8 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
if (CallAttrs.requiresLazySave() ||
CallAttrs.requiresPreservingAllZAState())
ZAMarkerNode = AArch64ISD::REQUIRES_ZA_SAVE;
+else if (CallAttrs.requiresPreservingZT0())
+ ZAMarkerNode = AArch64ISD::REQUIRES_ZT0_SAVE;
else if (CallAttrs.caller().hasZAState() ||
CallAttrs.caller().hasZT0State())
ZAMarkerNode = AArch64ISD::INOUT_ZA_USE;
@@ -9643,7 +9645,8 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
SDValue ZTFrameIdx;
MachineFrameInfo &MFI = MF.getFrameInfo();
- bool ShouldPreserveZT0 = CallAttrs.requiresPreservingZT0();
+ bool ShouldPreserveZT0 =
+ !UseNewSMEABILowering && CallAttrs.requiresPreservingZT0();
// If the caller has ZT0 state which will not be preserved by the callee,
// spill ZT0 before the call.
@@ -9656,7 +9659,8 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
// If caller shares ZT0 but the callee is not shared ZA, we need to stop
// PSTATE.ZA before the call if there is no lazy-save active.
- bool DisableZA = CallAttrs.requiresDisablingZABeforeCall();
+ bool DisableZA =
+ !UseNewSMEABILowering && CallAttrs.requiresDisablingZABeforeCall();
assert((!DisableZA || !RequiresLazySave) &&
"Lazy-save should have PSTATE.SM=1 on entry to the function");
@@ -10142,7 +10146,8 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
getSMToggleCondition(CallAttrs));
}
- if (RequiresLazySave || CallAttrs.requiresEnablingZAAfterCall())
+ if (!UseNewSMEABILowering &&
+ (RequiresLazySave || CallAttrs.requiresEnablingZAAfterCall()))
// Unconditionally resume ZA.
Result = DAG.getNode(
AArch64ISD::SMSTART, DL, DAG.getVTList(MVT::Other, MVT::Glue), Result,
diff --git a/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
b/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
index 737169253ddb3..b099f15ecf7e3 100644
--- a/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
@@ -102,6 +102,7 @@ def : Pat<(i64 (AArch64AllocateSMESaveBuffer GPR64:$size)),
let hasSideEffects = 1, isMeta = 1 in {
def InOutZAUsePseudo : Pseudo<(outs), (ins), []>, Sched<[]>;
def RequiresZASavePseudo : Pseudo<(outs), (ins), []>, Sched<[]>;
[llvm-branch-commits] [llvm] [AArch64][SME] Support saving/restoring ZT0 in the MachineSMEABIPass (PR #166362)
@@ -969,17 +1047,63 @@ void MachineSMEABI::emitStateChange(EmitContext &Context,
From = ZAState::ACTIVE;
}
- if (From == ZAState::ACTIVE && To == ZAState::LOCAL_SAVED)
-emitZASave(Context, MBB, InsertPt, PhysLiveRegs);
- else if (From == ZAState::LOCAL_SAVED && To == ZAState::ACTIVE)
-emitZARestore(Context, MBB, InsertPt, PhysLiveRegs);
- else if (To == ZAState::OFF) {
-assert(From != ZAState::ENTRY &&
- "ENTRY to OFF should have already been handled");
-assert(!SMEFnAttrs.hasAgnosticZAInterface() &&
- "Should not turn ZA off in agnostic ZA function");
-emitZAOff(MBB, InsertPt, /*ClearTPIDR2=*/From == ZAState::LOCAL_SAVED);
- } else {
+ bool IsAgnosticZA = SMEFnAttrs.hasAgnosticZAInterface();
+ bool HasZT0State = SMEFnAttrs.hasZT0State();
+ bool HasZAState = IsAgnosticZA || SMEFnAttrs.hasZAState();
+
+ switch (transitionFrom(From).to(To)) {
+ // This section handles: ACTIVE <-> ACTIVE_ZT0_SAVED
+ case transitionFrom(ZAState::ACTIVE).to(ZAState::ACTIVE_ZT0_SAVED):
+emitZT0SaveRestore(Context, MBB, InsertPt, /*IsSave=*/true);
+break;
+ case transitionFrom(ZAState::ACTIVE_ZT0_SAVED).to(ZAState::ACTIVE):
+emitZT0SaveRestore(Context, MBB, InsertPt, /*IsSave=*/false);
+break;
+
+ // This section handles: ACTIVE -> LOCAL_SAVED
+ case transitionFrom(ZAState::ACTIVE).to(ZAState::LOCAL_SAVED):
+if (HasZT0State)
+ emitZT0SaveRestore(Context, MBB, InsertPt, /*IsSave=*/true);
+if (HasZAState)
+ emitZASave(Context, MBB, InsertPt, PhysLiveRegs);
+break;
+
+ // This section handles: ACTIVE -> LOCAL_COMMITTED
+ case transitionFrom(ZAState::ACTIVE).to(ZAState::LOCAL_COMMITTED):
+// Note: We could support ZA state here, but this transition is currently
+// only possible when we _don't_ have ZA state.
+assert(HasZT0State && !HasZAState && "Expect to only have ZT0 state.");
+emitZT0SaveRestore(Context, MBB, InsertPt, /*IsSave=*/true);
+emitZAMode(MBB, InsertPt, /*ClearTPIDR2=*/false, /*On=*/false);
+break;
+
+ // This section handles: LOCAL_COMMITTED -> (OFF|LOCAL_SAVED)
+ case transitionFrom(ZAState::LOCAL_COMMITTED).to(ZAState::OFF):
+ case transitionFrom(ZAState::LOCAL_COMMITTED).to(ZAState::LOCAL_SAVED):
+// These transistions are a no-op.
+break;
+
+ // This section handles: LOCAL_(SAVED|COMMITTED) -> ACTIVE[_ZT0_SAVED]
+ case transitionFrom(ZAState::LOCAL_COMMITTED).to(ZAState::ACTIVE):
+ case transitionFrom(ZAState::LOCAL_COMMITTED).to(ZAState::ACTIVE_ZT0_SAVED):
MacDue wrote:
Was looking at the wrong transitions. I've added the
`try_catch_shared_za_callee_zt0_saved` to `sme-za-exceptions.ll` to test this
case.
https://github.com/llvm/llvm-project/pull/166362
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[llvm-branch-commits] [libcxx] 9903b8e - Revert "[libcxx][ci] Temporarily disable ARM jobs (#169318)"
Author: David Spickett
Date: 2025-11-24T16:05:26Z
New Revision: 9903b8e502d768bdc3c24ec4cd98d8bbe417e978
URL:
https://github.com/llvm/llvm-project/commit/9903b8e502d768bdc3c24ec4cd98d8bbe417e978
DIFF:
https://github.com/llvm/llvm-project/commit/9903b8e502d768bdc3c24ec4cd98d8bbe417e978.diff
LOG: Revert "[libcxx][ci] Temporarily disable ARM jobs (#169318)"
This reverts commit 840a43bbe3a7361f99e9444dfcfd9eefe60ba487.
Added:
Modified:
libcxx/utils/ci/buildkite-pipeline.yml
Removed:
Unicorn! · GitHub
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[llvm-branch-commits] [llvm] [AArch64][SME] Support saving/restoring ZT0 in the MachineSMEABIPass (PR #166362)
https://github.com/MacDue edited https://github.com/llvm/llvm-project/pull/166362 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AArch64][SME] Support saving/restoring ZT0 in the MachineSMEABIPass (PR #166362)
@@ -969,17 +1047,63 @@ void MachineSMEABI::emitStateChange(EmitContext &Context,
From = ZAState::ACTIVE;
}
- if (From == ZAState::ACTIVE && To == ZAState::LOCAL_SAVED)
-emitZASave(Context, MBB, InsertPt, PhysLiveRegs);
- else if (From == ZAState::LOCAL_SAVED && To == ZAState::ACTIVE)
-emitZARestore(Context, MBB, InsertPt, PhysLiveRegs);
- else if (To == ZAState::OFF) {
-assert(From != ZAState::ENTRY &&
- "ENTRY to OFF should have already been handled");
-assert(!SMEFnAttrs.hasAgnosticZAInterface() &&
- "Should not turn ZA off in agnostic ZA function");
-emitZAOff(MBB, InsertPt, /*ClearTPIDR2=*/From == ZAState::LOCAL_SAVED);
- } else {
+ bool IsAgnosticZA = SMEFnAttrs.hasAgnosticZAInterface();
+ bool HasZT0State = SMEFnAttrs.hasZT0State();
+ bool HasZAState = IsAgnosticZA || SMEFnAttrs.hasZAState();
+
+ switch (transitionFrom(From).to(To)) {
+ // This section handles: ACTIVE <-> ACTIVE_ZT0_SAVED
+ case transitionFrom(ZAState::ACTIVE).to(ZAState::ACTIVE_ZT0_SAVED):
+emitZT0SaveRestore(Context, MBB, InsertPt, /*IsSave=*/true);
+break;
+ case transitionFrom(ZAState::ACTIVE_ZT0_SAVED).to(ZAState::ACTIVE):
+emitZT0SaveRestore(Context, MBB, InsertPt, /*IsSave=*/false);
+break;
+
+ // This section handles: ACTIVE -> LOCAL_SAVED
+ case transitionFrom(ZAState::ACTIVE).to(ZAState::LOCAL_SAVED):
+if (HasZT0State)
+ emitZT0SaveRestore(Context, MBB, InsertPt, /*IsSave=*/true);
+if (HasZAState)
+ emitZASave(Context, MBB, InsertPt, PhysLiveRegs);
+break;
+
+ // This section handles: ACTIVE -> LOCAL_COMMITTED
+ case transitionFrom(ZAState::ACTIVE).to(ZAState::LOCAL_COMMITTED):
+// Note: We could support ZA state here, but this transition is currently
+// only possible when we _don't_ have ZA state.
+assert(HasZT0State && !HasZAState && "Expect to only have ZT0 state.");
+emitZT0SaveRestore(Context, MBB, InsertPt, /*IsSave=*/true);
+emitZAMode(MBB, InsertPt, /*ClearTPIDR2=*/false, /*On=*/false);
+break;
+
+ // This section handles: LOCAL_COMMITTED -> (OFF|LOCAL_SAVED)
+ case transitionFrom(ZAState::LOCAL_COMMITTED).to(ZAState::OFF):
+ case transitionFrom(ZAState::LOCAL_COMMITTED).to(ZAState::LOCAL_SAVED):
MacDue wrote:
Yep :+1:
https://github.com/llvm/llvm-project/pull/166362
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[llvm-branch-commits] [Clang][CodeGen] Move AllocToken pass to backend LTO phases (PR #169360)
https://github.com/melver created https://github.com/llvm/llvm-project/pull/169360 With LTO enabled, move `AllocTokenPass` from the pre-link phase to the backend LTO phase to avoid interference with other optimizations (e.g. PGHO) and enable late heap-allocation optimizations. For FullLTO and normal ThinLTO, pass AllocToken options to the linker plugin. For distributed ThinLTO, we need a new `PassBuilderCallback` in `lto::Config` to inject passes into the LTO backend pipeline when running in Clang. ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Clang][MemProf] Add end-to-end test for PGHO rewriting (PR #169243)
https://github.com/melver updated https://github.com/llvm/llvm-project/pull/169243 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Clang][MemProf] Add end-to-end test for PGHO rewriting (PR #169243)
https://github.com/melver updated https://github.com/llvm/llvm-project/pull/169243 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Clang] Make -falloc-token-mode a hidden frontend option (PR #169359)
https://github.com/melver created https://github.com/llvm/llvm-project/pull/169359 In preparation of moving AllocToken instrumentation to backend LTO phases, we need to make this option a frontend option that can be converted to the appropriate linker plugin command line option. This removes the need to use `-Xclang` when setting the mode; document it and update the existing tests. ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [GOFF] Implement lowerConstant/emitGlobalVariables/emitGlobalAlias (PR #169362)
https://github.com/tltao created
https://github.com/llvm/llvm-project/pull/169362
Add additional functionality required on z/OS for `lowerConstant`,
`emitGlobalVariable`, and `emitGlobalAlias`. The main addition is to properly
apply the attribute to the various `MCSymbols` and also emit the correct
`MCExpr`.
>From d565c7d8c772cf1c66d57bd1db0387ad90bb1d9b Mon Sep 17 00:00:00 2001
From: Tony Tao
Date: Wed, 19 Nov 2025 19:55:35 +
Subject: [PATCH 1/4] Implement emitGlobalVariable and lowerConstant
---
clang/lib/Lex/HeaderMap.cpp | 1 +
llvm/lib/Support/VirtualOutputBackends.cpp| 23 +---
llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp | 56 +++
llvm/lib/Target/SystemZ/SystemZAsmPrinter.h | 2 +
4 files changed, 74 insertions(+), 8 deletions(-)
diff --git a/clang/lib/Lex/HeaderMap.cpp b/clang/lib/Lex/HeaderMap.cpp
index a7b670f00ac6e..588b32ee9ca8e 100644
--- a/clang/lib/Lex/HeaderMap.cpp
+++ b/clang/lib/Lex/HeaderMap.cpp
@@ -18,6 +18,7 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/MemoryBuffer.h"
+#include "llvm/Support/SystemZ/zOSSupport.h"
#include
#include
#include
diff --git a/llvm/lib/Support/VirtualOutputBackends.cpp
b/llvm/lib/Support/VirtualOutputBackends.cpp
index de59b8ab63a53..33a56c7f5f607 100644
--- a/llvm/lib/Support/VirtualOutputBackends.cpp
+++ b/llvm/lib/Support/VirtualOutputBackends.cpp
@@ -254,6 +254,18 @@ static Error createDirectoriesOnDemand(StringRef
OutputPath,
});
}
+static sys::fs::OpenFlags generateFlagsFromConfig(OutputConfig Config) {
+ sys::fs::OpenFlags OF = sys::fs::OF_None;
+ if (Config.getTextWithCRLF())
+ OF |= sys::fs::OF_TextWithCRLF;
+ else if (Config.getText())
+ OF |= sys::fs::OF_Text;
+ if (Config.getAppend())
+ OF |= sys::fs::OF_Append;
+
+ return OF;
+}
+
Error OnDiskOutputFile::tryToCreateTemporary(std::optional &FD) {
// Create a temporary file.
// Insert - before the extension (if any), and because some tools
@@ -268,9 +280,10 @@ Error
OnDiskOutputFile::tryToCreateTemporary(std::optional &FD) {
return createDirectoriesOnDemand(OutputPath, Config, [&]() -> Error {
int NewFD;
+ sys::fs::OpenFlags OF = generateFlagsFromConfig(Config);
SmallString<128> UniquePath;
if (std::error_code EC =
-sys::fs::createUniqueFile(ModelPath, NewFD, UniquePath))
+sys::fs::createUniqueFile(ModelPath, NewFD, UniquePath, OF))
return make_error(ModelPath, OutputPath, EC);
if (Config.getDiscardOnSignal())
@@ -312,13 +325,7 @@ Error OnDiskOutputFile::initializeFile(std::optional
&FD) {
// Not using a temporary file. Open the final output file.
return createDirectoriesOnDemand(OutputPath, Config, [&]() -> Error {
int NewFD;
-sys::fs::OpenFlags OF = sys::fs::OF_None;
-if (Config.getTextWithCRLF())
- OF |= sys::fs::OF_TextWithCRLF;
-else if (Config.getText())
- OF |= sys::fs::OF_Text;
-if (Config.getAppend())
- OF |= sys::fs::OF_Append;
+sys::fs::OpenFlags OF = generateFlagsFromConfig(Config);
if (std::error_code EC = sys::fs::openFileForWrite(
OutputPath, NewFD, sys::fs::CD_CreateAlways, OF))
return convertToOutputError(OutputPath, EC);
diff --git a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
index 193e6ef6d1e64..151b59334cab1 100644
--- a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
@@ -1123,6 +1123,7 @@ void SystemZAsmPrinter::emitEndOfAsmFile(Module &M) {
: MCSA_Global);
OutStreamer->emitSymbolAttribute(Sym, isa(GO) ? MCSA_Code
: MCSA_Data);
+llvm::dbgs() << "TONY emitting " << Sym->getName() << "\n";
}
}
OutStreamer->switchSection(
@@ -1699,6 +1700,61 @@ void SystemZAsmPrinter::emitPPA2(Module &M) {
OutStreamer->popSection();
}
+void SystemZAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
+ if (TM.getTargetTriple().isOSzOS()) {
+auto *Sym = getSymbol(GV);
+OutStreamer->emitSymbolAttribute(Sym, MCSA_Data);
+ }
+
+ AsmPrinter::emitGlobalVariable(GV);
+}
+
+const MCExpr *SystemZAsmPrinter::lowerConstant(const Constant *CV,
+ const Constant *BaseCV,
+ uint64_t Offset) {
+ const Triple &TargetTriple = TM.getTargetTriple();
+
+ if (TargetTriple.isOSzOS()) {
+const GlobalAlias *GA = dyn_cast(CV);
+const GlobalVariable *GV = dyn_cast(CV);
+const Function *FV = dyn_cast(CV);
+bool IsFunc = !GV && (FV || (GA && isa(GA->getAliaseeObject(;
+
+MCSymbol *Sym = NULL;
+
+if (GA)
+ Sym = getSymbol(GA);
+else if (IsFunc)
+ Sym = getSymbol(FV);
+
[llvm-branch-commits] [clang] [llvm] [GOFF] Implement lowerConstant/emitGlobalVariables/emitGlobalAlias (PR #169362)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff origin/main HEAD --extensions h,cpp,c --
clang/test/CodeGen/SystemZ/encoding.c clang/lib/Lex/HeaderMap.cpp
llvm/lib/Support/VirtualOutputBackends.cpp
llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
llvm/lib/Target/SystemZ/SystemZAsmPrinter.h --diff_from_common_commit
``
:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:
View the diff from clang-format here.
``diff
diff --git a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
index 17e71ec76..8b525dfb8 100644
--- a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
@@ -347,7 +347,7 @@ void SystemZAsmPrinter::emitInstruction(const MachineInstr
*MI) {
case SystemZ::ADA_ENTRY: {
const SystemZSubtarget &Subtarget = MF->getSubtarget();
const SystemZInstrInfo *TII = Subtarget.getInstrInfo();
-uint32_t Disp = ADATable.insert(MI->getOperand(1));
+uint32_t Disp = ADATable.insert(MI->getOperand(1));
Register TargetReg = MI->getOperand(0).getReg();
Register ADAReg = MI->getOperand(2).getReg();
@@ -373,8 +373,8 @@ void SystemZAsmPrinter::emitInstruction(const MachineInstr
*MI) {
Disp = 0;
Op = Op0;
}
-OutStreamer->AddComment(Twine("Loading from ADA at offset ")
-.concat(utostr(Disp)));
+OutStreamer->AddComment(
+Twine("Loading from ADA at offset ").concat(utostr(Disp)));
EmitToStreamer(*OutStreamer, MCInstBuilder(Op)
.addReg(TargetReg)
.addReg(ADAReg)
@@ -1757,7 +1757,8 @@ const MCExpr *SystemZAsmPrinter::lowerConstant(const
Constant *CV,
return AsmPrinter::lowerConstant(CV);
}
-void SystemZAsmPrinter::emitGlobalAlias(const Module &M, const GlobalAlias
&GA) {
+void SystemZAsmPrinter::emitGlobalAlias(const Module &M,
+const GlobalAlias &GA) {
if (!TM.getTargetTriple().isOSzOS()) {
AsmPrinter::emitGlobalAlias(M, GA);
return;
diff --git a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
index 003e9af7c..9d1e010ab 100644
--- a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
+++ b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
@@ -132,7 +132,9 @@ public:
void emitStartOfAsmFile(Module &M) override;
void emitGlobalVariable(const GlobalVariable *GV) override;
void emitGlobalAlias(const Module &M, const GlobalAlias &GA) override;
- const MCExpr *lowerConstant(const Constant *CV, const Constant *BaseCV =
nullptr, uint64_t Offset = 0) override;
+ const MCExpr *lowerConstant(const Constant *CV,
+ const Constant *BaseCV = nullptr,
+ uint64_t Offset = 0) override;
private:
void emitCallInformation(CallType CT);
``
https://github.com/llvm/llvm-project/pull/169362
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[llvm-branch-commits] [Clang] Make -falloc-token-mode a hidden frontend option (PR #169359)
llvmbot wrote: @llvm/pr-subscribers-clang-driver Author: Marco Elver (melver) Changes In preparation of moving AllocToken instrumentation to backend LTO phases, we need to make this option a frontend option that can be converted to the appropriate linker plugin command line option. This removes the need to use `-Xclang` when setting the mode; document it and update the existing tests. --- This change is part of the following series: 1. https://github.com/llvm/llvm-project/pull/169242 2. https://github.com/llvm/llvm-project/pull/169243 3. https://github.com/llvm/llvm-project/pull/169358 4. https://github.com/llvm/llvm-project/pull/169359 5. https://github.com/llvm/llvm-project/pull/169360 --- Full diff: https://github.com/llvm/llvm-project/pull/169359.diff 4 Files Affected: - (modified) clang/docs/AllocToken.rst (+2-2) - (modified) clang/include/clang/Options/Options.td (+1-1) - (modified) clang/lib/Driver/ToolChains/Clang.cpp (+1) - (modified) clang/test/Driver/fsanitize-alloc-token.c (+5-5) ``diff diff --git a/clang/docs/AllocToken.rst b/clang/docs/AllocToken.rst index 3f319e8be6421..b591c39057cdc 100644 --- a/clang/docs/AllocToken.rst +++ b/clang/docs/AllocToken.rst @@ -37,8 +37,8 @@ The default mode to calculate tokens is: pointers. Other token ID assignment modes are supported, but they may be subject to -change or removal. These may (experimentally) be selected with ``-Xclang --falloc-token-mode=``: +change or removal. These may (experimentally) be selected with +``-falloc-token-mode=``: * ``typehash``: This mode assigns a token ID based on the hash of the allocated type's name. diff --git a/clang/include/clang/Options/Options.td b/clang/include/clang/Options/Options.td index 34a6651d2445c..fb10973a6e581 100644 --- a/clang/include/clang/Options/Options.td +++ b/clang/include/clang/Options/Options.td @@ -2767,7 +2767,7 @@ def falloc_token_max_EQ : Joined<["-"], "falloc-token-max=">, HelpText<"Limit to maximum N allocation tokens (0 = target SIZE_MAX)">; def falloc_token_mode_EQ : Joined<["-"], "falloc-token-mode=">, - Group, Visibility<[CC1Option]>, + Group, Visibility<[ClangOption, CC1Option]>, Flags<[HelpHidden]>, HelpText<"Set the allocation token mode (experimental)">; def fallow_runtime_check_skip_hot_cutoff_EQ diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index 2f0aec3ec3c37..b1b41e4c24b81 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -7584,6 +7584,7 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, SanitizeArgs.addArgs(TC, Args, CmdArgs, InputType); Args.AddLastArg(CmdArgs, options::OPT_falloc_token_max_EQ); + Args.AddLastArg(CmdArgs, options::OPT_falloc_token_mode_EQ); #if CLANG_ENABLE_CIR // Forward -mmlir arguments to to the MLIR option parser. diff --git a/clang/test/Driver/fsanitize-alloc-token.c b/clang/test/Driver/fsanitize-alloc-token.c index 0ffe9abad8053..073b211d7b671 100644 --- a/clang/test/Driver/fsanitize-alloc-token.c +++ b/clang/test/Driver/fsanitize-alloc-token.c @@ -43,13 +43,13 @@ // RUN: not %clang --target=x86_64-linux-gnu -fsanitize=alloc-token -falloc-token-max=-1 %s 2>&1 | FileCheck -check-prefix=CHECK-INVALID-MAX %s // CHECK-INVALID-MAX: error: invalid value -// RUN: %clang --target=x86_64-linux-gnu -Xclang -falloc-token-mode=increment %s -### 2>&1 | FileCheck -check-prefix=CHECK-MODE-INCREMENT %s +// RUN: %clang --target=x86_64-linux-gnu -falloc-token-mode=increment %s -### 2>&1 | FileCheck -check-prefix=CHECK-MODE-INCREMENT %s // CHECK-MODE-INCREMENT: "-falloc-token-mode=increment" -// RUN: %clang --target=x86_64-linux-gnu -Xclang -falloc-token-mode=random %s -### 2>&1 | FileCheck -check-prefix=CHECK-MODE-RANDOM %s +// RUN: %clang --target=x86_64-linux-gnu -falloc-token-mode=random %s -### 2>&1 | FileCheck -check-prefix=CHECK-MODE-RANDOM %s // CHECK-MODE-RANDOM: "-falloc-token-mode=random" -// RUN: %clang --target=x86_64-linux-gnu -Xclang -falloc-token-mode=typehash %s -### 2>&1 | FileCheck -check-prefix=CHECK-MODE-TYPEHASH %s +// RUN: %clang --target=x86_64-linux-gnu -falloc-token-mode=typehash %s -### 2>&1 | FileCheck -check-prefix=CHECK-MODE-TYPEHASH %s // CHECK-MODE-TYPEHASH: "-falloc-token-mode=typehash" -// RUN: %clang --target=x86_64-linux-gnu -Xclang -falloc-token-mode=typehashpointersplit %s -### 2>&1 | FileCheck -check-prefix=CHECK-MODE-TYPEHASHPTRSPLIT %s +// RUN: %clang --target=x86_64-linux-gnu -falloc-token-mode=typehashpointersplit %s -### 2>&1 | FileCheck -check-prefix=CHECK-MODE-TYPEHASHPTRSPLIT %s // CHECK-MODE-TYPEHASHPTRSPLIT: "-falloc-token-mode=typehashpointersplit" -// RUN: not %clang --target=x86_64-linux-gnu -Xclang -falloc-token-mode=asdf %s 2>&1 | FileCheck -check-prefix=CHECK-INVALID-MODE %s +// RUN: not %clang --target=x86_64-linux-gnu -falloc-token-mode=asdf %s 2>&1 | FileCheck -check-prefix=CHECK-INVALID-MODE %s // CHECK-INVALID-MOD
[llvm-branch-commits] [clang] [Clang][CodeGen] Move AllocToken pass to backend LTO phases (PR #169360)
https://github.com/melver ready_for_review https://github.com/llvm/llvm-project/pull/169360 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Clang][CodeGen] Move AllocToken pass to backend LTO phases (PR #169360)
llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: Marco Elver (melver)
Changes
With LTO enabled, move `AllocTokenPass` from the pre-link phase to the
backend LTO phase to avoid interference with other optimizations (e.g.
PGHO) and enable late heap-allocation optimizations.
For FullLTO and normal ThinLTO, pass AllocToken options to the linker
plugin.
For distributed ThinLTO, we need a new `PassBuilderCallback` in
`lto::Config` to inject passes into the LTO backend pipeline when
running in Clang.
---
This change is part of the following series:
1. https://github.com/llvm/llvm-project/pull/169242
2. https://github.com/llvm/llvm-project/pull/169243
3. https://github.com/llvm/llvm-project/pull/169358
4. https://github.com/llvm/llvm-project/pull/169359
5. https://github.com/llvm/llvm-project/pull/169360
---
Full diff: https://github.com/llvm/llvm-project/pull/169360.diff
8 Files Affected:
- (modified) clang/include/clang/Driver/SanitizerArgs.h (+4)
- (modified) clang/lib/CodeGen/BackendUtil.cpp (+12-1)
- (modified) clang/lib/Driver/ToolChains/CommonArgs.cpp (+18)
- (added) clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp (+65)
- (modified) clang/test/CodeGen/lto-newpm-pipeline.c (+2-6)
- (modified) clang/test/Driver/fsanitize-alloc-token.c (+24)
- (modified) llvm/include/llvm/LTO/Config.h (+2)
- (modified) llvm/lib/LTO/LTOBackend.cpp (+2)
``diff
diff --git a/clang/include/clang/Driver/SanitizerArgs.h
b/clang/include/clang/Driver/SanitizerArgs.h
index 08e3c147d0557..4cc3811bb547a 100644
--- a/clang/include/clang/Driver/SanitizerArgs.h
+++ b/clang/include/clang/Driver/SanitizerArgs.h
@@ -140,6 +140,10 @@ class SanitizerArgs {
return Sanitizers.has(SanitizerKind::ShadowCallStack);
}
+ bool hasAllocToken() const {
+return Sanitizers.has(SanitizerKind::AllocToken);
+ }
+
bool requiresPIE() const;
bool needsUnwindTables() const;
bool needsLTO() const;
diff --git a/clang/lib/CodeGen/BackendUtil.cpp
b/clang/lib/CodeGen/BackendUtil.cpp
index 5590d217e96ff..4317ea7c0a7a5 100644
--- a/clang/lib/CodeGen/BackendUtil.cpp
+++ b/clang/lib/CodeGen/BackendUtil.cpp
@@ -1144,7 +1144,12 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
if (!IsThinLTOPostLink) {
addSanitizers(TargetTriple, CodeGenOpts, LangOpts, PB);
addKCFIPass(TargetTriple, LangOpts, PB);
- addAllocTokenPass(TargetTriple, CodeGenOpts, LangOpts, PB);
+
+ // On ThinLTO or FullLTO pre-link, skip AllocTokenPass; it runs during
the
+ // LTO backend compile phase to enable late heap-allocation optimizations
+ // to remain compatible with AllocToken instrumentation.
+ if (!PrepareForThinLTO && !PrepareForLTO)
+addAllocTokenPass(TargetTriple, CodeGenOpts, LangOpts, PB);
}
if (std::optional Options =
@@ -1425,6 +1430,12 @@ runThinLTOBackend(CompilerInstance &CI,
ModuleSummaryIndex *CombinedIndex,
Conf.RemarksFormat = CGOpts.OptRecordFormat;
Conf.SplitDwarfFile = CGOpts.SplitDwarfFile;
Conf.SplitDwarfOutput = CGOpts.SplitDwarfOutput;
+ Conf.PassBuilderCallback = [&](PassBuilder &PB) {
+// Skipped during pre-link phase to avoid instrumentation interfering with
+// backend LTO optimizations, and instead we run it as late as possible.
+// This case handles distributed ThinLTO.
+addAllocTokenPass(CI.getTarget().getTriple(), CGOpts, CI.getLangOpts(),
PB);
+ };
switch (Action) {
case Backend_EmitNothing:
Conf.PreCodeGenModuleHook = [](size_t Task, const llvm::Module &Mod) {
diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp
b/clang/lib/Driver/ToolChains/CommonArgs.cpp
index d3539a594df11..8ea84c72b6a2e 100644
--- a/clang/lib/Driver/ToolChains/CommonArgs.cpp
+++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp
@@ -1385,6 +1385,24 @@ void tools::addLTOOptions(const ToolChain &ToolChain,
const ArgList &Args,
CmdArgs.push_back(
Args.MakeArgString(Twine(PluginOptPrefix) + "-time-passes"));
+ const SanitizerArgs &SanArgs = ToolChain.getSanitizerArgs(Args);
+ if (SanArgs.hasAllocToken()) {
+StringRef Mode = "default";
+if (Arg *A = Args.getLastArg(options::OPT_falloc_token_mode_EQ))
+ Mode = A->getValue();
+CmdArgs.push_back(Args.MakeArgString(Twine(PluginOptPrefix) +
+ "-lto-alloc-token-mode=" + Mode));
+if (Args.hasArg(options::OPT_fsanitize_alloc_token_fast_abi))
+ CmdArgs.push_back(
+ Args.MakeArgString(Twine(PluginOptPrefix) +
"-alloc-token-fast-abi"));
+if (Args.hasArg(options::OPT_fsanitize_alloc_token_extended))
+ CmdArgs.push_back(
+ Args.MakeArgString(Twine(PluginOptPrefix) +
"-alloc-token-extended"));
+if (Arg *A = Args.getLastArg(options::OPT_falloc_token_max_EQ))
+ CmdArgs.push_back(Args.MakeArgString(
+ Twine(PluginOptPrefix) + "-alloc-token-max=" + A->getValue()));
+ }
+
addDTLTOOptions(ToolChain, Args, CmdArgs);
}
diff --git a/clang/test/CodeGen/distr
[llvm-branch-commits] [mlir] [mlir][arith] Add support for `fptosi`, `fptoui` to `ArithToAPFloat` (PR #169277)
@@ -101,4 +102,17 @@ _mlir_apfloat_convert(int32_t inSemantics, int32_t
outSemantics, uint64_t a) {
llvm::APInt result = val.bitcastToAPInt();
return result.getZExtValue();
}
+
+MLIR_APFLOAT_WRAPPERS_EXPORT uint64_t _mlir_apfloat_convert_to_int(
+int32_t semantics, int32_t resultWidth, bool isUnsigned, uint64_t a) {
+ const llvm::fltSemantics &sem = llvm::APFloatBase::EnumToSemantics(
+ static_cast(semantics));
+ unsigned inputWidth = llvm::APFloatBase::semanticsSizeInBits(sem);
+ llvm::APFloat val(sem, llvm::APInt(inputWidth, a));
+ llvm::APSInt result(resultWidth, isUnsigned);
+ bool isExact;
+ // TODO: Custom rounding modes are not supported yet.
+ val.convertToInteger(result, llvm::RoundingMode::NearestTiesToEven,
&isExact);
+ return result.getZExtValue();
makslevental wrote:
n00b q: shouldn't this be either a `sext` or a `zext` depending on whether we
want `fptosi` or `fptoui` semantics?
https://github.com/llvm/llvm-project/pull/169277
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[llvm-branch-commits] [mlir] [mlir][arith] Add support for `fptosi`, `fptoui` to `ArithToAPFloat` (PR #169277)
https://github.com/makslevental approved this pull request. LGTM (module nit) https://github.com/llvm/llvm-project/pull/169277 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [GOFF] Implement lowerConstant/emitGlobalVariables/emitGlobalAlias (PR #169362)
https://github.com/tltao updated
https://github.com/llvm/llvm-project/pull/169362
>From d565c7d8c772cf1c66d57bd1db0387ad90bb1d9b Mon Sep 17 00:00:00 2001
From: Tony Tao
Date: Wed, 19 Nov 2025 19:55:35 +
Subject: [PATCH 1/5] Implement emitGlobalVariable and lowerConstant
---
clang/lib/Lex/HeaderMap.cpp | 1 +
llvm/lib/Support/VirtualOutputBackends.cpp| 23 +---
llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp | 56 +++
llvm/lib/Target/SystemZ/SystemZAsmPrinter.h | 2 +
4 files changed, 74 insertions(+), 8 deletions(-)
diff --git a/clang/lib/Lex/HeaderMap.cpp b/clang/lib/Lex/HeaderMap.cpp
index a7b670f00ac6e..588b32ee9ca8e 100644
--- a/clang/lib/Lex/HeaderMap.cpp
+++ b/clang/lib/Lex/HeaderMap.cpp
@@ -18,6 +18,7 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/MemoryBuffer.h"
+#include "llvm/Support/SystemZ/zOSSupport.h"
#include
#include
#include
diff --git a/llvm/lib/Support/VirtualOutputBackends.cpp
b/llvm/lib/Support/VirtualOutputBackends.cpp
index de59b8ab63a53..33a56c7f5f607 100644
--- a/llvm/lib/Support/VirtualOutputBackends.cpp
+++ b/llvm/lib/Support/VirtualOutputBackends.cpp
@@ -254,6 +254,18 @@ static Error createDirectoriesOnDemand(StringRef
OutputPath,
});
}
+static sys::fs::OpenFlags generateFlagsFromConfig(OutputConfig Config) {
+ sys::fs::OpenFlags OF = sys::fs::OF_None;
+ if (Config.getTextWithCRLF())
+ OF |= sys::fs::OF_TextWithCRLF;
+ else if (Config.getText())
+ OF |= sys::fs::OF_Text;
+ if (Config.getAppend())
+ OF |= sys::fs::OF_Append;
+
+ return OF;
+}
+
Error OnDiskOutputFile::tryToCreateTemporary(std::optional &FD) {
// Create a temporary file.
// Insert - before the extension (if any), and because some tools
@@ -268,9 +280,10 @@ Error
OnDiskOutputFile::tryToCreateTemporary(std::optional &FD) {
return createDirectoriesOnDemand(OutputPath, Config, [&]() -> Error {
int NewFD;
+ sys::fs::OpenFlags OF = generateFlagsFromConfig(Config);
SmallString<128> UniquePath;
if (std::error_code EC =
-sys::fs::createUniqueFile(ModelPath, NewFD, UniquePath))
+sys::fs::createUniqueFile(ModelPath, NewFD, UniquePath, OF))
return make_error(ModelPath, OutputPath, EC);
if (Config.getDiscardOnSignal())
@@ -312,13 +325,7 @@ Error OnDiskOutputFile::initializeFile(std::optional
&FD) {
// Not using a temporary file. Open the final output file.
return createDirectoriesOnDemand(OutputPath, Config, [&]() -> Error {
int NewFD;
-sys::fs::OpenFlags OF = sys::fs::OF_None;
-if (Config.getTextWithCRLF())
- OF |= sys::fs::OF_TextWithCRLF;
-else if (Config.getText())
- OF |= sys::fs::OF_Text;
-if (Config.getAppend())
- OF |= sys::fs::OF_Append;
+sys::fs::OpenFlags OF = generateFlagsFromConfig(Config);
if (std::error_code EC = sys::fs::openFileForWrite(
OutputPath, NewFD, sys::fs::CD_CreateAlways, OF))
return convertToOutputError(OutputPath, EC);
diff --git a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
index 193e6ef6d1e64..151b59334cab1 100644
--- a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
@@ -1123,6 +1123,7 @@ void SystemZAsmPrinter::emitEndOfAsmFile(Module &M) {
: MCSA_Global);
OutStreamer->emitSymbolAttribute(Sym, isa(GO) ? MCSA_Code
: MCSA_Data);
+llvm::dbgs() << "TONY emitting " << Sym->getName() << "\n";
}
}
OutStreamer->switchSection(
@@ -1699,6 +1700,61 @@ void SystemZAsmPrinter::emitPPA2(Module &M) {
OutStreamer->popSection();
}
+void SystemZAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
+ if (TM.getTargetTriple().isOSzOS()) {
+auto *Sym = getSymbol(GV);
+OutStreamer->emitSymbolAttribute(Sym, MCSA_Data);
+ }
+
+ AsmPrinter::emitGlobalVariable(GV);
+}
+
+const MCExpr *SystemZAsmPrinter::lowerConstant(const Constant *CV,
+ const Constant *BaseCV,
+ uint64_t Offset) {
+ const Triple &TargetTriple = TM.getTargetTriple();
+
+ if (TargetTriple.isOSzOS()) {
+const GlobalAlias *GA = dyn_cast(CV);
+const GlobalVariable *GV = dyn_cast(CV);
+const Function *FV = dyn_cast(CV);
+bool IsFunc = !GV && (FV || (GA && isa(GA->getAliaseeObject(;
+
+MCSymbol *Sym = NULL;
+
+if (GA)
+ Sym = getSymbol(GA);
+else if (IsFunc)
+ Sym = getSymbol(FV);
+else if (GV)
+ Sym = getSymbol(GV);
+
+if (IsFunc) {
+ OutStreamer->emitSymbolAttribute(Sym, MCSA_Code);
+ if (FV->hasExternalLinkage()) {
+return MCSpecifierExpr::create(MCSymbolRefExpr::create(Sym,
Out
[llvm-branch-commits] [mlir] [mlir][arith] Add support for `fptosi`, `fptoui` to `ArithToAPFloat` (PR #169277)
@@ -185,6 +185,60 @@ struct FpToFpConversion final : OpRewritePattern {
SymbolOpInterface symTable;
};
+template
+struct FpToIntConversion final : OpRewritePattern {
+ FpToIntConversion(MLIRContext *context, SymbolOpInterface symTable,
+bool isUnsigned, PatternBenefit benefit = 1)
+ : OpRewritePattern(context, benefit), symTable(symTable),
+isUnsigned(isUnsigned){};
+
+ LogicalResult matchAndRewrite(OpTy op,
+PatternRewriter &rewriter) const override {
+// Get APFloat function from runtime library.
+auto i1Type = IntegerType::get(symTable->getContext(), 1);
+auto i32Type = IntegerType::get(symTable->getContext(), 32);
+auto i64Type = IntegerType::get(symTable->getContext(), 64);
+FailureOr fn =
+lookupOrCreateApFloatFn(rewriter, symTable, "convert_to_int",
+{i32Type, i32Type, i1Type, i64Type});
+if (failed(fn))
+ return fn;
+
+rewriter.setInsertionPoint(op);
+// Cast operands to 64-bit integers.
+Location loc = op.getLoc();
+auto inFloatTy = cast(op.getOperand().getType());
+auto inIntWType = rewriter.getIntegerType(inFloatTy.getWidth());
+auto int64Type = rewriter.getI64Type();
makslevental wrote:
nit: reuse `i64Type` from above?
https://github.com/llvm/llvm-project/pull/169277
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[llvm-branch-commits] [Clang] Make -falloc-token-mode a hidden frontend option (PR #169359)
https://github.com/melver ready_for_review https://github.com/llvm/llvm-project/pull/169359 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [LTO] Support enabling AllocToken instrumentation in backend (PR #169358)
llvmbot wrote:
@llvm/pr-subscribers-lto
Author: Marco Elver (melver)
Changes
Add support for running `AllocTokenPass` during the LTO backend phase,
controlled by a new internal option `-lto-alloc-token-mode`.
This is required to support running the pass after other heap allocation
optimizations (such as PGHO) in the LTO backend, avoiding interference
between them.
---
This change is part of the following series:
1. https://github.com/llvm/llvm-project/pull/169242
2. https://github.com/llvm/llvm-project/pull/169243
3. https://github.com/llvm/llvm-project/pull/169358
4. https://github.com/llvm/llvm-project/pull/169359
5. https://github.com/llvm/llvm-project/pull/169360
---
Full diff: https://github.com/llvm/llvm-project/pull/169358.diff
2 Files Affected:
- (modified) llvm/lib/LTO/LTOBackend.cpp (+33)
- (added) llvm/test/LTO/X86/alloc-token.ll (+34)
``diff
diff --git a/llvm/lib/LTO/LTOBackend.cpp b/llvm/lib/LTO/LTOBackend.cpp
index 93118becedbac..190cec4f5701c 100644
--- a/llvm/lib/LTO/LTOBackend.cpp
+++ b/llvm/lib/LTO/LTOBackend.cpp
@@ -31,6 +31,7 @@
#include "llvm/Passes/PassBuilder.h"
#include "llvm/Passes/PassPlugin.h"
#include "llvm/Passes/StandardInstrumentations.h"
+#include "llvm/Support/AllocToken.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/FileSystem.h"
#include "llvm/Support/MemoryBuffer.h"
@@ -42,6 +43,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include "llvm/Transforms/IPO/WholeProgramDevirt.h"
+#include "llvm/Transforms/Instrumentation/AllocToken.h"
#include "llvm/Transforms/Utils/FunctionImportUtils.h"
#include "llvm/Transforms/Utils/SplitModule.h"
#include
@@ -68,6 +70,10 @@ static cl::opt EmbedBitcode(
"Embed post merge, but before optimizations")),
cl::desc("Embed LLVM bitcode in object files produced by LTO"));
+static cl::opt LTOAllocTokenMode(
+"lto-alloc-token-mode", cl::init(""),
+cl::desc("Enable AllocToken instrumentation during LTO with chosen mode"));
+
static cl::opt ThinLTOAssumeMerged(
"thinlto-assume-merged", cl::init(false),
cl::desc("Assume the input has already undergone ThinLTO function "
@@ -198,6 +204,31 @@ static void RegisterPassPlugins(ArrayRef
PassPlugins,
}
}
+// Register instrumentation passes that need to run late in the pipeline; these
+// are non-optimization passes and need to run after most optimizations to
avoid
+// interfering with them (e.g. PGHO) or to capture the final state of the code.
+static void registerBackendInstrumentation(PassBuilder &PB) {
+ if (!LTOAllocTokenMode.empty()) {
+AllocTokenOptions Opts;
+if (auto Mode = getAllocTokenModeFromString(LTOAllocTokenMode))
+ Opts.Mode = *Mode;
+else
+ report_fatal_error("invalid lto-alloc-token-mode: " +
+ Twine(LTOAllocTokenMode));
+
+// ThinLTO backend
+PB.registerOptimizerLastEPCallback(
+[Opts](ModulePassManager &MPM, OptimizationLevel, ThinOrFullLTOPhase) {
+ MPM.addPass(AllocTokenPass(Opts));
+});
+// Full LTO backend
+PB.registerFullLinkTimeOptimizationLastEPCallback(
+[Opts](ModulePassManager &MPM, OptimizationLevel) {
+ MPM.addPass(AllocTokenPass(Opts));
+});
+ }
+}
+
static std::unique_ptr
createTargetMachine(const Config &Conf, const Target *TheTarget, Module &M) {
const Triple &TheTriple = M.getTargetTriple();
@@ -277,6 +308,8 @@ static void runNewPMPasses(const Config &Conf, Module &Mod,
TargetMachine *TM,
RegisterPassPlugins(Conf.PassPlugins, PB);
+ registerBackendInstrumentation(PB);
+
std::unique_ptr TLII(
new TargetLibraryInfoImpl(TM->getTargetTriple()));
if (Conf.Freestanding)
diff --git a/llvm/test/LTO/X86/alloc-token.ll b/llvm/test/LTO/X86/alloc-token.ll
new file mode 100644
index 0..873b7c94620bc
--- /dev/null
+++ b/llvm/test/LTO/X86/alloc-token.ll
@@ -0,0 +1,34 @@
+; RUN: llvm-as %s -o %t.bc
+;
+; RUN: llvm-lto2 run -lto-alloc-token-mode=default %t.bc -o %t.out \
+; RUN: -r=%t.bc,main,plx \
+; RUN: -r=%t.bc,_Znwm, \
+; RUN: -r=%t.bc,sink,pl
+; RUN: llvm-objdump -d -r %t.out.0 | FileCheck %s
--check-prefixes=CHECK,DEFAULT
+;
+; RUN: llvm-lto2 run -lto-alloc-token-mode=default -alloc-token-fast-abi
-alloc-token-max=1 %t.bc -o %t.out \
+; RUN: -r=%t.bc,main,plx \
+; RUN: -r=%t.bc,_Znwm, \
+; RUN: -r=%t.bc,sink,pl
+; RUN: llvm-objdump -d -r %t.out.0 | FileCheck %s
--check-prefixes=CHECK,FASTABI
+
+target datalayout =
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+declare ptr @_Znwm(i64) #0
+
+@sink = global ptr null
+
+; CHECK-LABEL: :
+; CHECK: callq
+; DEFAULT-NEXT: R_X86_64_PLT32 __alloc_token__Znwm
+; FASTABI-NEXT: R_X86_64_PLT32 __alloc_token_0__Znwm
+define void @main() sanitize_alloc_token {
+ %call = call ptr @_Znwm(i64 8) #0, !alloc_token !0
+ store volatile ptr %call, ptr @sink
[llvm-branch-commits] [clang] [Clang][ThinLTO] Wire up AllocToken pass to run in ThinLTO backend (PR #169244)
melver wrote: Superseded by https://github.com/llvm/llvm-project/pull/169360 https://github.com/llvm/llvm-project/pull/169244 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Clang][CodeGen] Move AllocToken pass to backend LTO phases (PR #169360)
github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff origin/main HEAD --extensions cpp,h,c -- clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp clang/include/clang/Driver/SanitizerArgs.h clang/lib/CodeGen/BackendUtil.cpp clang/lib/Driver/ToolChains/CommonArgs.cpp clang/test/CodeGen/lto-newpm-pipeline.c clang/test/Driver/fsanitize-alloc-token.c llvm/include/llvm/LTO/Config.h llvm/lib/LTO/LTOBackend.cpp --diff_from_common_commit `` :warning: The reproduction instructions above might return results for more than one PR in a stack if you are using a stacked PR workflow. You can limit the results by changing `origin/main` to the base branch/commit you want to compare against. :warning: View the diff from clang-format here. ``diff diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index e889061ee..8ea84c72b 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -1393,11 +1393,11 @@ void tools::addLTOOptions(const ToolChain &ToolChain, const ArgList &Args, CmdArgs.push_back(Args.MakeArgString(Twine(PluginOptPrefix) + "-lto-alloc-token-mode=" + Mode)); if (Args.hasArg(options::OPT_fsanitize_alloc_token_fast_abi)) - CmdArgs.push_back(Args.MakeArgString(Twine(PluginOptPrefix) + - "-alloc-token-fast-abi")); + CmdArgs.push_back( + Args.MakeArgString(Twine(PluginOptPrefix) + "-alloc-token-fast-abi")); if (Args.hasArg(options::OPT_fsanitize_alloc_token_extended)) - CmdArgs.push_back(Args.MakeArgString(Twine(PluginOptPrefix) + - "-alloc-token-extended")); + CmdArgs.push_back( + Args.MakeArgString(Twine(PluginOptPrefix) + "-alloc-token-extended")); if (Arg *A = Args.getLastArg(options::OPT_falloc_token_max_EQ)) CmdArgs.push_back(Args.MakeArgString( Twine(PluginOptPrefix) + "-alloc-token-max=" + A->getValue())); `` https://github.com/llvm/llvm-project/pull/169360 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Clang][ThinLTO] Wire up AllocToken pass to run in ThinLTO backend (PR #169244)
https://github.com/melver closed https://github.com/llvm/llvm-project/pull/169244 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [LTO] Support enabling AllocToken instrumentation in backend (PR #169358)
https://github.com/melver created https://github.com/llvm/llvm-project/pull/169358 Add support for running `AllocTokenPass` during the LTO backend phase, controlled by a new internal option `-lto-alloc-token-mode`. This is required to support running the pass after other heap allocation optimizations (such as PGHO) in the LTO backend, avoiding interference between them. https://github.com/llvm/llvm-project/pull/169244 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Clang][CodeGen] Move AllocToken pass to backend LTO phases (PR #169360)
https://github.com/melver edited https://github.com/llvm/llvm-project/pull/169360 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [LTO] Support enabling AllocToken instrumentation in backend (PR #169358)
https://github.com/melver edited https://github.com/llvm/llvm-project/pull/169358 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [LTO] Support enabling AllocToken instrumentation in backend (PR #169358)
https://github.com/melver ready_for_review https://github.com/llvm/llvm-project/pull/169358 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Clang][MemProf] Add end-to-end test for PGHO rewriting (PR #169243)
https://github.com/melver edited https://github.com/llvm/llvm-project/pull/169243 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Clang] Make -falloc-token-mode a hidden frontend option (PR #169359)
https://github.com/melver edited https://github.com/llvm/llvm-project/pull/169359 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Clang][CodeGen] Move AllocToken pass to backend LTO phases (PR #169360)
https://github.com/melver updated https://github.com/llvm/llvm-project/pull/169360 >From 3c13dc3871b39304144d2ac3da7498d3d8cec495 Mon Sep 17 00:00:00 2001 From: Marco Elver Date: Mon, 24 Nov 2025 17:44:32 +0100 Subject: [PATCH] fix formatting Created using spr 1.3.8-beta.1 --- clang/lib/Driver/ToolChains/CommonArgs.cpp | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index e889061ee619a..8ea84c72b6a2e 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -1393,11 +1393,11 @@ void tools::addLTOOptions(const ToolChain &ToolChain, const ArgList &Args, CmdArgs.push_back(Args.MakeArgString(Twine(PluginOptPrefix) + "-lto-alloc-token-mode=" + Mode)); if (Args.hasArg(options::OPT_fsanitize_alloc_token_fast_abi)) - CmdArgs.push_back(Args.MakeArgString(Twine(PluginOptPrefix) + - "-alloc-token-fast-abi")); + CmdArgs.push_back( + Args.MakeArgString(Twine(PluginOptPrefix) + "-alloc-token-fast-abi")); if (Args.hasArg(options::OPT_fsanitize_alloc_token_extended)) - CmdArgs.push_back(Args.MakeArgString(Twine(PluginOptPrefix) + - "-alloc-token-extended")); + CmdArgs.push_back( + Args.MakeArgString(Twine(PluginOptPrefix) + "-alloc-token-extended")); if (Arg *A = Args.getLastArg(options::OPT_falloc_token_max_EQ)) CmdArgs.push_back(Args.MakeArgString( Twine(PluginOptPrefix) + "-alloc-token-max=" + A->getValue())); ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [LTO] Support enabling AllocToken instrumentation in backend (PR #169358)
https://github.com/melver edited https://github.com/llvm/llvm-project/pull/169358 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [llvm] [mlir] [MLIR][OpenMP] Add OpenMPToLLVMIRTranslation support for is_device_ptr (PR #169367)
github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff origin/main HEAD --extensions cpp -- mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp --diff_from_common_commit `` :warning: The reproduction instructions above might return results for more than one PR in a stack if you are using a stacked PR workflow. You can limit the results by changing `origin/main` to the base branch/commit you want to compare against. :warning: View the diff from clang-format here. ``diff diff --git a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp index 9fa0e6593..00c4c351c 100644 --- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp +++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp @@ -3993,9 +3993,8 @@ static void collectMapDataFromMapOperands( llvm::Value *origValue = moduleTranslation.lookupValue(offloadPtr); auto mapType = convertClauseMapFlags(mapOp.getMapType()); auto mapTypeAlways = llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_ALWAYS; -bool isDevicePtr = -(mapOp.getMapType() & omp::ClauseMapFlags::storage) == -omp::ClauseMapFlags::storage; +bool isDevicePtr = (mapOp.getMapType() & omp::ClauseMapFlags::storage) == + omp::ClauseMapFlags::storage; mapData.OriginalValue.push_back(origValue); mapData.BasePointers.push_back(origValue); `` https://github.com/llvm/llvm-project/pull/169367 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][arith] Add support for `sitofp`, `uitofp` to `ArithToAPFloat` (PR #169284)
@@ -115,4 +115,16 @@ MLIR_APFLOAT_WRAPPERS_EXPORT uint64_t
_mlir_apfloat_convert_to_int(
val.convertToInteger(result, llvm::RoundingMode::NearestTiesToEven,
&isExact);
return result.getZExtValue();
}
+
+MLIR_APFLOAT_WRAPPERS_EXPORT uint64_t _mlir_apfloat_convert_from_int(
+int32_t semantics, int32_t inputWidth, bool isUnsigned, uint64_t a) {
+ llvm::APInt val(inputWidth, a, /*isSigned=*/!isUnsigned);
makslevental wrote:
lol
https://github.com/llvm/llvm-project/pull/169284
___
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [GOFF] Implement lowerConstant/emitGlobalVariables/emitGlobalAlias (PR #169362)
https://github.com/tltao updated
https://github.com/llvm/llvm-project/pull/169362
>From d565c7d8c772cf1c66d57bd1db0387ad90bb1d9b Mon Sep 17 00:00:00 2001
From: Tony Tao
Date: Wed, 19 Nov 2025 19:55:35 +
Subject: [PATCH 1/6] Implement emitGlobalVariable and lowerConstant
---
clang/lib/Lex/HeaderMap.cpp | 1 +
llvm/lib/Support/VirtualOutputBackends.cpp| 23 +---
llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp | 56 +++
llvm/lib/Target/SystemZ/SystemZAsmPrinter.h | 2 +
4 files changed, 74 insertions(+), 8 deletions(-)
diff --git a/clang/lib/Lex/HeaderMap.cpp b/clang/lib/Lex/HeaderMap.cpp
index a7b670f00ac6e..588b32ee9ca8e 100644
--- a/clang/lib/Lex/HeaderMap.cpp
+++ b/clang/lib/Lex/HeaderMap.cpp
@@ -18,6 +18,7 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/MemoryBuffer.h"
+#include "llvm/Support/SystemZ/zOSSupport.h"
#include
#include
#include
diff --git a/llvm/lib/Support/VirtualOutputBackends.cpp
b/llvm/lib/Support/VirtualOutputBackends.cpp
index de59b8ab63a53..33a56c7f5f607 100644
--- a/llvm/lib/Support/VirtualOutputBackends.cpp
+++ b/llvm/lib/Support/VirtualOutputBackends.cpp
@@ -254,6 +254,18 @@ static Error createDirectoriesOnDemand(StringRef
OutputPath,
});
}
+static sys::fs::OpenFlags generateFlagsFromConfig(OutputConfig Config) {
+ sys::fs::OpenFlags OF = sys::fs::OF_None;
+ if (Config.getTextWithCRLF())
+ OF |= sys::fs::OF_TextWithCRLF;
+ else if (Config.getText())
+ OF |= sys::fs::OF_Text;
+ if (Config.getAppend())
+ OF |= sys::fs::OF_Append;
+
+ return OF;
+}
+
Error OnDiskOutputFile::tryToCreateTemporary(std::optional &FD) {
// Create a temporary file.
// Insert - before the extension (if any), and because some tools
@@ -268,9 +280,10 @@ Error
OnDiskOutputFile::tryToCreateTemporary(std::optional &FD) {
return createDirectoriesOnDemand(OutputPath, Config, [&]() -> Error {
int NewFD;
+ sys::fs::OpenFlags OF = generateFlagsFromConfig(Config);
SmallString<128> UniquePath;
if (std::error_code EC =
-sys::fs::createUniqueFile(ModelPath, NewFD, UniquePath))
+sys::fs::createUniqueFile(ModelPath, NewFD, UniquePath, OF))
return make_error(ModelPath, OutputPath, EC);
if (Config.getDiscardOnSignal())
@@ -312,13 +325,7 @@ Error OnDiskOutputFile::initializeFile(std::optional
&FD) {
// Not using a temporary file. Open the final output file.
return createDirectoriesOnDemand(OutputPath, Config, [&]() -> Error {
int NewFD;
-sys::fs::OpenFlags OF = sys::fs::OF_None;
-if (Config.getTextWithCRLF())
- OF |= sys::fs::OF_TextWithCRLF;
-else if (Config.getText())
- OF |= sys::fs::OF_Text;
-if (Config.getAppend())
- OF |= sys::fs::OF_Append;
+sys::fs::OpenFlags OF = generateFlagsFromConfig(Config);
if (std::error_code EC = sys::fs::openFileForWrite(
OutputPath, NewFD, sys::fs::CD_CreateAlways, OF))
return convertToOutputError(OutputPath, EC);
diff --git a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
index 193e6ef6d1e64..151b59334cab1 100644
--- a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
@@ -1123,6 +1123,7 @@ void SystemZAsmPrinter::emitEndOfAsmFile(Module &M) {
: MCSA_Global);
OutStreamer->emitSymbolAttribute(Sym, isa(GO) ? MCSA_Code
: MCSA_Data);
+llvm::dbgs() << "TONY emitting " << Sym->getName() << "\n";
}
}
OutStreamer->switchSection(
@@ -1699,6 +1700,61 @@ void SystemZAsmPrinter::emitPPA2(Module &M) {
OutStreamer->popSection();
}
+void SystemZAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
+ if (TM.getTargetTriple().isOSzOS()) {
+auto *Sym = getSymbol(GV);
+OutStreamer->emitSymbolAttribute(Sym, MCSA_Data);
+ }
+
+ AsmPrinter::emitGlobalVariable(GV);
+}
+
+const MCExpr *SystemZAsmPrinter::lowerConstant(const Constant *CV,
+ const Constant *BaseCV,
+ uint64_t Offset) {
+ const Triple &TargetTriple = TM.getTargetTriple();
+
+ if (TargetTriple.isOSzOS()) {
+const GlobalAlias *GA = dyn_cast(CV);
+const GlobalVariable *GV = dyn_cast(CV);
+const Function *FV = dyn_cast(CV);
+bool IsFunc = !GV && (FV || (GA && isa(GA->getAliaseeObject(;
+
+MCSymbol *Sym = NULL;
+
+if (GA)
+ Sym = getSymbol(GA);
+else if (IsFunc)
+ Sym = getSymbol(FV);
+else if (GV)
+ Sym = getSymbol(GV);
+
+if (IsFunc) {
+ OutStreamer->emitSymbolAttribute(Sym, MCSA_Code);
+ if (FV->hasExternalLinkage()) {
+return MCSpecifierExpr::create(MCSymbolRefExpr::create(Sym,
Out
[llvm-branch-commits] [flang] [llvm] [mlir] [MLIR][OpenMP] Add OpenMPToLLVMIRTranslation support for is_device_ptr (PR #169367)
https://github.com/TIFitis created
https://github.com/llvm/llvm-project/pull/169367
None
>From c6440f42e19a54bfce0d7f55ca40b5a28b30f7bc Mon Sep 17 00:00:00 2001
From: Akash Banerjee
Date: Mon, 24 Nov 2025 17:05:29 +
Subject: [PATCH] [MLIR][OpenMP] Add OpenMPToLLVMIRTranslation support for
is_device_ptr
---
.../OpenMP/map-types-and-sizes.f90| 9 +++
.../OpenMP/OpenMPToLLVMIRTranslation.cpp | 18 +++--
mlir/test/Target/LLVMIR/openmp-todo.mlir | 11 ---
.../fortran/target-is-device-ptr.f90 | 79 +++
4 files changed, 100 insertions(+), 17 deletions(-)
create mode 100644 offload/test/offloading/fortran/target-is-device-ptr.f90
diff --git a/flang/test/Integration/OpenMP/map-types-and-sizes.f90
b/flang/test/Integration/OpenMP/map-types-and-sizes.f90
index 44a049f5ac510..85434460bbea6 100644
--- a/flang/test/Integration/OpenMP/map-types-and-sizes.f90
+++ b/flang/test/Integration/OpenMP/map-types-and-sizes.f90
@@ -33,6 +33,15 @@ subroutine mapType_array
!$omp end target
end subroutine mapType_array
+!CHECK: @.offload_sizes{{.*}} = private unnamed_addr constant [1 x i64] [i64 8]
+!CHECK: @.offload_maptypes{{.*}} = private unnamed_addr constant [1 x i64]
[i64 288]
+subroutine mapType_is_device_ptr
+ use iso_c_binding, only : c_ptr
+ type(c_ptr) :: p
+ !$omp target is_device_ptr(p)
+ !$omp end target
+end subroutine mapType_is_device_ptr
+
!CHECK: @.offload_sizes{{.*}} = private unnamed_addr constant [4 x i64] [i64
0, i64 24, i64 8, i64 0]
!CHECK: @.offload_maptypes{{.*}} = private unnamed_addr constant [4 x i64]
[i64 32, i64 281474976711169, i64 281474976711171, i64 281474976711187]
subroutine mapType_ptr
diff --git
a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
index f28454075f1d3..9fa0e659320d6 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
@@ -332,10 +332,7 @@ static LogicalResult checkImplementationStatus(Operation
&op) {
op.getInReductionSyms())
result = todo("in_reduction");
};
- auto checkIsDevicePtr = [&todo](auto op, LogicalResult &result) {
-if (!op.getIsDevicePtrVars().empty())
- result = todo("is_device_ptr");
- };
+ auto checkIsDevicePtr = [](auto, LogicalResult &) {};
auto checkLinear = [&todo](auto op, LogicalResult &result) {
if (!op.getLinearVars().empty() || !op.getLinearStepVars().empty())
result = todo("linear");
@@ -3996,6 +3993,9 @@ static void collectMapDataFromMapOperands(
llvm::Value *origValue = moduleTranslation.lookupValue(offloadPtr);
auto mapType = convertClauseMapFlags(mapOp.getMapType());
auto mapTypeAlways = llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_ALWAYS;
+bool isDevicePtr =
+(mapOp.getMapType() & omp::ClauseMapFlags::storage) ==
+omp::ClauseMapFlags::storage;
mapData.OriginalValue.push_back(origValue);
mapData.BasePointers.push_back(origValue);
@@ -4006,7 +4006,12 @@ static void collectMapDataFromMapOperands(
mapData.Sizes.push_back(
builder.getInt64(dl.getTypeSize(mapOp.getVarType(;
mapData.MapClause.push_back(mapOp.getOperation());
-if (llvm::to_underlying(mapType & mapTypeAlways)) {
+if (isDevicePtr) {
+ mapType |= llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_TARGET_PARAM;
+ mapType |= llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_LITERAL;
+ mapData.Types.push_back(mapType);
+ mapData.Mappers.push_back(nullptr);
+} else if (llvm::to_underlying(mapType & mapTypeAlways)) {
// Descriptors are mapped with the ALWAYS flag, since they can get
// rematerialized, so the address of the decriptor for a given object
// may change from one place to another.
@@ -4029,7 +4034,8 @@ static void collectMapDataFromMapOperands(
mapData.Names.push_back(LLVM::createMappingInformation(
mapOp.getLoc(), *moduleTranslation.getOpenMPBuilder()));
mapData.DevicePointers.push_back(
-llvm::OpenMPIRBuilder::DeviceInfoTy::Address);
+isDevicePtr ? llvm::OpenMPIRBuilder::DeviceInfoTy::Pointer
+: llvm::OpenMPIRBuilder::DeviceInfoTy::Address);
mapData.IsAMapping.push_back(false);
mapData.IsAMember.push_back(checkIsAMember(hasDevAddrOperands, mapOp));
}
diff --git a/mlir/test/Target/LLVMIR/openmp-todo.mlir
b/mlir/test/Target/LLVMIR/openmp-todo.mlir
index af6d254cfd3c3..0704008aa7135 100644
--- a/mlir/test/Target/LLVMIR/openmp-todo.mlir
+++ b/mlir/test/Target/LLVMIR/openmp-todo.mlir
@@ -238,17 +238,6 @@ llvm.func @target_in_reduction(%x : !llvm.ptr) {
// -
-llvm.func @target_is_device_ptr(%x : !llvm.ptr) {
- // expected-error@below {{not yet implemented: Unhandled clause
is_device_ptr in omp.target operation}}
- // expected-error@below {{LLVM Translation failed for operation: omp.target}}
[llvm-branch-commits] [clang] [llvm] [GOFF] Implement lowerConstant/emitGlobalVariables/emitGlobalAlias for z/OS (PR #169362)
https://github.com/tltao edited https://github.com/llvm/llvm-project/pull/169362 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][arith] Add support for `sitofp`, `uitofp` to `ArithToAPFloat` (PR #169284)
https://github.com/makslevental edited https://github.com/llvm/llvm-project/pull/169284 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][arith] Add support for `sitofp`, `uitofp` to `ArithToAPFloat` (PR #169284)
@@ -115,4 +115,16 @@ MLIR_APFLOAT_WRAPPERS_EXPORT uint64_t _mlir_apfloat_convert_to_int( val.convertToInteger(result, llvm::RoundingMode::NearestTiesToEven, &isExact); return result.getZExtValue(); } + +MLIR_APFLOAT_WRAPPERS_EXPORT uint64_t _mlir_apfloat_convert_from_int( makslevental wrote: noob q: shouldn't we be returning a float? why bitcast back to int? https://github.com/llvm/llvm-project/pull/169284 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [llvm] [mlir] [MLIR][OpenMP] Add OpenMPToLLVMIRTranslation support for is_device_ptr (PR #169367)
llvmbot wrote:
@llvm/pr-subscribers-mlir-openmp
Author: Akash Banerjee (TIFitis)
Changes
This PR adds support for the OpenMP `is_device_ptr` clause in the MLIR to LLVM
IR translation for target regions. The `is_device_ptr` clause allows device
pointers (allocated via OpenMP runtime APIs) to be used directly in target
regions without implicit mapping.
---
Full diff: https://github.com/llvm/llvm-project/pull/169367.diff
4 Files Affected:
- (modified) flang/test/Integration/OpenMP/map-types-and-sizes.f90 (+9)
- (modified)
mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp (+11-6)
- (modified) mlir/test/Target/LLVMIR/openmp-todo.mlir (-11)
- (added) offload/test/offloading/fortran/target-is-device-ptr.f90 (+79)
``diff
diff --git a/flang/test/Integration/OpenMP/map-types-and-sizes.f90
b/flang/test/Integration/OpenMP/map-types-and-sizes.f90
index 44a049f5ac510..85434460bbea6 100644
--- a/flang/test/Integration/OpenMP/map-types-and-sizes.f90
+++ b/flang/test/Integration/OpenMP/map-types-and-sizes.f90
@@ -33,6 +33,15 @@ subroutine mapType_array
!$omp end target
end subroutine mapType_array
+!CHECK: @.offload_sizes{{.*}} = private unnamed_addr constant [1 x i64] [i64 8]
+!CHECK: @.offload_maptypes{{.*}} = private unnamed_addr constant [1 x i64]
[i64 288]
+subroutine mapType_is_device_ptr
+ use iso_c_binding, only : c_ptr
+ type(c_ptr) :: p
+ !$omp target is_device_ptr(p)
+ !$omp end target
+end subroutine mapType_is_device_ptr
+
!CHECK: @.offload_sizes{{.*}} = private unnamed_addr constant [4 x i64] [i64
0, i64 24, i64 8, i64 0]
!CHECK: @.offload_maptypes{{.*}} = private unnamed_addr constant [4 x i64]
[i64 32, i64 281474976711169, i64 281474976711171, i64 281474976711187]
subroutine mapType_ptr
diff --git
a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
index f28454075f1d3..00c4c351caa4e 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
@@ -332,10 +332,7 @@ static LogicalResult checkImplementationStatus(Operation
&op) {
op.getInReductionSyms())
result = todo("in_reduction");
};
- auto checkIsDevicePtr = [&todo](auto op, LogicalResult &result) {
-if (!op.getIsDevicePtrVars().empty())
- result = todo("is_device_ptr");
- };
+ auto checkIsDevicePtr = [](auto, LogicalResult &) {};
auto checkLinear = [&todo](auto op, LogicalResult &result) {
if (!op.getLinearVars().empty() || !op.getLinearStepVars().empty())
result = todo("linear");
@@ -3996,6 +3993,8 @@ static void collectMapDataFromMapOperands(
llvm::Value *origValue = moduleTranslation.lookupValue(offloadPtr);
auto mapType = convertClauseMapFlags(mapOp.getMapType());
auto mapTypeAlways = llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_ALWAYS;
+bool isDevicePtr = (mapOp.getMapType() & omp::ClauseMapFlags::storage) ==
+ omp::ClauseMapFlags::storage;
mapData.OriginalValue.push_back(origValue);
mapData.BasePointers.push_back(origValue);
@@ -4006,7 +4005,12 @@ static void collectMapDataFromMapOperands(
mapData.Sizes.push_back(
builder.getInt64(dl.getTypeSize(mapOp.getVarType(;
mapData.MapClause.push_back(mapOp.getOperation());
-if (llvm::to_underlying(mapType & mapTypeAlways)) {
+if (isDevicePtr) {
+ mapType |= llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_TARGET_PARAM;
+ mapType |= llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_LITERAL;
+ mapData.Types.push_back(mapType);
+ mapData.Mappers.push_back(nullptr);
+} else if (llvm::to_underlying(mapType & mapTypeAlways)) {
// Descriptors are mapped with the ALWAYS flag, since they can get
// rematerialized, so the address of the decriptor for a given object
// may change from one place to another.
@@ -4029,7 +4033,8 @@ static void collectMapDataFromMapOperands(
mapData.Names.push_back(LLVM::createMappingInformation(
mapOp.getLoc(), *moduleTranslation.getOpenMPBuilder()));
mapData.DevicePointers.push_back(
-llvm::OpenMPIRBuilder::DeviceInfoTy::Address);
+isDevicePtr ? llvm::OpenMPIRBuilder::DeviceInfoTy::Pointer
+: llvm::OpenMPIRBuilder::DeviceInfoTy::Address);
mapData.IsAMapping.push_back(false);
mapData.IsAMember.push_back(checkIsAMember(hasDevAddrOperands, mapOp));
}
diff --git a/mlir/test/Target/LLVMIR/openmp-todo.mlir
b/mlir/test/Target/LLVMIR/openmp-todo.mlir
index af6d254cfd3c3..0704008aa7135 100644
--- a/mlir/test/Target/LLVMIR/openmp-todo.mlir
+++ b/mlir/test/Target/LLVMIR/openmp-todo.mlir
@@ -238,17 +238,6 @@ llvm.func @target_in_reduction(%x : !llvm.ptr) {
// -
-llvm.func @target_is_device_ptr(%x : !llvm.ptr) {
- // expected-error@below {{not yet implemented: Unhandled clause
is_device_ptr in omp.target operat
[llvm-branch-commits] [flang] [llvm] [mlir] [MLIR][OpenMP] Add OpenMPToLLVMIRTranslation support for is_device_ptr (PR #169367)
https://github.com/TIFitis updated
https://github.com/llvm/llvm-project/pull/169367
>From c6440f42e19a54bfce0d7f55ca40b5a28b30f7bc Mon Sep 17 00:00:00 2001
From: Akash Banerjee
Date: Mon, 24 Nov 2025 17:05:29 +
Subject: [PATCH 1/2] [MLIR][OpenMP] Add OpenMPToLLVMIRTranslation support for
is_device_ptr
---
.../OpenMP/map-types-and-sizes.f90| 9 +++
.../OpenMP/OpenMPToLLVMIRTranslation.cpp | 18 +++--
mlir/test/Target/LLVMIR/openmp-todo.mlir | 11 ---
.../fortran/target-is-device-ptr.f90 | 79 +++
4 files changed, 100 insertions(+), 17 deletions(-)
create mode 100644 offload/test/offloading/fortran/target-is-device-ptr.f90
diff --git a/flang/test/Integration/OpenMP/map-types-and-sizes.f90
b/flang/test/Integration/OpenMP/map-types-and-sizes.f90
index 44a049f5ac510..85434460bbea6 100644
--- a/flang/test/Integration/OpenMP/map-types-and-sizes.f90
+++ b/flang/test/Integration/OpenMP/map-types-and-sizes.f90
@@ -33,6 +33,15 @@ subroutine mapType_array
!$omp end target
end subroutine mapType_array
+!CHECK: @.offload_sizes{{.*}} = private unnamed_addr constant [1 x i64] [i64 8]
+!CHECK: @.offload_maptypes{{.*}} = private unnamed_addr constant [1 x i64]
[i64 288]
+subroutine mapType_is_device_ptr
+ use iso_c_binding, only : c_ptr
+ type(c_ptr) :: p
+ !$omp target is_device_ptr(p)
+ !$omp end target
+end subroutine mapType_is_device_ptr
+
!CHECK: @.offload_sizes{{.*}} = private unnamed_addr constant [4 x i64] [i64
0, i64 24, i64 8, i64 0]
!CHECK: @.offload_maptypes{{.*}} = private unnamed_addr constant [4 x i64]
[i64 32, i64 281474976711169, i64 281474976711171, i64 281474976711187]
subroutine mapType_ptr
diff --git
a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
index f28454075f1d3..9fa0e659320d6 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
@@ -332,10 +332,7 @@ static LogicalResult checkImplementationStatus(Operation
&op) {
op.getInReductionSyms())
result = todo("in_reduction");
};
- auto checkIsDevicePtr = [&todo](auto op, LogicalResult &result) {
-if (!op.getIsDevicePtrVars().empty())
- result = todo("is_device_ptr");
- };
+ auto checkIsDevicePtr = [](auto, LogicalResult &) {};
auto checkLinear = [&todo](auto op, LogicalResult &result) {
if (!op.getLinearVars().empty() || !op.getLinearStepVars().empty())
result = todo("linear");
@@ -3996,6 +3993,9 @@ static void collectMapDataFromMapOperands(
llvm::Value *origValue = moduleTranslation.lookupValue(offloadPtr);
auto mapType = convertClauseMapFlags(mapOp.getMapType());
auto mapTypeAlways = llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_ALWAYS;
+bool isDevicePtr =
+(mapOp.getMapType() & omp::ClauseMapFlags::storage) ==
+omp::ClauseMapFlags::storage;
mapData.OriginalValue.push_back(origValue);
mapData.BasePointers.push_back(origValue);
@@ -4006,7 +4006,12 @@ static void collectMapDataFromMapOperands(
mapData.Sizes.push_back(
builder.getInt64(dl.getTypeSize(mapOp.getVarType(;
mapData.MapClause.push_back(mapOp.getOperation());
-if (llvm::to_underlying(mapType & mapTypeAlways)) {
+if (isDevicePtr) {
+ mapType |= llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_TARGET_PARAM;
+ mapType |= llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_LITERAL;
+ mapData.Types.push_back(mapType);
+ mapData.Mappers.push_back(nullptr);
+} else if (llvm::to_underlying(mapType & mapTypeAlways)) {
// Descriptors are mapped with the ALWAYS flag, since they can get
// rematerialized, so the address of the decriptor for a given object
// may change from one place to another.
@@ -4029,7 +4034,8 @@ static void collectMapDataFromMapOperands(
mapData.Names.push_back(LLVM::createMappingInformation(
mapOp.getLoc(), *moduleTranslation.getOpenMPBuilder()));
mapData.DevicePointers.push_back(
-llvm::OpenMPIRBuilder::DeviceInfoTy::Address);
+isDevicePtr ? llvm::OpenMPIRBuilder::DeviceInfoTy::Pointer
+: llvm::OpenMPIRBuilder::DeviceInfoTy::Address);
mapData.IsAMapping.push_back(false);
mapData.IsAMember.push_back(checkIsAMember(hasDevAddrOperands, mapOp));
}
diff --git a/mlir/test/Target/LLVMIR/openmp-todo.mlir
b/mlir/test/Target/LLVMIR/openmp-todo.mlir
index af6d254cfd3c3..0704008aa7135 100644
--- a/mlir/test/Target/LLVMIR/openmp-todo.mlir
+++ b/mlir/test/Target/LLVMIR/openmp-todo.mlir
@@ -238,17 +238,6 @@ llvm.func @target_in_reduction(%x : !llvm.ptr) {
// -
-llvm.func @target_is_device_ptr(%x : !llvm.ptr) {
- // expected-error@below {{not yet implemented: Unhandled clause
is_device_ptr in omp.target operation}}
- // expected-error@below {{LLVM Translation failed for operation: omp.target}}
-
[llvm-branch-commits] [flang] [llvm] [mlir] [MLIR][OpenMP] Add OpenMPToLLVMIRTranslation support for is_device_ptr (PR #169367)
https://github.com/TIFitis edited https://github.com/llvm/llvm-project/pull/169367 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [llvm] [mlir] [MLIR][OpenMP] Add OpenMPToLLVMIRTranslation support for is_device_ptr (PR #169367)
https://github.com/TIFitis ready_for_review https://github.com/llvm/llvm-project/pull/169367 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [llvm] [mlir] [MLIR][OpenMP] Add OpenMPToLLVMIRTranslation support for is_device_ptr (PR #169367)
llvmbot wrote:
@llvm/pr-subscribers-offload
Author: Akash Banerjee (TIFitis)
Changes
This PR adds support for the OpenMP `is_device_ptr` clause in the MLIR to LLVM
IR translation for target regions. The `is_device_ptr` clause allows device
pointers (allocated via OpenMP runtime APIs) to be used directly in target
regions without implicit mapping.
---
Full diff: https://github.com/llvm/llvm-project/pull/169367.diff
4 Files Affected:
- (modified) flang/test/Integration/OpenMP/map-types-and-sizes.f90 (+9)
- (modified)
mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp (+11-6)
- (modified) mlir/test/Target/LLVMIR/openmp-todo.mlir (-11)
- (added) offload/test/offloading/fortran/target-is-device-ptr.f90 (+79)
``diff
diff --git a/flang/test/Integration/OpenMP/map-types-and-sizes.f90
b/flang/test/Integration/OpenMP/map-types-and-sizes.f90
index 44a049f5ac510..85434460bbea6 100644
--- a/flang/test/Integration/OpenMP/map-types-and-sizes.f90
+++ b/flang/test/Integration/OpenMP/map-types-and-sizes.f90
@@ -33,6 +33,15 @@ subroutine mapType_array
!$omp end target
end subroutine mapType_array
+!CHECK: @.offload_sizes{{.*}} = private unnamed_addr constant [1 x i64] [i64 8]
+!CHECK: @.offload_maptypes{{.*}} = private unnamed_addr constant [1 x i64]
[i64 288]
+subroutine mapType_is_device_ptr
+ use iso_c_binding, only : c_ptr
+ type(c_ptr) :: p
+ !$omp target is_device_ptr(p)
+ !$omp end target
+end subroutine mapType_is_device_ptr
+
!CHECK: @.offload_sizes{{.*}} = private unnamed_addr constant [4 x i64] [i64
0, i64 24, i64 8, i64 0]
!CHECK: @.offload_maptypes{{.*}} = private unnamed_addr constant [4 x i64]
[i64 32, i64 281474976711169, i64 281474976711171, i64 281474976711187]
subroutine mapType_ptr
diff --git
a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
index f28454075f1d3..00c4c351caa4e 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
@@ -332,10 +332,7 @@ static LogicalResult checkImplementationStatus(Operation
&op) {
op.getInReductionSyms())
result = todo("in_reduction");
};
- auto checkIsDevicePtr = [&todo](auto op, LogicalResult &result) {
-if (!op.getIsDevicePtrVars().empty())
- result = todo("is_device_ptr");
- };
+ auto checkIsDevicePtr = [](auto, LogicalResult &) {};
auto checkLinear = [&todo](auto op, LogicalResult &result) {
if (!op.getLinearVars().empty() || !op.getLinearStepVars().empty())
result = todo("linear");
@@ -3996,6 +3993,8 @@ static void collectMapDataFromMapOperands(
llvm::Value *origValue = moduleTranslation.lookupValue(offloadPtr);
auto mapType = convertClauseMapFlags(mapOp.getMapType());
auto mapTypeAlways = llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_ALWAYS;
+bool isDevicePtr = (mapOp.getMapType() & omp::ClauseMapFlags::storage) ==
+ omp::ClauseMapFlags::storage;
mapData.OriginalValue.push_back(origValue);
mapData.BasePointers.push_back(origValue);
@@ -4006,7 +4005,12 @@ static void collectMapDataFromMapOperands(
mapData.Sizes.push_back(
builder.getInt64(dl.getTypeSize(mapOp.getVarType(;
mapData.MapClause.push_back(mapOp.getOperation());
-if (llvm::to_underlying(mapType & mapTypeAlways)) {
+if (isDevicePtr) {
+ mapType |= llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_TARGET_PARAM;
+ mapType |= llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_LITERAL;
+ mapData.Types.push_back(mapType);
+ mapData.Mappers.push_back(nullptr);
+} else if (llvm::to_underlying(mapType & mapTypeAlways)) {
// Descriptors are mapped with the ALWAYS flag, since they can get
// rematerialized, so the address of the decriptor for a given object
// may change from one place to another.
@@ -4029,7 +4033,8 @@ static void collectMapDataFromMapOperands(
mapData.Names.push_back(LLVM::createMappingInformation(
mapOp.getLoc(), *moduleTranslation.getOpenMPBuilder()));
mapData.DevicePointers.push_back(
-llvm::OpenMPIRBuilder::DeviceInfoTy::Address);
+isDevicePtr ? llvm::OpenMPIRBuilder::DeviceInfoTy::Pointer
+: llvm::OpenMPIRBuilder::DeviceInfoTy::Address);
mapData.IsAMapping.push_back(false);
mapData.IsAMember.push_back(checkIsAMember(hasDevAddrOperands, mapOp));
}
diff --git a/mlir/test/Target/LLVMIR/openmp-todo.mlir
b/mlir/test/Target/LLVMIR/openmp-todo.mlir
index af6d254cfd3c3..0704008aa7135 100644
--- a/mlir/test/Target/LLVMIR/openmp-todo.mlir
+++ b/mlir/test/Target/LLVMIR/openmp-todo.mlir
@@ -238,17 +238,6 @@ llvm.func @target_in_reduction(%x : !llvm.ptr) {
// -
-llvm.func @target_is_device_ptr(%x : !llvm.ptr) {
- // expected-error@below {{not yet implemented: Unhandled clause
is_device_ptr in omp.target operation}
[llvm-branch-commits] [llvm] AMDGPU: Use RegClassByHwMode to manage GWS operand special case (PR #169373)
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/169373
On targets that require even aligned 64-bit VGPRs, GWS operands
require even alignment of a 32-bit operand. Previously we had a hacky
post-processing which added an implicit operand to try to manage
the constraint. This would require special casing in other passes
to avoid breaking the operand constraint. This moves the handling
into the instruction definition, so other passes no longer need
to consider this edge case. MC still does need to special case this,
to print/parse as a 32-bit register. This also still ends up net
less work than introducing even aligned 32-bit register classes.
This also should be applied to the image special case.
>From 40e1aad8852f778929ec935e5d87940b2a389baf Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Fri, 21 Nov 2025 14:11:01 -0500
Subject: [PATCH] AMDGPU: Use RegClassByHwMode to manage GWS operand special
case
On targets that require even aligned 64-bit VGPRs, GWS operands
require even alignment of a 32-bit operand. Previously we had a hacky
post-processing which added an implicit operand to try to manage
the constraint. This would require special casing in other passes
to avoid breaking the operand constraint. This moves the handling
into the instruction definition, so other passes no longer need
to consider this edge case. MC still does need to special case this,
to print/parse as a 32-bit register. This also still ends up net
less work than introducing even aligned 32-bit register classes.
This also should be applied to the image special case.
---
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 33 +-
.../AMDGPU/AMDGPUInstructionSelector.cpp | 48 ++-
.../AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 5 +
llvm/lib/Target/AMDGPU/DSInstructions.td | 2 +-
.../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 12 +
.../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 3 +
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 2 -
llvm/lib/Target/AMDGPU/SIInstrInfo.h | 1 +
llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 22 ++
llvm/test/CodeGen/AMDGPU/gws_agpr.ll | 342 ++
.../CodeGen/AMDGPU/verify-ds-gws-align.mir| 33 +-
llvm/test/MC/AMDGPU/ds_gws_sgpr_err.s | 32 ++
llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s | 30 +-
13 files changed, 301 insertions(+), 264 deletions(-)
create mode 100644 llvm/test/MC/AMDGPU/ds_gws_sgpr_err.s
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
index 6c36f8ad9b6a9..78a3ec7f0c266 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -3080,9 +3080,38 @@ void AMDGPUDAGToDAGISel::SelectDS_GWS(SDNode *N,
unsigned IntrID) {
SDValue OffsetField = CurDAG->getTargetConstant(ImmOffset, SL, MVT::i32);
const unsigned Opc = gwsIntrinToOpcode(IntrID);
+
+ const MCInstrDesc &InstrDesc = TII->get(Opc);
+ int Data0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::data0);
+
+ const TargetRegisterClass *DataRC = TII->getRegClass(InstrDesc, Data0Idx);
+
SmallVector Ops;
- if (HasVSrc)
-Ops.push_back(N->getOperand(2));
+ if (HasVSrc) {
+const SIRegisterInfo *TRI = Subtarget->getRegisterInfo();
+
+SDValue Data = N->getOperand(2);
+MVT DataVT = Data.getValueType().getSimpleVT();
+if (TRI->isTypeLegalForClass(*DataRC, DataVT)) {
+ // Normal 32-bit case.
+ Ops.push_back(N->getOperand(2));
+} else {
+ // Operand is really 32-bits, but requires 64-bit alignment, so use the
+ // even aligned 64-bit register class.
+ const SDValue RegSeqOps[] = {
+ CurDAG->getTargetConstant(DataRC->getID(), SL, MVT::i32), Data,
+ CurDAG->getTargetConstant(AMDGPU::sub0, SL, MVT::i32),
+ SDValue(
+ CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, SL, MVT::i32),
+ 0),
+ CurDAG->getTargetConstant(AMDGPU::sub1, SL, MVT::i32)};
+
+ Ops.push_back(SDValue(CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE,
+ SL, MVT::v2i32, RegSeqOps),
+0));
+}
+ }
+
Ops.push_back(OffsetField);
Ops.push_back(Chain);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 650df2a87506a..c575714cf61cd 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -1946,20 +1946,52 @@ bool
AMDGPUInstructionSelector::selectDSGWSIntrinsic(MachineInstr &MI,
// The resource id offset is computed as ( + M0[21:16] +
// offset field) % 64. Some versions of the programming guide omit the m0
// part, or claim it's from offset 0.
- auto MIB = BuildMI(*MBB, &MI, DL, TII.get(gwsIntrinToOpcode(IID)));
+
+ unsigned Opc = gwsIntrinToOpcode(IID);
+ const MCInstrDesc &InstrDesc = TII.get
[llvm-branch-commits] [llvm] AMDGPU: Use RegClassByHwMode to manage GWS operand special case (PR #169373)
arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.com/github/pr/llvm/llvm-project/169373?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#169373** https://app.graphite.com/github/pr/llvm/llvm-project/169373?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.com/github/pr/llvm/llvm-project/169373?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#169372** https://app.graphite.com/github/pr/llvm/llvm-project/169372?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/169373 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Use RegClassByHwMode to manage GWS operand special case (PR #169373)
https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/169373 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Use RegClassByHwMode to manage GWS operand special case (PR #169373)
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
On targets that require even aligned 64-bit VGPRs, GWS operands
require even alignment of a 32-bit operand. Previously we had a hacky
post-processing which added an implicit operand to try to manage
the constraint. This would require special casing in other passes
to avoid breaking the operand constraint. This moves the handling
into the instruction definition, so other passes no longer need
to consider this edge case. MC still does need to special case this,
to print/parse as a 32-bit register. This also still ends up net
less work than introducing even aligned 32-bit register classes.
This also should be applied to the image special case.
---
Patch is 34.20 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/169373.diff
13 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp (+31-2)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (+40-8)
- (modified) llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp (+5)
- (modified) llvm/lib/Target/AMDGPU/DSInstructions.td (+1-1)
- (modified) llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp (+12)
- (modified) llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h (+3)
- (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (-2)
- (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.h (+1)
- (modified) llvm/lib/Target/AMDGPU/SIRegisterInfo.td (+22)
- (modified) llvm/test/CodeGen/AMDGPU/gws_agpr.ll (+108-234)
- (modified) llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir (+31-2)
- (added) llvm/test/MC/AMDGPU/ds_gws_sgpr_err.s (+32)
- (modified) llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s (+15-15)
``diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
index 6c36f8ad9b6a9..78a3ec7f0c266 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -3080,9 +3080,38 @@ void AMDGPUDAGToDAGISel::SelectDS_GWS(SDNode *N,
unsigned IntrID) {
SDValue OffsetField = CurDAG->getTargetConstant(ImmOffset, SL, MVT::i32);
const unsigned Opc = gwsIntrinToOpcode(IntrID);
+
+ const MCInstrDesc &InstrDesc = TII->get(Opc);
+ int Data0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::data0);
+
+ const TargetRegisterClass *DataRC = TII->getRegClass(InstrDesc, Data0Idx);
+
SmallVector Ops;
- if (HasVSrc)
-Ops.push_back(N->getOperand(2));
+ if (HasVSrc) {
+const SIRegisterInfo *TRI = Subtarget->getRegisterInfo();
+
+SDValue Data = N->getOperand(2);
+MVT DataVT = Data.getValueType().getSimpleVT();
+if (TRI->isTypeLegalForClass(*DataRC, DataVT)) {
+ // Normal 32-bit case.
+ Ops.push_back(N->getOperand(2));
+} else {
+ // Operand is really 32-bits, but requires 64-bit alignment, so use the
+ // even aligned 64-bit register class.
+ const SDValue RegSeqOps[] = {
+ CurDAG->getTargetConstant(DataRC->getID(), SL, MVT::i32), Data,
+ CurDAG->getTargetConstant(AMDGPU::sub0, SL, MVT::i32),
+ SDValue(
+ CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, SL, MVT::i32),
+ 0),
+ CurDAG->getTargetConstant(AMDGPU::sub1, SL, MVT::i32)};
+
+ Ops.push_back(SDValue(CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE,
+ SL, MVT::v2i32, RegSeqOps),
+0));
+}
+ }
+
Ops.push_back(OffsetField);
Ops.push_back(Chain);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 650df2a87506a..c575714cf61cd 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -1946,20 +1946,52 @@ bool
AMDGPUInstructionSelector::selectDSGWSIntrinsic(MachineInstr &MI,
// The resource id offset is computed as ( + M0[21:16] +
// offset field) % 64. Some versions of the programming guide omit the m0
// part, or claim it's from offset 0.
- auto MIB = BuildMI(*MBB, &MI, DL, TII.get(gwsIntrinToOpcode(IID)));
+
+ unsigned Opc = gwsIntrinToOpcode(IID);
+ const MCInstrDesc &InstrDesc = TII.get(Opc);
if (HasVSrc) {
Register VSrc = MI.getOperand(1).getReg();
-MIB.addReg(VSrc);
-if (!RBI.constrainGenericRegister(VSrc, AMDGPU::VGPR_32RegClass, *MRI))
- return false;
- }
+int Data0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::data0);
+const TargetRegisterClass *DataRC = TII.getRegClass(InstrDesc, Data0Idx);
+const TargetRegisterClass *SubRC =
+TRI.getSubRegisterClass(DataRC, AMDGPU::sub0);
+
+if (!SubRC) {
+ // 32-bit normal case.
+ if (!RBI.constrainGenericRegister(VSrc, *DataRC, *MRI))
+return false;
- MIB.addImm(ImmOffset)
- .cloneMemRefs(MI);
+ BuildMI(*MBB, &MI, DL, InstrDesc)
+
[llvm-branch-commits] [llvm] AMDGPU: Use RegClassByHwMode to manage GWS operand special case (PR #169373)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff origin/main HEAD --extensions cpp,h --
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
llvm/lib/Target/AMDGPU/SIISelLowering.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.h
--diff_from_common_commit
``
:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:
View the diff from clang-format here.
``diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index c575714cf..339501cf7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -1964,9 +1964,9 @@ bool
AMDGPUInstructionSelector::selectDSGWSIntrinsic(MachineInstr &MI,
return false;
BuildMI(*MBB, &MI, DL, InstrDesc)
-.addReg(VSrc)
-.addImm(ImmOffset)
-.cloneMemRefs(MI);
+ .addReg(VSrc)
+ .addImm(ImmOffset)
+ .cloneMemRefs(MI);
} else {
// Requires even register alignment, so create 64-bit value and pad the
// top half with undef.
@@ -1977,20 +1977,18 @@ bool
AMDGPUInstructionSelector::selectDSGWSIntrinsic(MachineInstr &MI,
Register UndefReg = MRI->createVirtualRegister(SubRC);
BuildMI(*MBB, &MI, DL, TII.get(AMDGPU::IMPLICIT_DEF), UndefReg);
BuildMI(*MBB, &MI, DL, TII.get(AMDGPU::REG_SEQUENCE), DataReg)
-.addReg(VSrc)
-.addImm(AMDGPU::sub0)
-.addReg(UndefReg)
-.addImm(AMDGPU::sub1);
+ .addReg(VSrc)
+ .addImm(AMDGPU::sub0)
+ .addReg(UndefReg)
+ .addImm(AMDGPU::sub1);
BuildMI(*MBB, &MI, DL, InstrDesc)
-.addReg(DataReg)
-.addImm(ImmOffset)
-.cloneMemRefs(MI);
+ .addReg(DataReg)
+ .addImm(ImmOffset)
+ .cloneMemRefs(MI);
}
} else {
-BuildMI(*MBB, &MI, DL, InstrDesc)
- .addImm(ImmOffset)
- .cloneMemRefs(MI);
+BuildMI(*MBB, &MI, DL, InstrDesc).addImm(ImmOffset).cloneMemRefs(MI);
}
MI.eraseFromParent();
``
https://github.com/llvm/llvm-project/pull/169373
___
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[llvm-branch-commits] [clang] [llvm] CodeGen: Add LibcallLoweringInfo analysis pass (PR #168622)
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/168622 >From 8f9c4669e8637afe83b1b49a73be8695d73a6268 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sat, 25 Oct 2025 22:38:27 +0900 Subject: [PATCH] CodeGen: Add LibcallLoweringInfo analysis pass The libcall lowering decisions should be program dependent, depending on the current module's RuntimeLibcallInfo. We need another related analysis derived from that plus the current function's subtarget to provide concrete lowering decisions. This takes on a somewhat unusual form. It's a Module analysis, with a lookup keyed on the subtarget. This is a separate module analysis from RuntimeLibraryAnalysis to avoid that depending on codegen. It's not a function pass to avoid depending on any particular function, to avoid repeated subtarget map lookups in most of the use passes, and to avoid any recomputation in the common case of one subtarget (and keeps it reusable across repeated compilations). This also switches ExpandFp and PreISelIntrinsicLowering as a sample function and module pass. Note this is not yet wired up to SelectionDAG, which is still using the LibcallLoweringInfo constructed inside of TargetLowering. --- clang/lib/CodeGen/BackendUtil.cpp | 6 ++ .../llvm/Analysis/RuntimeLibcallInfo.h| 15 +++- .../llvm/CodeGen/LibcallLoweringInfo.h| 68 +++ llvm/include/llvm/InitializePasses.h | 1 + llvm/lib/Analysis/RuntimeLibcallInfo.cpp | 16 + llvm/lib/CodeGen/CodeGen.cpp | 1 + llvm/lib/CodeGen/ExpandFp.cpp | 31 +++-- llvm/lib/CodeGen/LibcallLoweringInfo.cpp | 42 llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp | 53 ++- llvm/lib/Passes/PassRegistry.def | 1 + llvm/test/CodeGen/AArch64/O0-pipeline.ll | 2 + llvm/test/CodeGen/AArch64/O3-pipeline.ll | 2 + llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 10 +++ llvm/test/CodeGen/LoongArch/O0-pipeline.ll| 2 + llvm/test/CodeGen/LoongArch/opt-pipeline.ll | 2 + llvm/test/CodeGen/PowerPC/O0-pipeline.ll | 2 + llvm/test/CodeGen/PowerPC/O3-pipeline.ll | 2 + llvm/test/CodeGen/RISCV/O0-pipeline.ll| 2 + llvm/test/CodeGen/RISCV/O3-pipeline.ll| 2 + llvm/test/CodeGen/SPIRV/llc-pipeline.ll | 4 ++ llvm/test/CodeGen/X86/O0-pipeline.ll | 2 + llvm/test/CodeGen/X86/opt-pipeline.ll | 2 + .../Transforms/ExpandFp/AMDGPU/frem-inf.ll| 4 +- llvm/test/Transforms/ExpandFp/AMDGPU/frem.ll | 2 +- .../ExpandFp/AMDGPU/missing-analysis.ll | 6 ++ .../ExpandFp/AMDGPU/pass-parameters.ll| 16 ++--- .../X86/expand-large-fp-convert-fptosi129.ll | 2 +- .../X86/expand-large-fp-convert-fptoui129.ll | 2 +- .../X86/expand-large-fp-convert-si129tofp.ll | 2 +- .../X86/expand-large-fp-convert-ui129tofp.ll | 2 +- .../X86/expand-large-fp-optnone.ll| 2 +- llvm/tools/llc/NewPMDriver.cpp| 12 llvm/tools/llc/llc.cpp| 5 ++ llvm/tools/opt/NewPMDriver.cpp| 23 +-- llvm/tools/opt/NewPMDriver.h | 10 +-- llvm/tools/opt/optdriver.cpp | 8 +-- 36 files changed, 303 insertions(+), 61 deletions(-) create mode 100644 llvm/test/Transforms/ExpandFp/AMDGPU/missing-analysis.ll diff --git a/clang/lib/CodeGen/BackendUtil.cpp b/clang/lib/CodeGen/BackendUtil.cpp index 5590d217e96ff..8519df1f9ab1c 100644 --- a/clang/lib/CodeGen/BackendUtil.cpp +++ b/clang/lib/CodeGen/BackendUtil.cpp @@ -19,6 +19,7 @@ #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/StringSwitch.h" #include "llvm/Analysis/GlobalsModRef.h" +#include "llvm/Analysis/RuntimeLibcallInfo.h" #include "llvm/Analysis/TargetLibraryInfo.h" #include "llvm/Analysis/TargetTransformInfo.h" #include "llvm/Bitcode/BitcodeReader.h" @@ -667,6 +668,11 @@ bool EmitAssemblyHelper::AddEmitPasses(legacy::PassManager &CodeGenPasses, llvm::driver::createTLII(TargetTriple, CodeGenOpts.getVecLib())); CodeGenPasses.add(new TargetLibraryInfoWrapperPass(*TLII)); + const llvm::TargetOptions &Options = TM->Options; + CodeGenPasses.add(new RuntimeLibraryInfoWrapper( + TargetTriple, Options.ExceptionModel, Options.FloatABIType, + Options.EABIVersion, Options.MCOptions.ABIName, Options.VecLib)); + // Normal mode, emit a .s or .o file by running the code generator. Note, // this also adds codegenerator level optimization passes. CodeGenFileType CGFT = getCodeGenFileType(Action); diff --git a/llvm/include/llvm/Analysis/RuntimeLibcallInfo.h b/llvm/include/llvm/Analysis/RuntimeLibcallInfo.h index 28a2ec47f81ad..38fa83b58cbef 100644 --- a/llvm/include/llvm/Analysis/RuntimeLibcallInfo.h +++ b/llvm/include/llvm/Analysis/RuntimeLibcallInfo.h @@ -22,7 +22,12 @@ class LLVM_ABI RuntimeLibraryAnalysis RuntimeLibraryAnalysis() = default; RuntimeLibraryAnalysis(RTLIB::RuntimeLibcallsInfo &&BaselineIn
[llvm-branch-commits] [clang] [llvm] CodeGen: Add LibcallLoweringInfo analysis pass (PR #168622)
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/168622 >From 8f9c4669e8637afe83b1b49a73be8695d73a6268 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sat, 25 Oct 2025 22:38:27 +0900 Subject: [PATCH] CodeGen: Add LibcallLoweringInfo analysis pass The libcall lowering decisions should be program dependent, depending on the current module's RuntimeLibcallInfo. We need another related analysis derived from that plus the current function's subtarget to provide concrete lowering decisions. This takes on a somewhat unusual form. It's a Module analysis, with a lookup keyed on the subtarget. This is a separate module analysis from RuntimeLibraryAnalysis to avoid that depending on codegen. It's not a function pass to avoid depending on any particular function, to avoid repeated subtarget map lookups in most of the use passes, and to avoid any recomputation in the common case of one subtarget (and keeps it reusable across repeated compilations). This also switches ExpandFp and PreISelIntrinsicLowering as a sample function and module pass. Note this is not yet wired up to SelectionDAG, which is still using the LibcallLoweringInfo constructed inside of TargetLowering. --- clang/lib/CodeGen/BackendUtil.cpp | 6 ++ .../llvm/Analysis/RuntimeLibcallInfo.h| 15 +++- .../llvm/CodeGen/LibcallLoweringInfo.h| 68 +++ llvm/include/llvm/InitializePasses.h | 1 + llvm/lib/Analysis/RuntimeLibcallInfo.cpp | 16 + llvm/lib/CodeGen/CodeGen.cpp | 1 + llvm/lib/CodeGen/ExpandFp.cpp | 31 +++-- llvm/lib/CodeGen/LibcallLoweringInfo.cpp | 42 llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp | 53 ++- llvm/lib/Passes/PassRegistry.def | 1 + llvm/test/CodeGen/AArch64/O0-pipeline.ll | 2 + llvm/test/CodeGen/AArch64/O3-pipeline.ll | 2 + llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 10 +++ llvm/test/CodeGen/LoongArch/O0-pipeline.ll| 2 + llvm/test/CodeGen/LoongArch/opt-pipeline.ll | 2 + llvm/test/CodeGen/PowerPC/O0-pipeline.ll | 2 + llvm/test/CodeGen/PowerPC/O3-pipeline.ll | 2 + llvm/test/CodeGen/RISCV/O0-pipeline.ll| 2 + llvm/test/CodeGen/RISCV/O3-pipeline.ll| 2 + llvm/test/CodeGen/SPIRV/llc-pipeline.ll | 4 ++ llvm/test/CodeGen/X86/O0-pipeline.ll | 2 + llvm/test/CodeGen/X86/opt-pipeline.ll | 2 + .../Transforms/ExpandFp/AMDGPU/frem-inf.ll| 4 +- llvm/test/Transforms/ExpandFp/AMDGPU/frem.ll | 2 +- .../ExpandFp/AMDGPU/missing-analysis.ll | 6 ++ .../ExpandFp/AMDGPU/pass-parameters.ll| 16 ++--- .../X86/expand-large-fp-convert-fptosi129.ll | 2 +- .../X86/expand-large-fp-convert-fptoui129.ll | 2 +- .../X86/expand-large-fp-convert-si129tofp.ll | 2 +- .../X86/expand-large-fp-convert-ui129tofp.ll | 2 +- .../X86/expand-large-fp-optnone.ll| 2 +- llvm/tools/llc/NewPMDriver.cpp| 12 llvm/tools/llc/llc.cpp| 5 ++ llvm/tools/opt/NewPMDriver.cpp| 23 +-- llvm/tools/opt/NewPMDriver.h | 10 +-- llvm/tools/opt/optdriver.cpp | 8 +-- 36 files changed, 303 insertions(+), 61 deletions(-) create mode 100644 llvm/test/Transforms/ExpandFp/AMDGPU/missing-analysis.ll diff --git a/clang/lib/CodeGen/BackendUtil.cpp b/clang/lib/CodeGen/BackendUtil.cpp index 5590d217e96ff..8519df1f9ab1c 100644 --- a/clang/lib/CodeGen/BackendUtil.cpp +++ b/clang/lib/CodeGen/BackendUtil.cpp @@ -19,6 +19,7 @@ #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/StringSwitch.h" #include "llvm/Analysis/GlobalsModRef.h" +#include "llvm/Analysis/RuntimeLibcallInfo.h" #include "llvm/Analysis/TargetLibraryInfo.h" #include "llvm/Analysis/TargetTransformInfo.h" #include "llvm/Bitcode/BitcodeReader.h" @@ -667,6 +668,11 @@ bool EmitAssemblyHelper::AddEmitPasses(legacy::PassManager &CodeGenPasses, llvm::driver::createTLII(TargetTriple, CodeGenOpts.getVecLib())); CodeGenPasses.add(new TargetLibraryInfoWrapperPass(*TLII)); + const llvm::TargetOptions &Options = TM->Options; + CodeGenPasses.add(new RuntimeLibraryInfoWrapper( + TargetTriple, Options.ExceptionModel, Options.FloatABIType, + Options.EABIVersion, Options.MCOptions.ABIName, Options.VecLib)); + // Normal mode, emit a .s or .o file by running the code generator. Note, // this also adds codegenerator level optimization passes. CodeGenFileType CGFT = getCodeGenFileType(Action); diff --git a/llvm/include/llvm/Analysis/RuntimeLibcallInfo.h b/llvm/include/llvm/Analysis/RuntimeLibcallInfo.h index 28a2ec47f81ad..38fa83b58cbef 100644 --- a/llvm/include/llvm/Analysis/RuntimeLibcallInfo.h +++ b/llvm/include/llvm/Analysis/RuntimeLibcallInfo.h @@ -22,7 +22,12 @@ class LLVM_ABI RuntimeLibraryAnalysis RuntimeLibraryAnalysis() = default; RuntimeLibraryAnalysis(RTLIB::RuntimeLibcallsInfo &&BaselineIn
[llvm-branch-commits] [clang-tools-extra] [clang-doc] Add definition information to class templates (PR #169109)
https://github.com/evelez7 updated
https://github.com/llvm/llvm-project/pull/169109
>From ee5735292adc36a3adf1049151383d8e62833fac Mon Sep 17 00:00:00 2001
From: Erick Velez
Date: Fri, 21 Nov 2025 14:12:42 -0800
Subject: [PATCH] [clang-doc] Add definition information to class templates
---
.../clang-doc/assets/class-template.mustache | 1 +
clang-tools-extra/test/clang-doc/namespace.cpp | 9 -
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/clang-tools-extra/clang-doc/assets/class-template.mustache
b/clang-tools-extra/clang-doc/assets/class-template.mustache
index c5187026a2399..bbac3ffae02fb 100644
--- a/clang-tools-extra/clang-doc/assets/class-template.mustache
+++ b/clang-tools-extra/clang-doc/assets/class-template.mustache
@@ -140,6 +140,7 @@
{{TagType}} {{Name}}
+Defined at line {{Location.LineNumber}} of file
{{Location.Filename}}
{{#Description}}
{{>Comments}}
diff --git a/clang-tools-extra/test/clang-doc/namespace.cpp
b/clang-tools-extra/test/clang-doc/namespace.cpp
index 28f9556b86218..adf7ab7d946ab 100644
--- a/clang-tools-extra/test/clang-doc/namespace.cpp
+++ b/clang-tools-extra/test/clang-doc/namespace.cpp
@@ -58,7 +58,6 @@
// COM: FIXME: Add global functions to the namespace template
// COM: FIXME: Add namespaces to the namespace template
-// COM: FIXME: Add class definition location to class template
// Anonymous Namespace
namespace {
@@ -70,7 +69,7 @@ void anonFunction() {}
class AnonClass {};
// MD-ANON-CLASS-LINE: *Defined at
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp#[[@LINE-1]]*
// HTML-ANON-CLASS-LINE: Defined at line [[@LINE-2]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
-// MUSTACHE-ANON-CLASS-LINE-NOT: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
+// MUSTACHE-ANON-CLASS-LINE: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
// MD-ANON-CLASS: # class AnonClass
// HTML-ANON-CLASS: class AnonClass
@@ -117,7 +116,7 @@ void functionInPrimaryNamespace() {}
class ClassInPrimaryNamespace {};
// MD-PRIMARY-CLASS-LINE: *Defined at
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp#[[@LINE-1]]*
// HTML-PRIMARY-CLASS-LINE: Defined at line [[@LINE-2]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
-// MUSTACHE-PRIMARY-CLASS-LINE-NOT: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
+// MUSTACHE-PRIMARY-CLASS-LINE: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
// MD-PRIMARY-CLASS: # class ClassInPrimaryNamespace
// MD-PRIMARY-CLASS: Class in PrimaryNamespace
@@ -139,7 +138,7 @@ void functionInNestedNamespace() {}
class ClassInNestedNamespace {};
// MD-NESTED-CLASS-LINE: *Defined at
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp#[[@LINE-1]]*
// HTML-NESTED-CLASS-LINE: Defined at line [[@LINE-2]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
-// MUSTACHE-NESTED-CLASS-LINE-NOT: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
+// MUSTACHE-NESTED-CLASS-LINE: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
// MD-NESTED-CLASS: # class ClassInNestedNamespace
// MD-NESTED-CLASS: Class in NestedNamespace
@@ -233,7 +232,7 @@ void functionInAnotherNamespace() {}
class ClassInAnotherNamespace {};
// MD-ANOTHER-CLASS-LINE: *Defined at
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp#[[@LINE-1]]*
// HTML-ANOTHER-CLASS-LINE: Defined at line [[@LINE-2]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
-// MUSTACHE-ANOTHER-CLASS-LINE-NOT: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
+// MUSTACHE-ANOTHER-CLASS-LINE: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
// MD-ANOTHER-CLASS: # class ClassInAnotherNamespace
// MD-ANOTHER-CLASS: Class in AnotherNamespace
___
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[llvm-branch-commits] [clang-tools-extra] [clang-doc] Add definition information to class templates (PR #169109)
https://github.com/evelez7 updated
https://github.com/llvm/llvm-project/pull/169109
>From ee5735292adc36a3adf1049151383d8e62833fac Mon Sep 17 00:00:00 2001
From: Erick Velez
Date: Fri, 21 Nov 2025 14:12:42 -0800
Subject: [PATCH] [clang-doc] Add definition information to class templates
---
.../clang-doc/assets/class-template.mustache | 1 +
clang-tools-extra/test/clang-doc/namespace.cpp | 9 -
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/clang-tools-extra/clang-doc/assets/class-template.mustache
b/clang-tools-extra/clang-doc/assets/class-template.mustache
index c5187026a2399..bbac3ffae02fb 100644
--- a/clang-tools-extra/clang-doc/assets/class-template.mustache
+++ b/clang-tools-extra/clang-doc/assets/class-template.mustache
@@ -140,6 +140,7 @@
{{TagType}} {{Name}}
+Defined at line {{Location.LineNumber}} of file
{{Location.Filename}}
{{#Description}}
{{>Comments}}
diff --git a/clang-tools-extra/test/clang-doc/namespace.cpp
b/clang-tools-extra/test/clang-doc/namespace.cpp
index 28f9556b86218..adf7ab7d946ab 100644
--- a/clang-tools-extra/test/clang-doc/namespace.cpp
+++ b/clang-tools-extra/test/clang-doc/namespace.cpp
@@ -58,7 +58,6 @@
// COM: FIXME: Add global functions to the namespace template
// COM: FIXME: Add namespaces to the namespace template
-// COM: FIXME: Add class definition location to class template
// Anonymous Namespace
namespace {
@@ -70,7 +69,7 @@ void anonFunction() {}
class AnonClass {};
// MD-ANON-CLASS-LINE: *Defined at
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp#[[@LINE-1]]*
// HTML-ANON-CLASS-LINE: Defined at line [[@LINE-2]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
-// MUSTACHE-ANON-CLASS-LINE-NOT: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
+// MUSTACHE-ANON-CLASS-LINE: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
// MD-ANON-CLASS: # class AnonClass
// HTML-ANON-CLASS: class AnonClass
@@ -117,7 +116,7 @@ void functionInPrimaryNamespace() {}
class ClassInPrimaryNamespace {};
// MD-PRIMARY-CLASS-LINE: *Defined at
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp#[[@LINE-1]]*
// HTML-PRIMARY-CLASS-LINE: Defined at line [[@LINE-2]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
-// MUSTACHE-PRIMARY-CLASS-LINE-NOT: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
+// MUSTACHE-PRIMARY-CLASS-LINE: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
// MD-PRIMARY-CLASS: # class ClassInPrimaryNamespace
// MD-PRIMARY-CLASS: Class in PrimaryNamespace
@@ -139,7 +138,7 @@ void functionInNestedNamespace() {}
class ClassInNestedNamespace {};
// MD-NESTED-CLASS-LINE: *Defined at
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp#[[@LINE-1]]*
// HTML-NESTED-CLASS-LINE: Defined at line [[@LINE-2]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
-// MUSTACHE-NESTED-CLASS-LINE-NOT: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
+// MUSTACHE-NESTED-CLASS-LINE: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
// MD-NESTED-CLASS: # class ClassInNestedNamespace
// MD-NESTED-CLASS: Class in NestedNamespace
@@ -233,7 +232,7 @@ void functionInAnotherNamespace() {}
class ClassInAnotherNamespace {};
// MD-ANOTHER-CLASS-LINE: *Defined at
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp#[[@LINE-1]]*
// HTML-ANOTHER-CLASS-LINE: Defined at line [[@LINE-2]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
-// MUSTACHE-ANOTHER-CLASS-LINE-NOT: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
+// MUSTACHE-ANOTHER-CLASS-LINE: Defined at line [[@LINE-3]] of file
{{.*}}clang-tools-extra{{[\/]}}test{{[\/]}}clang-doc{{[\/]}}namespace.cpp
// MD-ANOTHER-CLASS: # class ClassInAnotherNamespace
// MD-ANOTHER-CLASS: Class in AnotherNamespace
___
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[llvm-branch-commits] [llvm] release/21.x: [llvm-rc] Don't interpret integer literals as octal numbers in rc.exe mode (#166915) (PR #167174)
aganea wrote: Are we merging this in 21.x or should we close? https://github.com/llvm/llvm-project/pull/167174 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [llvm] [mlir] [MLIR][OpenMP] Add OpenMPToLLVMIRTranslation support for is_device_ptr (PR #169367)
@@ -0,0 +1,46 @@ +! Validate that a device pointer obtained via omp_get_mapped_ptr can be used +! inside a TARGET region with the is_device_ptr clause. +! REQUIRES: flang, amdgcn-amd-amdhsa + +! RUN: %libomptarget-compile-fortran-run-and-check-generic + +program is_device_ptr_target + use iso_c_binding, only : c_ptr, c_loc + implicit none + + interface +function omp_get_mapped_ptr(host_ptr, device_num) & +bind(C, name="omp_get_mapped_ptr") + use iso_c_binding, only : c_ptr, c_int + type(c_ptr) :: omp_get_mapped_ptr + type(c_ptr), value :: host_ptr + integer(c_int), value :: device_num +end function omp_get_mapped_ptr + end interface + + integer, parameter :: n = 4 + integer, parameter :: dev = 0 + integer, target :: a(n) + type(c_ptr) :: dptr + integer :: flag + + a = [2, 4, 6, 8] + flag = 0 + + !$omp target data map(tofrom: a, flag) +dptr = omp_get_mapped_ptr(c_loc(a), dev) + +!$omp target is_device_ptr(dptr) map(tofrom: flag) + flag = flag + 1 abhinavgaba wrote: `dptr` is still not used inside the target construct. Is your goal to validate that `dptr` is correctly passed into the `target`, or just that this doesn't cause a segfault/offload-failure? If it's the former, then one way to do it is by calling c_f_pointer inside the target region, and reading/writing the pointee via the fortran pointer. Another way is to `transfer` dptr into an `INTEGER(C_INTPTR_T)` both inside and outside the target region, print it, and CHECK that the two addresses printed are identical. https://github.com/llvm/llvm-project/pull/169367 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AArch64][PAC] Factor out printing real AUT/PAC/BLRA encodings (NFC) (PR #160901)
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/160901
>From 38948b4e98287c35a0e0cfa7a4744928be89ba84 Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Thu, 25 Sep 2025 16:33:04 +0300
Subject: [PATCH 1/2] [AArch64][PAC] Factor out printing real AUT/PAC/BLRA
encodings (NFC)
Separate the low-level emission of the appropriate variants of `AUT*`,
`PAC*` and `B(L)RA*` instructions from the high-level logic of pseudo
instruction expansion.
Introduce `getBranchOpcodeForKey` helper function by analogy to
`get(AUT|PAC)OpcodeForKey`.
---
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 175 +++---
llvm/lib/Target/AArch64/AArch64InstrInfo.h| 18 ++
2 files changed, 88 insertions(+), 105 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
index f9b99dc292d9d..73c91c97bc1db 100644
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
@@ -319,6 +319,11 @@ class AArch64AsmPrinter : public AsmPrinter {
void emitMOVZ(Register Dest, uint64_t Imm, unsigned Shift);
void emitMOVK(Register Dest, uint64_t Imm, unsigned Shift);
+ void emitAUT(AArch64PACKey::ID Key, Register Pointer, Register Disc);
+ void emitPAC(AArch64PACKey::ID Key, Register Pointer, Register Disc);
+ void emitBLRA(bool IsCall, AArch64PACKey::ID Key, Register Target,
+Register Disc);
+
/// Emit instruction to set float register to zero.
void emitFMov0(const MachineInstr &MI);
void emitFMov0AsFMov(const MachineInstr &MI, Register DestReg);
@@ -1840,6 +1845,55 @@ void AArch64AsmPrinter::emitMOVK(Register Dest, uint64_t
Imm, unsigned Shift) {
.addImm(Shift));
}
+void AArch64AsmPrinter::emitAUT(AArch64PACKey::ID Key, Register Pointer,
+Register Disc) {
+ bool IsZeroDisc = Disc == AArch64::XZR;
+ unsigned Opcode = getAUTOpcodeForKey(Key, IsZeroDisc);
+
+ // autiza x16 ; if IsZeroDisc
+ // autia x16, x17 ; if !IsZeroDisc
+ MCInst AUTInst;
+ AUTInst.setOpcode(Opcode);
+ AUTInst.addOperand(MCOperand::createReg(Pointer));
+ AUTInst.addOperand(MCOperand::createReg(Pointer));
+ if (!IsZeroDisc)
+AUTInst.addOperand(MCOperand::createReg(Disc));
+
+ EmitToStreamer(AUTInst);
+}
+
+void AArch64AsmPrinter::emitPAC(AArch64PACKey::ID Key, Register Pointer,
+Register Disc) {
+ bool IsZeroDisc = Disc == AArch64::XZR;
+ unsigned Opcode = getPACOpcodeForKey(Key, IsZeroDisc);
+
+ // paciza x16 ; if IsZeroDisc
+ // pacia x16, x17 ; if !IsZeroDisc
+ MCInst PACInst;
+ PACInst.setOpcode(Opcode);
+ PACInst.addOperand(MCOperand::createReg(Pointer));
+ PACInst.addOperand(MCOperand::createReg(Pointer));
+ if (!IsZeroDisc)
+PACInst.addOperand(MCOperand::createReg(Disc));
+
+ EmitToStreamer(PACInst);
+}
+
+void AArch64AsmPrinter::emitBLRA(bool IsCall, AArch64PACKey::ID Key,
+ Register Target, Register Disc) {
+ bool IsZeroDisc = Disc == AArch64::XZR;
+ unsigned Opcode = getBranchOpcodeForKey(IsCall, Key, IsZeroDisc);
+
+ // blraaz x16 ; if IsZeroDisc
+ // blraa x16, x17 ; if !IsZeroDisc
+ MCInst Inst;
+ Inst.setOpcode(Opcode);
+ Inst.addOperand(MCOperand::createReg(Target));
+ if (!IsZeroDisc)
+Inst.addOperand(MCOperand::createReg(Disc));
+ EmitToStreamer(Inst);
+}
+
void AArch64AsmPrinter::emitFMov0(const MachineInstr &MI) {
Register DestReg = MI.getOperand(0).getReg();
if (!STI->hasZeroCycleZeroingFPWorkaround() && STI->isNeonAvailable()) {
@@ -2168,18 +,7 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(
// Compute aut discriminator
Register AUTDiscReg = emitPtrauthDiscriminator(
AUTDisc, AUTAddrDisc->getReg(), Scratch, AUTAddrDisc->isKill());
- bool AUTZero = AUTDiscReg == AArch64::XZR;
- unsigned AUTOpc = getAUTOpcodeForKey(AUTKey, AUTZero);
-
- // autiza x16 ; if AUTZero
- // autia x16, x17 ; if !AUTZero
- MCInst AUTInst;
- AUTInst.setOpcode(AUTOpc);
- AUTInst.addOperand(MCOperand::createReg(AUTVal));
- AUTInst.addOperand(MCOperand::createReg(AUTVal));
- if (!AUTZero)
-AUTInst.addOperand(MCOperand::createReg(AUTDiscReg));
- EmitToStreamer(*OutStreamer, AUTInst);
+ emitAUT(AUTKey, AUTVal, AUTDiscReg);
// Unchecked or checked-but-non-trapping AUT is just an "AUT": we're done.
if (!IsAUTPAC && (!ShouldCheck || !ShouldTrap))
@@ -2202,20 +2245,8 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(
return;
// Compute pac discriminator
- Register PACDiscReg =
- emitPtrauthDiscriminator(PACDisc, PACAddrDisc, Scratch);
- bool PACZero = PACDiscReg == AArch64::XZR;
- unsigned PACOpc = getPACOpcodeForKey(*PACKey, PACZero);
-
- // pacizb x16 ; if PACZero
- // pacib x16, x17 ; if !PACZero
- MCInst PACInst;
- PACInst.setOpcode(PACOpc);
- PACInst.addOperand(MCOperand::createReg(AUTVal));
- PACInst.addOperand(MCO
[llvm-branch-commits] [llvm] [AArch64][PAC] Rework the expansion of AUT/AUTPAC pseudos (PR #169699)
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/169699
>From 19d2b2cc483176a207190213a45e9f6342853067 Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Thu, 25 Sep 2025 22:28:14 +0300
Subject: [PATCH] [AArch64][PAC] Rework the expansion of AUT/AUTPAC pseudos
Refactor `AArch64AsmPrinter::emitPtrauthAuthResign` to improve
readability and fix the conditions of `emitPtrauthDiscriminator` being
allowed to clobber AddrDisc:
* do not clobber `AUTAddrDisc` when computing `AUTDiscReg` on resigning
if `AUTAddrDisc == PACAddrDisc`, as it would prevent passing raw,
64-bit value as the new discriminator
* mark the `$Scratch` operand of `AUTxMxN` as early-clobber (fixes
assertions when emitting code at `-O0`)
* move the code computing `ShouldCheck` and `ShouldTrap` conditions to a
separate function
* define helper `struct PtrAuthSchema` to pass arguments to
`emitPtrauthAuthResign` in a better structured way
---
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 177 +++---
llvm/lib/Target/AArch64/AArch64InstrInfo.td | 13 +-
...trauth-intrinsic-auth-resign-with-blend.ll | 77 +++-
3 files changed, 192 insertions(+), 75 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
index 73c91c97bc1db..594a0bbff0028 100644
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
@@ -179,13 +179,21 @@ class AArch64AsmPrinter : public AsmPrinter {
// Check authenticated LR before tail calling.
void emitPtrauthTailCallHardening(const MachineInstr *TC);
+ struct PtrAuthSchema {
+PtrAuthSchema(AArch64PACKey::ID Key, uint64_t Disc,
+ const MachineOperand &AddrDiscOp);
+
+AArch64PACKey::ID Key;
+uint64_t Disc;
+Register AddrDisc;
+bool AddrDiscIsKilled;
+ };
+
// Emit the sequence for AUT or AUTPAC.
- void emitPtrauthAuthResign(Register AUTVal, AArch64PACKey::ID AUTKey,
- uint64_t AUTDisc,
- const MachineOperand *AUTAddrDisc,
- Register Scratch,
- std::optional PACKey,
- uint64_t PACDisc, Register PACAddrDisc);
+ void
+ emitPtrauthAuthResign(Register Pointer, Register Scratch,
+PtrAuthSchema AuthSchema,
+std::optional SignSchema =
std::nullopt);
// Emit the sequence for PAC.
void emitPtrauthSign(const MachineInstr *MI);
@@ -2175,23 +2183,9 @@ void
AArch64AsmPrinter::emitPtrauthTailCallHardening(const MachineInstr *TC) {
LRCheckMethod);
}
-void AArch64AsmPrinter::emitPtrauthAuthResign(
-Register AUTVal, AArch64PACKey::ID AUTKey, uint64_t AUTDisc,
-const MachineOperand *AUTAddrDisc, Register Scratch,
-std::optional PACKey, uint64_t PACDisc,
-Register PACAddrDisc) {
- const bool IsAUTPAC = PACKey.has_value();
-
- // We expand AUT/AUTPAC into a sequence of the form
- //
- // ; authenticate x16
- // ; check pointer in x16
- //Lsuccess:
- // ; sign x16 (if AUTPAC)
- //Lend: ; if not trapping on failure
- //
- // with the checking sequence chosen depending on whether/how we should check
- // the pointer and whether we should trap on failure.
+static std::pair getCheckAndTrapMode(const MachineFunction *MF,
+ bool IsResign) {
+ const AArch64Subtarget &STI = MF->getSubtarget();
// By default, auth/resign sequences check for auth failures.
bool ShouldCheck = true;
@@ -2200,7 +2194,7 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(
// On an FPAC CPU, you get traps whether you want them or not: there's
// no point in emitting checks or traps.
- if (STI->hasFPAC())
+ if (STI.hasFPAC())
ShouldCheck = ShouldTrap = false;
// However, command-line flags can override this, for experimentation.
@@ -2219,38 +2213,79 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(
break;
}
- // Compute aut discriminator
- Register AUTDiscReg = emitPtrauthDiscriminator(
- AUTDisc, AUTAddrDisc->getReg(), Scratch, AUTAddrDisc->isKill());
- emitAUT(AUTKey, AUTVal, AUTDiscReg);
+ // Checked-but-not-trapping mode ("poison") only applies to resigning,
+ // replace with "unchecked" for standalone AUT.
+ if (!IsResign && ShouldCheck && !ShouldTrap)
+ShouldCheck = ShouldTrap = false;
- // Unchecked or checked-but-non-trapping AUT is just an "AUT": we're done.
- if (!IsAUTPAC && (!ShouldCheck || !ShouldTrap))
-return;
+ return std::make_pair(ShouldCheck, ShouldTrap);
+}
- MCSymbol *EndSym = nullptr;
+AArch64AsmPrinter::PtrAuthSchema::PtrAuthSchema(
+AArch64PACKey::ID Key, uint64_t Disc, const MachineOperand &AddrDiscOp)
+: Key(Key), Disc(Disc), AddrDisc(AddrDiscOp.getReg()),
+ AddrDiscIsKilled(AddrDiscOp.isKill()) {}
- if (ShouldCheck
[llvm-branch-commits] [flang] [flang][OpenMP] Reject END DO on construct that crosses label-DO (PR #169714)
llvmbot wrote:
@llvm/pr-subscribers-flang-semantics
Author: Krzysztof Parzyszek (kparzysz)
Changes
In a label-DO construct where two or more loops share the same teminator, an
OpenMP construct must enclose all the loops if an end-directive is present. E.g.
```
do 100 i = 1,10
!$omp do
do 100 j = 1,10
100 continue
!$omp end do! Error, but ok if this line is removed
```
OpenMP 5.1 and later no longer has this restriction.
Fixes https://github.com/llvm/llvm-project/issues/169536.
---
Full diff: https://github.com/llvm/llvm-project/pull/169714.diff
6 Files Affected:
- (modified) flang/include/flang/Parser/parse-tree.h (+1-1)
- (modified) flang/lib/Semantics/canonicalize-do.cpp (+27-5)
- (modified) flang/lib/Semantics/check-omp-loop.cpp (+17)
- (modified) flang/test/Parser/OpenMP/atomic-label-do.f90 (+1-1)
- (modified) flang/test/Parser/OpenMP/cross-label-do.f90 (+4-3)
- (modified) flang/test/Semantics/OpenMP/loop-association.f90 (+2)
``diff
diff --git a/flang/include/flang/Parser/parse-tree.h
b/flang/include/flang/Parser/parse-tree.h
index dd928e1244a2f..e5d3d3f2a7d5b 100644
--- a/flang/include/flang/Parser/parse-tree.h
+++ b/flang/include/flang/Parser/parse-tree.h
@@ -4976,7 +4976,7 @@ struct OmpClauseList {
// --- Directives and constructs
struct OmpDirectiveSpecification {
- ENUM_CLASS(Flag, DeprecatedSyntax)
+ ENUM_CLASS(Flag, DeprecatedSyntax, CrossesLabelDo)
using Flags = common::EnumSet;
TUPLE_CLASS_BOILERPLATE(OmpDirectiveSpecification);
diff --git a/flang/lib/Semantics/canonicalize-do.cpp
b/flang/lib/Semantics/canonicalize-do.cpp
index 409195d5960b4..a0a6f8d870f6e 100644
--- a/flang/lib/Semantics/canonicalize-do.cpp
+++ b/flang/lib/Semantics/canonicalize-do.cpp
@@ -92,8 +92,11 @@ class CanonicalizationOfDoLoops {
[&](common::Indirection &construct) {
// If the body of the OpenMP construct ends with a label,
// treat the label as ending the construct itself.
- CanonicalizeIfMatch(
- block, stack, i, omp::GetFinalLabel(construct.value()));
+ OpenMPConstruct &omp{construct.value()};
+ if (CanonicalizeIfMatch(
+ block, stack, i, omp::GetFinalLabel(omp))) {
+MarkOpenMPConstruct(omp);
+ }
},
},
executableConstruct->u);
@@ -103,12 +106,12 @@ class CanonicalizationOfDoLoops {
private:
template
- void CanonicalizeIfMatch(Block &originalBlock, std::vector &stack,
+ bool CanonicalizeIfMatch(Block &originalBlock, std::vector &stack,
Block::iterator &i, Statement &statement) {
-CanonicalizeIfMatch(originalBlock, stack, i, statement.label);
+return CanonicalizeIfMatch(originalBlock, stack, i, statement.label);
}
- void CanonicalizeIfMatch(Block &originalBlock, std::vector &stack,
+ bool CanonicalizeIfMatch(Block &originalBlock, std::vector &stack,
Block::iterator &i, std::optional label) {
if (!stack.empty() && label && stack.back().label == *label) {
auto currentLabel{stack.back().label};
@@ -141,8 +144,27 @@ class CanonicalizationOfDoLoops {
stack.pop_back();
} while (!stack.empty() && stack.back().label == currentLabel);
i = --next;
+ return true;
+} else {
+ return false;
}
}
+
+ void MarkOpenMPConstruct(OpenMPConstruct &omp) {
+common::visit(
+[](const auto &s) {
+ using S = std::decay_t;
+ if constexpr (std::is_base_of_v ||
+ std::is_same_v) {
+const OmpDirectiveSpecification &beginSpec{s.BeginDir()};
+auto &flags{
+std::get(beginSpec.t)};
+const_cast(flags).set(
+OmpDirectiveSpecification::Flag::CrossesLabelDo);
+ }
+},
+omp.u);
+ }
};
bool CanonicalizeDo(Program &program) {
diff --git a/flang/lib/Semantics/check-omp-loop.cpp
b/flang/lib/Semantics/check-omp-loop.cpp
index 9a78209369949..5830bff1596b3 100644
--- a/flang/lib/Semantics/check-omp-loop.cpp
+++ b/flang/lib/Semantics/check-omp-loop.cpp
@@ -289,6 +289,23 @@ void OmpStructureChecker::CheckNestedBlock(const
parser::OpenMPLoopConstruct &x,
void OmpStructureChecker::CheckNestedConstruct(
const parser::OpenMPLoopConstruct &x) {
size_t nestedCount{0};
+ unsigned version{context_.langOptions().OpenMPVersion};
+
+ if (version <= 50) {
+const parser::OmpDirectiveSpecification &beginSpec{x.BeginDir()};
+auto &flags{
+std::get(beginSpec.t)};
+if (flags.test(parser::OmpDirectiveSpecification::Flag::CrossesLabelDo)) {
+ if (auto &endSpec{x.EndDir()}) {
+parser::CharBlock beginSource{beginSpec.DirName().source};
+context_
+.Say(endSpec->DirName().source,
+"END %s directive is not allowed when the construct does not
contain all loops that shares a loop-terminat
[llvm-branch-commits] [flang] [flang][OpenMP] Reject END DO on construct that crosses label-DO (PR #169714)
https://github.com/kparzysz created
https://github.com/llvm/llvm-project/pull/169714
In a label-DO construct where two or more loops share the same teminator, an
OpenMP construct must enclose all the loops if an end-directive is present. E.g.
```
do 100 i = 1,10
!$omp do
do 100 j = 1,10
100 continue
!$omp end do! Error, but ok if this line is removed
```
OpenMP 5.1 and later no longer has this restriction.
Fixes https://github.com/llvm/llvm-project/issues/169536.
>From d01e2e9e06ba5c641b07f2fd47f2f8bea93e78be Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Wed, 26 Nov 2025 07:49:12 -0600
Subject: [PATCH] [flang][OpenMP] Reject END DO on construct that crosses
label-DO
In a label-DO construct where two or more loops share the same teminator,
an OpenMP construct must enclose all the loops if an end-directive is
present. E.g.
```
do 100 i = 1,10
!$omp do
do 100 j = 1,10
100 continue
!$omp end do! Error, but ok if this line is removed
```
OpenMP 5.1 and later no longer has this restriction.
Fixes https://github.com/llvm/llvm-project/issues/169536.
---
flang/include/flang/Parser/parse-tree.h | 2 +-
flang/lib/Semantics/canonicalize-do.cpp | 32 ---
flang/lib/Semantics/check-omp-loop.cpp| 17 ++
flang/test/Parser/OpenMP/atomic-label-do.f90 | 2 +-
flang/test/Parser/OpenMP/cross-label-do.f90 | 7 ++--
.../Semantics/OpenMP/loop-association.f90 | 2 ++
6 files changed, 52 insertions(+), 10 deletions(-)
diff --git a/flang/include/flang/Parser/parse-tree.h
b/flang/include/flang/Parser/parse-tree.h
index dd928e1244a2f..e5d3d3f2a7d5b 100644
--- a/flang/include/flang/Parser/parse-tree.h
+++ b/flang/include/flang/Parser/parse-tree.h
@@ -4976,7 +4976,7 @@ struct OmpClauseList {
// --- Directives and constructs
struct OmpDirectiveSpecification {
- ENUM_CLASS(Flag, DeprecatedSyntax)
+ ENUM_CLASS(Flag, DeprecatedSyntax, CrossesLabelDo)
using Flags = common::EnumSet;
TUPLE_CLASS_BOILERPLATE(OmpDirectiveSpecification);
diff --git a/flang/lib/Semantics/canonicalize-do.cpp
b/flang/lib/Semantics/canonicalize-do.cpp
index 409195d5960b4..a0a6f8d870f6e 100644
--- a/flang/lib/Semantics/canonicalize-do.cpp
+++ b/flang/lib/Semantics/canonicalize-do.cpp
@@ -92,8 +92,11 @@ class CanonicalizationOfDoLoops {
[&](common::Indirection &construct) {
// If the body of the OpenMP construct ends with a label,
// treat the label as ending the construct itself.
- CanonicalizeIfMatch(
- block, stack, i, omp::GetFinalLabel(construct.value()));
+ OpenMPConstruct &omp{construct.value()};
+ if (CanonicalizeIfMatch(
+ block, stack, i, omp::GetFinalLabel(omp))) {
+MarkOpenMPConstruct(omp);
+ }
},
},
executableConstruct->u);
@@ -103,12 +106,12 @@ class CanonicalizationOfDoLoops {
private:
template
- void CanonicalizeIfMatch(Block &originalBlock, std::vector &stack,
+ bool CanonicalizeIfMatch(Block &originalBlock, std::vector &stack,
Block::iterator &i, Statement &statement) {
-CanonicalizeIfMatch(originalBlock, stack, i, statement.label);
+return CanonicalizeIfMatch(originalBlock, stack, i, statement.label);
}
- void CanonicalizeIfMatch(Block &originalBlock, std::vector &stack,
+ bool CanonicalizeIfMatch(Block &originalBlock, std::vector &stack,
Block::iterator &i, std::optional label) {
if (!stack.empty() && label && stack.back().label == *label) {
auto currentLabel{stack.back().label};
@@ -141,8 +144,27 @@ class CanonicalizationOfDoLoops {
stack.pop_back();
} while (!stack.empty() && stack.back().label == currentLabel);
i = --next;
+ return true;
+} else {
+ return false;
}
}
+
+ void MarkOpenMPConstruct(OpenMPConstruct &omp) {
+common::visit(
+[](const auto &s) {
+ using S = std::decay_t;
+ if constexpr (std::is_base_of_v ||
+ std::is_same_v) {
+const OmpDirectiveSpecification &beginSpec{s.BeginDir()};
+auto &flags{
+std::get(beginSpec.t)};
+const_cast(flags).set(
+OmpDirectiveSpecification::Flag::CrossesLabelDo);
+ }
+},
+omp.u);
+ }
};
bool CanonicalizeDo(Program &program) {
diff --git a/flang/lib/Semantics/check-omp-loop.cpp
b/flang/lib/Semantics/check-omp-loop.cpp
index 9a78209369949..5830bff1596b3 100644
--- a/flang/lib/Semantics/check-omp-loop.cpp
+++ b/flang/lib/Semantics/check-omp-loop.cpp
@@ -289,6 +289,23 @@ void OmpStructureChecker::CheckNestedBlock(const
parser::OpenMPLoopConstruct &x,
void OmpStructureChecker::CheckNestedConstruct(
const parser::OpenMPLoopConstruct &x) {
size_t nestedCount{0};
+ unsigned version{context_.langOptions().OpenMPVersio
[llvm-branch-commits] [llvm] [AArch64][PAC] Rework the expansion of AUT/AUTPAC pseudos (PR #169699)
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/169699
>From 19d2b2cc483176a207190213a45e9f6342853067 Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Thu, 25 Sep 2025 22:28:14 +0300
Subject: [PATCH] [AArch64][PAC] Rework the expansion of AUT/AUTPAC pseudos
Refactor `AArch64AsmPrinter::emitPtrauthAuthResign` to improve
readability and fix the conditions of `emitPtrauthDiscriminator` being
allowed to clobber AddrDisc:
* do not clobber `AUTAddrDisc` when computing `AUTDiscReg` on resigning
if `AUTAddrDisc == PACAddrDisc`, as it would prevent passing raw,
64-bit value as the new discriminator
* mark the `$Scratch` operand of `AUTxMxN` as early-clobber (fixes
assertions when emitting code at `-O0`)
* move the code computing `ShouldCheck` and `ShouldTrap` conditions to a
separate function
* define helper `struct PtrAuthSchema` to pass arguments to
`emitPtrauthAuthResign` in a better structured way
---
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 177 +++---
llvm/lib/Target/AArch64/AArch64InstrInfo.td | 13 +-
...trauth-intrinsic-auth-resign-with-blend.ll | 77 +++-
3 files changed, 192 insertions(+), 75 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
index 73c91c97bc1db..594a0bbff0028 100644
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
@@ -179,13 +179,21 @@ class AArch64AsmPrinter : public AsmPrinter {
// Check authenticated LR before tail calling.
void emitPtrauthTailCallHardening(const MachineInstr *TC);
+ struct PtrAuthSchema {
+PtrAuthSchema(AArch64PACKey::ID Key, uint64_t Disc,
+ const MachineOperand &AddrDiscOp);
+
+AArch64PACKey::ID Key;
+uint64_t Disc;
+Register AddrDisc;
+bool AddrDiscIsKilled;
+ };
+
// Emit the sequence for AUT or AUTPAC.
- void emitPtrauthAuthResign(Register AUTVal, AArch64PACKey::ID AUTKey,
- uint64_t AUTDisc,
- const MachineOperand *AUTAddrDisc,
- Register Scratch,
- std::optional PACKey,
- uint64_t PACDisc, Register PACAddrDisc);
+ void
+ emitPtrauthAuthResign(Register Pointer, Register Scratch,
+PtrAuthSchema AuthSchema,
+std::optional SignSchema =
std::nullopt);
// Emit the sequence for PAC.
void emitPtrauthSign(const MachineInstr *MI);
@@ -2175,23 +2183,9 @@ void
AArch64AsmPrinter::emitPtrauthTailCallHardening(const MachineInstr *TC) {
LRCheckMethod);
}
-void AArch64AsmPrinter::emitPtrauthAuthResign(
-Register AUTVal, AArch64PACKey::ID AUTKey, uint64_t AUTDisc,
-const MachineOperand *AUTAddrDisc, Register Scratch,
-std::optional PACKey, uint64_t PACDisc,
-Register PACAddrDisc) {
- const bool IsAUTPAC = PACKey.has_value();
-
- // We expand AUT/AUTPAC into a sequence of the form
- //
- // ; authenticate x16
- // ; check pointer in x16
- //Lsuccess:
- // ; sign x16 (if AUTPAC)
- //Lend: ; if not trapping on failure
- //
- // with the checking sequence chosen depending on whether/how we should check
- // the pointer and whether we should trap on failure.
+static std::pair getCheckAndTrapMode(const MachineFunction *MF,
+ bool IsResign) {
+ const AArch64Subtarget &STI = MF->getSubtarget();
// By default, auth/resign sequences check for auth failures.
bool ShouldCheck = true;
@@ -2200,7 +2194,7 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(
// On an FPAC CPU, you get traps whether you want them or not: there's
// no point in emitting checks or traps.
- if (STI->hasFPAC())
+ if (STI.hasFPAC())
ShouldCheck = ShouldTrap = false;
// However, command-line flags can override this, for experimentation.
@@ -2219,38 +2213,79 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(
break;
}
- // Compute aut discriminator
- Register AUTDiscReg = emitPtrauthDiscriminator(
- AUTDisc, AUTAddrDisc->getReg(), Scratch, AUTAddrDisc->isKill());
- emitAUT(AUTKey, AUTVal, AUTDiscReg);
+ // Checked-but-not-trapping mode ("poison") only applies to resigning,
+ // replace with "unchecked" for standalone AUT.
+ if (!IsResign && ShouldCheck && !ShouldTrap)
+ShouldCheck = ShouldTrap = false;
- // Unchecked or checked-but-non-trapping AUT is just an "AUT": we're done.
- if (!IsAUTPAC && (!ShouldCheck || !ShouldTrap))
-return;
+ return std::make_pair(ShouldCheck, ShouldTrap);
+}
- MCSymbol *EndSym = nullptr;
+AArch64AsmPrinter::PtrAuthSchema::PtrAuthSchema(
+AArch64PACKey::ID Key, uint64_t Disc, const MachineOperand &AddrDiscOp)
+: Key(Key), Disc(Disc), AddrDisc(AddrDiscOp.getReg()),
+ AddrDiscIsKilled(AddrDiscOp.isKill()) {}
- if (ShouldCheck
[llvm-branch-commits] [llvm] Add llvm.protected.field.ptr intrinsic and pre-ISel lowering. (PR #151647)
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/151647
>From 37c355e3264bba72999fa6dcbc565ae82bc1a1a5 Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Wed, 26 Nov 2025 11:01:52 -0800
Subject: [PATCH] Fix tests
Created using spr 1.3.6-beta.1
---
.../protected-field-pointer-addrspace1.ll | 4 ++--
.../PreISelIntrinsicLowering/protected-field-pointer.ll | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git
a/llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer-addrspace1.ll
b/llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer-addrspace1.ll
index 5493d38eb49ba..6b4c9ef646660 100644
---
a/llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer-addrspace1.ll
+++
b/llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer-addrspace1.ll
@@ -157,11 +157,11 @@ declare ptr addrspace(1) @llvm.protected.field.ptr.p1(ptr
addrspace(1), i64, i1
;.
; NOPAUTH: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind
willreturn memory(none) }
; NOPAUTH: attributes #[[ATTR1:[0-9]+]] = { nounwind memory(none) }
-; NOPAUTH: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nosync nounwind
speculatable willreturn memory(none) }
+; NOPAUTH: attributes #[[ATTR2:[0-9]+]] = { nocallback nocreateundeforpoison
nofree nosync nounwind speculatable willreturn memory(none) }
;.
; PAUTH: attributes #[[ATTR0]] = { "target-features"="+pauth" }
; PAUTH: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind
willreturn memory(none) "target-features"="+pauth" }
; PAUTH: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nosync nounwind
willreturn memory(none) }
; PAUTH: attributes #[[ATTR3:[0-9]+]] = { nounwind memory(none) }
-; PAUTH: attributes #[[ATTR4:[0-9]+]] = { nocallback nofree nosync nounwind
speculatable willreturn memory(none) }
+; PAUTH: attributes #[[ATTR4:[0-9]+]] = { nocallback nocreateundeforpoison
nofree nosync nounwind speculatable willreturn memory(none) }
;.
diff --git
a/llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer.ll
b/llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer.ll
index b8c605177e33b..cd0fcb40d0d77 100644
--- a/llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer.ll
+++ b/llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer.ll
@@ -157,11 +157,11 @@ declare ptr @llvm.protected.field.ptr.p0(ptr, i64, i1
immarg)
;.
; NOPAUTH: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind
willreturn memory(none) }
; NOPAUTH: attributes #[[ATTR1:[0-9]+]] = { nounwind memory(none) }
-; NOPAUTH: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nosync nounwind
speculatable willreturn memory(none) }
+; NOPAUTH: attributes #[[ATTR2:[0-9]+]] = { nocallback nocreateundeforpoison
nofree nosync nounwind speculatable willreturn memory(none) }
;.
; PAUTH: attributes #[[ATTR0]] = { "target-features"="+pauth" }
; PAUTH: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind
willreturn memory(none) "target-features"="+pauth" }
; PAUTH: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nosync nounwind
willreturn memory(none) }
; PAUTH: attributes #[[ATTR3:[0-9]+]] = { nounwind memory(none) }
-; PAUTH: attributes #[[ATTR4:[0-9]+]] = { nocallback nofree nosync nounwind
speculatable willreturn memory(none) }
+; PAUTH: attributes #[[ATTR4:[0-9]+]] = { nocallback nocreateundeforpoison
nofree nosync nounwind speculatable willreturn memory(none) }
;.
___
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [LowerMemIntrinsics] Optimize memset lowering (PR #169040)
https://github.com/krzysz00 commented: Can't see any issue on the buffer fat pointer side, though it's weird that all those casts and extracts didn't fold https://github.com/llvm/llvm-project/pull/169040 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [LoongArch] Legalize broadcasting the first element of 256-bit vector using `xvreplve0` (PR #169271)
https://github.com/zhaoqi5 created
https://github.com/llvm/llvm-project/pull/169271
None
>From 9ae33a6793ccb6004dc36dfcff4065d05d0d6e25 Mon Sep 17 00:00:00 2001
From: Qi Zhao
Date: Mon, 24 Nov 2025 10:52:09 +0800
Subject: [PATCH] [LoongArch] Legalize broadcasting the first element of
256-bit vector using `xvreplve0`
---
.../LoongArch/LoongArchISelLowering.cpp | 19 +++
.../lasx/ir-instruction/shuffle-broadcast.ll | 16 ++--
2 files changed, 25 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index ac95ef5f30888..c461c304cf743 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -2157,6 +2157,23 @@ lowerVECTOR_SHUFFLE_XVSHUF4I(const SDLoc &DL,
ArrayRef Mask, MVT VT,
return lowerVECTOR_SHUFFLE_VSHUF4I(DL, Mask, VT, V1, V2, DAG, Subtarget);
}
+/// Lower VECTOR_SHUFFLE into XVREPLVE0 (if possible).
+///
+/// It is a XVREPLVE0 when the VECTOR_SHUFFLE is a broadcast of element 0,
+/// i.e. the mask is:
+/// <0, 0, 0, ...>
+///
+/// When undef's appear in the mask they are treated as if they were whatever
+/// value is necessary in order to fit the above form.
+static SDValue lowerVECTOR_SHUFFLE_XVREPLVE0(const SDLoc &DL,
+ ArrayRef Mask, MVT VT,
+ SDValue V1, SelectionDAG &DAG) {
+ if (!ShuffleVectorInst::isZeroEltSplatMask(Mask, Mask.size()))
+return SDValue();
+
+ return DAG.getNode(LoongArchISD::XVREPLVE0, DL, VT, V1);
+}
+
/// Lower VECTOR_SHUFFLE into XVPERMI (if possible).
static SDValue
lowerVECTOR_SHUFFLE_XVPERMI(const SDLoc &DL, ArrayRef Mask, MVT VT,
@@ -2673,6 +2690,8 @@ static SDValue lower256BitShuffle(const SDLoc &DL,
ArrayRef Mask, MVT VT,
if ((Result = lowerVECTOR_SHUFFLE_XVSHUF4I(DL, Mask, VT, V1, V2, DAG,
Subtarget)))
return Result;
+if ((Result = lowerVECTOR_SHUFFLE_XVREPLVE0(DL, Mask, VT, V1, DAG)))
+ return Result;
// Try to widen vectors to gain more optimization opportunities.
if (SDValue NewShuffle = widenShuffleMask(DL, Mask, VT, V1, V2, DAG))
return NewShuffle;
diff --git
a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll
b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll
index 5eae364fd40cd..6d18d666dc172 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll
@@ -6,8 +6,7 @@ define void @broadcast0_v32i8(ptr %res, ptr %a) nounwind {
; CHECK-LABEL: broadcast0_v32i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT:xvld $xr0, $a1, 0
-; CHECK-NEXT:xvpermi.d $xr0, $xr0, 68
-; CHECK-NEXT:xvrepl128vei.b $xr0, $xr0, 0
+; CHECK-NEXT:xvreplve0.b $xr0, $xr0
; CHECK-NEXT:xvst $xr0, $a0, 0
; CHECK-NEXT:ret
entry:
@@ -36,8 +35,7 @@ define void @broadcast0_v16i16(ptr %res, ptr %a) nounwind {
; CHECK-LABEL: broadcast0_v16i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT:xvld $xr0, $a1, 0
-; CHECK-NEXT:xvpermi.d $xr0, $xr0, 68
-; CHECK-NEXT:xvrepl128vei.h $xr0, $xr0, 0
+; CHECK-NEXT:xvreplve0.h $xr0, $xr0
; CHECK-NEXT:xvst $xr0, $a0, 0
; CHECK-NEXT:ret
entry:
@@ -66,8 +64,7 @@ define void @broadcast0_v8i32(ptr %res, ptr %a) nounwind {
; CHECK-LABEL: broadcast0_v8i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT:xvld $xr0, $a1, 0
-; CHECK-NEXT:xvpermi.d $xr0, $xr0, 68
-; CHECK-NEXT:xvrepl128vei.w $xr0, $xr0, 0
+; CHECK-NEXT:xvreplve0.w $xr0, $xr0
; CHECK-NEXT:xvst $xr0, $a0, 0
; CHECK-NEXT:ret
entry:
@@ -96,8 +93,7 @@ define void @broadcast0_v8f32(ptr %res, ptr %a) nounwind {
; CHECK-LABEL: broadcast0_v8f32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT:xvld $xr0, $a1, 0
-; CHECK-NEXT:xvpermi.d $xr0, $xr0, 68
-; CHECK-NEXT:xvrepl128vei.w $xr0, $xr0, 0
+; CHECK-NEXT:xvreplve0.w $xr0, $xr0
; CHECK-NEXT:xvst $xr0, $a0, 0
; CHECK-NEXT:ret
entry:
@@ -126,7 +122,7 @@ define void @broadcast0_v4i64(ptr %res, ptr %a) nounwind {
; CHECK-LABEL: broadcast0_v4i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT:xvld $xr0, $a1, 0
-; CHECK-NEXT:xvpermi.d $xr0, $xr0, 0
+; CHECK-NEXT:xvreplve0.d $xr0, $xr0
; CHECK-NEXT:xvst $xr0, $a0, 0
; CHECK-NEXT:ret
entry:
@@ -154,7 +150,7 @@ define void @broadcast0_v4f64(ptr %res, ptr %a) nounwind {
; CHECK-LABEL: broadcast0_v4f64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT:xvld $xr0, $a1, 0
-; CHECK-NEXT:xvpermi.d $xr0, $xr0, 0
+; CHECK-NEXT:xvreplve0.d $xr0, $xr0
; CHECK-NEXT:xvst $xr0, $a0, 0
; CHECK-NEXT:ret
entry:
___
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[llvm-branch-commits] [llvm] [LoongArch] Legalize broadcasting the first element of 256-bit vector using `xvreplve0` (PR #169271)
llvmbot wrote:
@llvm/pr-subscribers-backend-loongarch
Author: ZhaoQi (zhaoqi5)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/169271.diff
2 Files Affected:
- (modified) llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp (+19)
- (modified)
llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll (+6-10)
``diff
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index ac95ef5f30888..c461c304cf743 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -2157,6 +2157,23 @@ lowerVECTOR_SHUFFLE_XVSHUF4I(const SDLoc &DL,
ArrayRef Mask, MVT VT,
return lowerVECTOR_SHUFFLE_VSHUF4I(DL, Mask, VT, V1, V2, DAG, Subtarget);
}
+/// Lower VECTOR_SHUFFLE into XVREPLVE0 (if possible).
+///
+/// It is a XVREPLVE0 when the VECTOR_SHUFFLE is a broadcast of element 0,
+/// i.e. the mask is:
+/// <0, 0, 0, ...>
+///
+/// When undef's appear in the mask they are treated as if they were whatever
+/// value is necessary in order to fit the above form.
+static SDValue lowerVECTOR_SHUFFLE_XVREPLVE0(const SDLoc &DL,
+ ArrayRef Mask, MVT VT,
+ SDValue V1, SelectionDAG &DAG) {
+ if (!ShuffleVectorInst::isZeroEltSplatMask(Mask, Mask.size()))
+return SDValue();
+
+ return DAG.getNode(LoongArchISD::XVREPLVE0, DL, VT, V1);
+}
+
/// Lower VECTOR_SHUFFLE into XVPERMI (if possible).
static SDValue
lowerVECTOR_SHUFFLE_XVPERMI(const SDLoc &DL, ArrayRef Mask, MVT VT,
@@ -2673,6 +2690,8 @@ static SDValue lower256BitShuffle(const SDLoc &DL,
ArrayRef Mask, MVT VT,
if ((Result = lowerVECTOR_SHUFFLE_XVSHUF4I(DL, Mask, VT, V1, V2, DAG,
Subtarget)))
return Result;
+if ((Result = lowerVECTOR_SHUFFLE_XVREPLVE0(DL, Mask, VT, V1, DAG)))
+ return Result;
// Try to widen vectors to gain more optimization opportunities.
if (SDValue NewShuffle = widenShuffleMask(DL, Mask, VT, V1, V2, DAG))
return NewShuffle;
diff --git
a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll
b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll
index 5eae364fd40cd..6d18d666dc172 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll
@@ -6,8 +6,7 @@ define void @broadcast0_v32i8(ptr %res, ptr %a) nounwind {
; CHECK-LABEL: broadcast0_v32i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT:xvld $xr0, $a1, 0
-; CHECK-NEXT:xvpermi.d $xr0, $xr0, 68
-; CHECK-NEXT:xvrepl128vei.b $xr0, $xr0, 0
+; CHECK-NEXT:xvreplve0.b $xr0, $xr0
; CHECK-NEXT:xvst $xr0, $a0, 0
; CHECK-NEXT:ret
entry:
@@ -36,8 +35,7 @@ define void @broadcast0_v16i16(ptr %res, ptr %a) nounwind {
; CHECK-LABEL: broadcast0_v16i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT:xvld $xr0, $a1, 0
-; CHECK-NEXT:xvpermi.d $xr0, $xr0, 68
-; CHECK-NEXT:xvrepl128vei.h $xr0, $xr0, 0
+; CHECK-NEXT:xvreplve0.h $xr0, $xr0
; CHECK-NEXT:xvst $xr0, $a0, 0
; CHECK-NEXT:ret
entry:
@@ -66,8 +64,7 @@ define void @broadcast0_v8i32(ptr %res, ptr %a) nounwind {
; CHECK-LABEL: broadcast0_v8i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT:xvld $xr0, $a1, 0
-; CHECK-NEXT:xvpermi.d $xr0, $xr0, 68
-; CHECK-NEXT:xvrepl128vei.w $xr0, $xr0, 0
+; CHECK-NEXT:xvreplve0.w $xr0, $xr0
; CHECK-NEXT:xvst $xr0, $a0, 0
; CHECK-NEXT:ret
entry:
@@ -96,8 +93,7 @@ define void @broadcast0_v8f32(ptr %res, ptr %a) nounwind {
; CHECK-LABEL: broadcast0_v8f32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT:xvld $xr0, $a1, 0
-; CHECK-NEXT:xvpermi.d $xr0, $xr0, 68
-; CHECK-NEXT:xvrepl128vei.w $xr0, $xr0, 0
+; CHECK-NEXT:xvreplve0.w $xr0, $xr0
; CHECK-NEXT:xvst $xr0, $a0, 0
; CHECK-NEXT:ret
entry:
@@ -126,7 +122,7 @@ define void @broadcast0_v4i64(ptr %res, ptr %a) nounwind {
; CHECK-LABEL: broadcast0_v4i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT:xvld $xr0, $a1, 0
-; CHECK-NEXT:xvpermi.d $xr0, $xr0, 0
+; CHECK-NEXT:xvreplve0.d $xr0, $xr0
; CHECK-NEXT:xvst $xr0, $a0, 0
; CHECK-NEXT:ret
entry:
@@ -154,7 +150,7 @@ define void @broadcast0_v4f64(ptr %res, ptr %a) nounwind {
; CHECK-LABEL: broadcast0_v4f64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT:xvld $xr0, $a1, 0
-; CHECK-NEXT:xvpermi.d $xr0, $xr0, 0
+; CHECK-NEXT:xvreplve0.d $xr0, $xr0
; CHECK-NEXT:xvst $xr0, $a0, 0
; CHECK-NEXT:ret
entry:
``
https://github.com/llvm/llvm-project/pull/169271
___
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[llvm-branch-commits] [llvm] [LoongArch] Legalize broadcasting the first element of 256-bit vector using `xvreplve0` (PR #169271)
github-actions[bot] wrote: # :penguin: Linux x64 Test Results * 186432 tests passed * 4864 tests skipped https://github.com/llvm/llvm-project/pull/169271 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][arith] Add support for `fptosi`, `fptoui` to `ArithToAPFloat` (PR #169277)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff origin/main HEAD --extensions cpp --
mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
mlir/lib/ExecutionEngine/APFloatWrappers.cpp --diff_from_common_commit
``
:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:
View the diff from clang-format here.
``diff
diff --git a/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
b/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
index 1fe698f1c..daa82d5b2 100644
--- a/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
+++ b/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
@@ -190,7 +190,7 @@ struct FpToIntConversion final : OpRewritePattern {
FpToIntConversion(MLIRContext *context, SymbolOpInterface symTable,
bool isUnsigned, PatternBenefit benefit = 1)
: OpRewritePattern(context, benefit), symTable(symTable),
-isUnsigned(isUnsigned){};
+isUnsigned(isUnsigned) {};
LogicalResult matchAndRewrite(OpTy op,
PatternRewriter &rewriter) const override {
``
https://github.com/llvm/llvm-project/pull/169277
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[llvm-branch-commits] [mlir] [mlir][arith] Add support for `fptosi`, `fptoui` to `ArithToAPFloat` (PR #169277)
llvmbot wrote:
@llvm/pr-subscribers-mlir
Author: Matthias Springer (matthias-springer)
Changes
Add support for `arith.fptosi` and `arith.fptoui`.
Depends on #169275.
---
Full diff: https://github.com/llvm/llvm-project/pull/169277.diff
4 Files Affected:
- (modified) mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp (+58)
- (modified) mlir/lib/ExecutionEngine/APFloatWrappers.cpp (+14)
- (modified) mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir (+26)
- (modified)
mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir (+10)
``diff
diff --git a/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
b/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
index 90e6e674da519..1fe698f1c8902 100644
--- a/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
+++ b/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
@@ -185,6 +185,60 @@ struct FpToFpConversion final : OpRewritePattern {
SymbolOpInterface symTable;
};
+template
+struct FpToIntConversion final : OpRewritePattern {
+ FpToIntConversion(MLIRContext *context, SymbolOpInterface symTable,
+bool isUnsigned, PatternBenefit benefit = 1)
+ : OpRewritePattern(context, benefit), symTable(symTable),
+isUnsigned(isUnsigned){};
+
+ LogicalResult matchAndRewrite(OpTy op,
+PatternRewriter &rewriter) const override {
+// Get APFloat function from runtime library.
+auto i1Type = IntegerType::get(symTable->getContext(), 1);
+auto i32Type = IntegerType::get(symTable->getContext(), 32);
+auto i64Type = IntegerType::get(symTable->getContext(), 64);
+FailureOr fn =
+lookupOrCreateApFloatFn(rewriter, symTable, "convert_to_int",
+{i32Type, i32Type, i1Type, i64Type});
+if (failed(fn))
+ return fn;
+
+rewriter.setInsertionPoint(op);
+// Cast operands to 64-bit integers.
+Location loc = op.getLoc();
+auto inFloatTy = cast(op.getOperand().getType());
+auto inIntWType = rewriter.getIntegerType(inFloatTy.getWidth());
+auto int64Type = rewriter.getI64Type();
+Value operandBits = arith::ExtUIOp::create(
+rewriter, loc, int64Type,
+arith::BitcastOp::create(rewriter, loc, inIntWType, op.getOperand()));
+
+// Call APFloat function.
+Value inSemValue = getSemanticsValue(rewriter, loc, inFloatTy);
+auto outIntTy = cast(op.getType());
+Value outWidthValue = arith::ConstantOp::create(
+rewriter, loc, i32Type,
+rewriter.getIntegerAttr(i32Type, outIntTy.getWidth()));
+Value isUnsignedValue = arith::ConstantOp::create(
+rewriter, loc, i1Type, rewriter.getIntegerAttr(i1Type, isUnsigned));
+SmallVector params = {inSemValue, outWidthValue, isUnsignedValue,
+ operandBits};
+auto resultOp =
+func::CallOp::create(rewriter, loc, TypeRange(rewriter.getI64Type()),
+ SymbolRefAttr::get(*fn), params);
+
+// Truncate result to the original width.
+Value truncatedBits = arith::TruncIOp::create(rewriter, loc, outIntTy,
+ resultOp->getResult(0));
+rewriter.replaceOp(op, truncatedBits);
+return success();
+ }
+
+ SymbolOpInterface symTable;
+ bool isUnsigned;
+};
+
namespace {
struct ArithToAPFloatConversionPass final
: impl::ArithToAPFloatConversionPassBase {
@@ -208,6 +262,10 @@ void ArithToAPFloatConversionPass::runOnOperation() {
context, "remainder", getOperation());
patterns.add>(context, getOperation());
patterns.add>(context, getOperation());
+ patterns.add>(context, getOperation(),
+ /*isUnsigned=*/false);
+ patterns.add>(context, getOperation(),
+ /*isUnsigned=*/true);
LogicalResult result = success();
ScopedDiagnosticHandler scopedHandler(context, [&result](Diagnostic &diag) {
if (diag.getSeverity() == DiagnosticSeverity::Error) {
diff --git a/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
b/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
index 511b05ea380f0..632fe9cf2269d 100644
--- a/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
+++ b/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
@@ -20,6 +20,7 @@
// APFloatBase::Semantics enum value.
//
#include "llvm/ADT/APFloat.h"
+#include "llvm/ADT/APSInt.h"
#ifdef _WIN32
#ifndef MLIR_APFLOAT_WRAPPERS_EXPORT
@@ -101,4 +102,17 @@ _mlir_apfloat_convert(int32_t inSemantics, int32_t
outSemantics, uint64_t a) {
llvm::APInt result = val.bitcastToAPInt();
return result.getZExtValue();
}
+
+MLIR_APFLOAT_WRAPPERS_EXPORT uint64_t _mlir_apfloat_convert_to_int(
+int32_t semantics, int32_t resultWidth, bool isUnsigned, uint64_t a) {
+ const llvm::fltSemantics &sem = llvm::APFloatBase::EnumToSemantics(
+ static_cast(semantics));
+ unsigned inputWidth = llvm::APFloatBase::semanticsSizeInBits(sem);
[llvm-branch-commits] [mlir] [mlir][arith] Add support for `fptosi`, `fptoui` to `ArithToAPFloat` (PR #169277)
llvmbot wrote:
@llvm/pr-subscribers-mlir-arith
Author: Matthias Springer (matthias-springer)
Changes
Add support for `arith.fptosi` and `arith.fptoui`.
Depends on #169275.
---
Full diff: https://github.com/llvm/llvm-project/pull/169277.diff
4 Files Affected:
- (modified) mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp (+58)
- (modified) mlir/lib/ExecutionEngine/APFloatWrappers.cpp (+14)
- (modified) mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir (+26)
- (modified)
mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir (+10)
``diff
diff --git a/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
b/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
index 90e6e674da519..1fe698f1c8902 100644
--- a/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
+++ b/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
@@ -185,6 +185,60 @@ struct FpToFpConversion final : OpRewritePattern {
SymbolOpInterface symTable;
};
+template
+struct FpToIntConversion final : OpRewritePattern {
+ FpToIntConversion(MLIRContext *context, SymbolOpInterface symTable,
+bool isUnsigned, PatternBenefit benefit = 1)
+ : OpRewritePattern(context, benefit), symTable(symTable),
+isUnsigned(isUnsigned){};
+
+ LogicalResult matchAndRewrite(OpTy op,
+PatternRewriter &rewriter) const override {
+// Get APFloat function from runtime library.
+auto i1Type = IntegerType::get(symTable->getContext(), 1);
+auto i32Type = IntegerType::get(symTable->getContext(), 32);
+auto i64Type = IntegerType::get(symTable->getContext(), 64);
+FailureOr fn =
+lookupOrCreateApFloatFn(rewriter, symTable, "convert_to_int",
+{i32Type, i32Type, i1Type, i64Type});
+if (failed(fn))
+ return fn;
+
+rewriter.setInsertionPoint(op);
+// Cast operands to 64-bit integers.
+Location loc = op.getLoc();
+auto inFloatTy = cast(op.getOperand().getType());
+auto inIntWType = rewriter.getIntegerType(inFloatTy.getWidth());
+auto int64Type = rewriter.getI64Type();
+Value operandBits = arith::ExtUIOp::create(
+rewriter, loc, int64Type,
+arith::BitcastOp::create(rewriter, loc, inIntWType, op.getOperand()));
+
+// Call APFloat function.
+Value inSemValue = getSemanticsValue(rewriter, loc, inFloatTy);
+auto outIntTy = cast(op.getType());
+Value outWidthValue = arith::ConstantOp::create(
+rewriter, loc, i32Type,
+rewriter.getIntegerAttr(i32Type, outIntTy.getWidth()));
+Value isUnsignedValue = arith::ConstantOp::create(
+rewriter, loc, i1Type, rewriter.getIntegerAttr(i1Type, isUnsigned));
+SmallVector params = {inSemValue, outWidthValue, isUnsignedValue,
+ operandBits};
+auto resultOp =
+func::CallOp::create(rewriter, loc, TypeRange(rewriter.getI64Type()),
+ SymbolRefAttr::get(*fn), params);
+
+// Truncate result to the original width.
+Value truncatedBits = arith::TruncIOp::create(rewriter, loc, outIntTy,
+ resultOp->getResult(0));
+rewriter.replaceOp(op, truncatedBits);
+return success();
+ }
+
+ SymbolOpInterface symTable;
+ bool isUnsigned;
+};
+
namespace {
struct ArithToAPFloatConversionPass final
: impl::ArithToAPFloatConversionPassBase {
@@ -208,6 +262,10 @@ void ArithToAPFloatConversionPass::runOnOperation() {
context, "remainder", getOperation());
patterns.add>(context, getOperation());
patterns.add>(context, getOperation());
+ patterns.add>(context, getOperation(),
+ /*isUnsigned=*/false);
+ patterns.add>(context, getOperation(),
+ /*isUnsigned=*/true);
LogicalResult result = success();
ScopedDiagnosticHandler scopedHandler(context, [&result](Diagnostic &diag) {
if (diag.getSeverity() == DiagnosticSeverity::Error) {
diff --git a/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
b/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
index 511b05ea380f0..632fe9cf2269d 100644
--- a/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
+++ b/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
@@ -20,6 +20,7 @@
// APFloatBase::Semantics enum value.
//
#include "llvm/ADT/APFloat.h"
+#include "llvm/ADT/APSInt.h"
#ifdef _WIN32
#ifndef MLIR_APFLOAT_WRAPPERS_EXPORT
@@ -101,4 +102,17 @@ _mlir_apfloat_convert(int32_t inSemantics, int32_t
outSemantics, uint64_t a) {
llvm::APInt result = val.bitcastToAPInt();
return result.getZExtValue();
}
+
+MLIR_APFLOAT_WRAPPERS_EXPORT uint64_t _mlir_apfloat_convert_to_int(
+int32_t semantics, int32_t resultWidth, bool isUnsigned, uint64_t a) {
+ const llvm::fltSemantics &sem = llvm::APFloatBase::EnumToSemantics(
+ static_cast(semantics));
+ unsigned inputWidth = llvm::APFloatBase::semanticsSizeInBits(
[llvm-branch-commits] [mlir] [mlir][arith] Add support for `fptosi`, `fptoui` to `ArithToAPFloat` (PR #169277)
llvmbot wrote:
@llvm/pr-subscribers-mlir-execution-engine
Author: Matthias Springer (matthias-springer)
Changes
Add support for `arith.fptosi` and `arith.fptoui`.
Depends on #169275.
---
Full diff: https://github.com/llvm/llvm-project/pull/169277.diff
4 Files Affected:
- (modified) mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp (+58)
- (modified) mlir/lib/ExecutionEngine/APFloatWrappers.cpp (+14)
- (modified) mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir (+26)
- (modified)
mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir (+10)
``diff
diff --git a/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
b/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
index 90e6e674da519..1fe698f1c8902 100644
--- a/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
+++ b/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
@@ -185,6 +185,60 @@ struct FpToFpConversion final : OpRewritePattern {
SymbolOpInterface symTable;
};
+template
+struct FpToIntConversion final : OpRewritePattern {
+ FpToIntConversion(MLIRContext *context, SymbolOpInterface symTable,
+bool isUnsigned, PatternBenefit benefit = 1)
+ : OpRewritePattern(context, benefit), symTable(symTable),
+isUnsigned(isUnsigned){};
+
+ LogicalResult matchAndRewrite(OpTy op,
+PatternRewriter &rewriter) const override {
+// Get APFloat function from runtime library.
+auto i1Type = IntegerType::get(symTable->getContext(), 1);
+auto i32Type = IntegerType::get(symTable->getContext(), 32);
+auto i64Type = IntegerType::get(symTable->getContext(), 64);
+FailureOr fn =
+lookupOrCreateApFloatFn(rewriter, symTable, "convert_to_int",
+{i32Type, i32Type, i1Type, i64Type});
+if (failed(fn))
+ return fn;
+
+rewriter.setInsertionPoint(op);
+// Cast operands to 64-bit integers.
+Location loc = op.getLoc();
+auto inFloatTy = cast(op.getOperand().getType());
+auto inIntWType = rewriter.getIntegerType(inFloatTy.getWidth());
+auto int64Type = rewriter.getI64Type();
+Value operandBits = arith::ExtUIOp::create(
+rewriter, loc, int64Type,
+arith::BitcastOp::create(rewriter, loc, inIntWType, op.getOperand()));
+
+// Call APFloat function.
+Value inSemValue = getSemanticsValue(rewriter, loc, inFloatTy);
+auto outIntTy = cast(op.getType());
+Value outWidthValue = arith::ConstantOp::create(
+rewriter, loc, i32Type,
+rewriter.getIntegerAttr(i32Type, outIntTy.getWidth()));
+Value isUnsignedValue = arith::ConstantOp::create(
+rewriter, loc, i1Type, rewriter.getIntegerAttr(i1Type, isUnsigned));
+SmallVector params = {inSemValue, outWidthValue, isUnsignedValue,
+ operandBits};
+auto resultOp =
+func::CallOp::create(rewriter, loc, TypeRange(rewriter.getI64Type()),
+ SymbolRefAttr::get(*fn), params);
+
+// Truncate result to the original width.
+Value truncatedBits = arith::TruncIOp::create(rewriter, loc, outIntTy,
+ resultOp->getResult(0));
+rewriter.replaceOp(op, truncatedBits);
+return success();
+ }
+
+ SymbolOpInterface symTable;
+ bool isUnsigned;
+};
+
namespace {
struct ArithToAPFloatConversionPass final
: impl::ArithToAPFloatConversionPassBase {
@@ -208,6 +262,10 @@ void ArithToAPFloatConversionPass::runOnOperation() {
context, "remainder", getOperation());
patterns.add>(context, getOperation());
patterns.add>(context, getOperation());
+ patterns.add>(context, getOperation(),
+ /*isUnsigned=*/false);
+ patterns.add>(context, getOperation(),
+ /*isUnsigned=*/true);
LogicalResult result = success();
ScopedDiagnosticHandler scopedHandler(context, [&result](Diagnostic &diag) {
if (diag.getSeverity() == DiagnosticSeverity::Error) {
diff --git a/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
b/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
index 511b05ea380f0..632fe9cf2269d 100644
--- a/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
+++ b/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
@@ -20,6 +20,7 @@
// APFloatBase::Semantics enum value.
//
#include "llvm/ADT/APFloat.h"
+#include "llvm/ADT/APSInt.h"
#ifdef _WIN32
#ifndef MLIR_APFLOAT_WRAPPERS_EXPORT
@@ -101,4 +102,17 @@ _mlir_apfloat_convert(int32_t inSemantics, int32_t
outSemantics, uint64_t a) {
llvm::APInt result = val.bitcastToAPInt();
return result.getZExtValue();
}
+
+MLIR_APFLOAT_WRAPPERS_EXPORT uint64_t _mlir_apfloat_convert_to_int(
+int32_t semantics, int32_t resultWidth, bool isUnsigned, uint64_t a) {
+ const llvm::fltSemantics &sem = llvm::APFloatBase::EnumToSemantics(
+ static_cast(semantics));
+ unsigned inputWidth = llvm::APFloatBase::semantics
[llvm-branch-commits] [mlir] [mlir][arith] Add support for `fptosi`, `fptoui` to `ArithToAPFloat` (PR #169277)
https://github.com/matthias-springer created
https://github.com/llvm/llvm-project/pull/169277
Add support for `arith.fptosi` and `arith.fptoui`.
Depends on #169275.
>From 2e98cbc72892c897fea8e15b007d1d8cacd8cbf5 Mon Sep 17 00:00:00 2001
From: Matthias Springer
Date: Mon, 24 Nov 2025 04:19:59 +
Subject: [PATCH] [mlir][arith] Add support for `fptosi`, `fptoui` to
`ArithToAPFloat`
---
.../ArithToAPFloat/ArithToAPFloat.cpp | 58 +++
mlir/lib/ExecutionEngine/APFloatWrappers.cpp | 14 +
.../ArithToApfloat/arith-to-apfloat.mlir | 26 +
.../Arith/CPU/test-apfloat-emulation.mlir | 10
4 files changed, 108 insertions(+)
diff --git a/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
b/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
index 90e6e674da519..1fe698f1c8902 100644
--- a/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
+++ b/mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
@@ -185,6 +185,60 @@ struct FpToFpConversion final : OpRewritePattern {
SymbolOpInterface symTable;
};
+template
+struct FpToIntConversion final : OpRewritePattern {
+ FpToIntConversion(MLIRContext *context, SymbolOpInterface symTable,
+bool isUnsigned, PatternBenefit benefit = 1)
+ : OpRewritePattern(context, benefit), symTable(symTable),
+isUnsigned(isUnsigned){};
+
+ LogicalResult matchAndRewrite(OpTy op,
+PatternRewriter &rewriter) const override {
+// Get APFloat function from runtime library.
+auto i1Type = IntegerType::get(symTable->getContext(), 1);
+auto i32Type = IntegerType::get(symTable->getContext(), 32);
+auto i64Type = IntegerType::get(symTable->getContext(), 64);
+FailureOr fn =
+lookupOrCreateApFloatFn(rewriter, symTable, "convert_to_int",
+{i32Type, i32Type, i1Type, i64Type});
+if (failed(fn))
+ return fn;
+
+rewriter.setInsertionPoint(op);
+// Cast operands to 64-bit integers.
+Location loc = op.getLoc();
+auto inFloatTy = cast(op.getOperand().getType());
+auto inIntWType = rewriter.getIntegerType(inFloatTy.getWidth());
+auto int64Type = rewriter.getI64Type();
+Value operandBits = arith::ExtUIOp::create(
+rewriter, loc, int64Type,
+arith::BitcastOp::create(rewriter, loc, inIntWType, op.getOperand()));
+
+// Call APFloat function.
+Value inSemValue = getSemanticsValue(rewriter, loc, inFloatTy);
+auto outIntTy = cast(op.getType());
+Value outWidthValue = arith::ConstantOp::create(
+rewriter, loc, i32Type,
+rewriter.getIntegerAttr(i32Type, outIntTy.getWidth()));
+Value isUnsignedValue = arith::ConstantOp::create(
+rewriter, loc, i1Type, rewriter.getIntegerAttr(i1Type, isUnsigned));
+SmallVector params = {inSemValue, outWidthValue, isUnsignedValue,
+ operandBits};
+auto resultOp =
+func::CallOp::create(rewriter, loc, TypeRange(rewriter.getI64Type()),
+ SymbolRefAttr::get(*fn), params);
+
+// Truncate result to the original width.
+Value truncatedBits = arith::TruncIOp::create(rewriter, loc, outIntTy,
+ resultOp->getResult(0));
+rewriter.replaceOp(op, truncatedBits);
+return success();
+ }
+
+ SymbolOpInterface symTable;
+ bool isUnsigned;
+};
+
namespace {
struct ArithToAPFloatConversionPass final
: impl::ArithToAPFloatConversionPassBase {
@@ -208,6 +262,10 @@ void ArithToAPFloatConversionPass::runOnOperation() {
context, "remainder", getOperation());
patterns.add>(context, getOperation());
patterns.add>(context, getOperation());
+ patterns.add>(context, getOperation(),
+ /*isUnsigned=*/false);
+ patterns.add>(context, getOperation(),
+ /*isUnsigned=*/true);
LogicalResult result = success();
ScopedDiagnosticHandler scopedHandler(context, [&result](Diagnostic &diag) {
if (diag.getSeverity() == DiagnosticSeverity::Error) {
diff --git a/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
b/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
index 511b05ea380f0..632fe9cf2269d 100644
--- a/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
+++ b/mlir/lib/ExecutionEngine/APFloatWrappers.cpp
@@ -20,6 +20,7 @@
// APFloatBase::Semantics enum value.
//
#include "llvm/ADT/APFloat.h"
+#include "llvm/ADT/APSInt.h"
#ifdef _WIN32
#ifndef MLIR_APFLOAT_WRAPPERS_EXPORT
@@ -101,4 +102,17 @@ _mlir_apfloat_convert(int32_t inSemantics, int32_t
outSemantics, uint64_t a) {
llvm::APInt result = val.bitcastToAPInt();
return result.getZExtValue();
}
+
+MLIR_APFLOAT_WRAPPERS_EXPORT uint64_t _mlir_apfloat_convert_to_int(
+int32_t semantics, int32_t resultWidth, bool isUnsigned, uint64_t a) {
+ const llvm::fltSemantics &sem = llvm::APFloatBase::EnumToSemantics(
+ st
[llvm-branch-commits] [llvm] [llvm-21][MC] Fix fragments for sections bigger than 4G (PR #169121)
aengelke wrote: On main, this problem doesn't exist anymore due to more recent refactorings. https://github.com/llvm/llvm-project/pull/169121 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [llvm-21][MC] Fix fragments for sections bigger than 4G (PR #169121)
tru wrote: Shouldn't this land in main first and then be cherry-picked to the release branch or is this a specific thing for the release branch? https://github.com/llvm/llvm-project/pull/169121 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant (PR #167308)
https://github.com/bgergely0 updated
https://github.com/llvm/llvm-project/pull/167308
From 7c2404bd67d5bf8c946f57a3a5fab91351e534e2 Mon Sep 17 00:00:00 2001
From: Gergely Balint
Date: Mon, 1 Sep 2025 08:52:28 +
Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant
Checks if an instruction is BTI, and updates the immediate value to the
newly requested variant.
---
bolt/include/bolt/Core/MCPlusBuilder.h | 6 ++
bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp | 8
bolt/unittests/Core/MCPlusBuilder.cpp| 6 ++
3 files changed, 20 insertions(+)
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index fe7905c33080f..a318ef0b6bd68 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -1888,6 +1888,12 @@ class MCPlusBuilder {
llvm_unreachable("not implemented");
}
+ /// Update operand of BTI instruction.
+ virtual void updateBTIVariant(MCInst &Inst, bool CallTarget,
+bool JumpTarget) const {
+llvm_unreachable("not implemented");
+ }
+
/// Store \p Target absolute address to \p RegName
virtual InstructionListType materializeAddress(const MCSymbol *Target,
MCContext *Ctx,
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index f1291f676f1b5..af87d5c12b5ce 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -2800,6 +2800,14 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
Inst.getOpcode() == AArch64::PACIBSP;
}
+ void updateBTIVariant(MCInst &Inst, bool CallTarget,
+bool JumpTarget) const override {
+assert(Inst.getOpcode() == AArch64::HINT && "Not a BTI instruction.");
+unsigned HintNum = getBTIHintNum(CallTarget, JumpTarget);
+Inst.clear();
+Inst.addOperand(MCOperand::createImm(HintNum));
+ }
+
InstructionListType materializeAddress(const MCSymbol *Target, MCContext
*Ctx,
MCPhysReg RegName,
int64_t Addend = 0) const override {
diff --git a/bolt/unittests/Core/MCPlusBuilder.cpp
b/bolt/unittests/Core/MCPlusBuilder.cpp
index 439d72a343ce8..02ecb87b4a5e3 100644
--- a/bolt/unittests/Core/MCPlusBuilder.cpp
+++ b/bolt/unittests/Core/MCPlusBuilder.cpp
@@ -156,6 +156,8 @@ TEST_P(MCPlusBuilderTester, AArch64_BTI) {
ASSERT_EQ(II->getOpcode(), AArch64::HINT);
ASSERT_EQ(II->getOperand(0).getImm(), 38);
ASSERT_TRUE(BC->MIB->isBTILandingPad(*II, true, true));
+ BC->MIB->updateBTIVariant(*II, true, false);
+ ASSERT_TRUE(BC->MIB->isBTILandingPad(*II, true, false));
MCInst BTIj;
BC->MIB->createBTI(BTIj, false, true);
@@ -163,6 +165,8 @@ TEST_P(MCPlusBuilderTester, AArch64_BTI) {
ASSERT_EQ(II->getOpcode(), AArch64::HINT);
ASSERT_EQ(II->getOperand(0).getImm(), 36);
ASSERT_TRUE(BC->MIB->isBTILandingPad(*II, false, true));
+ BC->MIB->updateBTIVariant(*II, true, true);
+ ASSERT_TRUE(BC->MIB->isBTILandingPad(*II, true, true));
MCInst BTIc;
BC->MIB->createBTI(BTIc, true, false);
@@ -170,6 +174,8 @@ TEST_P(MCPlusBuilderTester, AArch64_BTI) {
ASSERT_EQ(II->getOpcode(), AArch64::HINT);
ASSERT_EQ(II->getOperand(0).getImm(), 34);
ASSERT_TRUE(BC->MIB->isBTILandingPad(*II, true, false));
+ BC->MIB->updateBTIVariant(*II, false, true);
+ ASSERT_TRUE(BC->MIB->isBTILandingPad(*II, false, true));
MCInst BTIinvalid;
ASSERT_DEATH(BC->MIB->createBTI(BTIinvalid, false, false),
___
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[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)
https://github.com/bgergely0 updated
https://github.com/llvm/llvm-project/pull/167329
From fbd3fc23360cf53f15532bd64dfe5eff7adec0bc Mon Sep 17 00:00:00 2001
From: Gergely Balint
Date: Wed, 17 Sep 2025 12:24:04 +
Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart
This function contains most of the logic for BTI:
- it takes the BasicBlock and the instruction used to jump to it.
- then it checks if the first non-pseudo instruction is a sufficient
landing pad for the used call.
- if not, it generates the correct BTI instruction.
Also introduce the isBTIVariantCoveringCall helper to simplify the logic.
---
bolt/include/bolt/Core/MCPlusBuilder.h| 13 +++
.../Target/AArch64/AArch64MCPlusBuilder.cpp | 75 +
bolt/unittests/Core/MCPlusBuilder.cpp | 105 ++
3 files changed, 193 insertions(+)
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index a318ef0b6bd68..86b3d4d05ffac 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -1894,6 +1894,19 @@ class MCPlusBuilder {
llvm_unreachable("not implemented");
}
+ /// Checks if the indirect call / jump is accepted by the landing pad at the
+ /// start of the target BasicBlock.
+ virtual bool isBTIVariantCoveringCall(MCInst &Call, MCInst &Pad) const {
+llvm_unreachable("not implemented");
+return false;
+ }
+
+ /// Adds a BTI landing pad to the start of the BB, that matches the indirect
+ /// call/jump inst.
+ virtual void addBTItoBBStart(BinaryBasicBlock &BB, MCInst &Call) const {
+llvm_unreachable("not implemented");
+ }
+
/// Store \p Target absolute address to \p RegName
virtual InstructionListType materializeAddress(const MCSymbol *Target,
MCContext *Ctx,
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index af87d5c12b5ce..8a39f3e8ca25c 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -2808,6 +2808,81 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
Inst.addOperand(MCOperand::createImm(HintNum));
}
+ bool isBTIVariantCoveringCall(MCInst &Call, MCInst &Pad) const override {
+assert((isIndirectCall(Call) || isIndirectBranch(Call)) &&
+ "Not an indirect call or branch.");
+
+// A BLR can be accepted by a BTI c.
+if (isIndirectCall(Call))
+ return isBTILandingPad(Pad, true, false) ||
+ isBTILandingPad(Pad, true, true);
+
+// A BR can be accepted by a BTI j or BTI c (and BTI jc) IF the operand is
+// x16 or x17. If the operand is not x16 or x17, it can be accepted by a
BTI
+// j or BTI jc (and not BTI c).
+if (isIndirectBranch(Call)) {
+ assert(Call.getNumOperands() == 1 &&
+ "Indirect branch needs to have 1 operand.");
+ assert(Call.getOperand(0).isReg() &&
+ "Indirect branch does not have a register operand.");
+ MCPhysReg Reg = Call.getOperand(0).getReg();
+ if (Reg == AArch64::X16 || Reg == AArch64::X17)
+return isBTILandingPad(Pad, true, false) ||
+ isBTILandingPad(Pad, false, true) ||
+ isBTILandingPad(Pad, true, true);
+ return isBTILandingPad(Pad, false, true) ||
+ isBTILandingPad(Pad, true, true);
+}
+return false;
+ }
+
+ void addBTItoBBStart(BinaryBasicBlock &BB, MCInst &Call) const override {
+auto II = BB.getFirstNonPseudo();
+if (II != BB.end()) {
+ if (isBTIVariantCoveringCall(Call, *II))
+return;
+ // A BLR can be accepted by a BTI c.
+ if (isIndirectCall(Call)) {
+// if we have a BTI j at the start, extend it to a BTI jc,
+// otherwise insert a new BTI c.
+if (isBTILandingPad(*II, false, true)) {
+ updateBTIVariant(*II, true, true);
+} else {
+ MCInst BTIInst;
+ createBTI(BTIInst, true, false);
+ BB.insertInstruction(II, BTIInst);
+}
+ }
+
+ // A BR can be accepted by a BTI j or BTI c (and BTI jc) IF the operand
is
+ // x16 or x17. If the operand is not x16 or x17, it can be accepted by a
+ // BTI j or BTI jc (and not BTI c).
+ if (isIndirectBranch(Call)) {
+assert(Call.getNumOperands() == 1 &&
+ "Indirect branch needs to have 1 operand.");
+assert(Call.getOperand(0).isReg() &&
+ "Indirect branch does not have a register operand.");
+MCPhysReg Reg = Call.getOperand(0).getReg();
+if (Reg == AArch64::X16 || Reg == AArch64::X17) {
+ // Add a new BTI c
+ MCInst BTIInst;
+ createBTI(BTIInst, true, false);
+ BB.insertInstruction(II, BTIInst);
+} else {
+ // If BB starts with a BTI c, extend it to BTI jc,
+ // otherwise insert a new BTI j.
+ if (isB
[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant (PR #167308)
https://github.com/bgergely0 updated
https://github.com/llvm/llvm-project/pull/167308
From 7c2404bd67d5bf8c946f57a3a5fab91351e534e2 Mon Sep 17 00:00:00 2001
From: Gergely Balint
Date: Mon, 1 Sep 2025 08:52:28 +
Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant
Checks if an instruction is BTI, and updates the immediate value to the
newly requested variant.
---
bolt/include/bolt/Core/MCPlusBuilder.h | 6 ++
bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp | 8
bolt/unittests/Core/MCPlusBuilder.cpp| 6 ++
3 files changed, 20 insertions(+)
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index fe7905c33080f..a318ef0b6bd68 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -1888,6 +1888,12 @@ class MCPlusBuilder {
llvm_unreachable("not implemented");
}
+ /// Update operand of BTI instruction.
+ virtual void updateBTIVariant(MCInst &Inst, bool CallTarget,
+bool JumpTarget) const {
+llvm_unreachable("not implemented");
+ }
+
/// Store \p Target absolute address to \p RegName
virtual InstructionListType materializeAddress(const MCSymbol *Target,
MCContext *Ctx,
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index f1291f676f1b5..af87d5c12b5ce 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -2800,6 +2800,14 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
Inst.getOpcode() == AArch64::PACIBSP;
}
+ void updateBTIVariant(MCInst &Inst, bool CallTarget,
+bool JumpTarget) const override {
+assert(Inst.getOpcode() == AArch64::HINT && "Not a BTI instruction.");
+unsigned HintNum = getBTIHintNum(CallTarget, JumpTarget);
+Inst.clear();
+Inst.addOperand(MCOperand::createImm(HintNum));
+ }
+
InstructionListType materializeAddress(const MCSymbol *Target, MCContext
*Ctx,
MCPhysReg RegName,
int64_t Addend = 0) const override {
diff --git a/bolt/unittests/Core/MCPlusBuilder.cpp
b/bolt/unittests/Core/MCPlusBuilder.cpp
index 439d72a343ce8..02ecb87b4a5e3 100644
--- a/bolt/unittests/Core/MCPlusBuilder.cpp
+++ b/bolt/unittests/Core/MCPlusBuilder.cpp
@@ -156,6 +156,8 @@ TEST_P(MCPlusBuilderTester, AArch64_BTI) {
ASSERT_EQ(II->getOpcode(), AArch64::HINT);
ASSERT_EQ(II->getOperand(0).getImm(), 38);
ASSERT_TRUE(BC->MIB->isBTILandingPad(*II, true, true));
+ BC->MIB->updateBTIVariant(*II, true, false);
+ ASSERT_TRUE(BC->MIB->isBTILandingPad(*II, true, false));
MCInst BTIj;
BC->MIB->createBTI(BTIj, false, true);
@@ -163,6 +165,8 @@ TEST_P(MCPlusBuilderTester, AArch64_BTI) {
ASSERT_EQ(II->getOpcode(), AArch64::HINT);
ASSERT_EQ(II->getOperand(0).getImm(), 36);
ASSERT_TRUE(BC->MIB->isBTILandingPad(*II, false, true));
+ BC->MIB->updateBTIVariant(*II, true, true);
+ ASSERT_TRUE(BC->MIB->isBTILandingPad(*II, true, true));
MCInst BTIc;
BC->MIB->createBTI(BTIc, true, false);
@@ -170,6 +174,8 @@ TEST_P(MCPlusBuilderTester, AArch64_BTI) {
ASSERT_EQ(II->getOpcode(), AArch64::HINT);
ASSERT_EQ(II->getOperand(0).getImm(), 34);
ASSERT_TRUE(BC->MIB->isBTILandingPad(*II, true, false));
+ BC->MIB->updateBTIVariant(*II, false, true);
+ ASSERT_TRUE(BC->MIB->isBTILandingPad(*II, false, true));
MCInst BTIinvalid;
ASSERT_DEATH(BC->MIB->createBTI(BTIinvalid, false, false),
___
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[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)
https://github.com/bgergely0 updated
https://github.com/llvm/llvm-project/pull/167329
From fbd3fc23360cf53f15532bd64dfe5eff7adec0bc Mon Sep 17 00:00:00 2001
From: Gergely Balint
Date: Wed, 17 Sep 2025 12:24:04 +
Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart
This function contains most of the logic for BTI:
- it takes the BasicBlock and the instruction used to jump to it.
- then it checks if the first non-pseudo instruction is a sufficient
landing pad for the used call.
- if not, it generates the correct BTI instruction.
Also introduce the isBTIVariantCoveringCall helper to simplify the logic.
---
bolt/include/bolt/Core/MCPlusBuilder.h| 13 +++
.../Target/AArch64/AArch64MCPlusBuilder.cpp | 75 +
bolt/unittests/Core/MCPlusBuilder.cpp | 105 ++
3 files changed, 193 insertions(+)
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index a318ef0b6bd68..86b3d4d05ffac 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -1894,6 +1894,19 @@ class MCPlusBuilder {
llvm_unreachable("not implemented");
}
+ /// Checks if the indirect call / jump is accepted by the landing pad at the
+ /// start of the target BasicBlock.
+ virtual bool isBTIVariantCoveringCall(MCInst &Call, MCInst &Pad) const {
+llvm_unreachable("not implemented");
+return false;
+ }
+
+ /// Adds a BTI landing pad to the start of the BB, that matches the indirect
+ /// call/jump inst.
+ virtual void addBTItoBBStart(BinaryBasicBlock &BB, MCInst &Call) const {
+llvm_unreachable("not implemented");
+ }
+
/// Store \p Target absolute address to \p RegName
virtual InstructionListType materializeAddress(const MCSymbol *Target,
MCContext *Ctx,
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index af87d5c12b5ce..8a39f3e8ca25c 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -2808,6 +2808,81 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
Inst.addOperand(MCOperand::createImm(HintNum));
}
+ bool isBTIVariantCoveringCall(MCInst &Call, MCInst &Pad) const override {
+assert((isIndirectCall(Call) || isIndirectBranch(Call)) &&
+ "Not an indirect call or branch.");
+
+// A BLR can be accepted by a BTI c.
+if (isIndirectCall(Call))
+ return isBTILandingPad(Pad, true, false) ||
+ isBTILandingPad(Pad, true, true);
+
+// A BR can be accepted by a BTI j or BTI c (and BTI jc) IF the operand is
+// x16 or x17. If the operand is not x16 or x17, it can be accepted by a
BTI
+// j or BTI jc (and not BTI c).
+if (isIndirectBranch(Call)) {
+ assert(Call.getNumOperands() == 1 &&
+ "Indirect branch needs to have 1 operand.");
+ assert(Call.getOperand(0).isReg() &&
+ "Indirect branch does not have a register operand.");
+ MCPhysReg Reg = Call.getOperand(0).getReg();
+ if (Reg == AArch64::X16 || Reg == AArch64::X17)
+return isBTILandingPad(Pad, true, false) ||
+ isBTILandingPad(Pad, false, true) ||
+ isBTILandingPad(Pad, true, true);
+ return isBTILandingPad(Pad, false, true) ||
+ isBTILandingPad(Pad, true, true);
+}
+return false;
+ }
+
+ void addBTItoBBStart(BinaryBasicBlock &BB, MCInst &Call) const override {
+auto II = BB.getFirstNonPseudo();
+if (II != BB.end()) {
+ if (isBTIVariantCoveringCall(Call, *II))
+return;
+ // A BLR can be accepted by a BTI c.
+ if (isIndirectCall(Call)) {
+// if we have a BTI j at the start, extend it to a BTI jc,
+// otherwise insert a new BTI c.
+if (isBTILandingPad(*II, false, true)) {
+ updateBTIVariant(*II, true, true);
+} else {
+ MCInst BTIInst;
+ createBTI(BTIInst, true, false);
+ BB.insertInstruction(II, BTIInst);
+}
+ }
+
+ // A BR can be accepted by a BTI j or BTI c (and BTI jc) IF the operand
is
+ // x16 or x17. If the operand is not x16 or x17, it can be accepted by a
+ // BTI j or BTI jc (and not BTI c).
+ if (isIndirectBranch(Call)) {
+assert(Call.getNumOperands() == 1 &&
+ "Indirect branch needs to have 1 operand.");
+assert(Call.getOperand(0).isReg() &&
+ "Indirect branch does not have a register operand.");
+MCPhysReg Reg = Call.getOperand(0).getReg();
+if (Reg == AArch64::X16 || Reg == AArch64::X17) {
+ // Add a new BTI c
+ MCInst BTIInst;
+ createBTI(BTIInst, true, false);
+ BB.insertInstruction(II, BTIInst);
+} else {
+ // If BB starts with a BTI c, extend it to BTI jc,
+ // otherwise insert a new BTI j.
+ if (isB
[llvm-branch-commits] [lldb] [lldb][NFC] Rename forward_branch_offset to branch_offset in UnwindAssemblyInstEmulation (PR #169631)
https://github.com/felipepiovezan updated
https://github.com/llvm/llvm-project/pull/169631
>From 06bf133009f7d943d259a8aeb74c29d83868ccff Mon Sep 17 00:00:00 2001
From: Felipe de Azevedo Piovezan
Date: Wed, 26 Nov 2025 11:19:23 +
Subject: [PATCH] fix code formatting
Created using spr 1.3.7
---
.../InstEmulation/UnwindAssemblyInstEmulation.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
a/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
b/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
index 21a01cc9126a0..b1a130d9fef5f 100644
---
a/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
+++
b/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
@@ -535,8 +535,7 @@ bool UnwindAssemblyInstEmulation::WriteRegister(
} else if (context.GetInfoType() ==
EmulateInstruction::eInfoTypeISAAndImmediateSigned &&
context.info.ISAAndImmediateSigned.signed_data32 > 0) {
- m_branch_offset =
- context.info.ISAAndImmediateSigned.signed_data32;
+ m_branch_offset = context.info.ISAAndImmediateSigned.signed_data32;
} else if (context.GetInfoType() ==
EmulateInstruction::eInfoTypeImmediate &&
context.info.unsigned_immediate > 0) {
___
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[llvm-branch-commits] [lldb] Add DisassemblerLLVMC::IsBarrier API (PR #169632)
https://github.com/felipepiovezan updated https://github.com/llvm/llvm-project/pull/169632 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] [lldb][NFC] Rename forward_branch_offset to branch_offset in UnwindAssemblyInstEmulation (PR #169631)
https://github.com/felipepiovezan updated
https://github.com/llvm/llvm-project/pull/169631
>From 06bf133009f7d943d259a8aeb74c29d83868ccff Mon Sep 17 00:00:00 2001
From: Felipe de Azevedo Piovezan
Date: Wed, 26 Nov 2025 11:19:23 +
Subject: [PATCH] fix code formatting
Created using spr 1.3.7
---
.../InstEmulation/UnwindAssemblyInstEmulation.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
a/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
b/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
index 21a01cc9126a0..b1a130d9fef5f 100644
---
a/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
+++
b/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
@@ -535,8 +535,7 @@ bool UnwindAssemblyInstEmulation::WriteRegister(
} else if (context.GetInfoType() ==
EmulateInstruction::eInfoTypeISAAndImmediateSigned &&
context.info.ISAAndImmediateSigned.signed_data32 > 0) {
- m_branch_offset =
- context.info.ISAAndImmediateSigned.signed_data32;
+ m_branch_offset = context.info.ISAAndImmediateSigned.signed_data32;
} else if (context.GetInfoType() ==
EmulateInstruction::eInfoTypeImmediate &&
context.info.unsigned_immediate > 0) {
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[llvm-branch-commits] [lldb] Handle backwards branches in UnwindAssemblyInstEmulation (PR #169633)
https://github.com/felipepiovezan updated https://github.com/llvm/llvm-project/pull/169633 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] Add DisassemblerLLVMC::IsBarrier API (PR #169632)
https://github.com/felipepiovezan updated https://github.com/llvm/llvm-project/pull/169632 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] Handle backwards branches in UnwindAssemblyInstEmulation (PR #169633)
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[llvm-branch-commits] [clang-tools-extra] 922c991 - [clangd] Clangd running with `--experimental-modules-support` crashes when the compilation database is unavailable (#153802)
Author: slavek-kucera
Date: 2025-11-20T02:23:06Z
New Revision: 922c9914e14bce71861fc74f3f5381455cc20946
URL:
https://github.com/llvm/llvm-project/commit/922c9914e14bce71861fc74f3f5381455cc20946
DIFF:
https://github.com/llvm/llvm-project/commit/922c9914e14bce71861fc74f3f5381455cc20946.diff
LOG: [clangd] Clangd running with `--experimental-modules-support` crashes when
the compilation database is unavailable (#153802)
fixes llvm/llvm-project#132413
(cherry picked from commit 5b5589978167ab7abc6a5e8a3a1ce7d8487ce73a)
Added:
clang-tools-extra/clangd/test/modules_no_cdb.test
Modified:
clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
Removed:
diff --git a/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
b/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
index 7c0eb9651feaa..c6afd0bc07cbd 100644
--- a/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
+++ b/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
@@ -833,6 +833,10 @@ bool OverlayCDB::setCompileCommand(PathRef File,
std::unique_ptr
OverlayCDB::getProjectModules(PathRef File) const {
auto MDB = DelegatingCDB::getProjectModules(File);
+ if (!MDB) {
+log("Failed to get compilation Database for {0}", File);
+return {};
+ }
MDB->setCommandMangler([&Mangler = Mangler](tooling::CompileCommand &Command,
PathRef CommandPath) {
Mangler(Command, CommandPath);
diff --git a/clang-tools-extra/clangd/test/modules_no_cdb.test
b/clang-tools-extra/clangd/test/modules_no_cdb.test
new file mode 100644
index 0..8f92be2c7b3f3
--- /dev/null
+++ b/clang-tools-extra/clangd/test/modules_no_cdb.test
@@ -0,0 +1,66 @@
+# A smoke test to check that clangd works without compilation database
+#
+# Windows have
diff erent escaping modes.
+# FIXME: We should add one for windows.
+# UNSUPPORTED: system-windows
+#
+# RUN: rm -fr %t
+# RUN: mkdir -p %t
+# RUN: split-file %s %t
+#
+# RUN: sed -e "s|DIR|%/t|g" %t/definition.jsonrpc.tmpl > %t/definition.jsonrpc
+#
+# RUN: clangd -experimental-modules-support -lit-test < %t/definition.jsonrpc \
+# RUN: | FileCheck -strict-whitespace %t/definition.jsonrpc
+
+#--- A.h
+void printA();
+
+#--- Use.cpp
+#include "A.h"
+void foo() {
+print
+}
+
+#--- definition.jsonrpc.tmpl
+{
+ "jsonrpc": "2.0",
+ "id": 0,
+ "method": "initialize",
+ "params": {
+"processId": 123,
+"rootPath": "clangd",
+"capabilities": {
+ "textDocument": {
+"completion": {
+ "completionItem": {
+"snippetSupport": true
+ }
+}
+ }
+},
+"trace": "off"
+ }
+}
+---
+{
+ "jsonrpc": "2.0",
+ "method": "textDocument/didOpen",
+ "params": {
+"textDocument": {
+ "uri": "file://DIR/Use.cpp",
+ "languageId": "cpp",
+ "version": 1,
+ "text": "#include \"A.h\"\nvoid foo() {\nprint\n}\n"
+}
+ }
+}
+
+# CHECK: "message"{{.*}}printA{{.*}}(fix available)
+
+---
+{"jsonrpc":"2.0","id":1,"method":"textDocument/completion","params":{"textDocument":{"uri":"file://DIR/Use.cpp"},"context":{"triggerKind":1},"position":{"line":2,"character":6}}}
+---
+{"jsonrpc":"2.0","id":2,"method":"shutdown"}
+---
+{"jsonrpc":"2.0","method":"exit"}
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[llvm-branch-commits] [clang-tools-extra] release/21.x: [clangd] Clangd running with `--experimental-modules-support` crashes when the compilation database is unavailable (#153802) (PR #168810)
github-actions[bot] wrote: @ChuanqiXu9 (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/168810 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [llvm-21][MC] Fix fragments for sections bigger than 4G (PR #169121)
https://github.com/tru closed https://github.com/llvm/llvm-project/pull/169121 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang-tools-extra] release/21.x: [clangd] Clangd running with `--experimental-modules-support` crashes when the compilation database is unavailable (#153802) (PR #168810)
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[llvm-branch-commits] [llvm] [llvm-21][MC] Fix fragments for sections bigger than 4G (PR #169121)
https://github.com/tru updated https://github.com/llvm/llvm-project/pull/169121
>From 9ed1927442a4e8f417dbfeeab342a9be4204198e Mon Sep 17 00:00:00 2001
From: Lydia Kim
Date: Fri, 21 Nov 2025 11:41:23 -0800
Subject: [PATCH] [server-llvm-21][MC] Fixing vector overflow
Summary:
Test Plan:
Reviewers:
Subscribers:
Tasks:
Tags:
Differential Revision: https://phabricator.intern.facebook.com/D87662897
---
llvm/include/llvm/MC/MCSection.h | 25 +
llvm/lib/MC/MCSection.cpp| 4 ++--
2 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/llvm/include/llvm/MC/MCSection.h b/llvm/include/llvm/MC/MCSection.h
index 64b13972bfca1..9daaebf7e7935 100644
--- a/llvm/include/llvm/MC/MCSection.h
+++ b/llvm/include/llvm/MC/MCSection.h
@@ -298,8 +298,8 @@ class MCFragment {
/// data.
class MCEncodedFragment : public MCFragment {
uint8_t BundlePadding = 0;
- uint32_t ContentStart = 0;
- uint32_t ContentEnd = 0;
+ uint32_t ContentSize = 0;
+ uint64_t ContentStart = 0;
uint32_t FixupStart = 0;
uint32_t FixupEnd = 0;
@@ -360,22 +360,23 @@ class MCEncodedFragment : public MCFragment {
// Content-related functions manage parent's storage using ContentStart and
// ContentSize.
- void clearContents() { ContentEnd = ContentStart; }
+ void clearContents() { ContentSize = 0; }
// Get a SmallVector reference. The caller should call doneAppending to
update
- // `ContentEnd`.
+ // `ContentSize`.
SmallVectorImpl &getContentsForAppending() {
SmallVectorImpl &S = getParent()->ContentStorage;
-if (LLVM_UNLIKELY(ContentEnd != S.size())) {
+if (LLVM_UNLIKELY(ContentStart + ContentSize != S.size())) {
// Move the elements to the end. Reserve space to avoid invalidating
// S.begin()+I for `append`.
- auto Size = ContentEnd - ContentStart;
auto I = std::exchange(ContentStart, S.size());
- S.reserve(S.size() + Size);
- S.append(S.begin() + I, S.begin() + I + Size);
+ S.reserve(S.size() + ContentSize);
+ S.append(S.begin() + I, S.begin() + I + ContentSize);
}
return S;
}
- void doneAppending() { ContentEnd = getParent()->ContentStorage.size(); }
+ void doneAppending() {
+ContentSize = getParent()->ContentStorage.size() - ContentStart;
+ }
void appendContents(ArrayRef Contents) {
getContentsForAppending().append(Contents.begin(), Contents.end());
doneAppending();
@@ -387,11 +388,11 @@ class MCEncodedFragment : public MCFragment {
LLVM_ABI void setContents(ArrayRef Contents);
MutableArrayRef getContents() {
return MutableArrayRef(getParent()->ContentStorage)
-.slice(ContentStart, ContentEnd - ContentStart);
+.slice(ContentStart, ContentSize);
}
ArrayRef getContents() const {
return ArrayRef(getParent()->ContentStorage)
-.slice(ContentStart, ContentEnd - ContentStart);
+.slice(ContentStart, ContentSize);
}
// Fixup-related functions manage parent's storage using FixupStart and
@@ -409,7 +410,7 @@ class MCEncodedFragment : public MCFragment {
.slice(FixupStart, FixupEnd - FixupStart);
}
- size_t getSize() const { return ContentEnd - ContentStart; }
+ size_t getSize() const { return ContentSize; }
};
/// Fragment for data and encoded instructions.
diff --git a/llvm/lib/MC/MCSection.cpp b/llvm/lib/MC/MCSection.cpp
index a7330692571de..97f591fbf0e28 100644
--- a/llvm/lib/MC/MCSection.cpp
+++ b/llvm/lib/MC/MCSection.cpp
@@ -84,11 +84,11 @@ LLVM_DUMP_METHOD void MCSection::dump(
void MCEncodedFragment::setContents(ArrayRef Contents) {
auto &S = getParent()->ContentStorage;
- if (ContentStart + Contents.size() > ContentEnd) {
+ if (Contents.size() > ContentSize) {
ContentStart = S.size();
S.resize_for_overwrite(S.size() + Contents.size());
}
- ContentEnd = ContentStart + Contents.size();
+ ContentSize = Contents.size();
llvm::copy(Contents, S.begin() + ContentStart);
}
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[llvm-branch-commits] [llvm] 9ed1927 - [server-llvm-21][MC] Fixing vector overflow
Author: Lydia Kim
Date: 2025-11-27T11:38:40+01:00
New Revision: 9ed1927442a4e8f417dbfeeab342a9be4204198e
URL:
https://github.com/llvm/llvm-project/commit/9ed1927442a4e8f417dbfeeab342a9be4204198e
DIFF:
https://github.com/llvm/llvm-project/commit/9ed1927442a4e8f417dbfeeab342a9be4204198e.diff
LOG: [server-llvm-21][MC] Fixing vector overflow
Summary:
Test Plan:
Reviewers:
Subscribers:
Tasks:
Tags:
Differential Revision: https://phabricator.intern.facebook.com/D87662897
Added:
Modified:
llvm/include/llvm/MC/MCSection.h
llvm/lib/MC/MCSection.cpp
Removed:
diff --git a/llvm/include/llvm/MC/MCSection.h
b/llvm/include/llvm/MC/MCSection.h
index 64b13972bfca1..9daaebf7e7935 100644
--- a/llvm/include/llvm/MC/MCSection.h
+++ b/llvm/include/llvm/MC/MCSection.h
@@ -298,8 +298,8 @@ class MCFragment {
/// data.
class MCEncodedFragment : public MCFragment {
uint8_t BundlePadding = 0;
- uint32_t ContentStart = 0;
- uint32_t ContentEnd = 0;
+ uint32_t ContentSize = 0;
+ uint64_t ContentStart = 0;
uint32_t FixupStart = 0;
uint32_t FixupEnd = 0;
@@ -360,22 +360,23 @@ class MCEncodedFragment : public MCFragment {
// Content-related functions manage parent's storage using ContentStart and
// ContentSize.
- void clearContents() { ContentEnd = ContentStart; }
+ void clearContents() { ContentSize = 0; }
// Get a SmallVector reference. The caller should call doneAppending to
update
- // `ContentEnd`.
+ // `ContentSize`.
SmallVectorImpl &getContentsForAppending() {
SmallVectorImpl &S = getParent()->ContentStorage;
-if (LLVM_UNLIKELY(ContentEnd != S.size())) {
+if (LLVM_UNLIKELY(ContentStart + ContentSize != S.size())) {
// Move the elements to the end. Reserve space to avoid invalidating
// S.begin()+I for `append`.
- auto Size = ContentEnd - ContentStart;
auto I = std::exchange(ContentStart, S.size());
- S.reserve(S.size() + Size);
- S.append(S.begin() + I, S.begin() + I + Size);
+ S.reserve(S.size() + ContentSize);
+ S.append(S.begin() + I, S.begin() + I + ContentSize);
}
return S;
}
- void doneAppending() { ContentEnd = getParent()->ContentStorage.size(); }
+ void doneAppending() {
+ContentSize = getParent()->ContentStorage.size() - ContentStart;
+ }
void appendContents(ArrayRef Contents) {
getContentsForAppending().append(Contents.begin(), Contents.end());
doneAppending();
@@ -387,11 +388,11 @@ class MCEncodedFragment : public MCFragment {
LLVM_ABI void setContents(ArrayRef Contents);
MutableArrayRef getContents() {
return MutableArrayRef(getParent()->ContentStorage)
-.slice(ContentStart, ContentEnd - ContentStart);
+.slice(ContentStart, ContentSize);
}
ArrayRef getContents() const {
return ArrayRef(getParent()->ContentStorage)
-.slice(ContentStart, ContentEnd - ContentStart);
+.slice(ContentStart, ContentSize);
}
// Fixup-related functions manage parent's storage using FixupStart and
@@ -409,7 +410,7 @@ class MCEncodedFragment : public MCFragment {
.slice(FixupStart, FixupEnd - FixupStart);
}
- size_t getSize() const { return ContentEnd - ContentStart; }
+ size_t getSize() const { return ContentSize; }
};
/// Fragment for data and encoded instructions.
diff --git a/llvm/lib/MC/MCSection.cpp b/llvm/lib/MC/MCSection.cpp
index a7330692571de..97f591fbf0e28 100644
--- a/llvm/lib/MC/MCSection.cpp
+++ b/llvm/lib/MC/MCSection.cpp
@@ -84,11 +84,11 @@ LLVM_DUMP_METHOD void MCSection::dump(
void MCEncodedFragment::setContents(ArrayRef Contents) {
auto &S = getParent()->ContentStorage;
- if (ContentStart + Contents.size() > ContentEnd) {
+ if (Contents.size() > ContentSize) {
ContentStart = S.size();
S.resize_for_overwrite(S.size() + Contents.size());
}
- ContentEnd = ContentStart + Contents.size();
+ ContentSize = Contents.size();
llvm::copy(Contents, S.begin() + ContentStart);
}
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[llvm-branch-commits] [llvm] [llvm-21][MC] Fix fragments for sections bigger than 4G (PR #169121)
github-actions[bot] wrote: @lydkim (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/169121 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [llvm-21][MC] Fix fragments for sections bigger than 4G (PR #169121)
github-actions[bot] wrote: @lydkim Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our [build bots](https://lab.llvm.org/buildbot/). If there is a problem with a build, you may receive a report in an email or a comment on this PR. Please check whether problems have been caused by your change specifically, as the builds can include changes from many authors. It is not uncommon for your change to be included in a build that fails due to someone else's changes, or infrastructure issues. How to do this, and the rest of the post-merge process, is covered in detail [here](https://llvm.org/docs/MyFirstTypoFix.html#myfirsttypofix-issues-after-landing-your-pr). If your change does cause a problem, it may be reverted, or you can revert it yourself. This is a normal part of [LLVM development](https://llvm.org/docs/DeveloperPolicy.html#patch-reversion-policy). You can fix your changes and open a new PR to merge them again. If you don't get any reports, no action is required from you. Your changes are working as expected, well done! https://github.com/llvm/llvm-project/pull/169121 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][OpenMP] Reject END DO on construct that crosses label-DO (PR #169714)
@@ -141,8 +144,27 @@ class CanonicalizationOfDoLoops {
stack.pop_back();
} while (!stack.empty() && stack.back().label == currentLabel);
i = --next;
+ return true;
+} else {
+ return false;
}
}
+
+ void MarkOpenMPConstruct(OpenMPConstruct &omp) {
tblah wrote:
nit: this can currently only mark as CrossesLabelDo and it does that
unconditionally - which doesn't really fit the name. How about having an
argument for the flag which should be set? (in this case, always
CrossesLabelDo). I think that would make the calling code a bit easier to read
as well.
https://github.com/llvm/llvm-project/pull/169714
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[llvm-branch-commits] [flang] [flang][OpenMP] Reject END DO on construct that crosses label-DO (PR #169714)
https://github.com/tblah approved this pull request. LGTM. I found the CanonicalizeIfMatch function pretty difficult to reason about, but that wasn't added in this commit and it might just be me so it can stay how it is. From the tests included in the PR and my own manual testing I am satisfied that this does do the right thing. https://github.com/llvm/llvm-project/pull/169714 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][OpenMP] Reject END DO on construct that crosses label-DO (PR #169714)
https://github.com/tblah edited https://github.com/llvm/llvm-project/pull/169714 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] Continuation of fexec-charset (PR #169803)
https://github.com/abhina-sree created
https://github.com/llvm/llvm-project/pull/169803
This patch builds upon https://github.com/llvm/llvm-project/pull/138895 and
introduces a ParserConversionAction which is able to control which charset to
use for various string literals. I also introduce a FormatStrConverter which is
used to do format string checking
>From ec0efa55da6e216ae811ff97279c1cd2024b549f Mon Sep 17 00:00:00 2001
From: Abhina Sreeskantharajan
Date: Mon, 24 Nov 2025 11:00:04 -0500
Subject: [PATCH 1/2] add ParserConversionAction
(cherry picked from commit c2647a73957921d3f7a53c6f25a69f1cc2725aa3)
---
clang/include/clang/Parse/Parser.h | 1 +
clang/include/clang/Sema/Sema.h| 8 ++--
clang/lib/Parse/ParseDecl.cpp | 13 +
clang/lib/Parse/ParseDeclCXX.cpp | 10 +++---
clang/lib/Parse/ParseExpr.cpp | 9 +
clang/lib/Parse/Parser.cpp | 4
clang/lib/Sema/SemaExpr.cpp| 12 +++-
7 files changed, 43 insertions(+), 14 deletions(-)
diff --git a/clang/include/clang/Parse/Parser.h
b/clang/include/clang/Parse/Parser.h
index 58eb1c0a7c114..97867183b5a1d 100644
--- a/clang/include/clang/Parse/Parser.h
+++ b/clang/include/clang/Parse/Parser.h
@@ -5633,6 +5633,7 @@ class Parser : public CodeCompletionHandler {
bool Finished;
};
ObjCImplParsingDataRAII *CurParsedObjCImpl;
+ ConversionAction ParserConversionAction;
/// StashAwayMethodOrFunctionBodyTokens - Consume the tokens and store them
/// for later parsing.
diff --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h
index cbfcc9bc0ea99..65567e367dea4 100644
--- a/clang/include/clang/Sema/Sema.h
+++ b/clang/include/clang/Sema/Sema.h
@@ -54,6 +54,7 @@
#include "clang/Basic/TemplateKinds.h"
#include "clang/Basic/TokenKinds.h"
#include "clang/Basic/TypeTraits.h"
+#include "clang/Lex/LiteralConverter.h"
#include "clang/Sema/AnalysisBasedWarnings.h"
#include "clang/Sema/Attr.h"
#include "clang/Sema/CleanupInfo.h"
@@ -7272,9 +7273,12 @@ class Sema final : public SemaBase {
/// from multiple tokens. However, the common case is that StringToks points
/// to one string.
ExprResult ActOnStringLiteral(ArrayRef StringToks,
-Scope *UDLScope = nullptr);
+Scope *UDLScope = nullptr,
+ConversionAction Action = CA_ToExecEncoding);
- ExprResult ActOnUnevaluatedStringLiteral(ArrayRef StringToks);
+ ExprResult
+ ActOnUnevaluatedStringLiteral(ArrayRef StringToks,
+ConversionAction Action = CA_ToExecEncoding);
/// ControllingExprOrType is either an opaque pointer coming out of a
/// ParsedType or an Expr *. FIXME: it'd be better to split this interface
diff --git a/clang/lib/Parse/ParseDecl.cpp b/clang/lib/Parse/ParseDecl.cpp
index 8688ccf41acb5..fd537618a3c83 100644
--- a/clang/lib/Parse/ParseDecl.cpp
+++ b/clang/lib/Parse/ParseDecl.cpp
@@ -555,6 +555,9 @@ unsigned Parser::ParseAttributeArgsCommon(
nullptr,
Sema::ExpressionEvaluationContextRecord::EK_AttrArgument);
+ SaveAndRestore SavedTranslationState(
+ ParserConversionAction, CA_NoConversion);
+
ExprResult ArgExpr = ParseAssignmentExpression();
if (ArgExpr.isInvalid()) {
SkipUntil(tok::r_paren, StopAtSemi);
@@ -634,6 +637,9 @@ void Parser::ParseGNUAttributeArgs(
ParsedAttr::Kind AttrKind =
ParsedAttr::getParsedKind(AttrName, ScopeName, Form.getSyntax());
+ SaveAndRestore
SavedTranslationState(ParserConversionAction,
+ CA_NoConversion);
+
if (AttrKind == ParsedAttr::AT_Availability) {
ParseAvailabilityAttribute(*AttrName, AttrNameLoc, Attrs, EndLoc,
ScopeName,
ScopeLoc, Form);
@@ -699,6 +705,9 @@ unsigned Parser::ParseClangAttributeArgs(
ParsedAttr::Kind AttrKind =
ParsedAttr::getParsedKind(AttrName, ScopeName, Form.getSyntax());
+ SaveAndRestore
SavedTranslationState(ParserConversionAction,
+ CA_NoConversion);
+
switch (AttrKind) {
default:
return ParseAttributeArgsCommon(AttrName, AttrNameLoc, Attrs, EndLoc,
@@ -1521,6 +1530,10 @@ void Parser::ParseExternalSourceSymbolAttribute(
SkipUntil(tok::comma, tok::r_paren, StopAtSemi | StopBeforeMatch);
continue;
}
+
+SaveAndRestore SavedTranslationState(
+ParserConversionAction, CA_NoConversion);
+
if (Keyword == Ident_language) {
if (HadLanguage) {
Diag(KeywordLoc, diag::err_external_source_symbol_duplicate_clause)
diff --git a/clang/lib/Parse/ParseDeclCXX.cpp b/clang/lib/Parse/ParseDeclCXX.cpp
index d8ed7e3ff96bd..40bf409124711 100644
--- a/clang/lib/Parse/ParseDeclCXX.cpp
+++ b/clang/lib/Parse/ParseDeclCXX.cpp
@@ -314,7 +314,9 @@ Decl *Parser::ParseNamespaceAlias(SourceLocation
[llvm-branch-commits] [clang] [llvm] Continuation of fexec-charset (PR #169803)
llvmbot wrote:
@llvm/pr-subscribers-llvm-support
Author: Abhina Sree (abhina-sree)
Changes
This patch builds upon https://github.com/llvm/llvm-project/pull/138895 and
introduces a ParserConversionAction which is able to control which charset to
use for various string literals. I also introduce a FormatStrConverter which is
used to do format string checking
---
Patch is 58.80 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/169803.diff
22 Files Affected:
- (modified) clang/include/clang/AST/Expr.h (+6)
- (modified) clang/include/clang/AST/FormatString.h (+7-6)
- (modified) clang/include/clang/Basic/TargetInfo.h (+3)
- (modified) clang/include/clang/Lex/LiteralConverter.h (+1-1)
- (modified) clang/include/clang/Parse/Parser.h (+1)
- (modified) clang/include/clang/Sema/Sema.h (+6-2)
- (modified) clang/lib/AST/Expr.cpp (+15)
- (modified) clang/lib/AST/FormatString.cpp (+126-116)
- (modified) clang/lib/AST/FormatStringParsing.h (+23-16)
- (modified) clang/lib/AST/PrintfFormatString.cpp (+84-65)
- (modified) clang/lib/AST/ScanfFormatString.cpp (+19-12)
- (modified) clang/lib/Basic/TargetInfo.cpp (+3)
- (modified) clang/lib/Lex/LiteralConverter.cpp (+9-1)
- (modified) clang/lib/Parse/ParseDecl.cpp (+13)
- (modified) clang/lib/Parse/ParseDeclCXX.cpp (+7-3)
- (modified) clang/lib/Parse/ParseExpr.cpp (+5-4)
- (modified) clang/lib/Parse/Parser.cpp (+4)
- (modified) clang/lib/Sema/SemaChecking.cpp (+40-36)
- (modified) clang/lib/Sema/SemaExpr.cpp (+10-7)
- (modified) clang/test/CodeGen/systemz-charset.c (+8)
- (modified) llvm/include/llvm/Support/TextEncoding.h (+10)
- (modified) llvm/lib/Support/TextEncoding.cpp (+19)
``diff
diff --git a/clang/include/clang/AST/Expr.h b/clang/include/clang/AST/Expr.h
index 573cc72db35c6..7d1ac3193812f 100644
--- a/clang/include/clang/AST/Expr.h
+++ b/clang/include/clang/AST/Expr.h
@@ -28,6 +28,7 @@
#include "clang/Basic/LangOptions.h"
#include "clang/Basic/SyncScope.h"
#include "clang/Basic/TypeTraits.h"
+#include "clang/Lex/LiteralConverter.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/APSInt.h"
#include "llvm/ADT/SmallVector.h"
@@ -2063,6 +2064,11 @@ class PredefinedExpr final
return getIdentKindName(getIdentKind());
}
+ static std::string
+ ComputeNameAndTranslate(PredefinedIdentKind IK, const Decl *CurrentDecl,
+ LiteralConverter &LiteralConv,
+ bool ForceElaboratedPrinting = false);
+
static std::string ComputeName(PredefinedIdentKind IK,
const Decl *CurrentDecl,
bool ForceElaboratedPrinting = false);
diff --git a/clang/include/clang/AST/FormatString.h
b/clang/include/clang/AST/FormatString.h
index a284f2c44d633..12083a0d00b4b 100644
--- a/clang/include/clang/AST/FormatString.h
+++ b/clang/include/clang/AST/FormatString.h
@@ -19,6 +19,7 @@
#define LLVM_CLANG_AST_FORMATSTRING_H
#include "clang/AST/CanonicalType.h"
+#include "llvm/Support/TextEncoding.h"
#include
namespace clang {
@@ -744,9 +745,9 @@ class FormatStringHandler {
// Printf-specific handlers.
virtual bool HandleInvalidPrintfConversionSpecifier(
- const analyze_printf::PrintfSpecifier
&FS,
- const char *startSpecifier,
- unsigned specifierLen) {
+ const analyze_printf::PrintfSpecifier &FS, const char *startSpecifier,
+ unsigned specifierLen,
+ const llvm::TextEncodingConverter &FormatStrConverter) {
return true;
}
@@ -763,9 +764,9 @@ class FormatStringHandler {
// Scanf-specific handlers.
virtual bool HandleInvalidScanfConversionSpecifier(
-const analyze_scanf::ScanfSpecifier
&FS,
-const char *startSpecifier,
-unsigned specifierLen) {
+ const analyze_scanf::ScanfSpecifier &FS, const char *startSpecifier,
+ unsigned specifierLen,
+ const llvm::TextEncodingConverter &FormatStrConverter) {
return true;
}
diff --git a/clang/include/clang/Basic/TargetInfo.h
b/clang/include/clang/Basic/TargetInfo.h
index 1c16f9f79ae68..b3d507e1170dc 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -38,6 +38,7 @@
#include "llvm/IR/DerivedTypes.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Error.h"
+#include "llvm/Support/TextEncoding.h"
#include "llvm/Support/VersionTuple.h"
#include "llvm/TargetParser/Triple.h"
#include
@@ -320,6 +321,8 @@ class TargetInfo : public TransferrableTargetInfo,
virtual ~TargetInfo();
+ llvm::TextEncodingConverter *FormatStrConverter;
+
/// Retrieve the target options.
TargetOptions &getTargetOpts() const {
assert(TargetOpts && "Missing target options");
diff --git a/clang/include/cl
[llvm-branch-commits] [clang] [llvm] Continuation of fexec-charset (PR #169803)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff origin/main HEAD --extensions h,cpp,c --
clang/include/clang/AST/Expr.h clang/include/clang/AST/FormatString.h
clang/include/clang/Basic/TargetInfo.h
clang/include/clang/Lex/LiteralConverter.h clang/include/clang/Parse/Parser.h
clang/include/clang/Sema/Sema.h clang/lib/AST/Expr.cpp
clang/lib/AST/FormatString.cpp clang/lib/AST/FormatStringParsing.h
clang/lib/AST/PrintfFormatString.cpp clang/lib/AST/ScanfFormatString.cpp
clang/lib/Basic/TargetInfo.cpp clang/lib/Lex/LiteralConverter.cpp
clang/lib/Parse/ParseDecl.cpp clang/lib/Parse/ParseDeclCXX.cpp
clang/lib/Parse/ParseExpr.cpp clang/lib/Parse/Parser.cpp
clang/lib/Sema/SemaChecking.cpp clang/lib/Sema/SemaExpr.cpp
clang/test/CodeGen/systemz-charset.c llvm/include/llvm/Support/TextEncoding.h
llvm/lib/Support/TextEncoding.cpp --diff_from_common_commit
``
:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:
View the diff from clang-format here.
``diff
diff --git a/clang/lib/AST/PrintfFormatString.cpp
b/clang/lib/AST/PrintfFormatString.cpp
index dc32e3d02..f1558631b 100644
--- a/clang/lib/AST/PrintfFormatString.cpp
+++ b/clang/lib/AST/PrintfFormatString.cpp
@@ -57,21 +57,21 @@ static bool
ParseObjCFlags(FormatStringHandler &H, PrintfSpecifier &FS, const char
*FlagBeg,
const char *E, bool Warn,
const llvm::TextEncodingConverter &FormatStrConverter) {
-StringRef Flag(FlagBeg, E - FlagBeg);
-// Currently there is only one flag.
-if (Flag.size() == 2 && FormatStrConverter.convert(FlagBeg[0]) == 't' &&
-FormatStrConverter.convert(FlagBeg[1]) == 't') {
- FS.setHasObjCTechnicalTerm(FlagBeg);
- return false;
-}
-// Handle either the case of no flag or an invalid flag.
-if (Warn) {
- if (Flag == "")
-H.HandleEmptyObjCModifierFlag(FlagBeg, E - FlagBeg);
- else
-H.HandleInvalidObjCModifierFlag(FlagBeg, E - FlagBeg);
-}
-return true;
+ StringRef Flag(FlagBeg, E - FlagBeg);
+ // Currently there is only one flag.
+ if (Flag.size() == 2 && FormatStrConverter.convert(FlagBeg[0]) == 't' &&
+ FormatStrConverter.convert(FlagBeg[1]) == 't') {
+FS.setHasObjCTechnicalTerm(FlagBeg);
+return false;
+ }
+ // Handle either the case of no flag or an invalid flag.
+ if (Warn) {
+if (Flag == "")
+ H.HandleEmptyObjCModifierFlag(FlagBeg, E - FlagBeg);
+else
+ H.HandleInvalidObjCModifierFlag(FlagBeg, E - FlagBeg);
+ }
+ return true;
}
static PrintfSpecifierResult
@@ -214,16 +214,28 @@ ParsePrintfSpecifier(FormatStringHandler &H, const char
*&Beg, const char *E,
bool hasMore = true;
for ( ; I != E; ++I) {
switch (FormatStrConverter.convert(*I)) {
- default: hasMore = false; break;
- case '\'':
-// FIXME: POSIX specific. Always accept?
-FS.setHasThousandsGrouping(I);
-break;
- case '-': FS.setIsLeftJustified(I); break;
- case '+': FS.setHasPlusPrefix(I); break;
- case ' ': FS.setHasSpacePrefix(I); break;
- case '#': FS.setHasAlternativeForm(I); break;
- case '0': FS.setHasLeadingZeros(I); break;
+default:
+ hasMore = false;
+ break;
+case '\'':
+ // FIXME: POSIX specific. Always accept?
+ FS.setHasThousandsGrouping(I);
+ break;
+case '-':
+ FS.setIsLeftJustified(I);
+ break;
+case '+':
+ FS.setHasPlusPrefix(I);
+ break;
+case ' ':
+ FS.setHasSpacePrefix(I);
+ break;
+case '#':
+ FS.setHasAlternativeForm(I);
+ break;
+case '0':
+ FS.setHasLeadingZeros(I);
+ break;
}
if (!hasMore)
break;
@@ -324,95 +336,141 @@ ParsePrintfSpecifier(FormatStringHandler &H, const char
*&Beg, const char *E,
const char *conversionPosition = I++;
ConversionSpecifier::Kind k = ConversionSpecifier::InvalidSpecifier;
switch (FormatStrConverter.convert(*conversionPosition)) {
-default:
- break;
-// C99: 7.19.6.1 (section 8).
-case '%': k = ConversionSpecifier::PercentArg; break;
-case 'A': k = ConversionSpecifier::AArg; break;
-case 'E': k = ConversionSpecifier::EArg; break;
-case 'F': k = ConversionSpecifier::FArg; break;
-case 'G': k = ConversionSpecifier::GArg; break;
-case 'X': k = ConversionSpecifier::XArg; break;
-case 'a': k = ConversionSpecifier::aArg; break;
-case 'c': k = ConversionSpecifier::cArg; break;
-case 'd': k = ConversionSpecifier::dArg; break;
-case 'e': k = ConversionSpecifier::eArg; break;
-case 'f': k = ConversionSpecifier::fArg; break;
-case 'g':
[llvm-branch-commits] [clang] [llvm] Continuation of fexec-charset (PR #169803)
https://github.com/abhina-sree updated
https://github.com/llvm/llvm-project/pull/169803
>From ec0efa55da6e216ae811ff97279c1cd2024b549f Mon Sep 17 00:00:00 2001
From: Abhina Sreeskantharajan
Date: Mon, 24 Nov 2025 11:00:04 -0500
Subject: [PATCH 1/3] add ParserConversionAction
(cherry picked from commit c2647a73957921d3f7a53c6f25a69f1cc2725aa3)
---
clang/include/clang/Parse/Parser.h | 1 +
clang/include/clang/Sema/Sema.h| 8 ++--
clang/lib/Parse/ParseDecl.cpp | 13 +
clang/lib/Parse/ParseDeclCXX.cpp | 10 +++---
clang/lib/Parse/ParseExpr.cpp | 9 +
clang/lib/Parse/Parser.cpp | 4
clang/lib/Sema/SemaExpr.cpp| 12 +++-
7 files changed, 43 insertions(+), 14 deletions(-)
diff --git a/clang/include/clang/Parse/Parser.h
b/clang/include/clang/Parse/Parser.h
index 58eb1c0a7c114..97867183b5a1d 100644
--- a/clang/include/clang/Parse/Parser.h
+++ b/clang/include/clang/Parse/Parser.h
@@ -5633,6 +5633,7 @@ class Parser : public CodeCompletionHandler {
bool Finished;
};
ObjCImplParsingDataRAII *CurParsedObjCImpl;
+ ConversionAction ParserConversionAction;
/// StashAwayMethodOrFunctionBodyTokens - Consume the tokens and store them
/// for later parsing.
diff --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h
index cbfcc9bc0ea99..65567e367dea4 100644
--- a/clang/include/clang/Sema/Sema.h
+++ b/clang/include/clang/Sema/Sema.h
@@ -54,6 +54,7 @@
#include "clang/Basic/TemplateKinds.h"
#include "clang/Basic/TokenKinds.h"
#include "clang/Basic/TypeTraits.h"
+#include "clang/Lex/LiteralConverter.h"
#include "clang/Sema/AnalysisBasedWarnings.h"
#include "clang/Sema/Attr.h"
#include "clang/Sema/CleanupInfo.h"
@@ -7272,9 +7273,12 @@ class Sema final : public SemaBase {
/// from multiple tokens. However, the common case is that StringToks points
/// to one string.
ExprResult ActOnStringLiteral(ArrayRef StringToks,
-Scope *UDLScope = nullptr);
+Scope *UDLScope = nullptr,
+ConversionAction Action = CA_ToExecEncoding);
- ExprResult ActOnUnevaluatedStringLiteral(ArrayRef StringToks);
+ ExprResult
+ ActOnUnevaluatedStringLiteral(ArrayRef StringToks,
+ConversionAction Action = CA_ToExecEncoding);
/// ControllingExprOrType is either an opaque pointer coming out of a
/// ParsedType or an Expr *. FIXME: it'd be better to split this interface
diff --git a/clang/lib/Parse/ParseDecl.cpp b/clang/lib/Parse/ParseDecl.cpp
index 8688ccf41acb5..fd537618a3c83 100644
--- a/clang/lib/Parse/ParseDecl.cpp
+++ b/clang/lib/Parse/ParseDecl.cpp
@@ -555,6 +555,9 @@ unsigned Parser::ParseAttributeArgsCommon(
nullptr,
Sema::ExpressionEvaluationContextRecord::EK_AttrArgument);
+ SaveAndRestore SavedTranslationState(
+ ParserConversionAction, CA_NoConversion);
+
ExprResult ArgExpr = ParseAssignmentExpression();
if (ArgExpr.isInvalid()) {
SkipUntil(tok::r_paren, StopAtSemi);
@@ -634,6 +637,9 @@ void Parser::ParseGNUAttributeArgs(
ParsedAttr::Kind AttrKind =
ParsedAttr::getParsedKind(AttrName, ScopeName, Form.getSyntax());
+ SaveAndRestore
SavedTranslationState(ParserConversionAction,
+ CA_NoConversion);
+
if (AttrKind == ParsedAttr::AT_Availability) {
ParseAvailabilityAttribute(*AttrName, AttrNameLoc, Attrs, EndLoc,
ScopeName,
ScopeLoc, Form);
@@ -699,6 +705,9 @@ unsigned Parser::ParseClangAttributeArgs(
ParsedAttr::Kind AttrKind =
ParsedAttr::getParsedKind(AttrName, ScopeName, Form.getSyntax());
+ SaveAndRestore
SavedTranslationState(ParserConversionAction,
+ CA_NoConversion);
+
switch (AttrKind) {
default:
return ParseAttributeArgsCommon(AttrName, AttrNameLoc, Attrs, EndLoc,
@@ -1521,6 +1530,10 @@ void Parser::ParseExternalSourceSymbolAttribute(
SkipUntil(tok::comma, tok::r_paren, StopAtSemi | StopBeforeMatch);
continue;
}
+
+SaveAndRestore SavedTranslationState(
+ParserConversionAction, CA_NoConversion);
+
if (Keyword == Ident_language) {
if (HadLanguage) {
Diag(KeywordLoc, diag::err_external_source_symbol_duplicate_clause)
diff --git a/clang/lib/Parse/ParseDeclCXX.cpp b/clang/lib/Parse/ParseDeclCXX.cpp
index d8ed7e3ff96bd..40bf409124711 100644
--- a/clang/lib/Parse/ParseDeclCXX.cpp
+++ b/clang/lib/Parse/ParseDeclCXX.cpp
@@ -314,7 +314,9 @@ Decl *Parser::ParseNamespaceAlias(SourceLocation
NamespaceLoc,
Decl *Parser::ParseLinkage(ParsingDeclSpec &DS, DeclaratorContext Context) {
assert(isTokenStringLiteral() && "Not a string literal!");
- ExprResult Lang = ParseUnevaluatedStringLiteralExpression();
+ ExprResult Lang = (SaveAndRestore(ParserConversio
[llvm-branch-commits] [clang] [llvm] [mlir] [OMPIRBuilder] CANCEL IF(FALSE) is still a cancellation point (PR #164587)
https://github.com/tblah closed https://github.com/llvm/llvm-project/pull/164587 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] 1778938 - Revert "[MLIR][OpenMP] Add MLIR Lowering Support for dist_schedule (#152736)"
Author: Jack Styles
Date: 2025-11-27T14:41:59Z
New Revision: 1778938460a1686f8f44bfa41df03b165ca8
URL:
https://github.com/llvm/llvm-project/commit/1778938460a1686f8f44bfa41df03b165ca8
DIFF:
https://github.com/llvm/llvm-project/commit/1778938460a1686f8f44bfa41df03b165ca8.diff
LOG: Revert "[MLIR][OpenMP] Add MLIR Lowering Support for dist_schedule
(#152736)"
This reverts commit 47ae3eaa29f2195429f2ca19cc171a9ebd83c242.
Added:
Modified:
flang/docs/OpenMPSupport.md
llvm/include/llvm/Frontend/OpenMP/OMP.td
llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
mlir/test/Target/LLVMIR/openmp-todo.mlir
Removed:
mlir/test/Target/LLVMIR/openmp-dist_schedule.mlir
mlir/test/Target/LLVMIR/openmp-dist_schedule_with_wsloop.mlir
diff --git a/flang/docs/OpenMPSupport.md b/flang/docs/OpenMPSupport.md
index 8eea39c6ba91b..81f5f9f6dee5b 100644
--- a/flang/docs/OpenMPSupport.md
+++ b/flang/docs/OpenMPSupport.md
@@ -42,10 +42,10 @@ Note : No distinction is made between the support in
Parser/Semantics, MLIR, Low
| target update construct| P | device
clause not supported |
| declare target directive | P | |
| teams construct| Y | |
-| distribute construct | P | |
-| distribute simd construct | P | linear
clauses are not supported |
-| distribute parallel loop construct | P | |
-| distribute parallel loop simd construct| P | linear
clauses are not supported |
+| distribute construct | P |
dist_schedule clause not supported |
+| distribute simd construct | P |
dist_schedule and linear clauses are not supported |
+| distribute parallel loop construct | P |
dist_schedule clause not supported |
+| distribute parallel loop simd construct| P |
dist_schedule and linear clauses are not supported |
| depend clause | Y | |
| declare reduction construct| N | |
| atomic construct extensions| Y | |
@@ -53,13 +53,13 @@ Note : No distinction is made between the support in
Parser/Semantics, MLIR, Low
| cancellation point construct | Y | |
| parallel do simd construct | P | linear
clause not supported |
| target teams construct | P | device
clause not supported |
-| teams distribute construct | P | |
-| teams distribute simd construct| P | linear
clause is not supported |
-| target teams distribute construct | P | device
clause is not supported |
-| teams distribute parallel loop construct | P | |
-| target teams distribute parallel loop construct| P | device
clause is not supported |
-| teams distribute parallel loop simd construct | P | linear
clause is not supported |
-| target teams distribute parallel loop simd construct | P | device
and linear clauses are not supported |
+| teams distribute construct | P |
dist_schedule clause not supported |
+| teams distribute simd construct| P |
dist_schedule and linear clauses are not supported |
+| target teams distribute construct | P | device
and dist_schedule clauses are not supported |
+| teams distribute parallel loop construct | P |
dist_schedule clause not supported |
+| target teams distribute parallel loop construct| P | device
and dist_schedule clauses are not supported |
+| teams distribute parallel loop simd construct | P |
dist_schedule and linear clauses are not supported |
+| target teams distribute parallel loop simd construct | P |
device, dist_schedule and linear clauses are not supported |
## Extensions
### ATOMIC construct
diff --git a/llvm/include/llvm/Frontend/OpenMP/OMP.td
b/llvm/include/llvm/Frontend/OpenMP/OMP.td
index da70048d28c12..ade00e7ca27d5 100644
--- a/llvm/include/llvm/Frontend/OpenMP/OMP.td
+++ b/llvm/include/llvm/Frontend/OpenMP/OMP.td
@@ -490,8 +490,7 @@ def OMP_SCHEDULE_Dynamic : EnumVal<"dynamic", 3, 1> {}
def OMP_SC
[llvm-branch-commits] [clang] [Clang][CodeGen] Remove explicit insertion of AllocToken pass (PR #169360)
https://github.com/melver edited https://github.com/llvm/llvm-project/pull/169360 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Clang][CodeGen] Remove explicit insertion of AllocToken pass (PR #169360)
https://github.com/melver updated https://github.com/llvm/llvm-project/pull/169360 >From 3c13dc3871b39304144d2ac3da7498d3d8cec495 Mon Sep 17 00:00:00 2001 From: Marco Elver Date: Mon, 24 Nov 2025 17:44:32 +0100 Subject: [PATCH 1/3] fix formatting Created using spr 1.3.8-beta.1 --- clang/lib/Driver/ToolChains/CommonArgs.cpp | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index e889061ee619a..8ea84c72b6a2e 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -1393,11 +1393,11 @@ void tools::addLTOOptions(const ToolChain &ToolChain, const ArgList &Args, CmdArgs.push_back(Args.MakeArgString(Twine(PluginOptPrefix) + "-lto-alloc-token-mode=" + Mode)); if (Args.hasArg(options::OPT_fsanitize_alloc_token_fast_abi)) - CmdArgs.push_back(Args.MakeArgString(Twine(PluginOptPrefix) + - "-alloc-token-fast-abi")); + CmdArgs.push_back( + Args.MakeArgString(Twine(PluginOptPrefix) + "-alloc-token-fast-abi")); if (Args.hasArg(options::OPT_fsanitize_alloc_token_extended)) - CmdArgs.push_back(Args.MakeArgString(Twine(PluginOptPrefix) + - "-alloc-token-extended")); + CmdArgs.push_back( + Args.MakeArgString(Twine(PluginOptPrefix) + "-alloc-token-extended")); if (Arg *A = Args.getLastArg(options::OPT_falloc_token_max_EQ)) CmdArgs.push_back(Args.MakeArgString( Twine(PluginOptPrefix) + "-alloc-token-max=" + A->getValue())); >From 6b9019feb927c575af2c84ec98e79c1c40e6f95a Mon Sep 17 00:00:00 2001 From: Marco Elver Date: Wed, 26 Nov 2025 18:04:08 +0100 Subject: [PATCH 2/3] fix test Created using spr 1.3.8-beta.1 --- clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp b/clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp index 148d51eefe07e..0578bdb3761dd 100644 --- a/clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp +++ b/clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp @@ -4,12 +4,12 @@ // RUN: split-file %s %t // RUN: llvm-profdata merge %t/memprof.yaml -o %t/use.memprofdata // -// RUN: %clangxx -O2 -flto=thin -g -fmemory-profile-use=%t/use.memprofdata %t/src.cpp -c -o %t.o +// RUN: %clangxx --target=x86_64-linux-gnu -O2 -flto=thin -g -fmemory-profile-use=%t/use.memprofdata %t/src.cpp -c -o %t.o // RUN: llvm-lto2 run %t.o -thinlto-distributed-indexes -supports-hot-cold-new -r=%t.o,main,plx -r=%t.o,_Z3foov,plx -r=%t.o,_Znam, -o %t.out // RUN: %clang_cc1 -O1 -x ir %t.o -fthinlto-index=%t.o.thinlto.bc -mllvm -optimize-hot-cold-new -emit-llvm -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,DEFAULT // RUN: %clang_cc1 -O2 -x ir %t.o -fthinlto-index=%t.o.thinlto.bc -mllvm -optimize-hot-cold-new -emit-llvm -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,DEFAULT // -// RUN: %clangxx -O2 -flto=thin -g -fsanitize=alloc-token -falloc-token-max=32 -fmemory-profile-use=%t/use.memprofdata %t/src.cpp -c -o %t.o +// RUN: %clangxx --target=x86_64-linux-gnu -O2 -flto=thin -g -fsanitize=alloc-token -falloc-token-max=32 -fmemory-profile-use=%t/use.memprofdata %t/src.cpp -c -o %t.o // RUN: llvm-lto2 run %t.o -thinlto-distributed-indexes -supports-hot-cold-new -r=%t.o,main,plx -r=%t.o,_Z3foov,plx -r=%t.o,_Znam, -o %t.out // RUN: %clang_cc1 -O1 -x ir %t.o -fsanitize=alloc-token -fthinlto-index=%t.o.thinlto.bc -mllvm -optimize-hot-cold-new -emit-llvm -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,ALLOCTOKEN // RUN: %clang_cc1 -O2 -x ir %t.o -fsanitize=alloc-token -fthinlto-index=%t.o.thinlto.bc -mllvm -optimize-hot-cold-new -emit-llvm -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,ALLOCTOKEN >From 20ca813dbb903def50058a6b2b2b1885ca38abf0 Mon Sep 17 00:00:00 2001 From: Marco Elver Date: Wed, 26 Nov 2025 18:54:52 +0100 Subject: [PATCH 3/3] fix test Created using spr 1.3.8-beta.1 --- clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp b/clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp index 0578bdb3761dd..ed05962846aff 100644 --- a/clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp +++ b/clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp @@ -6,13 +6,13 @@ // // RUN: %clangxx --target=x86_64-linux-gnu -O2 -flto=thin -g -fmemory-profile-use=%t/use.memprofdata %t/src.cpp -c -o %t.o // RUN: llvm-lto2 run %t.o -thinlto-distributed-indexes -supports-hot-cold-new -r=%t.o,main,plx -r=%t.o,_Z3foov,plx -r=%t.o,_Znam, -o %t.out -// RUN: %clang_cc1 -O1 -x ir %t.o -fthinlto-index=%t.o.thinlto.bc -mllvm -optimize-hot-cold-new -emit-llvm -o - 2>&1 | Fil
