[llvm-branch-commits] [llvm] release/20.x: [llvm] Add CMake flag to compile out the telemetry framework (#124850) (PR #125555)

[Nikita Popov via llvm-branch-commits]

nikic wrote:

@JDevlieghere See 
https://github.com/llvm/llvm-project/issues/125554#issuecomment-2636081942 for 
how to add a comment. You have to run it in the place where you did the 
original cherry-pick and pass both commits at once.

https://github.com/llvm/llvm-project/pull/12
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[llvm-branch-commits] [mlir] [mlir][cmake] Add missing MLIRTestDialect dependencies (PR #125834)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-mlir

Author: David Spickett (DavidSpickett)


Changes

This cherry picks
[mlir][cmake] Add missing MLIRTestDialect dependency (#125004) 
(72b73c9af694198096b2e0c47a1625e5b94c76a5) and
[mlir] Fix build race condition in Pass Manager tests 
(d906da5ead2764579395e5006c517f2ec9afd46f) to the 20.x release branch.

Both of these are addressing issues that started with 
https://github.com/llvm/llvm-project/pull/123910, which is already on the 20.x 
branch.

In each case the cherry-picked changes correct problems that would otherwise be 
a race condition in certain builds. Linaro noticed this on our flang dylib 
(shared library) build bot.

Failures look like:
In file included from 
/home/tcwg-buildbot/worker/flang-aarch64-dylib/llvm-project/mlir/test/lib/Pass/TestPassManager.cpp:10:
 
/home/tcwg-buildbot/worker/flang-aarch64-dylib/llvm-project/mlir/test/lib/Pass/../Dialect/Test/TestOps.h:148:10:
 fatal error: 'TestOps.h.inc' file not found
  148 | #include "TestOps.h.inc"
  |  ^~~

We have tested these changes on the buildbot for the last 2 days and had no 
problems. Whereas before it was failing maybe 1 in 10 builds, enough that 
multiple people in the community noticed it.

Reported in https://github.com/llvm/llvm-project/issues/124485 and 
https://github.com/llvm/llvm-project/issues/124335.

---
Full diff: https://github.com/llvm/llvm-project/pull/125834.diff


2 Files Affected:

- (modified) mlir/test/lib/IR/CMakeLists.txt (+4) 
- (modified) mlir/test/lib/Pass/CMakeLists.txt (+3-1) 


``diff
diff --git a/mlir/test/lib/IR/CMakeLists.txt b/mlir/test/lib/IR/CMakeLists.txt
index e5416da70d50080..eeb9cf1e34fc8c0 100644
--- a/mlir/test/lib/IR/CMakeLists.txt
+++ b/mlir/test/lib/IR/CMakeLists.txt
@@ -27,7 +27,11 @@ add_mlir_library(MLIRTestIR
   TestVisitorsGeneric.cpp
 
   EXCLUDE_FROM_LIBMLIR
+
+  DEPENDS
+  MLIRTestDialect
   )
+
 mlir_target_link_libraries(MLIRTestIR PUBLIC
   MLIRPass
   MLIRBytecodeReader
diff --git a/mlir/test/lib/Pass/CMakeLists.txt 
b/mlir/test/lib/Pass/CMakeLists.txt
index 6698af86b8ae66d..c5d0bab8ec74946 100644
--- a/mlir/test/lib/Pass/CMakeLists.txt
+++ b/mlir/test/lib/Pass/CMakeLists.txt
@@ -10,12 +10,14 @@ add_mlir_library(MLIRTestPass
 
   ADDITIONAL_HEADER_DIRS
   ${MLIR_MAIN_INCLUDE_DIR}/mlir/Pass
+
+  LINK_LIBS PUBLIC
+  MLIRTestDialect
   )
 mlir_target_link_libraries(MLIRTestPass PUBLIC
   ${conversion_libs}
   MLIRIR
   MLIRPass
-  MLIRTestDialect
   )
 
 target_include_directories(MLIRTestPass

``




https://github.com/llvm/llvm-project/pull/125834
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[llvm-branch-commits] [mlir] [mlir][cmake] Add missing MLIRTestDialect dependencies (PR #125834)

[David Spickett via llvm-branch-commits]

https://github.com/DavidSpickett created 
https://github.com/llvm/llvm-project/pull/125834

This cherry picks
[mlir][cmake] Add missing MLIRTestDialect dependency (#125004) 
(72b73c9af694198096b2e0c47a1625e5b94c76a5) and
[mlir] Fix build race condition in Pass Manager tests 
(d906da5ead2764579395e5006c517f2ec9afd46f) to the 20.x release branch.

Both of these are addressing issues that started with 
https://github.com/llvm/llvm-project/pull/123910, which is already on the 20.x 
branch.

In each case the cherry-picked changes correct problems that would otherwise be 
a race condition in certain builds. Linaro noticed this on our flang dylib 
(shared library) build bot.

Failures look like:
In file included from 
/home/tcwg-buildbot/worker/flang-aarch64-dylib/llvm-project/mlir/test/lib/Pass/TestPassManager.cpp:10:
 
/home/tcwg-buildbot/worker/flang-aarch64-dylib/llvm-project/mlir/test/lib/Pass/../Dialect/Test/TestOps.h:148:10:
 fatal error: 'TestOps.h.inc' file not found
  148 | #include "TestOps.h.inc"
  |  ^~~

We have tested these changes on the buildbot for the last 2 days and had no 
problems. Whereas before it was failing maybe 1 in 10 builds, enough that 
multiple people in the community noticed it.

Reported in https://github.com/llvm/llvm-project/issues/124485 and 
https://github.com/llvm/llvm-project/issues/124335.

>From ab3bc7eeb7ff89ec53a262ad9b52ab46599c Mon Sep 17 00:00:00 2001
From: Diego Caballero 
Date: Thu, 30 Jan 2025 16:09:19 -0800
Subject: [PATCH] [mlir][cmake] Add missing MLIRTestDialect dependencies

This cherry picks
[mlir][cmake] Add missing MLIRTestDialect dependency (#125004) 
(72b73c9af694198096b2e0c47a1625e5b94c76a5)
and
[mlir] Fix build race condition in Pass Manager tests 
(d906da5ead2764579395e5006c517f2ec9afd46f)
to the 20.x release branch.

Both of these are addressing issues that started with
https://github.com/llvm/llvm-project/pull/123910, which is already on the 20.x 
branch.

In each case the cherry-picked changes correct problems that would otherwise be
a race condition in certain builds. Linaro noticed this on our flang dylib 
(shared library)
build bot.

Failures look like:
In file included from 
/home/tcwg-buildbot/worker/flang-aarch64-dylib/llvm-project/mlir/test/lib/Pass/TestPassManager.cpp:10:
/home/tcwg-buildbot/worker/flang-aarch64-dylib/llvm-project/mlir/test/lib/Pass/../Dialect/Test/TestOps.h:148:10:
 fatal error: 'TestOps.h.inc' file not found
  148 | #include "TestOps.h.inc"
  |  ^~~

We have tested these changes on the buildbot for the last 2 days and had no 
problems.
Whereas before it was failing maybe 1 in 10 builds, enough that multiple people
in the community noticed it.

Reported in https://github.com/llvm/llvm-project/issues/124485 and
https://github.com/llvm/llvm-project/issues/124335.

Co-authored-by: Diego Caballero 
---
 mlir/test/lib/IR/CMakeLists.txt   | 4 
 mlir/test/lib/Pass/CMakeLists.txt | 4 +++-
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/mlir/test/lib/IR/CMakeLists.txt b/mlir/test/lib/IR/CMakeLists.txt
index e5416da70d50080..eeb9cf1e34fc8c0 100644
--- a/mlir/test/lib/IR/CMakeLists.txt
+++ b/mlir/test/lib/IR/CMakeLists.txt
@@ -27,7 +27,11 @@ add_mlir_library(MLIRTestIR
   TestVisitorsGeneric.cpp
 
   EXCLUDE_FROM_LIBMLIR
+
+  DEPENDS
+  MLIRTestDialect
   )
+
 mlir_target_link_libraries(MLIRTestIR PUBLIC
   MLIRPass
   MLIRBytecodeReader
diff --git a/mlir/test/lib/Pass/CMakeLists.txt 
b/mlir/test/lib/Pass/CMakeLists.txt
index 6698af86b8ae66d..c5d0bab8ec74946 100644
--- a/mlir/test/lib/Pass/CMakeLists.txt
+++ b/mlir/test/lib/Pass/CMakeLists.txt
@@ -10,12 +10,14 @@ add_mlir_library(MLIRTestPass
 
   ADDITIONAL_HEADER_DIRS
   ${MLIR_MAIN_INCLUDE_DIR}/mlir/Pass
+
+  LINK_LIBS PUBLIC
+  MLIRTestDialect
   )
 mlir_target_link_libraries(MLIRTestPass PUBLIC
   ${conversion_libs}
   MLIRIR
   MLIRPass
-  MLIRTestDialect
   )
 
 target_include_directories(MLIRTestPass

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[llvm-branch-commits] [flang] [libc] [libclc] [llvm] [AMDGPU] Replace gfx940 and gfx941 with gfx942 in offload and libclc (PR #125826)

[Matt Arsenault via llvm-branch-commits]

https://github.com/arsenm approved this pull request.


https://github.com/llvm/llvm-project/pull/125826
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[llvm-branch-commits] [mlir] [mlir][cmake] Add missing MLIRTestDialect dependencies (PR #125834)

[David Spickett via llvm-branch-commits]

DavidSpickett wrote:

These would be clean cherry-picks but I put them into one commit so I could 
include the details of what it fixes. I hope that's ok.

https://github.com/llvm/llvm-project/pull/125834
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[llvm-branch-commits] [mlir] [mlir][cmake] Add missing MLIRTestDialect dependencies (PR #125834)

[David Spickett via llvm-branch-commits]

https://github.com/DavidSpickett milestoned 
https://github.com/llvm/llvm-project/pull/125834
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[llvm-branch-commits] [flang] [AMDGPU] Add missing gfx architectures to AddFlangOffloadRuntime.cmake (PR #125827)

[Matt Arsenault via llvm-branch-commits]

https://github.com/arsenm approved this pull request.


https://github.com/llvm/llvm-project/pull/125827
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[llvm-branch-commits] [mlir] [mlir][cmake] Add missing MLIRTestDialect dependencies (PR #125834)

[Michał Górny via llvm-branch-commits]

@@ -27,7 +27,11 @@ add_mlir_library(MLIRTestIR
   TestVisitorsGeneric.cpp
 
   EXCLUDE_FROM_LIBMLIR
+
+  DEPENDS

mgorny wrote:

Don't you need `LINK_LIBS` here too?

https://github.com/llvm/llvm-project/pull/125834
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[llvm-branch-commits] [mlir] [mlir][cmake] Add missing MLIRTestDialect dependencies (PR #125834)

[David Spickett via llvm-branch-commits]

@@ -27,7 +27,11 @@ add_mlir_library(MLIRTestIR
   TestVisitorsGeneric.cpp
 
   EXCLUDE_FROM_LIBMLIR
+
+  DEPENDS

DavidSpickett wrote:

I do, in fact - ad152f4bcfe465b57562fa003b93f44e1a3b2287.

Will pick this too.

https://github.com/llvm/llvm-project/pull/125834
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[llvm-branch-commits] [mlir] [mlir][cmake] Add missing MLIRTestDialect dependencies (PR #125834)

[David Spickett via llvm-branch-commits]

DavidSpickett wrote:

Actually, I see @nikic doing more fixes. So I will wait for you to finish your 
work and we can coordinate what needs to go into 20.x.

https://github.com/llvm/llvm-project/pull/125834
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[llvm-branch-commits] [mlir] [AMDGPU][MLIR] Replace gfx940 and gfx941 with gfx942 in MLIR (PR #125836)

[Fabian Ritter via llvm-branch-commits]

https://github.com/ritter-x2a created 
https://github.com/llvm/llvm-project/pull/125836

gfx940 and gfx941 are no longer supported. This is one of a series of
PRs to remove them from the code base.

For SWDEV-512631

>From 656adb4e5ad43229e3c63eaad9da3b2361cd2d83 Mon Sep 17 00:00:00 2001
From: Fabian Ritter 
Date: Wed, 5 Feb 2025 05:50:12 -0500
Subject: [PATCH] [AMDGPU][MLIR] Replace gfx940 and gfx941 with gfx942 in MLIR

gfx940 and gfx941 are no longer supported. This is one of a series of
PRs to remove them from the code base.

For SWDEV-512631
---
 mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td |  2 +-
 mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td  |  8 +++
 .../AMDGPUToROCDL/AMDGPUToROCDL.cpp   | 22 +--
 .../ArithToAMDGPU/ArithToAMDGPU.cpp   |  2 +-
 .../AMDGPU/Transforms/EmulateAtomics.cpp  |  8 +--
 .../AMDGPUToROCDL/8-bit-floats.mlir   |  2 +-
 mlir/test/Conversion/AMDGPUToROCDL/mfma.mlir  |  2 +-
 .../ArithToAMDGPU/8-bit-float-saturation.mlir |  2 +-
 .../ArithToAMDGPU/8-bit-floats.mlir   |  2 +-
 .../Dialect/AMDGPU/AMDGPUUtilsTest.cpp| 20 +++--
 10 files changed, 30 insertions(+), 40 deletions(-)

diff --git a/mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td 
b/mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
index 69745addfd748ec..24f541587cba88a 100644
--- a/mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
+++ b/mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
@@ -602,7 +602,7 @@ def AMDGPU_MFMAOp :
 order (that is, v[0] will go to arg[7:0], v[1] to arg[15:8] and so on).
 
 The negateA, negateB, and negateC flags are only supported for 
double-precision
-operations on gfx940+.
+operations on gfx942+.
   }];
   let assemblyFormat = [{
 $sourceA `*` $sourceB `+` $destC
diff --git a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td 
b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
index 974712c581537a9..8b4f7e49f573d68 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
@@ -382,11 +382,11 @@ def ROCDL_mfma_f32_16x16x4bf16_1k : 
ROCDL_Mfma_IntrOp<"mfma.f32.16x16x4bf16.1k">
 def ROCDL_mfma_f32_4x4x4bf16_1k : ROCDL_Mfma_IntrOp<"mfma.f32.4x4x4bf16.1k">;
 def ROCDL_mfma_f32_32x32x8bf16_1k : 
ROCDL_Mfma_IntrOp<"mfma.f32.32x32x8bf16.1k">;
 def ROCDL_mfma_f32_16x16x16bf16_1k : 
ROCDL_Mfma_IntrOp<"mfma.f32.16x16x16bf16.1k">;
-// Note: in gfx940, unlike in gfx90a, the f64 xdlops use the "blgp" argument 
as a
-// NEG bitfield. See IntrinsicsAMDGPU.td for more info.
+// Note: in gfx942, unlike in gfx90a, the f64 xdlops use the "blgp" argument as
+// a NEG bitfield. See IntrinsicsAMDGPU.td for more info.
 def ROCDL_mfma_f64_16x16x4f64 : ROCDL_Mfma_IntrOp<"mfma.f64.16x16x4f64">;
 def ROCDL_mfma_f64_4x4x4f64 : ROCDL_Mfma_IntrOp<"mfma.f64.4x4x4f64">;
-// New in gfx940.
+// New in gfx942.
 def ROCDL_mfma_i32_16x16x32_i8 : ROCDL_Mfma_IntrOp<"mfma.i32.16x16x32.i8">;
 def ROCDL_mfma_i32_32x32x16_i8 : ROCDL_Mfma_IntrOp<"mfma.i32.32x32x16.i8">;
 def ROCDL_mfma_f32_16x16x8_xf32 : ROCDL_Mfma_IntrOp<"mfma.f32.16x16x8.xf32">;
@@ -409,7 +409,7 @@ def ROCDL_mfma_f32_32x32x16_f16 : 
ROCDL_Mfma_IntrOp<"mfma.f32.32x32x16.f16">;
 def ROCDL_mfma_scale_f32_16x16x128_f8f6f4 : 
ROCDL_Mfma_OO_IntrOp<"mfma.scale.f32.16x16x128.f8f6f4", [0,1]>;
 def ROCDL_mfma_scale_f32_32x32x64_f8f6f4 : 
ROCDL_Mfma_OO_IntrOp<"mfma.scale.f32.32x32x64.f8f6f4", [0,1]>;
 
-// 2:4 Sparsity ops (GFX940)
+// 2:4 Sparsity ops (GFX942)
 def ROCDL_smfmac_f32_16x16x32_f16 : 
ROCDL_Mfma_IntrOp<"smfmac.f32.16x16x32.f16">;
 def ROCDL_smfmac_f32_32x32x16_f16 : 
ROCDL_Mfma_IntrOp<"smfmac.f32.32x32x16.f16">;
 def ROCDL_smfmac_f32_16x16x32_bf16 : 
ROCDL_Mfma_IntrOp<"smfmac.f32.16x16x32.bf16">;
diff --git a/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp 
b/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
index 51f5d7a161b9030..f67d174d7d7c9a6 100644
--- a/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+++ b/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
@@ -80,7 +80,7 @@ namespace {
 // Define commonly used chipsets versions for convenience.
 constexpr Chipset kGfx908 = Chipset(9, 0, 8);
 constexpr Chipset kGfx90a = Chipset(9, 0, 0xa);
-constexpr Chipset kGfx940 = Chipset(9, 4, 0);
+constexpr Chipset kGfx942 = Chipset(9, 4, 2);
 
 /// Define lowering patterns for raw buffer ops
 template 
@@ -483,7 +483,7 @@ static std::optional mfmaOpToIntrinsic(MFMAOp 
mfma,
 destElem = destType.getElementType();
 
   if (sourceElem.isF32() && destElem.isF32()) {
-if (mfma.getReducePrecision() && chipset >= kGfx940) {
+if (mfma.getReducePrecision() && chipset >= kGfx942) {
   if (m == 32 && n == 32 && k == 4 && b == 1)
 return ROCDL::mfma_f32_32x32x4_xf32::getOperationName();
   if (m == 16 && n == 16 && k == 8 && b == 1)
@@ -551,9 +551,9 @@ static std::optional mfmaOpToIntrinsic(MFMAOp 
mfma,
   return ROCDL::mfma_i32_32x32x8i8::getOperationName();
 if (m == 16 && n == 16 && k == 16 && b == 1)
   

[llvm-branch-commits] [mlir] [AMDGPU][MLIR] Replace gfx940 and gfx941 with gfx942 in MLIR (PR #125836)

[Fabian Ritter via llvm-branch-commits]

ritter-x2a wrote:

> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is 
> open. Once all requirements are satisfied, merge this PR as a stack  href="https://app.graphite.dev/github/pr/llvm/llvm-project/125836?utm_source=stack-comment-downstack-mergeability-warning";
>  >on Graphite.
> https://graphite.dev/docs/merge-pull-requests";>Learn more

* **#125836** https://app.graphite.dev/github/pr/llvm/llvm-project/125836?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
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 target="_blank">(View in Graphite)
* **#125827** https://app.graphite.dev/github/pr/llvm/llvm-project/125827?utm_source=stack-comment-icon";
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width="10px" height="10px"/>
* **#125826** https://app.graphite.dev/github/pr/llvm/llvm-project/125826?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/>
* **#125711** https://app.graphite.dev/github/pr/llvm/llvm-project/125711?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/>
* `main`




This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn 
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[llvm-branch-commits] [flang] [mlir] release/20.x: Fixes for flang/mlir dependencies (PR #125837)

[Nikita Popov via llvm-branch-commits]

https://github.com/nikic created 
https://github.com/llvm/llvm-project/pull/125837

Backport a few fixes for flang/MLIR library dependencies related to 
MLIR_LINK_MLIR_DYLIB changes.

>From 86f0bbcd6ed9d20c7d40a5033b2862bf1497d617 Mon Sep 17 00:00:00 2001
From: Nikita Popov 
Date: Tue, 4 Feb 2025 16:37:21 +0100
Subject: [PATCH 1/3] [mlir] Fix MLIRTestDialect dependency in MLIRTestIR

This is a test library which is not part of libMLIR, so it should
use normal LINK_LIBS instead of mlir_target_link_libraries.

This fixes an issue introduced in #123910 and follows up on the
fix in #125004, which added the library to DEPENDS, which is not
sufficient.
---
 mlir/test/lib/IR/CMakeLists.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/mlir/test/lib/IR/CMakeLists.txt b/mlir/test/lib/IR/CMakeLists.txt
index e5416da70d5008..71a96c7f92c0c7 100644
--- a/mlir/test/lib/IR/CMakeLists.txt
+++ b/mlir/test/lib/IR/CMakeLists.txt
@@ -27,13 +27,15 @@ add_mlir_library(MLIRTestIR
   TestVisitorsGeneric.cpp
 
   EXCLUDE_FROM_LIBMLIR
+
+  LINK_LIBS PUBLIC
+  MLIRTestDialect
   )
 mlir_target_link_libraries(MLIRTestIR PUBLIC
   MLIRPass
   MLIRBytecodeReader
   MLIRBytecodeWriter
   MLIRFunctionInterfaces
-  MLIRTestDialect
   )
 
 target_include_directories(MLIRTestIR

>From 7745a4c7aa9ed5da0f540bfaa9e937e2d9b9a0f6 Mon Sep 17 00:00:00 2001
From: Nikita Popov 
Date: Wed, 5 Feb 2025 09:48:23 +0100
Subject: [PATCH 2/3] [flang] Move FIRSupport dependency to correct place
 (#125697)

This library is provided by flang, not MLIR, so it should not be part of
MLIR_LIBS.

Fixes an issue introduced in https://github.com/llvm/llvm-project/pull/120966.

(cherry picked from commit ee76bdac192ce86c5d13e4c712e0327aaefda45f)
---
 flang/lib/Optimizer/Analysis/CMakeLists.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/flang/lib/Optimizer/Analysis/CMakeLists.txt 
b/flang/lib/Optimizer/Analysis/CMakeLists.txt
index 6fe9c70f83765f..c4dae898f8e572 100644
--- a/flang/lib/Optimizer/Analysis/CMakeLists.txt
+++ b/flang/lib/Optimizer/Analysis/CMakeLists.txt
@@ -12,6 +12,7 @@ add_flang_library(FIRAnalysis
   LINK_LIBS
   FIRBuilder
   FIRDialect
+  FIRSupport
   HLFIRDialect
 
   MLIR_LIBS
@@ -19,5 +20,4 @@ add_flang_library(FIRAnalysis
   MLIRLLVMDialect
   MLIRMathTransforms
   MLIROpenMPDialect
-  FIRSupport
 )

>From 29f3a87a262b986cf2249d50ac2a10307c8742ed Mon Sep 17 00:00:00 2001
From: Nikita Popov 
Date: Wed, 5 Feb 2025 11:58:44 +0100
Subject: [PATCH 3/3] [flang][cmake] Fix bcc dependencies (#125822)

The Fortran libraries are not part of MLIR, so they should use
target_link_libraries() rather than mlir_target_link_libraries().

This fixes an issue introduced in
https://github.com/llvm/llvm-project/pull/120966.

(cherry picked from commit f9af5c145f40480d46874b643ca2b1237e9fbb2a)
---
 flang/tools/bbc/CMakeLists.txt | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/flang/tools/bbc/CMakeLists.txt b/flang/tools/bbc/CMakeLists.txt
index 85aeb85e0c5309..97462be83ea438 100644
--- a/flang/tools/bbc/CMakeLists.txt
+++ b/flang/tools/bbc/CMakeLists.txt
@@ -29,6 +29,11 @@ target_link_libraries(bbc PRIVATE
   flangFrontend
   flangPasses
   FlangOpenMPTransforms
+  FortranCommon
+  FortranParser
+  FortranEvaluate
+  FortranSemantics
+  FortranLower
 )
 
 mlir_target_link_libraries(bbc PRIVATE
@@ -36,9 +41,4 @@ mlir_target_link_libraries(bbc PRIVATE
   ${extension_libs}
   MLIRAffineToStandard
   MLIRSCFToControlFlow
-  FortranCommon
-  FortranParser
-  FortranEvaluate
-  FortranSemantics
-  FortranLower
 )

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[llvm-branch-commits] [flang] [mlir] release/20.x: Fixes for flang/mlir dependencies (PR #125837)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-mlir

Author: Nikita Popov (nikic)


Changes

Backport a few fixes for flang/MLIR library dependencies related to 
MLIR_LINK_MLIR_DYLIB changes.

---
Full diff: https://github.com/llvm/llvm-project/pull/125837.diff


3 Files Affected:

- (modified) flang/lib/Optimizer/Analysis/CMakeLists.txt (+1-1) 
- (modified) flang/tools/bbc/CMakeLists.txt (+5-5) 
- (modified) mlir/test/lib/IR/CMakeLists.txt (+3-1) 


``diff
diff --git a/flang/lib/Optimizer/Analysis/CMakeLists.txt 
b/flang/lib/Optimizer/Analysis/CMakeLists.txt
index 6fe9c70f83765f1..c4dae898f8e5722 100644
--- a/flang/lib/Optimizer/Analysis/CMakeLists.txt
+++ b/flang/lib/Optimizer/Analysis/CMakeLists.txt
@@ -12,6 +12,7 @@ add_flang_library(FIRAnalysis
   LINK_LIBS
   FIRBuilder
   FIRDialect
+  FIRSupport
   HLFIRDialect
 
   MLIR_LIBS
@@ -19,5 +20,4 @@ add_flang_library(FIRAnalysis
   MLIRLLVMDialect
   MLIRMathTransforms
   MLIROpenMPDialect
-  FIRSupport
 )
diff --git a/flang/tools/bbc/CMakeLists.txt b/flang/tools/bbc/CMakeLists.txt
index 85aeb85e0c53093..97462be83ea4389 100644
--- a/flang/tools/bbc/CMakeLists.txt
+++ b/flang/tools/bbc/CMakeLists.txt
@@ -29,6 +29,11 @@ target_link_libraries(bbc PRIVATE
   flangFrontend
   flangPasses
   FlangOpenMPTransforms
+  FortranCommon
+  FortranParser
+  FortranEvaluate
+  FortranSemantics
+  FortranLower
 )
 
 mlir_target_link_libraries(bbc PRIVATE
@@ -36,9 +41,4 @@ mlir_target_link_libraries(bbc PRIVATE
   ${extension_libs}
   MLIRAffineToStandard
   MLIRSCFToControlFlow
-  FortranCommon
-  FortranParser
-  FortranEvaluate
-  FortranSemantics
-  FortranLower
 )
diff --git a/mlir/test/lib/IR/CMakeLists.txt b/mlir/test/lib/IR/CMakeLists.txt
index e5416da70d50080..71a96c7f92c0c7d 100644
--- a/mlir/test/lib/IR/CMakeLists.txt
+++ b/mlir/test/lib/IR/CMakeLists.txt
@@ -27,13 +27,15 @@ add_mlir_library(MLIRTestIR
   TestVisitorsGeneric.cpp
 
   EXCLUDE_FROM_LIBMLIR
+
+  LINK_LIBS PUBLIC
+  MLIRTestDialect
   )
 mlir_target_link_libraries(MLIRTestIR PUBLIC
   MLIRPass
   MLIRBytecodeReader
   MLIRBytecodeWriter
   MLIRFunctionInterfaces
-  MLIRTestDialect
   )
 
 target_include_directories(MLIRTestIR

``




https://github.com/llvm/llvm-project/pull/125837
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[llvm-branch-commits] [mlir] [AMDGPU][MLIR] Replace gfx940 and gfx941 with gfx942 in MLIR (PR #125836)

[Fabian Ritter via llvm-branch-commits]

https://github.com/ritter-x2a ready_for_review 
https://github.com/llvm/llvm-project/pull/125836
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[llvm-branch-commits] [llvm] release/20.x: [llvm] Add CMake flag to compile out the telemetry framework (#124850) (PR #125555)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/12

>From d8440db1a1042beba74dfdf93edd83630bbebdab Mon Sep 17 00:00:00 2001
From: Jonas Devlieghere 
Date: Mon, 3 Feb 2025 10:35:14 -0800
Subject: [PATCH 1/2] [llvm] Add CMake flag to compile out the telemetry
 framework (#124850)

Add a CMake flag (LLVM_BUILD_TELEMETRY) to disable building the
telemetry framework. The flag being enabled does *not* mean that
telemetry is being collected, it merely means we're building the generic
telemetry framework. Hence the flag is enabled by default.

Motivated by this Discourse thread:
https://discourse.llvm.org/t/how-to-disable-building-llvm-clang-telemetry/84305

(cherry picked from commit bac62ee5b473e70981a6bd9759ec316315fca07d)
---
 llvm/CMakeLists.txt   | 1 +
 llvm/lib/CMakeLists.txt   | 4 +++-
 llvm/unittests/CMakeLists.txt | 4 +++-
 3 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt
index c9ff3696e22d698..d1b4c2700ce8ef7 100644
--- a/llvm/CMakeLists.txt
+++ b/llvm/CMakeLists.txt
@@ -829,6 +829,7 @@ option (LLVM_ENABLE_DOXYGEN "Use doxygen to generate llvm 
API documentation." OF
 option (LLVM_ENABLE_SPHINX "Use Sphinx to generate llvm documentation." OFF)
 option (LLVM_ENABLE_OCAMLDOC "Build OCaml bindings documentation." ON)
 option (LLVM_ENABLE_BINDINGS "Build bindings." ON)
+option (LLVM_BUILD_TELEMETRY "Build the telemtry library. This does not enable 
telemetry." ON)
 
 set(LLVM_INSTALL_DOXYGEN_HTML_DIR "${CMAKE_INSTALL_DOCDIR}/llvm/doxygen-html"
 CACHE STRING "Doxygen-generated HTML documentation install directory")
diff --git a/llvm/lib/CMakeLists.txt b/llvm/lib/CMakeLists.txt
index f6465612d30c0b4..d0a2bc929438179 100644
--- a/llvm/lib/CMakeLists.txt
+++ b/llvm/lib/CMakeLists.txt
@@ -41,7 +41,9 @@ add_subdirectory(ProfileData)
 add_subdirectory(Passes)
 add_subdirectory(TargetParser)
 add_subdirectory(TextAPI)
-add_subdirectory(Telemetry)
+if (LLVM_BUILD_TELEMETRY)
+  add_subdirectory(Telemetry)
+endif()
 add_subdirectory(ToolDrivers)
 add_subdirectory(XRay)
 if (LLVM_INCLUDE_TESTS)
diff --git a/llvm/unittests/CMakeLists.txt b/llvm/unittests/CMakeLists.txt
index 81abce51b8939f0..12e229b1c349840 100644
--- a/llvm/unittests/CMakeLists.txt
+++ b/llvm/unittests/CMakeLists.txt
@@ -63,7 +63,9 @@ add_subdirectory(Support)
 add_subdirectory(TableGen)
 add_subdirectory(Target)
 add_subdirectory(TargetParser)
-add_subdirectory(Telemetry)
+if (LLVM_BUILD_TELEMETRY)
+  add_subdirectory(Telemetry)
+endif()
 add_subdirectory(Testing)
 add_subdirectory(TextAPI)
 add_subdirectory(Transforms)

>From ceecfb85d5f8e23d3183d0e0c63e8b97ec0790a1 Mon Sep 17 00:00:00 2001
From: Jonas Devlieghere 
Date: Mon, 3 Feb 2025 15:05:19 -0800
Subject: [PATCH 2/2] [CMake] Fix typo in docstring: telemtry -> telemetry
 (NFC)

Thanks Nikita for spotting it.

(cherry picked from commit 13ded6829bf7ca793795c50d47dd2b95482e5cfa)
---
 llvm/CMakeLists.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt
index d1b4c2700ce8ef7..f5293e8663243bc 100644
--- a/llvm/CMakeLists.txt
+++ b/llvm/CMakeLists.txt
@@ -829,7 +829,7 @@ option (LLVM_ENABLE_DOXYGEN "Use doxygen to generate llvm 
API documentation." OF
 option (LLVM_ENABLE_SPHINX "Use Sphinx to generate llvm documentation." OFF)
 option (LLVM_ENABLE_OCAMLDOC "Build OCaml bindings documentation." ON)
 option (LLVM_ENABLE_BINDINGS "Build bindings." ON)
-option (LLVM_BUILD_TELEMETRY "Build the telemtry library. This does not enable 
telemetry." ON)
+option (LLVM_BUILD_TELEMETRY "Build the telemetry library. This does not 
enable telemetry." ON)
 
 set(LLVM_INSTALL_DOXYGEN_HTML_DIR "${CMAKE_INSTALL_DOCDIR}/llvm/doxygen-html"
 CACHE STRING "Doxygen-generated HTML documentation install directory")

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[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)

[Tom Eccles via llvm-branch-commits]

@@ -1730,6 +1730,126 @@ buildDependData(std::optional dependKinds, 
OperandRange dependVars,
   }
 }
 
+static bool privatizerReadsSourceVariable(omp::PrivateClauseOp &priv) {
+  if (priv.getDataSharingType() == omp::DataSharingClauseType::FirstPrivate)
+return true;
+
+  Region &initRegion = priv.getInitRegion();
+  if (initRegion.empty())
+return false;
+
+  BlockArgument sourceVariable = priv.getInitMoldArg();
+  if (!sourceVariable)
+return false;
+  return !sourceVariable.use_empty();
+}
+
+namespace {
+/// TaskContextStructManager takes care of creating and freeing a structure
+/// containing information needed by the task body to execute.
+class TaskContextStructManager {
+public:
+  TaskContextStructManager(llvm::IRBuilderBase &builder,
+   LLVM::ModuleTranslation &moduleTranslation,
+   MutableArrayRef privateDecls)
+  : builder{builder}, moduleTranslation{moduleTranslation},
+privateDecls{privateDecls} {}
+
+  /// Creates a heap allocated struct containing space for each private
+  /// variable. Returns nullptr if there are is no struct needed. Invariant:
+  /// privateVarTypes, privateDecls, and the elements of the structure should
+  /// all have the same order (although privateDecls which do not read from the
+  /// mold argument are skipped).
+  void generateTaskContextStruct();
+
+  /// Create GEPs to access each member of the structure representing a private
+  /// variable, adding them to llvmPrivateVars. Null values are added where
+  /// private decls were skipped so that the ordering continues to match the
+  /// private decls.
+  void createGEPsToPrivateVars(SmallVectorImpl 
&llvmPrivateVars);
+
+  /// De-allocate the task context structure.
+  void freeStructPtr();
+
+  llvm::Value *getStructPtr() { return structPtr; }
+
+private:
+  llvm::IRBuilderBase &builder;
+  LLVM::ModuleTranslation &moduleTranslation;
+  MutableArrayRef privateDecls;

tblah wrote:

I agree it should be, but unfortunately the table-gen accessors (e.g. 
`getRegions()`, `getCopyRegion()`) for the mlir operation aren't marked 
`const`. This makes sense because the region can be mutated through this 
reference, but it is a shame there aren't any `const` alternatives.

The non-const regions means that `getInitMoldArg()` etc cannot be `const`.

https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [mlir] [AMDGPU][MLIR] Replace gfx940 and gfx941 with gfx942 in MLIR (PR #125836)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-mlir-amdgpu

Author: Fabian Ritter (ritter-x2a)


Changes

gfx940 and gfx941 are no longer supported. This is one of a series of
PRs to remove them from the code base.

For SWDEV-512631

---
Full diff: https://github.com/llvm/llvm-project/pull/125836.diff


10 Files Affected:

- (modified) mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td (+1-1) 
- (modified) mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td (+4-4) 
- (modified) mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp (+11-11) 
- (modified) mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp (+1-1) 
- (modified) mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp (+1-7) 
- (modified) mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats.mlir (+1-1) 
- (modified) mlir/test/Conversion/AMDGPUToROCDL/mfma.mlir (+1-1) 
- (modified) mlir/test/Conversion/ArithToAMDGPU/8-bit-float-saturation.mlir 
(+1-1) 
- (modified) mlir/test/Conversion/ArithToAMDGPU/8-bit-floats.mlir (+1-1) 
- (modified) mlir/unittests/Dialect/AMDGPU/AMDGPUUtilsTest.cpp (+8-12) 


``diff
diff --git a/mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td 
b/mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
index 69745addfd748ec..24f541587cba88a 100644
--- a/mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
+++ b/mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
@@ -602,7 +602,7 @@ def AMDGPU_MFMAOp :
 order (that is, v[0] will go to arg[7:0], v[1] to arg[15:8] and so on).
 
 The negateA, negateB, and negateC flags are only supported for 
double-precision
-operations on gfx940+.
+operations on gfx942+.
   }];
   let assemblyFormat = [{
 $sourceA `*` $sourceB `+` $destC
diff --git a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td 
b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
index 974712c581537a9..8b4f7e49f573d68 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
@@ -382,11 +382,11 @@ def ROCDL_mfma_f32_16x16x4bf16_1k : 
ROCDL_Mfma_IntrOp<"mfma.f32.16x16x4bf16.1k">
 def ROCDL_mfma_f32_4x4x4bf16_1k : ROCDL_Mfma_IntrOp<"mfma.f32.4x4x4bf16.1k">;
 def ROCDL_mfma_f32_32x32x8bf16_1k : 
ROCDL_Mfma_IntrOp<"mfma.f32.32x32x8bf16.1k">;
 def ROCDL_mfma_f32_16x16x16bf16_1k : 
ROCDL_Mfma_IntrOp<"mfma.f32.16x16x16bf16.1k">;
-// Note: in gfx940, unlike in gfx90a, the f64 xdlops use the "blgp" argument 
as a
-// NEG bitfield. See IntrinsicsAMDGPU.td for more info.
+// Note: in gfx942, unlike in gfx90a, the f64 xdlops use the "blgp" argument as
+// a NEG bitfield. See IntrinsicsAMDGPU.td for more info.
 def ROCDL_mfma_f64_16x16x4f64 : ROCDL_Mfma_IntrOp<"mfma.f64.16x16x4f64">;
 def ROCDL_mfma_f64_4x4x4f64 : ROCDL_Mfma_IntrOp<"mfma.f64.4x4x4f64">;
-// New in gfx940.
+// New in gfx942.
 def ROCDL_mfma_i32_16x16x32_i8 : ROCDL_Mfma_IntrOp<"mfma.i32.16x16x32.i8">;
 def ROCDL_mfma_i32_32x32x16_i8 : ROCDL_Mfma_IntrOp<"mfma.i32.32x32x16.i8">;
 def ROCDL_mfma_f32_16x16x8_xf32 : ROCDL_Mfma_IntrOp<"mfma.f32.16x16x8.xf32">;
@@ -409,7 +409,7 @@ def ROCDL_mfma_f32_32x32x16_f16 : 
ROCDL_Mfma_IntrOp<"mfma.f32.32x32x16.f16">;
 def ROCDL_mfma_scale_f32_16x16x128_f8f6f4 : 
ROCDL_Mfma_OO_IntrOp<"mfma.scale.f32.16x16x128.f8f6f4", [0,1]>;
 def ROCDL_mfma_scale_f32_32x32x64_f8f6f4 : 
ROCDL_Mfma_OO_IntrOp<"mfma.scale.f32.32x32x64.f8f6f4", [0,1]>;
 
-// 2:4 Sparsity ops (GFX940)
+// 2:4 Sparsity ops (GFX942)
 def ROCDL_smfmac_f32_16x16x32_f16 : 
ROCDL_Mfma_IntrOp<"smfmac.f32.16x16x32.f16">;
 def ROCDL_smfmac_f32_32x32x16_f16 : 
ROCDL_Mfma_IntrOp<"smfmac.f32.32x32x16.f16">;
 def ROCDL_smfmac_f32_16x16x32_bf16 : 
ROCDL_Mfma_IntrOp<"smfmac.f32.16x16x32.bf16">;
diff --git a/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp 
b/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
index 51f5d7a161b9030..f67d174d7d7c9a6 100644
--- a/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+++ b/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
@@ -80,7 +80,7 @@ namespace {
 // Define commonly used chipsets versions for convenience.
 constexpr Chipset kGfx908 = Chipset(9, 0, 8);
 constexpr Chipset kGfx90a = Chipset(9, 0, 0xa);
-constexpr Chipset kGfx940 = Chipset(9, 4, 0);
+constexpr Chipset kGfx942 = Chipset(9, 4, 2);
 
 /// Define lowering patterns for raw buffer ops
 template 
@@ -483,7 +483,7 @@ static std::optional mfmaOpToIntrinsic(MFMAOp 
mfma,
 destElem = destType.getElementType();
 
   if (sourceElem.isF32() && destElem.isF32()) {
-if (mfma.getReducePrecision() && chipset >= kGfx940) {
+if (mfma.getReducePrecision() && chipset >= kGfx942) {
   if (m == 32 && n == 32 && k == 4 && b == 1)
 return ROCDL::mfma_f32_32x32x4_xf32::getOperationName();
   if (m == 16 && n == 16 && k == 8 && b == 1)
@@ -551,9 +551,9 @@ static std::optional mfmaOpToIntrinsic(MFMAOp 
mfma,
   return ROCDL::mfma_i32_32x32x8i8::getOperationName();
 if (m == 16 && n == 16 && k == 16 && b == 1)
   return ROCDL::mfma_i32_16x16x16i8::getOperationName();
-if (m == 32 && n == 32 && k == 16 && b == 1 && chipset >= kGfx940)
+if (m

[llvm-branch-commits] [flang] [mlir] release/20.x: Fixes for flang/mlir dependencies (PR #125837)

[Nikita Popov via llvm-branch-commits]

https://github.com/nikic milestoned 
https://github.com/llvm/llvm-project/pull/125837
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[llvm-branch-commits] [flang] [mlir] release/20.x: Fixes for flang/mlir dependencies (PR #125837)

[Nikita Popov via llvm-branch-commits]

https://github.com/nikic edited https://github.com/llvm/llvm-project/pull/125837
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[llvm-branch-commits] [flang] [mlir] release/20.x: Fixes for flang/mlir dependencies (PR #125837)

[Michał Górny via llvm-branch-commits]

https://github.com/mgorny approved this pull request.


https://github.com/llvm/llvm-project/pull/125837
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[llvm-branch-commits] [llvm] [AVR] Backport #118015 and #121498 (PR #125081)

[Patryk Wychowaniec via llvm-branch-commits]

Patryk27 wrote:

Alright, backported!

I changed the logic from `emit relocations only for large jumps` to `emit 
relocations always`, which - pleasantly enough - means we don't have to 
backport #118015 per se (since linker is able to do this magic-wrapping-thingie 
 on its own).

As for testing, I compiled rustc with these changes and ran 
https://github.com/Patryk27/avr-tester's testsuite - all's green.

cc @benshi001 

https://github.com/llvm/llvm-project/pull/125081
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[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Implement Parsing of Descriptor Tables (PR #122982)

[Finn Plummer via llvm-branch-commits]

https://github.com/inbelic updated 
https://github.com/llvm/llvm-project/pull/122982

>From 5ed5fcfebb395cdfe45dc41094e07716d2003d66 Mon Sep 17 00:00:00 2001
From: Finn Plummer 
Date: Tue, 28 Jan 2025 17:49:21 +
Subject: [PATCH 01/18] [HLSL][RootSignature] Handle an empty root signature

- Define the Parser struct
- Model RootElements as a variant of the different types
- Create a basic test case for unit testing
---
 .../clang/Parse/ParseHLSLRootSignature.h  | 26 
 clang/lib/Parse/ParseHLSLRootSignature.cpp| 19 
 .../Parse/ParseHLSLRootSignatureTest.cpp  | 26 
 .../llvm/Frontend/HLSL/HLSLRootSignature.h| 30 +++
 4 files changed, 101 insertions(+)
 create mode 100644 llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h

diff --git a/clang/include/clang/Parse/ParseHLSLRootSignature.h 
b/clang/include/clang/Parse/ParseHLSLRootSignature.h
index 899608bd1527ea..2e01f86f832f76 100644
--- a/clang/include/clang/Parse/ParseHLSLRootSignature.h
+++ b/clang/include/clang/Parse/ParseHLSLRootSignature.h
@@ -22,9 +22,13 @@
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/StringSwitch.h"
 
+#include "llvm/Frontend/HLSL/HLSLRootSignature.h"
+
 namespace clang {
 namespace hlsl {
 
+namespace rs = llvm::hlsl::root_signature;
+
 struct RootSignatureToken {
   enum Kind {
 #define TOK(X) X,
@@ -80,6 +84,28 @@ class RootSignatureLexer {
   }
 };
 
+class RootSignatureParser {
+public:
+  RootSignatureParser(SmallVector &Elements,
+  const SmallVector &Tokens,
+  DiagnosticsEngine &Diags);
+
+  // Iterates over the provided tokens and constructs the in-memory
+  // representations of the RootElements.
+  //
+  // The return value denotes if there was a failure and the method will
+  // return on the first encountered failure, or, return false if it
+  // can sucessfully reach the end of the tokens.
+  bool Parse();
+
+private:
+  SmallVector &Elements;
+  SmallVector::const_iterator CurTok;
+  SmallVector::const_iterator LastTok;
+
+  DiagnosticsEngine &Diags;
+};
+
 } // namespace hlsl
 } // namespace clang
 
diff --git a/clang/lib/Parse/ParseHLSLRootSignature.cpp 
b/clang/lib/Parse/ParseHLSLRootSignature.cpp
index 7ceb85a47a088e..2ba756f3bd09f2 100644
--- a/clang/lib/Parse/ParseHLSLRootSignature.cpp
+++ b/clang/lib/Parse/ParseHLSLRootSignature.cpp
@@ -1,5 +1,7 @@
 #include "clang/Parse/ParseHLSLRootSignature.h"
 
+using namespace llvm::hlsl::root_signature;
+
 namespace clang {
 namespace hlsl {
 
@@ -169,5 +171,22 @@ bool RootSignatureLexer::LexToken(RootSignatureToken 
&Result) {
   return false;
 }
 
+// Parser Definitions
+
+RootSignatureParser::RootSignatureParser(
+SmallVector &Elements,
+const SmallVector &Tokens, DiagnosticsEngine &Diags)
+: Elements(Elements), Diags(Diags) {
+  CurTok = Tokens.begin();
+  LastTok = Tokens.end();
+}
+
+bool RootSignatureParser::Parse() {
+  // Handle edge-case of empty RootSignature()
+  if (CurTok == LastTok)
+return false;
+
+  return true;
+}
 } // namespace hlsl
 } // namespace clang
diff --git a/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp 
b/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
index 57b61e43746a0b..87bceeeb3283ef 100644
--- a/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
+++ b/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
@@ -24,6 +24,7 @@
 #include "gtest/gtest.h"
 
 using namespace clang;
+using namespace llvm::hlsl::root_signature;
 
 namespace {
 
@@ -279,4 +280,29 @@ TEST_F(ParseHLSLRootSignatureTest, 
InvalidLexIdentifierTest) {
   ASSERT_TRUE(Consumer->IsSatisfied());
 }
 
+// Valid Parser Tests
+
+TEST_F(ParseHLSLRootSignatureTest, ValidParseEmptyTest) {
+  const llvm::StringLiteral Source = R"cc()cc";
+
+  TrivialModuleLoader ModLoader;
+  auto PP = CreatePP(Source, ModLoader);
+  auto TokLoc = SourceLocation();
+
+  // Test no diagnostics produced
+  Consumer->SetNoDiag();
+  hlsl::RootSignatureLexer Lexer(Source, TokLoc, *PP);
+
+  SmallVector Tokens;
+  ASSERT_FALSE(Lexer.Lex(Tokens));
+
+  SmallVector Elements;
+  hlsl::RootSignatureParser Parser(Elements, Tokens, Diags);
+
+  ASSERT_FALSE(Parser.Parse());
+  ASSERT_EQ((int)Elements.size(), 0);
+
+  ASSERT_TRUE(Consumer->IsSatisfied());
+}
+
 } // anonymous namespace
diff --git a/llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h 
b/llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
new file mode 100644
index 00..4c196d29a01bbb
--- /dev/null
+++ b/llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
@@ -0,0 +1,30 @@
+//===- HLSLRootSignature.h - HLSL Root Signature helper objects 
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+///
+/// \file This file contains helpe

[llvm-branch-commits] [clang] [llvm] [llvm] Introduce type id operand bundle (PR #87573)

[Paul Kirth via llvm-branch-commits]

ilovepi wrote:

I'd hazard that "correctness" here depends on if you mean the "correctness of 
the compiled code`"or the "correctness of the call graph section". The lang ref 
for operand bundle states that "dropping them is incorrect and will change 
program semantics". It goes on to say  that "Operand bundles are a generic 
mechanism intended to support runtime-introspection-like functionality...", 
which is pretty close to the use (it isn't for a "runtime" exactly but is 
introspecting on what can happen at runtime).  So, I'd say its a bit of a grey 
area here if using the Operand Bundle is or isn't appropriate. On the one hand, 
dripping such metadata wouldn't cause miscompilation, but on the other hand, 
the call graph section would likely be incorrect. From what I can tell, The 
call graph section isn't going to gracefully fall back to a conservative 
approximation of all possible callees.


TBH, I'm not sure if its best to continue to use operand bundle, extend the 
`!type` metadata the way @nikic described, or  if we should have a new metadata 
that contains a list of `!types` and handles the merging. 

https://github.com/llvm/llvm-project/pull/87573
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[llvm-branch-commits] [llvm] PeepholeOpt: Fix looking for def of current copy to coalesce (PR #125533)

[Matt Arsenault via llvm-branch-commits]

arsenm wrote:

### Merge activity

* **Feb 5, 11:06 AM EST**: A user started a stack merge that includes this pull 
request via 
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/125533).


https://github.com/llvm/llvm-project/pull/125533
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[llvm-branch-commits] [llvm] AMDGPU: Add baseline test for treating v_pk_mov_b32 like reg_sequence (PR #125656)

[Matt Arsenault via llvm-branch-commits]

https://github.com/arsenm updated 
https://github.com/llvm/llvm-project/pull/125656

>From d538f041287d011d6260a030567e7ded7524e2ab Mon Sep 17 00:00:00 2001
From: Matt Arsenault 
Date: Tue, 4 Feb 2025 14:16:32 +0700
Subject: [PATCH] AMDGPU: Add baseline test for treating v_pk_mov_b32 like
 reg_sequence

---
 .../AMDGPU/reg-sequence-like-v-pk-mov-b32.mir | 413 ++
 1 file changed, 413 insertions(+)
 create mode 100644 llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir

diff --git a/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir 
b/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
new file mode 100644
index 000..90291221e8e178a
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
@@ -0,0 +1,413 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 
UTC_ARGS: --version 5
+# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=peephole-opt -o - %s | 
FileCheck %s
+
+---
+name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_1_0
+tracksRegLiveness: true
+body: |
+  bb.0:
+liveins: $vgpr0, $vgpr1
+
+; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_1_0
+; CHECK: liveins: $vgpr0, $vgpr1
+; CHECK-NEXT: {{  $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE 
[[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
+; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, 
[[REG_SEQUENCE]], 8, [[REG_SEQUENCE]], 0, 0, 0, 0, 0, implicit $exec
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0
+; CHECK-NEXT: $vgpr4 = COPY [[COPY2]]
+; CHECK-NEXT: $vgpr5 = COPY [[COPY3]]
+; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+%0:vgpr_32 = COPY $vgpr0
+%1:vgpr_32 = COPY $vgpr1
+%2:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
+%3:vreg_64_align2 = V_PK_MOV_B32 12, %2, 8, %2, 0, 0, 0, 0, 0, implicit 
$exec
+%4:vgpr_32 = COPY %3.sub1
+%5:vgpr_32 = COPY %3.sub0
+$vgpr4 = COPY %4
+$vgpr5 = COPY %5
+S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+
+...
+
+---
+name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0
+tracksRegLiveness: true
+body: |
+  bb.0:
+liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+
+; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0
+; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+; CHECK-NEXT: {{  $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3
+; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE 
[[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
+; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE 
[[COPY2]], %subreg.sub0, [[COPY3]], %subreg.sub1
+; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, 
[[REG_SEQUENCE]], 8, [[REG_SEQUENCE1]], 0, 0, 0, 0, 0, implicit $exec
+; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1
+; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0
+; CHECK-NEXT: $vgpr4 = COPY [[COPY4]]
+; CHECK-NEXT: $vgpr5 = COPY [[COPY5]]
+; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+%0:vgpr_32 = COPY $vgpr0
+%1:vgpr_32 = COPY $vgpr1
+%2:vgpr_32 = COPY $vgpr2
+%3:vgpr_32 = COPY $vgpr3
+%4:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
+%5:vreg_64_align2 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1
+%6:vreg_64_align2 = V_PK_MOV_B32 12, %4, 8, %5, 0, 0, 0, 0, 0, implicit 
$exec
+%7:vgpr_32 = COPY %6.sub1
+%8:vgpr_32 = COPY %6.sub0
+$vgpr4 = COPY %7
+$vgpr5 = COPY %8
+S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+
+...
+
+---
+name: v_pk_mov_b32__reg_sequence_shuffle_sgpr_sgpr_1_0
+tracksRegLiveness: true
+body: |
+  bb.0:
+liveins: $sgpr8, $sgpr9
+
+; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_sgpr_sgpr_1_0
+; CHECK: liveins: $sgpr8, $sgpr9
+; CHECK-NEXT: {{  $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr8
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr9
+; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], 
%subreg.sub0, [[COPY1]], %subreg.sub1
+; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, 
[[REG_SEQUENCE]], 8, [[REG_SEQUENCE]], 0, 0, 0, 0, 0, implicit $exec
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0
+; CHECK-NEXT: $vgpr4 = COPY [[COPY2]]
+; CHECK-NEXT: $vgpr5 = 

[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)

[Tom Eccles via llvm-branch-commits]

@@ -1730,6 +1730,126 @@ buildDependData(std::optional dependKinds, 
OperandRange dependVars,
   }
 }
 
+static bool privatizerReadsSourceVariable(omp::PrivateClauseOp &priv) {
+  if (priv.getDataSharingType() == omp::DataSharingClauseType::FirstPrivate)
+return true;
+
+  Region &initRegion = priv.getInitRegion();
+  if (initRegion.empty())
+return false;
+
+  BlockArgument sourceVariable = priv.getInitMoldArg();
+  if (!sourceVariable)
+return false;
+  return !sourceVariable.use_empty();
+}
+
+namespace {
+/// TaskContextStructManager takes care of creating and freeing a structure
+/// containing information needed by the task body to execute.
+class TaskContextStructManager {
+public:
+  TaskContextStructManager(llvm::IRBuilderBase &builder,
+   LLVM::ModuleTranslation &moduleTranslation,
+   MutableArrayRef privateDecls)
+  : builder{builder}, moduleTranslation{moduleTranslation},
+privateDecls{privateDecls} {}
+
+  /// Creates a heap allocated struct containing space for each private
+  /// variable. Returns nullptr if there are is no struct needed. Invariant:
+  /// privateVarTypes, privateDecls, and the elements of the structure should
+  /// all have the same order (although privateDecls which do not read from the
+  /// mold argument are skipped).
+  void generateTaskContextStruct();

tblah wrote:

Would you mind me leaving it as it is? Personally I find it easier to 
understand with it being more explicit what happens when. Especially because 
this does create operations.

https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [flang] [libc] [libclc] [llvm] [AMDGPU] Replace gfx940 and gfx941 with gfx942 in offload and libclc (PR #125826)

[Fabian Ritter via llvm-branch-commits]

ritter-x2a wrote:

> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is 
> open. Once all requirements are satisfied, merge this PR as a stack  href="https://app.graphite.dev/github/pr/llvm/llvm-project/125826?utm_source=stack-comment-downstack-mergeability-warning";
>  >on Graphite.
> https://graphite.dev/docs/merge-pull-requests";>Learn more

* **#125827** https://app.graphite.dev/github/pr/llvm/llvm-project/125827?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/>
* **#125826** https://app.graphite.dev/github/pr/llvm/llvm-project/125826?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/125826?utm_source=stack-comment-view-in-graphite";
 target="_blank">(View in Graphite)
* **#125711** https://app.graphite.dev/github/pr/llvm/llvm-project/125711?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/>
* `main`




This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn 
more about https://stacking.dev/?utm_source=stack-comment";>stacking.


https://github.com/llvm/llvm-project/pull/125826
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[llvm-branch-commits] [flang] [AMDGPU] Add missing gfx architectures to AddFlangOffloadRuntime.cmake (PR #125827)

[Fabian Ritter via llvm-branch-commits]

https://github.com/ritter-x2a created 
https://github.com/llvm/llvm-project/pull/125827

None

>From 97f4e5ae4fa91cab86350658d214408ed34cb15c Mon Sep 17 00:00:00 2001
From: Fabian Ritter 
Date: Wed, 5 Feb 2025 04:45:26 -0500
Subject: [PATCH] [AMDGPU] Add missing gfx architectures to
 AddFlangOffloadRuntime.cmake

---
 flang/cmake/modules/AddFlangOffloadRuntime.cmake | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/flang/cmake/modules/AddFlangOffloadRuntime.cmake 
b/flang/cmake/modules/AddFlangOffloadRuntime.cmake
index f1f6eb57c5d6cf..eb0e964559ed56 100644
--- a/flang/cmake/modules/AddFlangOffloadRuntime.cmake
+++ b/flang/cmake/modules/AddFlangOffloadRuntime.cmake
@@ -98,10 +98,10 @@ macro(enable_omp_offload_compilation files)
 
   set(all_amdgpu_architectures
 "gfx700;gfx701;gfx801;gfx803;gfx900;gfx902;gfx906"
-"gfx908;gfx90a;gfx90c;gfx942;gfx1010;gfx1030"
+"gfx908;gfx90a;gfx90c;gfx942;gfx950;gfx1010;gfx1030"
 "gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
 "gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151"
-"gfx1152;gfx1153"
+"gfx1152;gfx1153;gfx1200;gfx1201"
 )
   set(all_nvptx_architectures
 "sm_35;sm_37;sm_50;sm_52;sm_53;sm_60;sm_61;sm_62"

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[llvm-branch-commits] [flang] [libc] [libclc] [llvm] [AMDGPU] Replace gfx940 and gfx941 with gfx942 in offload and libclc (PR #125826)

[Fabian Ritter via llvm-branch-commits]

https://github.com/ritter-x2a created 
https://github.com/llvm/llvm-project/pull/125826

gfx940 and gfx941 are no longer supported. This is one of a series of
PRs to remove them from the code base.

For SWDEV-512631 and SWDEV-512633

>From 35a6625af25aefb4982abd14fa75e9d2c1bcc3d0 Mon Sep 17 00:00:00 2001
From: Fabian Ritter 
Date: Wed, 5 Feb 2025 04:19:00 -0500
Subject: [PATCH] [AMDGPU] Replace gfx940 and gfx941 with gfx942 in offload and
 libclc

gfx940 and gfx941 are no longer supported. This is one of a series of
PRs to remove them from the code base.

For SWDEV-512631 and SWDEV-512633
---
 flang/cmake/modules/AddFlangOffloadRuntime.cmake | 2 +-
 libc/docs/gpu/using.rst  | 2 +-
 libclc/CMakeLists.txt| 2 +-
 offload/plugins-nextgen/amdgpu/src/rtl.cpp   | 6 --
 offload/test/lit.cfg | 4 +---
 5 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/flang/cmake/modules/AddFlangOffloadRuntime.cmake 
b/flang/cmake/modules/AddFlangOffloadRuntime.cmake
index 8e4f47d18535dcb..f1f6eb57c5d6cf3 100644
--- a/flang/cmake/modules/AddFlangOffloadRuntime.cmake
+++ b/flang/cmake/modules/AddFlangOffloadRuntime.cmake
@@ -98,7 +98,7 @@ macro(enable_omp_offload_compilation files)
 
   set(all_amdgpu_architectures
 "gfx700;gfx701;gfx801;gfx803;gfx900;gfx902;gfx906"
-"gfx908;gfx90a;gfx90c;gfx940;gfx1010;gfx1030"
+"gfx908;gfx90a;gfx90c;gfx942;gfx1010;gfx1030"
 "gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
 "gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151"
 "gfx1152;gfx1153"
diff --git a/libc/docs/gpu/using.rst b/libc/docs/gpu/using.rst
index 1c1f9c9bfb0c696..f17f6287be31349 100644
--- a/libc/docs/gpu/using.rst
+++ b/libc/docs/gpu/using.rst
@@ -44,7 +44,7 @@ this shouldn't be necessary.
 
   $> clang openmp.c -fopenmp --offload-arch=gfx90a -Xoffload-linker -lc
   $> clang cuda.cu --offload-arch=sm_80 --offload-new-driver -fgpu-rdc 
-Xoffload-linker -lc
-  $> clang hip.hip --offload-arch=gfx940 --offload-new-driver -fgpu-rdc 
-Xoffload-linker -lc
+  $> clang hip.hip --offload-arch=gfx942 --offload-new-driver -fgpu-rdc 
-Xoffload-linker -lc
 
 This will automatically link in the needed function definitions if they were
 required by the user's application. Normally using the ``-fgpu-rdc`` option
diff --git a/libclc/CMakeLists.txt b/libclc/CMakeLists.txt
index ff52153354e0a9c..010f14da9f7e788 100644
--- a/libclc/CMakeLists.txt
+++ b/libclc/CMakeLists.txt
@@ -215,7 +215,7 @@ set( cayman_aliases aruba )
 set( tahiti_aliases pitcairn verde oland hainan bonaire kabini kaveri hawaii
   mullins tonga tongapro iceland carrizo fiji stoney polaris10 polaris11
   gfx602 gfx705 gfx805
-  gfx900 gfx902 gfx904 gfx906 gfx908 gfx909 gfx90a gfx90c gfx940 gfx941 gfx942
+  gfx900 gfx902 gfx904 gfx906 gfx908 gfx909 gfx90a gfx90c gfx942
   gfx1010 gfx1011 gfx1012 gfx1013
   gfx1030 gfx1031 gfx1032 gfx1033 gfx1034 gfx1035 gfx1036
   gfx1100 gfx1101 gfx1102 gfx1103
diff --git a/offload/plugins-nextgen/amdgpu/src/rtl.cpp 
b/offload/plugins-nextgen/amdgpu/src/rtl.cpp
index 92184ba796dbd83..e83d38a14f77f67 100644
--- a/offload/plugins-nextgen/amdgpu/src/rtl.cpp
+++ b/offload/plugins-nextgen/amdgpu/src/rtl.cpp
@@ -2854,12 +2854,6 @@ struct AMDGPUDeviceTy : public GenericDeviceTy, 
AMDGenericDeviceTy {
   Error checkIfAPU() {
 // TODO: replace with ROCr API once it becomes available.
 llvm::StringRef StrGfxName(ComputeUnitKind);
-IsAPU = llvm::StringSwitch(StrGfxName)
-.Case("gfx940", true)
-.Default(false);
-if (IsAPU)
-  return Plugin::success();
-
 bool MayBeAPU = llvm::StringSwitch(StrGfxName)
 .Case("gfx942", true)
 .Default(false);
diff --git a/offload/test/lit.cfg b/offload/test/lit.cfg
index 658ae5f9653ba90..fe28418d9c1b1a3 100644
--- a/offload/test/lit.cfg
+++ b/offload/test/lit.cfg
@@ -132,12 +132,10 @@ elif 
config.libomptarget_current_target.startswith('amdgcn'):
 # amdgpu_test_arch contains a list of AMD GPUs in the system
 # only check the first one assuming that we will run the test on it.
 if not (config.amdgpu_test_arch.startswith("gfx90a") or
-config.amdgpu_test_arch.startswith("gfx940") or
 config.amdgpu_test_arch.startswith("gfx942")):
supports_unified_shared_memory = False
 # check if AMD architecture is an APU:
-if (config.amdgpu_test_arch.startswith("gfx940") or
-(config.amdgpu_test_arch.startswith("gfx942") and
+if ((config.amdgpu_test_arch.startswith("gfx942") and
  evaluate_bool_env(config.environment['IS_APU']))):
supports_apu = True
 if supports_unified_shared_memory:

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[llvm-branch-commits] [flang] [AMDGPU] Add missing gfx architectures to AddFlangOffloadRuntime.cmake (PR #125827)

[Fabian Ritter via llvm-branch-commits]

ritter-x2a wrote:

> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is 
> open. Once all requirements are satisfied, merge this PR as a stack  href="https://app.graphite.dev/github/pr/llvm/llvm-project/125827?utm_source=stack-comment-downstack-mergeability-warning";
>  >on Graphite.
> https://graphite.dev/docs/merge-pull-requests";>Learn more

* **#125827** https://app.graphite.dev/github/pr/llvm/llvm-project/125827?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
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* `main`




This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn 
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[llvm-branch-commits] [flang] [libc] [libclc] [llvm] [AMDGPU] Replace gfx940 and gfx941 with gfx942 in offload and libclc (PR #125826)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-backend-amdgpu

Author: Fabian Ritter (ritter-x2a)


Changes

gfx940 and gfx941 are no longer supported. This is one of a series of
PRs to remove them from the code base.

For SWDEV-512631 and SWDEV-512633

---
Full diff: https://github.com/llvm/llvm-project/pull/125826.diff


5 Files Affected:

- (modified) flang/cmake/modules/AddFlangOffloadRuntime.cmake (+1-1) 
- (modified) libc/docs/gpu/using.rst (+1-1) 
- (modified) libclc/CMakeLists.txt (+1-1) 
- (modified) offload/plugins-nextgen/amdgpu/src/rtl.cpp (-6) 
- (modified) offload/test/lit.cfg (+1-3) 


``diff
diff --git a/flang/cmake/modules/AddFlangOffloadRuntime.cmake 
b/flang/cmake/modules/AddFlangOffloadRuntime.cmake
index 8e4f47d18535dcb..f1f6eb57c5d6cf3 100644
--- a/flang/cmake/modules/AddFlangOffloadRuntime.cmake
+++ b/flang/cmake/modules/AddFlangOffloadRuntime.cmake
@@ -98,7 +98,7 @@ macro(enable_omp_offload_compilation files)
 
   set(all_amdgpu_architectures
 "gfx700;gfx701;gfx801;gfx803;gfx900;gfx902;gfx906"
-"gfx908;gfx90a;gfx90c;gfx940;gfx1010;gfx1030"
+"gfx908;gfx90a;gfx90c;gfx942;gfx1010;gfx1030"
 "gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
 "gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151"
 "gfx1152;gfx1153"
diff --git a/libc/docs/gpu/using.rst b/libc/docs/gpu/using.rst
index 1c1f9c9bfb0c696..f17f6287be31349 100644
--- a/libc/docs/gpu/using.rst
+++ b/libc/docs/gpu/using.rst
@@ -44,7 +44,7 @@ this shouldn't be necessary.
 
   $> clang openmp.c -fopenmp --offload-arch=gfx90a -Xoffload-linker -lc
   $> clang cuda.cu --offload-arch=sm_80 --offload-new-driver -fgpu-rdc 
-Xoffload-linker -lc
-  $> clang hip.hip --offload-arch=gfx940 --offload-new-driver -fgpu-rdc 
-Xoffload-linker -lc
+  $> clang hip.hip --offload-arch=gfx942 --offload-new-driver -fgpu-rdc 
-Xoffload-linker -lc
 
 This will automatically link in the needed function definitions if they were
 required by the user's application. Normally using the ``-fgpu-rdc`` option
diff --git a/libclc/CMakeLists.txt b/libclc/CMakeLists.txt
index ff52153354e0a9c..010f14da9f7e788 100644
--- a/libclc/CMakeLists.txt
+++ b/libclc/CMakeLists.txt
@@ -215,7 +215,7 @@ set( cayman_aliases aruba )
 set( tahiti_aliases pitcairn verde oland hainan bonaire kabini kaveri hawaii
   mullins tonga tongapro iceland carrizo fiji stoney polaris10 polaris11
   gfx602 gfx705 gfx805
-  gfx900 gfx902 gfx904 gfx906 gfx908 gfx909 gfx90a gfx90c gfx940 gfx941 gfx942
+  gfx900 gfx902 gfx904 gfx906 gfx908 gfx909 gfx90a gfx90c gfx942
   gfx1010 gfx1011 gfx1012 gfx1013
   gfx1030 gfx1031 gfx1032 gfx1033 gfx1034 gfx1035 gfx1036
   gfx1100 gfx1101 gfx1102 gfx1103
diff --git a/offload/plugins-nextgen/amdgpu/src/rtl.cpp 
b/offload/plugins-nextgen/amdgpu/src/rtl.cpp
index 92184ba796dbd83..e83d38a14f77f67 100644
--- a/offload/plugins-nextgen/amdgpu/src/rtl.cpp
+++ b/offload/plugins-nextgen/amdgpu/src/rtl.cpp
@@ -2854,12 +2854,6 @@ struct AMDGPUDeviceTy : public GenericDeviceTy, 
AMDGenericDeviceTy {
   Error checkIfAPU() {
 // TODO: replace with ROCr API once it becomes available.
 llvm::StringRef StrGfxName(ComputeUnitKind);
-IsAPU = llvm::StringSwitch(StrGfxName)
-.Case("gfx940", true)
-.Default(false);
-if (IsAPU)
-  return Plugin::success();
-
 bool MayBeAPU = llvm::StringSwitch(StrGfxName)
 .Case("gfx942", true)
 .Default(false);
diff --git a/offload/test/lit.cfg b/offload/test/lit.cfg
index 658ae5f9653ba90..fe28418d9c1b1a3 100644
--- a/offload/test/lit.cfg
+++ b/offload/test/lit.cfg
@@ -132,12 +132,10 @@ elif 
config.libomptarget_current_target.startswith('amdgcn'):
 # amdgpu_test_arch contains a list of AMD GPUs in the system
 # only check the first one assuming that we will run the test on it.
 if not (config.amdgpu_test_arch.startswith("gfx90a") or
-config.amdgpu_test_arch.startswith("gfx940") or
 config.amdgpu_test_arch.startswith("gfx942")):
supports_unified_shared_memory = False
 # check if AMD architecture is an APU:
-if (config.amdgpu_test_arch.startswith("gfx940") or
-(config.amdgpu_test_arch.startswith("gfx942") and
+if ((config.amdgpu_test_arch.startswith("gfx942") and
  evaluate_bool_env(config.environment['IS_APU']))):
supports_apu = True
 if supports_unified_shared_memory:

``




https://github.com/llvm/llvm-project/pull/125826
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[llvm-branch-commits] [flang] [libc] [libclc] [llvm] [AMDGPU] Replace gfx940 and gfx941 with gfx942 in offload and libclc (PR #125826)

[Fabian Ritter via llvm-branch-commits]

https://github.com/ritter-x2a ready_for_review 
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[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)

[Tom Eccles via llvm-branch-commits]

@@ -1796,36 +1918,110 @@ convertOmpTaskOp(omp::TaskOp taskOp, 
llvm::IRBuilderBase &builder,
   // Allocate and initialize private variables
   // TODO: package private variables up in a structure
   builder.SetInsertPoint(initBlock->getTerminator());
-  for (auto [privDecl, mlirPrivVar, blockArg] :
-   llvm::zip_equal(privateDecls, mlirPrivateVars, privateBlockArgs)) {
-llvm::Type *llvmAllocType =
-moduleTranslation.convertType(privDecl.getType());
 
-// Allocations:
-builder.SetInsertPoint(allocaIP.getBlock()->getTerminator());
-llvm::Value *llvmPrivateVar = builder.CreateAlloca(
-llvmAllocType, /*ArraySize=*/nullptr, "omp.private.alloc");
+  // Create task variable structure
+  llvm::SmallVector privateVarAllocations;
+  taskStructMgr.generateTaskContextStruct();
+  // GEPs so that we can initialize the variables. Don't use these GEPs inside
+  // of the body otherwise it will be the GEP not the struct which is fowarded
+  // to the outlined function. GEPs forwarded in this way are passed in a
+  // stack-allocated (by OpenMPIRBuilder) structure which is not safe for tasks
+  // which may not be executed until after the current stack frame goes out of
+  // scope.
+  taskStructMgr.createGEPsToPrivateVars(privateVarAllocations);
+
+  for (auto [privDecl, mlirPrivVar, blockArg, llvmPrivateVarAlloc] :
+   llvm::zip_equal(privateDecls, mlirPrivateVars, privateBlockArgs,
+   privateVarAllocations)) {
+if (!llvmPrivateVarAlloc)
+  // to be handled inside the task
+  continue;
 
-// builder.SetInsertPoint(initBlock->getTerminator());
-auto err =
+llvm::Expected privateVarOrErr =
 initPrivateVar(builder, moduleTranslation, privDecl, mlirPrivVar,
-   blockArg, llvmPrivateVar, llvmPrivateVars, initBlock);
-if (err)
+   blockArg, llvmPrivateVarAlloc, initBlock);
+if (auto err = privateVarOrErr.takeError())
   return handleError(std::move(err), *taskOp.getOperation());
+
+llvm::IRBuilderBase::InsertPointGuard guard(builder);
+builder.SetInsertPoint(builder.GetInsertBlock()->getTerminator());

tblah wrote:

Yes. I create all of the block structure before doing anything else so that it 
is in a known state.

The builder's insertion point is set here 
https://github.com/llvm/llvm-project/blob/d6d50cd96025d1aa74cbdb7f5da604cf104d9afc/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp#L1920

Then `initPrivateVar` might create one or more blocks for the init region but 
these will always be terminated.

This line is needed exactly because the block is terminated. If new init blocks 
were created in `initPrivateVar`, the builder will currently have an insertion 
point pointing right after the terminator. We want to add any new instructions 
for the hack for character boxes before the terminator, which is what this line 
does (I don't like the naming of `SetInsertPoint` in this case: it should be 
`SetInsertPointBefore`).

https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)

[Tom Eccles via llvm-branch-commits]

https://github.com/tblah edited https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [flang] [AMDGPU] Add missing gfx architectures to AddFlangOffloadRuntime.cmake (PR #125827)

[Fabian Ritter via llvm-branch-commits]

https://github.com/ritter-x2a ready_for_review 
https://github.com/llvm/llvm-project/pull/125827
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[llvm-branch-commits] [llvm] [AArch64] Disallow vscale x 1 partial reductions (PR #125252)

[Sam Tebbs via llvm-branch-commits]

https://github.com/SamTebbs33 edited 
https://github.com/llvm/llvm-project/pull/125252
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[llvm-branch-commits] [llvm] [AArch64] Disallow vscale x 1 partial reductions (PR #125252)

[Sam Tebbs via llvm-branch-commits]

https://github.com/SamTebbs33 updated 
https://github.com/llvm/llvm-project/pull/125252

error: too big or took too long to generate
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[llvm-branch-commits] [llvm] [SPARC][IAS] Add support for `setsw` pseudoinstruction (PR #125150)

[via llvm-branch-commits]

https://github.com/koachan updated 
https://github.com/llvm/llvm-project/pull/125150

>From 259439304b31a8557db456d276a84849c7a37067 Mon Sep 17 00:00:00 2001
From: Koakuma 
Date: Mon, 3 Feb 2025 23:12:07 +0700
Subject: [PATCH] Incorporate feedback

Created using spr 1.3.4
---
 llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp 
b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index 879f2ed8849618..3e9fc31d7bfc22 100644
--- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -744,7 +744,7 @@ bool SparcAsmParser::expandSETSW(MCInst &Inst, SMLoc IDLoc,
   assert(MCRegOp.isReg());
   assert(MCValOp.isImm() || MCValOp.isExpr());
 
-  // the imm operand can be either an expression or an immediate.
+  // The imm operand can be either an expression or an immediate.
   bool IsImm = Inst.getOperand(1).isImm();
   int64_t ImmValue = IsImm ? MCValOp.getImm() : 0;
   const MCExpr *ValExpr = IsImm ? MCConstantExpr::create(ImmValue, 
getContext())
@@ -777,7 +777,7 @@ bool SparcAsmParser::expandSETSW(MCInst &Inst, SMLoc IDLoc,
 IsSmallImm ? ValExpr
: adjustPICRelocation(SparcMCExpr::VK_Sparc_LO, ValExpr);
 
-// orrd, %lo(val), rd
+// or rd, %lo(val), rd
 Instructions.push_back(MCInstBuilder(SP::ORri)
.addReg(MCRegOp.getReg())
.addReg(PrevReg.getReg())
@@ -790,7 +790,7 @@ bool SparcAsmParser::expandSETSW(MCInst &Inst, SMLoc IDLoc,
 
   // Large negative or non-immediate expressions would need an sra.
   if (!IsImm || ImmValue < 0) {
-// srard, %g0, rd
+// sra rd, %g0, rd
 Instructions.push_back(MCInstBuilder(SP::SRArr)
.addReg(MCRegOp.getReg())
.addReg(MCRegOp.getReg())

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[llvm-branch-commits] [llvm] [SPARC][IAS] Add support for `setsw` pseudoinstruction (PR #125150)

[via llvm-branch-commits]

https://github.com/koachan updated 
https://github.com/llvm/llvm-project/pull/125150

>From 259439304b31a8557db456d276a84849c7a37067 Mon Sep 17 00:00:00 2001
From: Koakuma 
Date: Mon, 3 Feb 2025 23:12:07 +0700
Subject: [PATCH] Incorporate feedback

Created using spr 1.3.4
---
 llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp 
b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index 879f2ed8849618..3e9fc31d7bfc22 100644
--- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -744,7 +744,7 @@ bool SparcAsmParser::expandSETSW(MCInst &Inst, SMLoc IDLoc,
   assert(MCRegOp.isReg());
   assert(MCValOp.isImm() || MCValOp.isExpr());
 
-  // the imm operand can be either an expression or an immediate.
+  // The imm operand can be either an expression or an immediate.
   bool IsImm = Inst.getOperand(1).isImm();
   int64_t ImmValue = IsImm ? MCValOp.getImm() : 0;
   const MCExpr *ValExpr = IsImm ? MCConstantExpr::create(ImmValue, 
getContext())
@@ -777,7 +777,7 @@ bool SparcAsmParser::expandSETSW(MCInst &Inst, SMLoc IDLoc,
 IsSmallImm ? ValExpr
: adjustPICRelocation(SparcMCExpr::VK_Sparc_LO, ValExpr);
 
-// orrd, %lo(val), rd
+// or rd, %lo(val), rd
 Instructions.push_back(MCInstBuilder(SP::ORri)
.addReg(MCRegOp.getReg())
.addReg(PrevReg.getReg())
@@ -790,7 +790,7 @@ bool SparcAsmParser::expandSETSW(MCInst &Inst, SMLoc IDLoc,
 
   // Large negative or non-immediate expressions would need an sra.
   if (!IsImm || ImmValue < 0) {
-// srard, %g0, rd
+// sra rd, %g0, rd
 Instructions.push_back(MCInstBuilder(SP::SRArr)
.addReg(MCRegOp.getReg())
.addReg(MCRegOp.getReg())

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[llvm-branch-commits] [flang] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)

[Tom Eccles via llvm-branch-commits]

https://github.com/tblah updated 
https://github.com/llvm/llvm-project/pull/125307

>From afa9026eefb6c9cd613ed021a92e159f93c3667c Mon Sep 17 00:00:00 2001
From: Tom Eccles 
Date: Fri, 24 Jan 2025 17:32:41 +
Subject: [PATCH 1/8] [mlir][OpenMP] Pack task private variables into a
 heap-allocated context struct

See RFC:
https://discourse.llvm.org/t/rfc-openmp-supporting-delayed-task-execution-with-firstprivate-variables/83084

The aim here is to ensure that tasks which are not executed for a while
after they are created do not try to reference any data which are now
out of scope. This is done by packing the data referred to by the task
into a heap allocated structure (freed at the end of the task).

I decided to create the task context structure in
OpenMPToLLVMIRTranslation instead of adapting how it is done
CodeExtractor (via OpenMPIRBuilder] because CodeExtractor is (at least
in theory) generic code which could have other unrelated uses.
---
 .../OpenMP/OpenMPToLLVMIRTranslation.cpp  | 204 +++---
 mlir/test/Target/LLVMIR/openmp-llvm.mlir  |   5 +-
 .../LLVMIR/openmp-task-privatization.mlir |  82 +++
 3 files changed, 254 insertions(+), 37 deletions(-)
 create mode 100644 mlir/test/Target/LLVMIR/openmp-task-privatization.mlir

diff --git 
a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp 
b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
index 8a9a69cefad8ee..5c4deab492c839 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
@@ -13,6 +13,7 @@
 #include "mlir/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.h"
 #include "mlir/Analysis/TopologicalSortUtils.h"
 #include "mlir/Dialect/LLVMIR/LLVMDialect.h"
+#include "mlir/Dialect/LLVMIR/LLVMTypes.h"
 #include "mlir/Dialect/OpenMP/OpenMPDialect.h"
 #include "mlir/Dialect/OpenMP/OpenMPInterfaces.h"
 #include "mlir/IR/IRMapping.h"
@@ -24,10 +25,12 @@
 
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/SetVector.h"
+#include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/TypeSwitch.h"
 #include "llvm/Frontend/OpenMP/OMPConstants.h"
 #include "llvm/Frontend/OpenMP/OMPIRBuilder.h"
 #include "llvm/IR/DebugInfoMetadata.h"
+#include "llvm/IR/DerivedTypes.h"
 #include "llvm/IR/IRBuilder.h"
 #include "llvm/IR/ReplaceConstant.h"
 #include "llvm/Support/FileSystem.h"
@@ -1331,19 +1334,16 @@ findAssociatedValue(Value privateVar, 
llvm::IRBuilderBase &builder,
 
 /// Initialize a single (first)private variable. You probably want to use
 /// allocateAndInitPrivateVars instead of this.
-static llvm::Error
-initPrivateVar(llvm::IRBuilderBase &builder,
-   LLVM::ModuleTranslation &moduleTranslation,
-   omp::PrivateClauseOp &privDecl, Value mlirPrivVar,
-   BlockArgument &blockArg, llvm::Value *llvmPrivateVar,
-   llvm::SmallVectorImpl &llvmPrivateVars,
-   llvm::BasicBlock *privInitBlock,
-   llvm::DenseMap *mappedPrivateVars = nullptr) {
+/// This returns the private variable which has been initialized. This
+/// variable should be mapped before constructing the body of the Op.
+static llvm::Expected initPrivateVar(
+llvm::IRBuilderBase &builder, LLVM::ModuleTranslation &moduleTranslation,
+omp::PrivateClauseOp &privDecl, Value mlirPrivVar, BlockArgument &blockArg,
+llvm::Value *llvmPrivateVar, llvm::BasicBlock *privInitBlock,
+llvm::DenseMap *mappedPrivateVars = nullptr) {
   Region &initRegion = privDecl.getInitRegion();
   if (initRegion.empty()) {
-moduleTranslation.mapValue(blockArg, llvmPrivateVar);
-llvmPrivateVars.push_back(llvmPrivateVar);
-return llvm::Error::success();
+return llvmPrivateVar;
   }
 
   // map initialization region block arguments
@@ -1363,17 +1363,15 @@ initPrivateVar(llvm::IRBuilderBase &builder,
 
   assert(phis.size() == 1 && "expected one allocation to be yielded");
 
-  // prefer the value yielded from the init region to the allocated private
-  // variable in case the region is operating on arguments by-value (e.g.
-  // Fortran character boxes).
-  moduleTranslation.mapValue(blockArg, phis[0]);
-  llvmPrivateVars.push_back(phis[0]);
-
   // clear init region block argument mapping in case it needs to be
   // re-created with a different source for another use of the same
   // reduction decl
   moduleTranslation.forgetMapping(initRegion);
-  return llvm::Error::success();
+
+  // Prefer the value yielded from the init region to the allocated private
+  // variable in case the region is operating on arguments by-value (e.g.
+  // Fortran character boxes).
+  return phis[0];
 }
 
 /// Allocate and initialize delayed private variables. Returns the basic block
@@ -1415,11 +1413,13 @@ static llvm::Expected 
allocateAndInitPrivateVars(
 llvm::Value *llvmPrivateVar = builder.CreateAlloca(
 llvmAllocType, /*ArraySize=*/nullptr, "omp.private.alloc");
 
-ll

[llvm-branch-commits] [llvm] release/20.x: [CG][RISCV]Fix shuffling of odd number of input vectors (PR #125910)

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llvmbot wrote:

@preames What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/125910
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[llvm-branch-commits] [llvm] release/20.x: [CG][RISCV]Fix shuffling of odd number of input vectors (PR #125910)

[via llvm-branch-commits]

https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/125910

Backport 23b6a05ec9c2220844748487612761d1e09166b7

Requested by: @alexey-bataev

>From 37229643ffe8e98d53b7c3e8afe6d65dc305c927 Mon Sep 17 00:00:00 2001
From: Alexey Bataev 
Date: Wed, 5 Feb 2025 07:13:33 -0500
Subject: [PATCH] [CG][RISCV]Fix shuffling of odd number of input vectors

If the input contains odd number of shuffled vectors, the 2 last
shuffles are shuffled with the same first vector. Need to correctly
process such situation: when the first vector is requested for the first
time - extract it from the source vector, when it is requested the
second time - reuse previous result. The second vector should be
extracted in both cases.

Fixes #125269

Reviewers: topperc, preames

Reviewed By: preames

Pull Request: https://github.com/llvm/llvm-project/pull/125693

(cherry picked from commit 23b6a05ec9c2220844748487612761d1e09166b7)
---
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp   | 24 +---
 .../rvv/fixed-vectors-shuffle-exact-vlen.ll   | 28 +++
 2 files changed, 42 insertions(+), 10 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp 
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 8d09e534b1858b..7f0646fb10dfcc 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -5214,17 +5214,21 @@ static SDValue 
lowerShuffleViaVRegSplitting(ShuffleVectorSDNode *SVN,
 SmallDenseMap Values;
 for (unsigned I : seq(Data.size())) {
   const auto &[Idx1, Idx2, _] = Data[I];
-  if (Values.contains(Idx1)) {
-assert(Idx2 != UINT_MAX && Values.contains(Idx2) &&
-   "Expected both indices to be extracted already.");
-break;
+  // If the shuffle contains permutation of odd number of elements,
+  // Idx1 might be used already in the first iteration.
+  //
+  // Idx1 = shuffle Idx1, Idx2
+  // Idx1 = shuffle Idx1, Idx3
+  SDValue &V = Values.try_emplace(Idx1).first->getSecond();
+  if (!V)
+V = ExtractValue(Idx1 >= NumOfSrcRegs ? V2 : V1,
+ (Idx1 % NumOfSrcRegs) * NumOpElts);
+  if (Idx2 != UINT_MAX) {
+SDValue &V = Values.try_emplace(Idx2).first->getSecond();
+if (!V)
+  V = ExtractValue(Idx2 >= NumOfSrcRegs ? V2 : V1,
+   (Idx2 % NumOfSrcRegs) * NumOpElts);
   }
-  SDValue V = ExtractValue(Idx1 >= NumOfSrcRegs ? V2 : V1,
-   (Idx1 % NumOfSrcRegs) * NumOpElts);
-  Values[Idx1] = V;
-  if (Idx2 != UINT_MAX)
-Values[Idx2] = ExtractValue(Idx2 >= NumOfSrcRegs ? V2 : V1,
-(Idx2 % NumOfSrcRegs) * NumOpElts);
 }
 SDValue V;
 for (const auto &[Idx1, Idx2, Mask] : Data) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll 
b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
index afd560fd74d16a..c0c17d4e0623e7 100644
--- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
@@ -431,3 +431,31 @@ define void @shuffle_i256_ldst(ptr %p) vscale_range(2,2) {
   store <4 x i256> %res, ptr %p
   ret void
 }
+
+define void @shuffle_3_input_vectors() vscale_range(4,4) {
+; CHECK-LABEL: shuffle_3_input_vectors:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:vsetvli a0, zero, e64, m8, ta, ma
+; CHECK-NEXT:vmv.v.i v8, 1
+; CHECK-NEXT:vsetivli zero, 1, e8, mf8, ta, ma
+; CHECK-NEXT:vmv.v.i v0, 6
+; CHECK-NEXT:vsetvli a0, zero, e64, m8, ta, ma
+; CHECK-NEXT:vmv.v.i v16, 0
+; CHECK-NEXT:vsetivli zero, 4, e64, m1, ta, mu
+; CHECK-NEXT:vslidedown.vi v20, v8, 1, v0.t
+; CHECK-NEXT:vslideup.vi v20, v9, 3
+; CHECK-NEXT:vslidedown.vi v21, v9, 1
+; CHECK-NEXT:vmv1r.v v22, v8
+; CHECK-NEXT:vsetvli a0, zero, e64, m8, ta, ma
+; CHECK-NEXT:vmsgt.vi v8, v16, 0
+; CHECK-NEXT:vsetvli zero, zero, e32, m4, ta, ma
+; CHECK-NEXT:vmv.x.s a0, v8
+; CHECK-NEXT:sb a0, 0(zero)
+; CHECK-NEXT:ret
+  %1 = shufflevector <32 x i64> zeroinitializer, <32 x i64> splat (i64 1), <32 
x i32> 
+  %2 = icmp slt <32 x i64> zeroinitializer, %1
+  %3 = bitcast <32 x i1> %2 to i32
+  %4 = trunc i32 %3 to i8
+  store i8 %4, ptr null, align 1
+  ret void
+}

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[llvm-branch-commits] [llvm] release/20.x: [CG][RISCV]Fix shuffling of odd number of input vectors (PR #125910)

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https://github.com/llvmbot milestoned 
https://github.com/llvm/llvm-project/pull/125910
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[llvm-branch-commits] [llvm] release/20.x: [CG][RISCV]Fix shuffling of odd number of input vectors (PR #125910)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-backend-risc-v

Author: None (llvmbot)


Changes

Backport 23b6a05ec9c2220844748487612761d1e09166b7

Requested by: @alexey-bataev

---
Full diff: https://github.com/llvm/llvm-project/pull/125910.diff


2 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+14-10) 
- (modified) llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll 
(+28) 


``diff
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp 
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 8d09e534b1858b..7f0646fb10dfcc 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -5214,17 +5214,21 @@ static SDValue 
lowerShuffleViaVRegSplitting(ShuffleVectorSDNode *SVN,
 SmallDenseMap Values;
 for (unsigned I : seq(Data.size())) {
   const auto &[Idx1, Idx2, _] = Data[I];
-  if (Values.contains(Idx1)) {
-assert(Idx2 != UINT_MAX && Values.contains(Idx2) &&
-   "Expected both indices to be extracted already.");
-break;
+  // If the shuffle contains permutation of odd number of elements,
+  // Idx1 might be used already in the first iteration.
+  //
+  // Idx1 = shuffle Idx1, Idx2
+  // Idx1 = shuffle Idx1, Idx3
+  SDValue &V = Values.try_emplace(Idx1).first->getSecond();
+  if (!V)
+V = ExtractValue(Idx1 >= NumOfSrcRegs ? V2 : V1,
+ (Idx1 % NumOfSrcRegs) * NumOpElts);
+  if (Idx2 != UINT_MAX) {
+SDValue &V = Values.try_emplace(Idx2).first->getSecond();
+if (!V)
+  V = ExtractValue(Idx2 >= NumOfSrcRegs ? V2 : V1,
+   (Idx2 % NumOfSrcRegs) * NumOpElts);
   }
-  SDValue V = ExtractValue(Idx1 >= NumOfSrcRegs ? V2 : V1,
-   (Idx1 % NumOfSrcRegs) * NumOpElts);
-  Values[Idx1] = V;
-  if (Idx2 != UINT_MAX)
-Values[Idx2] = ExtractValue(Idx2 >= NumOfSrcRegs ? V2 : V1,
-(Idx2 % NumOfSrcRegs) * NumOpElts);
 }
 SDValue V;
 for (const auto &[Idx1, Idx2, Mask] : Data) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll 
b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
index afd560fd74d16a..c0c17d4e0623e7 100644
--- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
@@ -431,3 +431,31 @@ define void @shuffle_i256_ldst(ptr %p) vscale_range(2,2) {
   store <4 x i256> %res, ptr %p
   ret void
 }
+
+define void @shuffle_3_input_vectors() vscale_range(4,4) {
+; CHECK-LABEL: shuffle_3_input_vectors:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:vsetvli a0, zero, e64, m8, ta, ma
+; CHECK-NEXT:vmv.v.i v8, 1
+; CHECK-NEXT:vsetivli zero, 1, e8, mf8, ta, ma
+; CHECK-NEXT:vmv.v.i v0, 6
+; CHECK-NEXT:vsetvli a0, zero, e64, m8, ta, ma
+; CHECK-NEXT:vmv.v.i v16, 0
+; CHECK-NEXT:vsetivli zero, 4, e64, m1, ta, mu
+; CHECK-NEXT:vslidedown.vi v20, v8, 1, v0.t
+; CHECK-NEXT:vslideup.vi v20, v9, 3
+; CHECK-NEXT:vslidedown.vi v21, v9, 1
+; CHECK-NEXT:vmv1r.v v22, v8
+; CHECK-NEXT:vsetvli a0, zero, e64, m8, ta, ma
+; CHECK-NEXT:vmsgt.vi v8, v16, 0
+; CHECK-NEXT:vsetvli zero, zero, e32, m4, ta, ma
+; CHECK-NEXT:vmv.x.s a0, v8
+; CHECK-NEXT:sb a0, 0(zero)
+; CHECK-NEXT:ret
+  %1 = shufflevector <32 x i64> zeroinitializer, <32 x i64> splat (i64 1), <32 
x i32> 
+  %2 = icmp slt <32 x i64> zeroinitializer, %1
+  %3 = bitcast <32 x i1> %2 to i32
+  %4 = trunc i32 %3 to i8
+  store i8 %4, ptr null, align 1
+  ret void
+}

``




https://github.com/llvm/llvm-project/pull/125910
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[llvm-branch-commits] [mlir] [mlir][ODS] Switch declarative rewrite rules to properties structs (PR #124876)

[Krzysztof Drewniak via llvm-branch-commits]

https://github.com/krzysz00 updated 
https://github.com/llvm/llvm-project/pull/124876

>From 5dc001f21e663d3a2e9dfdaa46b29a8731d21af9 Mon Sep 17 00:00:00 2001
From: Krzysztof Drewniak 
Date: Tue, 28 Jan 2025 20:25:38 -0800
Subject: [PATCH 1/2] [mlir][ODS] Switch declarative rewrite rules to
 properties structs

Now that we have collective builders that take
`const [RelevantOp]::Properties &` arguments, we don't need to serialize
all the attributes that'll be set during an output pattern into a dictionary
attribute. Similarly, we can use the properties struct to get the attributes
instead of needing to go through the big if statement in getAttrOfType<>().

This also enables us to have declarative rewrite rules that match non-attribute
properties in a future PR.

This commit also adds a basic test for the generated matchers since there
didn't seem to already be one.
---
 .../rewriter-attributes-properties.td | 47 +++
 mlir/tools/mlir-tblgen/RewriterGen.cpp| 81 +--
 2 files changed, 105 insertions(+), 23 deletions(-)
 create mode 100644 mlir/test/mlir-tblgen/rewriter-attributes-properties.td

diff --git a/mlir/test/mlir-tblgen/rewriter-attributes-properties.td 
b/mlir/test/mlir-tblgen/rewriter-attributes-properties.td
new file mode 100644
index 000..77869d36cc12ee4
--- /dev/null
+++ b/mlir/test/mlir-tblgen/rewriter-attributes-properties.td
@@ -0,0 +1,47 @@
+// RUN: mlir-tblgen -gen-rewriters -I %S/../../include %s | FileCheck %s
+
+include "mlir/IR/OpBase.td"
+include "mlir/IR/PatternBase.td"
+
+def Test_Dialect : Dialect {
+  let name = "test";
+}
+class NS_Op traits> :
+Op;
+
+def AOp : NS_Op<"a_op", []> {
+  let arguments = (ins
+I32:$x,
+I32Attr:$y
+  );
+
+  let results = (outs I32:$z);
+}
+
+def BOp : NS_Op<"b_op", []> {
+  let arguments = (ins
+I32Attr:$y
+  );
+
+  let results = (outs I32:$z);
+}
+
+def test1 : Pat<(AOp (BOp:$x $y), $_), (AOp $x, $y)>;
+// CHECK-LABEL: struct test1
+// CHECK: ::llvm::LogicalResult matchAndRewrite
+// CHECK: ::mlir::IntegerAttr y;
+// CHECK: test::BOp x;
+// CHECK: ::llvm::SmallVector<::mlir::Operation *, 4> tblgen_ops;
+// CHECK: tblgen_ops.push_back(op0);
+// CHECK: x = castedOp1;
+// CHECK: tblgen_attr = castedOp1.getProperties().getY();
+// CHECK: if (!(tblgen_attr))
+// CHECK: y = tblgen_attr;
+// CHECK: tblgen_ops.push_back(op1);
+
+// CHECK: test::AOp tblgen_AOp_0;
+// CHECK: ::llvm::SmallVector<::mlir::Value, 4> tblgen_values;
+// CHECK: test::AOp::Properties tblgen_props;
+// CHECK: tblgen_values.push_back((*x.getODSResults(0).begin()));
+// CHECK: tblgen_props.y = 
::llvm::dyn_cast_if_present(y);
+// CHECK: tblgen_AOp_0 = rewriter.create(odsLoc, tblgen_types, 
tblgen_values, tblgen_props);
diff --git a/mlir/tools/mlir-tblgen/RewriterGen.cpp 
b/mlir/tools/mlir-tblgen/RewriterGen.cpp
index a041c4d3277798d..9d8d20798dc8db3 100644
--- a/mlir/tools/mlir-tblgen/RewriterGen.cpp
+++ b/mlir/tools/mlir-tblgen/RewriterGen.cpp
@@ -122,7 +122,7 @@ class PatternEmitter {
 
   // Emits C++ statements for matching the `argIndex`-th argument of the given
   // DAG `tree` as an attribute.
-  void emitAttributeMatch(DagNode tree, StringRef opName, int argIndex,
+  void emitAttributeMatch(DagNode tree, StringRef castedName, int argIndex,
   int depth);
 
   // Emits C++ for checking a match with a corresponding match failure
@@ -664,7 +664,7 @@ void PatternEmitter::emitOpMatch(DagNode tree, StringRef 
opName, int depth) {
/*variadicSubIndex=*/std::nullopt);
   ++nextOperand;
 } else if (isa(opArg)) {
-  emitAttributeMatch(tree, opName, opArgIdx, depth);
+  emitAttributeMatch(tree, castedName, opArgIdx, depth);
 } else {
   PrintFatalError(loc, "unhandled case when matching op");
 }
@@ -864,16 +864,22 @@ void PatternEmitter::emitVariadicOperandMatch(DagNode 
tree,
   os.unindent() << "}\n";
 }
 
-void PatternEmitter::emitAttributeMatch(DagNode tree, StringRef opName,
+void PatternEmitter::emitAttributeMatch(DagNode tree, StringRef castedName,
 int argIndex, int depth) {
   Operator &op = tree.getDialectOp(opMap);
   auto *namedAttr = cast(op.getArg(argIndex));
   const auto &attr = namedAttr->attr;
 
   os << "{\n";
-  os.indent() << formatv("auto tblgen_attr = {0}->getAttrOfType<{1}>(\"{2}\");"
- "(void)tblgen_attr;\n",
- opName, attr.getStorageType(), namedAttr->name);
+  if (op.getDialect().usePropertiesForAttributes()) {
+os.indent() << formatv("auto tblgen_attr = {0}.getProperties().{1}();\n",
+   castedName, op.getGetterName(namedAttr->name));
+  } else {
+os.indent() << formatv(
+"auto tblgen_attr = {0}->getAttrOfType<{1}>(\"{2}\");"
+"(void)tblgen_attr;\n",
+castedName, attr.getStorageType(), namedAttr->name);
+  }
 
   // TODO: This should use getter method to avoid duplication.
   if (a

[llvm-branch-commits] [llvm] [NFC][AsmPrinter] Refactor AsmPrinter and AArch64AsmPrinter to prepare for jump table partitions on aarch64 (PR #125993)

[Mingming Liu via llvm-branch-commits]

https://github.com/mingmingl-llvm ready_for_review 
https://github.com/llvm/llvm-project/pull/125993
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[llvm-branch-commits] [llvm] [NFC][AsmPrinter] Refactor AsmPrinter and AArch64AsmPrinter to prepare for jump table partitions on aarch64 (PR #125993)

[Mingming Liu via llvm-branch-commits]

mingmingl-llvm wrote:

cc @Colibrow fyi

https://github.com/llvm/llvm-project/pull/125993
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[llvm-branch-commits] [llvm] [NFC][AsmPrinter] Refactor AsmPrinter and AArch64AsmPrinter to prepare for jump table partitions on aarch64 (PR #125993)

[Mingming Liu via llvm-branch-commits]

https://github.com/mingmingl-llvm updated 
https://github.com/llvm/llvm-project/pull/125993

>From 169486b930c12eb7521fe7ce3c3e6f360824af22 Mon Sep 17 00:00:00 2001
From: mingmingl 
Date: Wed, 5 Feb 2025 18:46:36 -0800
Subject: [PATCH 1/2] [nfc]asm printer jump table

---
 llvm/include/llvm/CodeGen/AsmPrinter.h|   5 +-
 llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp|  52 ++--
 llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp |  15 +-
 .../CodeGen/AArch64/jump-table-partition.ll   | 252 ++
 4 files changed, 285 insertions(+), 39 deletions(-)
 create mode 100644 llvm/test/CodeGen/AArch64/jump-table-partition.ll

diff --git a/llvm/include/llvm/CodeGen/AsmPrinter.h 
b/llvm/include/llvm/CodeGen/AsmPrinter.h
index 3da63af5ba5716c..9ef9888af990c63 100644
--- a/llvm/include/llvm/CodeGen/AsmPrinter.h
+++ b/llvm/include/llvm/CodeGen/AsmPrinter.h
@@ -893,9 +893,8 @@ class AsmPrinter : public MachineFunctionPass {
   // Internal Implementation Details
   //===--===//
 
-  void emitJumpTableImpl(const MachineJumpTableInfo &MJTI,
- ArrayRef JumpTableIndices,
- bool JTInDiffSection);
+  virtual void emitJumpTableImpl(const MachineJumpTableInfo &MJTI,
+ ArrayRef JumpTableIndices);
   void emitJumpTableEntry(const MachineJumpTableInfo &MJTI,
   const MachineBasicBlock *MBB, unsigned uid) const;
 
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp 
b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 44b10c3ef997267..c07755b269c95cc 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -2855,22 +2855,12 @@ void AsmPrinter::emitConstantPool() {
 void AsmPrinter::emitJumpTableInfo() {
   const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
   if (!MJTI) return;
-  if (MJTI->getEntryKind() == MachineJumpTableInfo::EK_Inline) return;
+
   const std::vector &JT = MJTI->getJumpTables();
   if (JT.empty()) return;
 
-  // Pick the directive to use to print the jump table entries, and switch to
-  // the appropriate section.
-  const Function &F = MF->getFunction();
-  const TargetLoweringObjectFile &TLOF = getObjFileLowering();
-  bool JTInDiffSection = !TLOF.shouldPutJumpTableInFunctionSection(
-  MJTI->getEntryKind() == MachineJumpTableInfo::EK_LabelDifference32 ||
-  MJTI->getEntryKind() == MachineJumpTableInfo::EK_LabelDifference64,
-  F);
-
   if (!TM.Options.EnableStaticDataPartitioning) {
-emitJumpTableImpl(*MJTI, llvm::to_vector(llvm::seq(JT.size())),
-  JTInDiffSection);
+emitJumpTableImpl(*MJTI, llvm::to_vector(llvm::seq(JT.size(;
 return;
   }
 
@@ -2886,38 +2876,46 @@ void AsmPrinter::emitJumpTableInfo() {
 }
   }
 
-  emitJumpTableImpl(*MJTI, HotJumpTableIndices, JTInDiffSection);
-  emitJumpTableImpl(*MJTI, ColdJumpTableIndices, JTInDiffSection);
+  emitJumpTableImpl(*MJTI, HotJumpTableIndices);
+  emitJumpTableImpl(*MJTI, ColdJumpTableIndices);
 }
 
 void AsmPrinter::emitJumpTableImpl(const MachineJumpTableInfo &MJTI,
-   ArrayRef JumpTableIndices,
-   bool JTInDiffSection) {
-  if (JumpTableIndices.empty())
+   ArrayRef JumpTableIndices) {
+  if (MJTI.getEntryKind() == MachineJumpTableInfo::EK_Inline ||
+  JumpTableIndices.empty())
 return;
 
   const TargetLoweringObjectFile &TLOF = getObjFileLowering();
   const Function &F = MF->getFunction();
   const std::vector &JT = MJTI.getJumpTables();
   MCSection *JumpTableSection = nullptr;
-  if (TM.Options.EnableStaticDataPartitioning) {
-JumpTableSection =
-TLOF.getSectionForJumpTable(F, TM, &JT[JumpTableIndices.front()]);
-  } else {
-JumpTableSection = TLOF.getSectionForJumpTable(F, TM);
-  }
 
-  const DataLayout &DL = MF->getDataLayout();
+  // Pick the directive to use to print the jump table entries, and switch to
+  // the appropriate section.
+  const bool JTInDiffSection = !TLOF.shouldPutJumpTableInFunctionSection(
+  MJTI.getEntryKind() == MachineJumpTableInfo::EK_LabelDifference32 ||
+  MJTI.getEntryKind() == MachineJumpTableInfo::EK_LabelDifference64,
+  F);
   if (JTInDiffSection) {
+if (TM.Options.EnableStaticDataPartitioning) {
+  JumpTableSection =
+  TLOF.getSectionForJumpTable(F, TM, &JT[JumpTableIndices.front()]);
+} else {
+  JumpTableSection = TLOF.getSectionForJumpTable(F, TM);
+}
 OutStreamer->switchSection(JumpTableSection);
   }
 
+  const DataLayout &DL = MF->getDataLayout();
+
   emitAlignment(Align(MJTI.getEntryAlignment(MF->getDataLayout(;
 
-  // Jump tables in code sections are marked with a data_region directive
-  // where that's supported.
-  if (!JTInDiffSection)
+  if (!JTInDiffSection) {
+// Jump tables in code sections are marked with a data_region direc

[llvm-branch-commits] [llvm] [NFC][AsmPrinter] Refactor AsmPrinter and AArch64AsmPrinter to prepare for jump table partitions on aarch64 (PR #125993)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-backend-aarch64

Author: Mingming Liu (mingmingl-llvm)


Changes

With 
https://github.com/llvm/llvm-project/commit/3feb724496238ce10d32e8c2bd84b4ea50f9977e,
 AsmPrinter can place jump table entries into `.hot` or `.unlikely` prefixed 
data sections. This change refactors AsmPrinter and AArch64AsmPrinter to 
prepare for the aarch64 port.

* Before this patch, the AsmPrinter class exposes `emitJumpTableInfo` as a 
virtual method, and AArch64AsmPrinter overrides `emitJumpTableInfo` for jump 
table emission. 
* After this patch, both AsmPrinter and AArch64AsmPrinter shares  
`AsmPrinter::emitJumpTableInfo`, and class-specific code are moved inside 
`emitJumpTableImpl` respectively.

This is a follow-up of https://github.com/llvm/llvm-project/pull/125987

---
Full diff: https://github.com/llvm/llvm-project/pull/125993.diff


4 Files Affected:

- (modified) llvm/include/llvm/CodeGen/AsmPrinter.h (+2-3) 
- (modified) llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (+21-25) 
- (modified) llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp (+9-9) 
- (modified) llvm/test/CodeGen/AArch64/jump-table-partition.ll (+11-8) 


``diff
diff --git a/llvm/include/llvm/CodeGen/AsmPrinter.h 
b/llvm/include/llvm/CodeGen/AsmPrinter.h
index 3da63af5ba5716c..9ef9888af990c63 100644
--- a/llvm/include/llvm/CodeGen/AsmPrinter.h
+++ b/llvm/include/llvm/CodeGen/AsmPrinter.h
@@ -893,9 +893,8 @@ class AsmPrinter : public MachineFunctionPass {
   // Internal Implementation Details
   //===--===//
 
-  void emitJumpTableImpl(const MachineJumpTableInfo &MJTI,
- ArrayRef JumpTableIndices,
- bool JTInDiffSection);
+  virtual void emitJumpTableImpl(const MachineJumpTableInfo &MJTI,
+ ArrayRef JumpTableIndices);
   void emitJumpTableEntry(const MachineJumpTableInfo &MJTI,
   const MachineBasicBlock *MBB, unsigned uid) const;
 
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp 
b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 44b10c3ef997267..07fe589fcbbd065 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -2855,22 +2855,12 @@ void AsmPrinter::emitConstantPool() {
 void AsmPrinter::emitJumpTableInfo() {
   const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
   if (!MJTI) return;
-  if (MJTI->getEntryKind() == MachineJumpTableInfo::EK_Inline) return;
+
   const std::vector &JT = MJTI->getJumpTables();
   if (JT.empty()) return;
 
-  // Pick the directive to use to print the jump table entries, and switch to
-  // the appropriate section.
-  const Function &F = MF->getFunction();
-  const TargetLoweringObjectFile &TLOF = getObjFileLowering();
-  bool JTInDiffSection = !TLOF.shouldPutJumpTableInFunctionSection(
-  MJTI->getEntryKind() == MachineJumpTableInfo::EK_LabelDifference32 ||
-  MJTI->getEntryKind() == MachineJumpTableInfo::EK_LabelDifference64,
-  F);
-
   if (!TM.Options.EnableStaticDataPartitioning) {
-emitJumpTableImpl(*MJTI, llvm::to_vector(llvm::seq(JT.size())),
-  JTInDiffSection);
+emitJumpTableImpl(*MJTI, llvm::to_vector(llvm::seq(JT.size(;
 return;
   }
 
@@ -2886,33 +2876,39 @@ void AsmPrinter::emitJumpTableInfo() {
 }
   }
 
-  emitJumpTableImpl(*MJTI, HotJumpTableIndices, JTInDiffSection);
-  emitJumpTableImpl(*MJTI, ColdJumpTableIndices, JTInDiffSection);
+  emitJumpTableImpl(*MJTI, HotJumpTableIndices);
+  emitJumpTableImpl(*MJTI, ColdJumpTableIndices);
 }
 
 void AsmPrinter::emitJumpTableImpl(const MachineJumpTableInfo &MJTI,
-   ArrayRef JumpTableIndices,
-   bool JTInDiffSection) {
-  if (JumpTableIndices.empty())
+   ArrayRef JumpTableIndices) {
+  if (MJTI.getEntryKind() == MachineJumpTableInfo::EK_Inline ||
+  JumpTableIndices.empty())
 return;
 
   const TargetLoweringObjectFile &TLOF = getObjFileLowering();
   const Function &F = MF->getFunction();
   const std::vector &JT = MJTI.getJumpTables();
   MCSection *JumpTableSection = nullptr;
-  if (TM.Options.EnableStaticDataPartitioning) {
-JumpTableSection =
-TLOF.getSectionForJumpTable(F, TM, &JT[JumpTableIndices.front()]);
-  } else {
-JumpTableSection = TLOF.getSectionForJumpTable(F, TM);
-  }
 
-  const DataLayout &DL = MF->getDataLayout();
+  // Pick the directive to use to print the jump table entries, and switch to
+  // the appropriate section.
+  const bool JTInDiffSection = !TLOF.shouldPutJumpTableInFunctionSection(
+  MJTI.getEntryKind() == MachineJumpTableInfo::EK_LabelDifference32 ||
+  MJTI.getEntryKind() == MachineJumpTableInfo::EK_LabelDifference64,
+  F);
   if (JTInDiffSection) {
+if (TM.Options.EnableStaticDataPartitioning) {
+  JumpTableSection =
+  TLOF.getSectionForJumpT

[llvm-branch-commits] [llvm] [NFC][AsmPrinter] Refactor AsmPrinter and AArch64AsmPrinter to prepare for jump table partitions on aarch64 (PR #125993)

[Mingming Liu via llvm-branch-commits]

https://github.com/mingmingl-llvm edited 
https://github.com/llvm/llvm-project/pull/125993
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[llvm-branch-commits] [mlir] [AMDGPU][MLIR] Replace gfx940 and gfx941 with gfx942 in MLIR (PR #125836)

[Fabian Ritter via llvm-branch-commits]

ritter-x2a wrote:

> Ok so I'm going to take issue with jumping the constants in a bunch of tests 
> to gfx8942. Unless we're planning to completely wipe gfx940/1 from the 
> codebase - which seems extremely unusual and like bad practice ... gfx940 and 
> 941 are real targets that did really exist and might need code compiled for 
> them in the future - we should still allow compiling for there targets while 
> updating tests and such to gfx942.
> 
> And as to the atomics emulation pass ... what's the harm in keeping some old 
> workaround around?

I'll bring this issue up for discussion in the next compiler team meeting.

https://github.com/llvm/llvm-project/pull/125836
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[llvm-branch-commits] [llvm] [NFC][AsmPrinter] Refactor AsmPrinter and AArch64AsmPrinter to prepare for jump table partitions on aarch64 (PR #125993)

[Mingming Liu via llvm-branch-commits]

https://github.com/mingmingl-llvm updated 
https://github.com/llvm/llvm-project/pull/125993

>From 169486b930c12eb7521fe7ce3c3e6f360824af22 Mon Sep 17 00:00:00 2001
From: mingmingl 
Date: Wed, 5 Feb 2025 18:46:36 -0800
Subject: [PATCH 1/3] [nfc]asm printer jump table

---
 llvm/include/llvm/CodeGen/AsmPrinter.h|   5 +-
 llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp|  52 ++--
 llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp |  15 +-
 .../CodeGen/AArch64/jump-table-partition.ll   | 252 ++
 4 files changed, 285 insertions(+), 39 deletions(-)
 create mode 100644 llvm/test/CodeGen/AArch64/jump-table-partition.ll

diff --git a/llvm/include/llvm/CodeGen/AsmPrinter.h 
b/llvm/include/llvm/CodeGen/AsmPrinter.h
index 3da63af5ba5716c..9ef9888af990c63 100644
--- a/llvm/include/llvm/CodeGen/AsmPrinter.h
+++ b/llvm/include/llvm/CodeGen/AsmPrinter.h
@@ -893,9 +893,8 @@ class AsmPrinter : public MachineFunctionPass {
   // Internal Implementation Details
   //===--===//
 
-  void emitJumpTableImpl(const MachineJumpTableInfo &MJTI,
- ArrayRef JumpTableIndices,
- bool JTInDiffSection);
+  virtual void emitJumpTableImpl(const MachineJumpTableInfo &MJTI,
+ ArrayRef JumpTableIndices);
   void emitJumpTableEntry(const MachineJumpTableInfo &MJTI,
   const MachineBasicBlock *MBB, unsigned uid) const;
 
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp 
b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 44b10c3ef997267..c07755b269c95cc 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -2855,22 +2855,12 @@ void AsmPrinter::emitConstantPool() {
 void AsmPrinter::emitJumpTableInfo() {
   const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
   if (!MJTI) return;
-  if (MJTI->getEntryKind() == MachineJumpTableInfo::EK_Inline) return;
+
   const std::vector &JT = MJTI->getJumpTables();
   if (JT.empty()) return;
 
-  // Pick the directive to use to print the jump table entries, and switch to
-  // the appropriate section.
-  const Function &F = MF->getFunction();
-  const TargetLoweringObjectFile &TLOF = getObjFileLowering();
-  bool JTInDiffSection = !TLOF.shouldPutJumpTableInFunctionSection(
-  MJTI->getEntryKind() == MachineJumpTableInfo::EK_LabelDifference32 ||
-  MJTI->getEntryKind() == MachineJumpTableInfo::EK_LabelDifference64,
-  F);
-
   if (!TM.Options.EnableStaticDataPartitioning) {
-emitJumpTableImpl(*MJTI, llvm::to_vector(llvm::seq(JT.size())),
-  JTInDiffSection);
+emitJumpTableImpl(*MJTI, llvm::to_vector(llvm::seq(JT.size(;
 return;
   }
 
@@ -2886,38 +2876,46 @@ void AsmPrinter::emitJumpTableInfo() {
 }
   }
 
-  emitJumpTableImpl(*MJTI, HotJumpTableIndices, JTInDiffSection);
-  emitJumpTableImpl(*MJTI, ColdJumpTableIndices, JTInDiffSection);
+  emitJumpTableImpl(*MJTI, HotJumpTableIndices);
+  emitJumpTableImpl(*MJTI, ColdJumpTableIndices);
 }
 
 void AsmPrinter::emitJumpTableImpl(const MachineJumpTableInfo &MJTI,
-   ArrayRef JumpTableIndices,
-   bool JTInDiffSection) {
-  if (JumpTableIndices.empty())
+   ArrayRef JumpTableIndices) {
+  if (MJTI.getEntryKind() == MachineJumpTableInfo::EK_Inline ||
+  JumpTableIndices.empty())
 return;
 
   const TargetLoweringObjectFile &TLOF = getObjFileLowering();
   const Function &F = MF->getFunction();
   const std::vector &JT = MJTI.getJumpTables();
   MCSection *JumpTableSection = nullptr;
-  if (TM.Options.EnableStaticDataPartitioning) {
-JumpTableSection =
-TLOF.getSectionForJumpTable(F, TM, &JT[JumpTableIndices.front()]);
-  } else {
-JumpTableSection = TLOF.getSectionForJumpTable(F, TM);
-  }
 
-  const DataLayout &DL = MF->getDataLayout();
+  // Pick the directive to use to print the jump table entries, and switch to
+  // the appropriate section.
+  const bool JTInDiffSection = !TLOF.shouldPutJumpTableInFunctionSection(
+  MJTI.getEntryKind() == MachineJumpTableInfo::EK_LabelDifference32 ||
+  MJTI.getEntryKind() == MachineJumpTableInfo::EK_LabelDifference64,
+  F);
   if (JTInDiffSection) {
+if (TM.Options.EnableStaticDataPartitioning) {
+  JumpTableSection =
+  TLOF.getSectionForJumpTable(F, TM, &JT[JumpTableIndices.front()]);
+} else {
+  JumpTableSection = TLOF.getSectionForJumpTable(F, TM);
+}
 OutStreamer->switchSection(JumpTableSection);
   }
 
+  const DataLayout &DL = MF->getDataLayout();
+
   emitAlignment(Align(MJTI.getEntryAlignment(MF->getDataLayout(;
 
-  // Jump tables in code sections are marked with a data_region directive
-  // where that's supported.
-  if (!JTInDiffSection)
+  if (!JTInDiffSection) {
+// Jump tables in code sections are marked with a data_region direc

[llvm-branch-commits] [mlir] [mlir][ODS] Add a collective builder that takes the Properties struct (PR #124713)

[Krzysztof Drewniak via llvm-branch-commits]

https://github.com/krzysz00 updated 
https://github.com/llvm/llvm-project/pull/124713

>From 5b7c91328d935f203acd571488f16f709200cc1e Mon Sep 17 00:00:00 2001
From: Krzysztof Drewniak 
Date: Sat, 18 Jan 2025 00:01:35 -0800
Subject: [PATCH 1/3] [mlir][ODS] Add a collective builder that takes the
 Properties struct

This commit adds builders of the form

```
static void build(..., [TypeRange resultTypes],
  ValueRange operands, const Properties &properties,
  ArrayRef discardableAttributes = {},
  [unsigned numRegions]);
```
to go alongside the existing
result/operands/[inherent + discardable attribute list] collective
builders.

This change is intended to support a refactor to the declarative
rewrite engine to make it populate the `Properties` struct instead of
creating a `DictionaryAttr`, thus enabling rewrite rules to handle
non-`Attribute` properties.

More generally, this means that generic code that would previously
call `getAttrs()` to blend together inherent and discardable
attributes can now use `getProperties()` and `getDiscardableAttrs()`
separately, thus removing the need to serialize everything into a
temporary `DictionaryAttr`.
---
 mlir/docs/DeclarativeRewrites.md|   4 +-
 mlir/docs/DefiningDialects/Operations.md|  27 +++-
 mlir/include/mlir/IR/OpDefinition.h |   5 +-
 mlir/include/mlir/IR/OperationSupport.h |  18 +++
 mlir/test/lib/Dialect/Test/TestOps.td   |   7 +
 mlir/test/mlir-tblgen/op-attribute.td   |  12 ++
 mlir/test/mlir-tblgen/op-decl-and-defs.td   |   8 +
 mlir/test/mlir-tblgen/op-result.td  |  11 +-
 mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 162 +++-
 9 files changed, 205 insertions(+), 49 deletions(-)

diff --git a/mlir/docs/DeclarativeRewrites.md b/mlir/docs/DeclarativeRewrites.md
index 888ce57fa3b5336..fd566a2393b632e 100644
--- a/mlir/docs/DeclarativeRewrites.md
+++ b/mlir/docs/DeclarativeRewrites.md
@@ -237,9 +237,9 @@ In the above, we are using `BOp`'s result for building 
`COp`.
 
 Given that `COp` was specified with table-driven op definition, there will be
 several `build()` methods generated for it. One of them has aggregated
-parameters for result types, operands, and attributes in the signature: `void
+parameters for result types, operands, and properties in the signature: `void
 COp::build(..., ArrayRef resultTypes, Array operands,
-ArrayRef attr)`. The pattern in the above calls this `build()`
+const COp::Properties& properties)`. The pattern in the above calls this 
`build()`
 method for constructing the `COp`.
 
 In general, arguments in the result pattern will be passed directly to the
diff --git a/mlir/docs/DefiningDialects/Operations.md 
b/mlir/docs/DefiningDialects/Operations.md
index 8ff60ac21424c41..528070cd3ebff35 100644
--- a/mlir/docs/DefiningDialects/Operations.md
+++ b/mlir/docs/DefiningDialects/Operations.md
@@ -465,7 +465,18 @@ def MyOp : ... {
 The following builders are generated:
 
 ```c++
+// All result-types/operands/properties/discardable attributes have one
+// aggregate parameter. `Properties` is the properties structure of
+// `MyOp`.
+static void build(OpBuilder &odsBuilder, OperationState &odsState,
+  TypeRange resultTypes,
+  ValueRange operands,
+  Properties properties,
+  ArrayRef discardableAttributes = {});
+
 // All result-types/operands/attributes have one aggregate parameter.
+// Inherent properties and discardable attributes are mixed together in the
+//  `attributes` dictionary.
 static void build(OpBuilder &odsBuilder, OperationState &odsState,
   TypeRange resultTypes,
   ValueRange operands,
@@ -498,20 +509,28 @@ static void build(OpBuilder &odsBuilder, OperationState 
&odsState,
 
 // All operands/attributes have aggregate parameters.
 // Generated if return type can be inferred.
+static void build(OpBuilder &odsBuilder, OperationState &odsState,
+  ValueRange operands,
+  Properties properties,
+  ArrayRef discardableAttributes);
+
+// All operands/attributes have aggregate parameters.
+// Generated if return type can be inferred. Uses the legacy merged attribute
+// dictionary.
 static void build(OpBuilder &odsBuilder, OperationState &odsState,
   ValueRange operands, ArrayRef attributes);
 
 // (And manually specified builders depending on the specific op.)
 ```
 
-The first form provides basic uniformity so that we can create ops using the
-same form regardless of the exact op. This is particularly useful for
+The first two forms provide basic uniformity so that we can create ops using
+the same form regardless of the exact op. This is particularly useful for
 implementing declarative pattern rewrites.
 
-The second and third forms are good for use in manually written code, given 
that
+The third and fourth forms are good for use in manually written code

[llvm-branch-commits] [llvm] [AArch64AsmPrinter]Place jump tables into hot/unlikely-prefixed data sections for aarch64 (PR #126018)

[Mingming Liu via llvm-branch-commits]

https://github.com/mingmingl-llvm created 
https://github.com/llvm/llvm-project/pull/126018

This is a follow-up patch of https://github.com/llvm/llvm-project/pull/125993 
to port jump table partitions for aarch64.

>From bcd1e154c97f57a6a7c00c5f137c301805eea0c2 Mon Sep 17 00:00:00 2001
From: mingmingl 
Date: Wed, 5 Feb 2025 23:08:11 -0800
Subject: [PATCH] [AArch64AsmPrinter]Place jump tables into
 hot/unlikely-prefixed sections for aarch64

---
 llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 12 ++--
 llvm/test/CodeGen/AArch64/jump-table-partition.ll | 13 +++--
 2 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp 
b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
index c92c203f247954..0593c1cd2b14d2 100644
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
@@ -1280,10 +1280,18 @@ void AArch64AsmPrinter::emitJumpTableImpl(const 
MachineJumpTableInfo &MJTI,
   if (JumpTableIndices.empty())
 return;
   const TargetLoweringObjectFile &TLOF = getObjFileLowering();
-  MCSection *ReadOnlySec = TLOF.getSectionForJumpTable(MF->getFunction(), TM);
+  const auto &F = MF->getFunction();
+  const std::vector &JT = MJTI.getJumpTables();
+
+  MCSection *ReadOnlySec = nullptr;
+  if (TM.Options.EnableStaticDataPartitioning) {
+ReadOnlySec =
+TLOF.getSectionForJumpTable(F, TM, &JT[JumpTableIndices.front()]);
+  } else {
+ReadOnlySec = TLOF.getSectionForJumpTable(F, TM);
+  }
   OutStreamer->switchSection(ReadOnlySec);
 
-  const std::vector &JT = MJTI.getJumpTables();
   auto AFI = MF->getInfo();
   for (unsigned JTI : JumpTableIndices) {
 const std::vector &JTBBs = JT[JTI].MBBs;
diff --git a/llvm/test/CodeGen/AArch64/jump-table-partition.ll 
b/llvm/test/CodeGen/AArch64/jump-table-partition.ll
index e0525d0384a978..d282c366578d70 100644
--- a/llvm/test/CodeGen/AArch64/jump-table-partition.ll
+++ b/llvm/test/CodeGen/AArch64/jump-table-partition.ll
@@ -35,16 +35,17 @@
 ; RUN: -aarch64-enable-atomic-cfg-tidy=false 
-aarch64-min-jump-table-entries=2 \
 ; RUN: %s -o - 2>&1 | FileCheck %s --check-prefixes=FUNCLESS,JT
 
-; A function's section prefix is used for all jump tables of this function.
-; @foo is hot so its jump table data section has a hot prefix.
-; NUM:  .section .rodata.hot.,"a",@progbits,unique,2
+; In function @foo, the 2 switch instructions to jt0.* and jt1.* are placed in
+; hot-prefixed sections, and the 2 switch instructions to jt2.* and jt3.* are
+; placed in cold-prefixed sections.
+; NUM:.section .rodata.hot.,"a",@progbits,unique,2
 ; FUNC: .section .rodata.hot.foo,"a",@progbits
 ; FUNCLESS: .section .rodata.hot.,"a",@progbits
 ; JT: .LJTI0_0:
 ; JT: .LJTI0_2:
-; NUM:.section .rodata.hot.,"a",@progbits,unique,3
-; FUNC-NOT:   .section .rodata.hot.foo
-; FUNCLESS-NOT:   .section .rodata.hot.,"a",@progbits
+; NUM:.section .rodata.unlikely.,"a",@progbits,unique,3
+; FUNC:   .section .rodata.unlikely.foo,
+; FUNCLESS:   .section .rodata.unlikely.,"a",@progbits
 ; JT: .LJTI0_1:
 ; JT: .LJTI0_3:
 

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[llvm-branch-commits] [llvm] [AArch64AsmPrinter]Place jump tables into hot/unlikely-prefixed data sections for aarch64 (PR #126018)

[Mingming Liu via llvm-branch-commits]

mingmingl-llvm wrote:

cc @Colibrow 

https://github.com/llvm/llvm-project/pull/126018
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[llvm-branch-commits] [llvm] [NFC][AsmPrinter] Refactor AsmPrinter and AArch64AsmPrinter to prepare for jump table partitions on aarch64 (PR #125993)

[Mingming Liu via llvm-branch-commits]

https://github.com/mingmingl-llvm edited 
https://github.com/llvm/llvm-project/pull/125993
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[llvm-branch-commits] [llvm] [AArch64AsmPrinter]Place jump tables into hot/unlikely-prefixed data sections for aarch64 (PR #126018)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-backend-aarch64

Author: Mingming Liu (mingmingl-llvm)


Changes

This is a follow-up patch of https://github.com/llvm/llvm-project/pull/125993 
to port jump table partitions for aarch64.

---
Full diff: https://github.com/llvm/llvm-project/pull/126018.diff


2 Files Affected:

- (modified) llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp (+10-2) 
- (modified) llvm/test/CodeGen/AArch64/jump-table-partition.ll (+7-6) 


``diff
diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp 
b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
index c92c203f247954..0593c1cd2b14d2 100644
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
@@ -1280,10 +1280,18 @@ void AArch64AsmPrinter::emitJumpTableImpl(const 
MachineJumpTableInfo &MJTI,
   if (JumpTableIndices.empty())
 return;
   const TargetLoweringObjectFile &TLOF = getObjFileLowering();
-  MCSection *ReadOnlySec = TLOF.getSectionForJumpTable(MF->getFunction(), TM);
+  const auto &F = MF->getFunction();
+  const std::vector &JT = MJTI.getJumpTables();
+
+  MCSection *ReadOnlySec = nullptr;
+  if (TM.Options.EnableStaticDataPartitioning) {
+ReadOnlySec =
+TLOF.getSectionForJumpTable(F, TM, &JT[JumpTableIndices.front()]);
+  } else {
+ReadOnlySec = TLOF.getSectionForJumpTable(F, TM);
+  }
   OutStreamer->switchSection(ReadOnlySec);
 
-  const std::vector &JT = MJTI.getJumpTables();
   auto AFI = MF->getInfo();
   for (unsigned JTI : JumpTableIndices) {
 const std::vector &JTBBs = JT[JTI].MBBs;
diff --git a/llvm/test/CodeGen/AArch64/jump-table-partition.ll 
b/llvm/test/CodeGen/AArch64/jump-table-partition.ll
index e0525d0384a978..d282c366578d70 100644
--- a/llvm/test/CodeGen/AArch64/jump-table-partition.ll
+++ b/llvm/test/CodeGen/AArch64/jump-table-partition.ll
@@ -35,16 +35,17 @@
 ; RUN: -aarch64-enable-atomic-cfg-tidy=false 
-aarch64-min-jump-table-entries=2 \
 ; RUN: %s -o - 2>&1 | FileCheck %s --check-prefixes=FUNCLESS,JT
 
-; A function's section prefix is used for all jump tables of this function.
-; @foo is hot so its jump table data section has a hot prefix.
-; NUM:  .section .rodata.hot.,"a",@progbits,unique,2
+; In function @foo, the 2 switch instructions to jt0.* and jt1.* are placed in
+; hot-prefixed sections, and the 2 switch instructions to jt2.* and jt3.* are
+; placed in cold-prefixed sections.
+; NUM:.section .rodata.hot.,"a",@progbits,unique,2
 ; FUNC: .section .rodata.hot.foo,"a",@progbits
 ; FUNCLESS: .section .rodata.hot.,"a",@progbits
 ; JT: .LJTI0_0:
 ; JT: .LJTI0_2:
-; NUM:.section .rodata.hot.,"a",@progbits,unique,3
-; FUNC-NOT:   .section .rodata.hot.foo
-; FUNCLESS-NOT:   .section .rodata.hot.,"a",@progbits
+; NUM:.section .rodata.unlikely.,"a",@progbits,unique,3
+; FUNC:   .section .rodata.unlikely.foo,
+; FUNCLESS:   .section .rodata.unlikely.,"a",@progbits
 ; JT: .LJTI0_1:
 ; JT: .LJTI0_3:
 

``




https://github.com/llvm/llvm-project/pull/126018
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[llvm-branch-commits] [clang-tools-extra] [clang-doc] Make `--repository` change the HTML output (PR #122566)

[Petr Hosek via llvm-branch-commits]

https://github.com/petrhosek approved this pull request.


https://github.com/llvm/llvm-project/pull/122566
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[llvm-branch-commits] [clang-tools-extra] [clang-doc] Make `--repository` change the HTML output (PR #122566)

[Petr Hosek via llvm-branch-commits]

@@ -494,18 +494,31 @@ genReferencesBlock(const std::vector 
&References,
 static std::unique_ptr
 writeFileDefinition(const Location &L,
 std::optional RepositoryUrl = std::nullopt) {
-  if (!L.IsFileInRootDir || !RepositoryUrl)
+  if (!L.IsFileInRootDir && !RepositoryUrl)
 return std::make_unique(
 HTMLTag::TAG_P, "Defined at line " + std::to_string(L.LineNumber) +
 " of file " + L.Filename);
   SmallString<128> FileURL(*RepositoryUrl);
-  llvm::sys::path::append(FileURL, llvm::sys::path::Style::posix, L.Filename);
+  llvm::sys::path::append(
+  FileURL, llvm::sys::path::Style::posix,
+  // If we're on windows, the file name will be in the wrong format, and

petrhosek wrote:

```suggestion
  // If we're on Windows, the file name will be in the wrong format, and
```

https://github.com/llvm/llvm-project/pull/122566
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[llvm-branch-commits] [clang] [compiler-rt] [llvm] release/20.x: [ORC-RT] Use templates to express deeply nested function calls in testcase. (PR #126015)

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[llvm-branch-commits] [llvm] 8be3fc0 - [AArch64] Disallow vscale x 1 partial reductions (#125252)

[via llvm-branch-commits]

Author: Sam Tebbs
Date: 2025-02-05T14:37:39Z
New Revision: 8be3fc0f5c7bdad7718394e34ebc5087704a1027

URL: 
https://github.com/llvm/llvm-project/commit/8be3fc0f5c7bdad7718394e34ebc5087704a1027
DIFF: 
https://github.com/llvm/llvm-project/commit/8be3fc0f5c7bdad7718394e34ebc5087704a1027.diff

LOG: [AArch64] Disallow vscale x 1  partial reductions (#125252)

We don't want to allow partial reductions resulting in a vscale x 1 type
as we can't lower it in the backend.

(cherry picked from commit c7995a6905f2320f280013454676f992a8c6f89f)

Added: 


Modified: 
llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll

Removed: 




diff  --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp 
b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index aae2fdaf5bec37b..4af3c482e65984b 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -4682,13 +4682,24 @@ InstructionCost AArch64TTIImpl::getPartialReductionCost(
   EVT InputEVT = EVT::getEVT(InputTypeA);
   EVT AccumEVT = EVT::getEVT(AccumType);
 
-  if (VF.isScalable() && !ST->isSVEorStreamingSVEAvailable())
-return Invalid;
+  unsigned VFMinValue = VF.getKnownMinValue();
+
+  if (VF.isScalable()) {
+if (!ST->isSVEorStreamingSVEAvailable())
+  return Invalid;
+
+// Don't accept a partial reduction if the scaled accumulator is vscale x 
1,
+// since we can't lower that type.
+unsigned Scale =
+AccumEVT.getScalarSizeInBits() / InputEVT.getScalarSizeInBits();
+if (VFMinValue == Scale)
+  return Invalid;
+  }
   if (VF.isFixed() && (!ST->isNeonAvailable() || !ST->hasDotProd()))
 return Invalid;
 
   if (InputEVT == MVT::i8) {
-switch (VF.getKnownMinValue()) {
+switch (VFMinValue) {
 default:
   return Invalid;
 case 8:
@@ -4707,7 +4718,7 @@ InstructionCost AArch64TTIImpl::getPartialReductionCost(
   } else if (InputEVT == MVT::i16) {
 // FIXME: Allow i32 accumulator but increase cost, as we would extend
 //it to i64.
-if (VF.getKnownMinValue() != 8 || AccumEVT != MVT::i64)
+if (VFMinValue != 8 || AccumEVT != MVT::i64)
   return Invalid;
   } else
 return Invalid;

diff  --git 
a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll 
b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
index a0214ae88c2d6ed..9d0d30abce6c933 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
@@ -2434,7 +2434,7 @@ define i64 @dotp_cost_disagreement(ptr %a, ptr %b) #0 {
 ; CHECK-MAXBW-NEXT:br label [[VECTOR_BODY:%.*]]
 ; CHECK-MAXBW:   vector.body:
 ; CHECK-MAXBW-NEXT:[[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ 
[[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
-; CHECK-MAXBW-NEXT:[[VEC_PHI:%.*]] = phi  [ 
zeroinitializer, [[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], [[VECTOR_BODY]] ]
+; CHECK-MAXBW-NEXT:[[VEC_PHI:%.*]] = phi  [ 
zeroinitializer, [[VECTOR_PH]] ], [ [[TMP19:%.*]], [[VECTOR_BODY]] ]
 ; CHECK-MAXBW-NEXT:[[TMP6:%.*]] = add i64 [[INDEX]], 0
 ; CHECK-MAXBW-NEXT:[[TMP7:%.*]] = getelementptr inbounds nuw i8, ptr 
[[A]], i64 [[TMP6]]
 ; CHECK-MAXBW-NEXT:[[TMP8:%.*]] = getelementptr inbounds nuw i8, ptr 
[[TMP7]], i32 0
@@ -2446,12 +2446,12 @@ define i64 @dotp_cost_disagreement(ptr %a, ptr %b) #0 {
 ; CHECK-MAXBW-NEXT:[[WIDE_LOAD1:%.*]] = load , ptr 
[[TMP12]], align 1
 ; CHECK-MAXBW-NEXT:[[TMP13:%.*]] = zext  [[WIDE_LOAD1]] 
to 
 ; CHECK-MAXBW-NEXT:[[TMP14:%.*]] = mul nuw nsw  
[[TMP13]], [[TMP9]]
-; CHECK-MAXBW-NEXT:[[PARTIAL_REDUCE]] = call  
@llvm.experimental.vector.partial.reduce.add.nxv1i64.nxv8i64( 
[[VEC_PHI]],  [[TMP14]])
+; CHECK-MAXBW-NEXT:[[TMP19]] = add  [[VEC_PHI]], 
[[TMP14]]
 ; CHECK-MAXBW-NEXT:[[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP5]]
 ; CHECK-MAXBW-NEXT:[[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
 ; CHECK-MAXBW-NEXT:br i1 [[TMP15]], label [[MIDDLE_BLOCK:%.*]], label 
[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
 ; CHECK-MAXBW:   middle.block:
-; CHECK-MAXBW-NEXT:[[TMP16:%.*]] = call i64 
@llvm.vector.reduce.add.nxv1i64( [[PARTIAL_REDUCE]])
+; CHECK-MAXBW-NEXT:[[TMP16:%.*]] = call i64 
@llvm.vector.reduce.add.nxv8i64( [[TMP19]])
 ; CHECK-MAXBW-NEXT:[[CMP_N:%.*]] = icmp eq i64 16, [[N_VEC]]
 ; CHECK-MAXBW-NEXT:br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
 ; CHECK-MAXBW:   scalar.ph:
@@ -3106,89 +3106,188 @@ exit: ; preds = 
%for.cond.cleanup.loopexit, %ent
   ret i64 %result
 }
 
+define dso_local i32 @not_dotp_vscale1(ptr %a, ptr %b, i32 %n, i64 %cost) #0 {
+; CHECK-INTERLEAVE1-LABEL: define dso_local i32 @not_dotp_vscale1(
+; 

[llvm-branch-commits] [llvm] release/20.x: [AArch64] Disallow vscale x 1 partial reductions (#125252) (PR #125866)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/125866
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[llvm-branch-commits] [llvm] release/20.x: [offload] [test] Use test compiler ID rather than host (#124408) (PR #125498)

[Tom Stellard via llvm-branch-commits]

=?utf-8?q?Michał_Górny?= 
Message-ID:
In-Reply-To: 


https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/125498
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[llvm-branch-commits] [llvm] release/20.x: [offload] [test] Use test compiler ID rather than host (#124408) (PR #125498)

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=?utf-8?q?Michał_Górny?= 
Message-ID:
In-Reply-To: 


https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/125498

>From 091c11f29e1665a950e74597b66add451d281b97 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C5=82=20G=C3=B3rny?= 
Date: Sun, 2 Feb 2025 16:55:22 +0100
Subject: [PATCH 1/2] [offload] `gnu::format` with variadic template functions
 is Clang-only (#124406)

Use `gnu::format` attribute only when compiling with Clang, as using it
against variadic template functions is a Clang extension and is not
supported by GCC.

See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77958

Fixes #119069

(cherry picked from commit 359a9131704277bce0f806de31ac887e68a66902)
---
 .../common/include/ErrorReporting.h| 18 --
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/offload/plugins-nextgen/common/include/ErrorReporting.h 
b/offload/plugins-nextgen/common/include/ErrorReporting.h
index 8478977a8f86af0..2ad0f2b7dd6c651 100644
--- a/offload/plugins-nextgen/common/include/ErrorReporting.h
+++ b/offload/plugins-nextgen/common/include/ErrorReporting.h
@@ -80,8 +80,10 @@ class ErrorReporter {
   /// Print \p Format, instantiated with \p Args to stderr.
   /// TODO: Allow redirection into a file stream.
   template 
-  [[gnu::format(__printf__, 1, 2)]] static void print(const char *Format,
-  ArgsTy &&...Args) {
+#ifdef __clang__ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77958
+  [[gnu::format(__printf__, 1, 2)]]
+#endif
+  static void print(const char *Format, ArgsTy &&...Args) {
 raw_fd_ostream OS(STDERR_FILENO, false);
 OS << llvm::format(Format, Args...);
   }
@@ -89,8 +91,10 @@ class ErrorReporter {
   /// Print \p Format, instantiated with \p Args to stderr, but colored.
   /// TODO: Allow redirection into a file stream.
   template 
-  [[gnu::format(__printf__, 2, 3)]] static void
-  print(ColorTy Color, const char *Format, ArgsTy &&...Args) {
+#ifdef __clang__ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77958
+  [[gnu::format(__printf__, 2, 3)]]
+#endif
+  static void print(ColorTy Color, const char *Format, ArgsTy &&...Args) {
 raw_fd_ostream OS(STDERR_FILENO, false);
 WithColor(OS, HighlightColor(Color)) << llvm::format(Format, Args...);
   }
@@ -99,8 +103,10 @@ class ErrorReporter {
   /// a banner.
   /// TODO: Allow redirection into a file stream.
   template 
-  [[gnu::format(__printf__, 1, 2)]] static void reportError(const char *Format,
-ArgsTy &&...Args) {
+#ifdef __clang__ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77958
+  [[gnu::format(__printf__, 1, 2)]]
+#endif
+  static void reportError(const char *Format, ArgsTy &&...Args) {
 print(BoldRed, "%s", ErrorBanner);
 print(BoldRed, Format, Args...);
 print("\n");

>From 28e563c23815d94de3de6c3fabc5aa5ad1b554b3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C5=82=20G=C3=B3rny?= 
Date: Sun, 2 Feb 2025 16:55:39 +0100
Subject: [PATCH 2/2] [offload] [test] Use test compiler ID rather than host
 (#124408)

Use the test compiler ID to verify whether tests can be run rather than
the host compiler. This makes it possible to run tests (with Clang)
while the library itself was built with GCC.

(cherry picked from commit 689ef5fda0ab07dfc452cb16d3646d53e612cb75)
---
 offload/test/CMakeLists.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/offload/test/CMakeLists.txt b/offload/test/CMakeLists.txt
index 8a827e0a625eff0..4768d9ccf223bb4 100644
--- a/offload/test/CMakeLists.txt
+++ b/offload/test/CMakeLists.txt
@@ -1,6 +1,6 @@
 # CMakeLists.txt file for unit testing OpenMP offloading runtime library.
-if(NOT CMAKE_CXX_COMPILER_ID STREQUAL "Clang" OR
-   CMAKE_CXX_COMPILER_VERSION VERSION_LESS 6.0.0)
+if(NOT OPENMP_TEST_COMPILER_ID STREQUAL "Clang" OR
+   OPENMP_TEST_COMPILER_VERSION VERSION_LESS 6.0.0)
   message(STATUS "Can only test with Clang compiler in version 6.0.0 or 
later.")
   message(WARNING "The check-offload target will not be available!")
   return()

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[llvm-branch-commits] [llvm] release/20.x: [offload] [test] Use test compiler ID rather than host (#124408) (PR #125498)

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=?utf-8?q?Michał_Górny?= 
Message-ID:
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github-actions[bot] wrote:

@mgorny (or anyone else). If you would like to add a note about this fix in the 
release notes (completely optional). Please reply to this comment with a one or 
two sentence description of the fix.  When you are done, please add the 
release:note label to this PR. 

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[llvm-branch-commits] [compiler-rt] 2d1f7e0 - [asan][android] XFAIL suppressions-alloc-dealloc-mismatch

[Tom Stellard via llvm-branch-commits]

Author: Vitaly Buka
Date: 2025-02-05T13:35:58-08:00
New Revision: 2d1f7e0082b80d9041f3772eb42dbd9153f7e6a6

URL: 
https://github.com/llvm/llvm-project/commit/2d1f7e0082b80d9041f3772eb42dbd9153f7e6a6
DIFF: 
https://github.com/llvm/llvm-project/commit/2d1f7e0082b80d9041f3772eb42dbd9153f7e6a6.diff

LOG: [asan][android] XFAIL suppressions-alloc-dealloc-mismatch

Android is missing suppression file on device.

Follow up to #124197.

(cherry picked from commit 751ae26b959c931efb6db84a27bf2a0444120094)

Added: 


Modified: 
compiler-rt/test/asan/TestCases/suppressions-alloc-dealloc-mismatch.cpp
compiler-rt/test/asan/TestCases/suppressions-exec-relative-location.cpp
compiler-rt/test/asan/TestCases/suppressions-function.cpp
compiler-rt/test/asan/TestCases/suppressions-interceptor.cpp
compiler-rt/test/asan/TestCases/suppressions-library.cpp

Removed: 




diff  --git 
a/compiler-rt/test/asan/TestCases/suppressions-alloc-dealloc-mismatch.cpp 
b/compiler-rt/test/asan/TestCases/suppressions-alloc-dealloc-mismatch.cpp
index df6df6aa9547111..43478ec2f3457c9 100644
--- a/compiler-rt/test/asan/TestCases/suppressions-alloc-dealloc-mismatch.cpp
+++ b/compiler-rt/test/asan/TestCases/suppressions-alloc-dealloc-mismatch.cpp
@@ -6,6 +6,9 @@
 // RUN: %clangxx_asan -O0 %s -o %t && 
%env_asan_opts=alloc_dealloc_mismatch=1:suppressions='"%t.supp"' %run %t 2>&1 | 
FileCheck --check-prefix=CHECK-IGNORE %s
 // RUN: %clangxx_asan -O3 %s -o %t && 
%env_asan_opts=alloc_dealloc_mismatch=1:suppressions='"%t.supp"' %run %t 2>&1 | 
FileCheck --check-prefix=CHECK-IGNORE %s
 
+// FIXME: Upload suppressions to device.
+// XFAIL: android
+
 #include 
 #include 
 #include 

diff  --git 
a/compiler-rt/test/asan/TestCases/suppressions-exec-relative-location.cpp 
b/compiler-rt/test/asan/TestCases/suppressions-exec-relative-location.cpp
index 58649c74fc4f95f..0a028e2ebed6d72 100644
--- a/compiler-rt/test/asan/TestCases/suppressions-exec-relative-location.cpp
+++ b/compiler-rt/test/asan/TestCases/suppressions-exec-relative-location.cpp
@@ -23,6 +23,7 @@
 // RUN: %env_asan_opts=suppressions='"folder/only/"' not %run %t 2>&1 | \
 // RUN:   FileCheck --check-prefix=CHECK-WRONG-FILE-NAME %s
 
+// FIXME: Upload suppressions to device.
 // XFAIL: android
 // UNSUPPORTED: ios
 

diff  --git a/compiler-rt/test/asan/TestCases/suppressions-function.cpp 
b/compiler-rt/test/asan/TestCases/suppressions-function.cpp
index 9a0ef95ebb2acec..22d3dae1f0ef02c 100644
--- a/compiler-rt/test/asan/TestCases/suppressions-function.cpp
+++ b/compiler-rt/test/asan/TestCases/suppressions-function.cpp
@@ -6,6 +6,7 @@
 // RUN: %clangxx_asan -O0 %s -o %t && %env_asan_opts=suppressions='"%t.supp"' 
%run %t 2>&1 | FileCheck --check-prefix=CHECK-IGNORE %s
 // RUN: %clangxx_asan -O3 %s -o %t && %env_asan_opts=suppressions='"%t.supp"' 
%run %t 2>&1 | FileCheck --check-prefix=CHECK-IGNORE %s
 
+// FIXME: Upload suppressions to device.
 // XFAIL: android
 // UNSUPPORTED: ios
 

diff  --git a/compiler-rt/test/asan/TestCases/suppressions-interceptor.cpp 
b/compiler-rt/test/asan/TestCases/suppressions-interceptor.cpp
index e44ccb8e6527d6c..02995cf6f0510cb 100644
--- a/compiler-rt/test/asan/TestCases/suppressions-interceptor.cpp
+++ b/compiler-rt/test/asan/TestCases/suppressions-interceptor.cpp
@@ -5,6 +5,7 @@
 // RUN: echo "interceptor_name:strlen" > %t.supp
 // RUN: %env_asan_opts=suppressions='"%t.supp"' %run %t 2>&1 | FileCheck 
--check-prefix=CHECK-IGNORE %s
 
+// FIXME: Upload suppressions to device.
 // XFAIL: android
 
 #include 

diff  --git a/compiler-rt/test/asan/TestCases/suppressions-library.cpp 
b/compiler-rt/test/asan/TestCases/suppressions-library.cpp
index d11802a20ad3f3a..5427122eaa92fb8 100644
--- a/compiler-rt/test/asan/TestCases/suppressions-library.cpp
+++ b/compiler-rt/test/asan/TestCases/suppressions-library.cpp
@@ -9,6 +9,7 @@
 // RUN: echo "interceptor_via_lib:"%xdynamiclib_filename > %t.supp
 // RUN: %env_asan_opts=suppressions='"%t.supp"' %run %t 2>&1 | FileCheck 
--check-prefix=CHECK-IGNORE %s
 
+// FIXME: Upload suppressions to device.
 // XFAIL: android
 
 #include 



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[llvm-branch-commits] [compiler-rt] 5a406bd - [asan][test] Attempt to fix suppressions-alloc-dealloc-mismatch.cpp on Darwin (#124987)

[Tom Stellard via llvm-branch-commits]

Author: Ben Langmuir
Date: 2025-02-05T13:35:58-08:00
New Revision: 5a406bde97d8ef9489669fa33c6540c26e4436f6

URL: 
https://github.com/llvm/llvm-project/commit/5a406bde97d8ef9489669fa33c6540c26e4436f6
DIFF: 
https://github.com/llvm/llvm-project/commit/5a406bde97d8ef9489669fa33c6540c26e4436f6.diff

LOG: [asan][test] Attempt to fix suppressions-alloc-dealloc-mismatch.cpp on 
Darwin (#124987)

Add %env_asan_opts=alloc_dealloc_mismatch=1 since it is disabled by
default.

rdar://143830493
(cherry picked from commit f0d05b099dafda89df4c971b64b2051c33db5da1)

Added: 


Modified: 
compiler-rt/test/asan/TestCases/suppressions-alloc-dealloc-mismatch.cpp

Removed: 




diff  --git 
a/compiler-rt/test/asan/TestCases/suppressions-alloc-dealloc-mismatch.cpp 
b/compiler-rt/test/asan/TestCases/suppressions-alloc-dealloc-mismatch.cpp
index fe88a5d0c9bf15a..df6df6aa9547111 100644
--- a/compiler-rt/test/asan/TestCases/suppressions-alloc-dealloc-mismatch.cpp
+++ b/compiler-rt/test/asan/TestCases/suppressions-alloc-dealloc-mismatch.cpp
@@ -1,10 +1,10 @@
 // Check that without suppressions, we catch the issue.
 // RUN: %clangxx_asan -O0 %s -o %t
-// RUN: not %run %t 2>&1 | FileCheck --check-prefix=CHECK-CRASH %s
+// RUN: %env_asan_opts=alloc_dealloc_mismatch=1 not %run %t 2>&1 | FileCheck 
--check-prefix=CHECK-CRASH %s
 
 // RUN: echo "alloc_dealloc_mismatch:function" > %t.supp
-// RUN: %clangxx_asan -O0 %s -o %t && %env_asan_opts=suppressions='"%t.supp"' 
%run %t 2>&1 | FileCheck --check-prefix=CHECK-IGNORE %s
-// RUN: %clangxx_asan -O3 %s -o %t && %env_asan_opts=suppressions='"%t.supp"' 
%run %t 2>&1 | FileCheck --check-prefix=CHECK-IGNORE %s
+// RUN: %clangxx_asan -O0 %s -o %t && 
%env_asan_opts=alloc_dealloc_mismatch=1:suppressions='"%t.supp"' %run %t 2>&1 | 
FileCheck --check-prefix=CHECK-IGNORE %s
+// RUN: %clangxx_asan -O3 %s -o %t && 
%env_asan_opts=alloc_dealloc_mismatch=1:suppressions='"%t.supp"' %run %t 2>&1 | 
FileCheck --check-prefix=CHECK-IGNORE %s
 
 #include 
 #include 



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[llvm-branch-commits] [llvm] release/20.x: [AArch64] Disallow vscale x 1 partial reductions (#125252) (PR #125866)

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release:note label to this PR. 

https://github.com/llvm/llvm-project/pull/125866
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[llvm-branch-commits] [flang] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)

[Pranav Bhandarkar via llvm-branch-commits]

https://github.com/bhandarkar-pranav commented:

Thank you for the PR, Tom. I have some minor comments that may amount to 
nitpicking.

https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [clang] [llvm] [llvm][fatlto] Add FatLTOCleanup pass (PR #125911)

[Paul Kirth via llvm-branch-commits]

https://github.com/ilovepi edited 
https://github.com/llvm/llvm-project/pull/125911
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[llvm-branch-commits] [flang] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)

[Pranav Bhandarkar via llvm-branch-commits]

@@ -1730,6 +1730,119 @@ buildDependData(std::optional dependKinds, 
OperandRange dependVars,
   }
 }
 
+namespace {
+/// TaskContextStructManager takes care of creating and freeing a structure
+/// containing information needed by the task body to execute.
+class TaskContextStructManager {
+public:
+  TaskContextStructManager(llvm::IRBuilderBase &builder,
+   LLVM::ModuleTranslation &moduleTranslation,
+   MutableArrayRef privateDecls)
+  : builder{builder}, moduleTranslation{moduleTranslation},
+privateDecls{privateDecls} {}
+
+  /// Creates a heap allocated struct containing space for each private
+  /// variable. Invariant: privateVarTypes, privateDecls, and the elements of
+  /// the structure should all have the same order (although privateDecls which
+  /// do not read from the mold argument are skipped).
+  void generateTaskContextStruct();
+
+  /// Create GEPs to access each member of the structure representing a private
+  /// variable, adding them to llvmPrivateVars. Null values are added where
+  /// private decls were skipped so that the ordering continues to match the
+  /// private decls.
+  void createGEPsToPrivateVars();
+
+  /// De-allocate the task context structure.
+  void freeStructPtr();
+
+  MutableArrayRef getLLVMPrivateVars() {
+return llvmPrivateVars;
+  }
+
+  llvm::Value *getStructPtr() { return structPtr; }
+
+private:
+  llvm::IRBuilderBase &builder;
+  LLVM::ModuleTranslation &moduleTranslation;
+  MutableArrayRef privateDecls;
+
+  /// The type of each member of the structure, in order.
+  SmallVector privateVarTypes;
+
+  /// LLVM values for each private variable, or null if that private variable 
is
+  /// not included in the task context structure
+  SmallVector llvmPrivateVars;
+
+  /// A pointer to the structure containing context for this task.
+  llvm::Value *structPtr = nullptr;
+  /// The type of the structure
+  llvm::Type *structTy = nullptr;
+};
+} // namespace
+
+void TaskContextStructManager::generateTaskContextStruct() {
+  if (privateDecls.empty())
+return;
+  privateVarTypes.reserve(privateDecls.size());
+
+  for (omp::PrivateClauseOp &privOp : privateDecls) {
+// Skip private variables which can safely be allocated and initialised
+// inside of the task
+if (!privOp.readsFromMold())
+  continue;
+Type mlirType = privOp.getType();
+privateVarTypes.push_back(moduleTranslation.convertType(mlirType));
+  }
+
+  structTy = llvm::StructType::get(moduleTranslation.getLLVMContext(),
+   privateVarTypes);
+
+  llvm::DataLayout dataLayout =
+  builder.GetInsertBlock()->getModule()->getDataLayout();
+  llvm::Type *intPtrTy = builder.getIntPtrTy(dataLayout);
+  llvm::Constant *allocSize = llvm::ConstantExpr::getSizeOf(structTy);
+
+  // Heap allocate the structure
+  structPtr = builder.CreateMalloc(intPtrTy, structTy, allocSize,
+   /*ArraySize=*/nullptr, /*MallocF=*/nullptr,
+   "omp.task.context_ptr");
+}
+
+void TaskContextStructManager::createGEPsToPrivateVars() {
+  if (!structPtr) {
+assert(privateVarTypes.empty());
+return;
+  }
+
+  // Create GEPs for each struct member and initialize llvmPrivateVars to point
+  llvmPrivateVars.clear();
+  llvmPrivateVars.reserve(privateVarTypes.size());

bhandarkar-pranav wrote:

Since we store `nullptr` for private decls that dont read from the mold 
argument, we might as well reserve `privateDecls.size()`

https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [flang] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)

[Pranav Bhandarkar via llvm-branch-commits]

@@ -1730,6 +1730,119 @@ buildDependData(std::optional dependKinds, 
OperandRange dependVars,
   }
 }
 
+namespace {
+/// TaskContextStructManager takes care of creating and freeing a structure
+/// containing information needed by the task body to execute.
+class TaskContextStructManager {
+public:
+  TaskContextStructManager(llvm::IRBuilderBase &builder,
+   LLVM::ModuleTranslation &moduleTranslation,
+   MutableArrayRef privateDecls)
+  : builder{builder}, moduleTranslation{moduleTranslation},
+privateDecls{privateDecls} {}
+
+  /// Creates a heap allocated struct containing space for each private
+  /// variable. Invariant: privateVarTypes, privateDecls, and the elements of
+  /// the structure should all have the same order (although privateDecls which
+  /// do not read from the mold argument are skipped).
+  void generateTaskContextStruct();
+
+  /// Create GEPs to access each member of the structure representing a private
+  /// variable, adding them to llvmPrivateVars. Null values are added where
+  /// private decls were skipped so that the ordering continues to match the
+  /// private decls.
+  void createGEPsToPrivateVars();
+
+  /// De-allocate the task context structure.
+  void freeStructPtr();
+
+  MutableArrayRef getLLVMPrivateVars() {
+return llvmPrivateVars;
+  }
+
+  llvm::Value *getStructPtr() { return structPtr; }
+
+private:
+  llvm::IRBuilderBase &builder;
+  LLVM::ModuleTranslation &moduleTranslation;
+  MutableArrayRef privateDecls;
+
+  /// The type of each member of the structure, in order.
+  SmallVector privateVarTypes;
+
+  /// LLVM values for each private variable, or null if that private variable 
is
+  /// not included in the task context structure
+  SmallVector llvmPrivateVars;

bhandarkar-pranav wrote:

nit: Wouldn't `llvmPrivateVarGEPs` be more descriptive?

For context, I felt the need on line 1926 below
```
 for (auto [privDecl, mlirPrivVar, blockArg, llvmPrivateVarAlloc] :
   llvm::zip_equal(privateDecls, mlirPrivateVars, privateBlockArgs,
   taskStructMgr.getLLVMPrivateVars())) {
```

https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [flang] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)

[Pranav Bhandarkar via llvm-branch-commits]

@@ -1794,38 +1909,114 @@ convertOmpTaskOp(omp::TaskOp taskOp, 
llvm::IRBuilderBase &builder,
   moduleTranslation, allocaIP);
 
   // Allocate and initialize private variables
-  // TODO: package private variables up in a structure
   builder.SetInsertPoint(initBlock->getTerminator());
-  for (auto [privDecl, mlirPrivVar, blockArg] :
-   llvm::zip_equal(privateDecls, mlirPrivateVars, privateBlockArgs)) {
-llvm::Type *llvmAllocType =
-moduleTranslation.convertType(privDecl.getType());
 
-// Allocations:
-builder.SetInsertPoint(allocaIP.getBlock()->getTerminator());
-llvm::Value *llvmPrivateVar = builder.CreateAlloca(
-llvmAllocType, /*ArraySize=*/nullptr, "omp.private.alloc");
+  // Create task variable structure
+  taskStructMgr.generateTaskContextStruct();
+  // GEPs so that we can initialize the variables. Don't use these GEPs inside
+  // of the body otherwise it will be the GEP not the struct which is fowarded
+  // to the outlined function. GEPs forwarded in this way are passed in a
+  // stack-allocated (by OpenMPIRBuilder) structure which is not safe for tasks
+  // which may not be executed until after the current stack frame goes out of
+  // scope.
+  taskStructMgr.createGEPsToPrivateVars();
+
+  for (auto [privDecl, mlirPrivVar, blockArg, llvmPrivateVarAlloc] :
+   llvm::zip_equal(privateDecls, mlirPrivateVars, privateBlockArgs,
+   taskStructMgr.getLLVMPrivateVars())) {
+if (!privDecl.readsFromMold())
+  // to be handled inside the task
+  continue;
+assert(llvmPrivateVarAlloc &&
+   "reads from mold so shouldn't have been skipped");
 
-// builder.SetInsertPoint(initBlock->getTerminator());
-auto err =
+llvm::Expected privateVarOrErr =
 initPrivateVar(builder, moduleTranslation, privDecl, mlirPrivVar,
-   blockArg, llvmPrivateVar, llvmPrivateVars, initBlock);
-if (err)
+   blockArg, llvmPrivateVarAlloc, initBlock);
+if (auto err = privateVarOrErr.takeError())
   return handleError(std::move(err), *taskOp.getOperation());
+
+llvm::IRBuilderBase::InsertPointGuard guard(builder);
+builder.SetInsertPoint(builder.GetInsertBlock()->getTerminator());
+
+// TODO: this is a bit of a hack for Fortran character boxes

bhandarkar-pranav wrote:

Could you please elaborate on the problem/special handling here in the comments?

https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [flang] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)

[Pranav Bhandarkar via llvm-branch-commits]

https://github.com/bhandarkar-pranav edited 
https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [llvm] [AVR] Backport #118015 and #121498 (PR #125081)

[Patryk Wychowaniec via llvm-branch-commits]

https://github.com/Patryk27 edited 
https://github.com/llvm/llvm-project/pull/125081
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[llvm-branch-commits] [libcxx] [libc++][chrono] implements GPS clock. (PR #125921)

[Mark de Wever via llvm-branch-commits]

https://github.com/mordante created 
https://github.com/llvm/llvm-project/pull/125921

Completes:
- LWG3359  leap second support should allow for negative leap seconds

Implements parts of:
- P0355 Extending  to Calendars and Time Zones
- P1361 Integration of chrono with text formatting

NOTE The original version of this patch was written before finishing the tzdb 
formatters so need to review the status of the "parts of papers" are they still 
part of are complete after this patch?

>From 75fe952ed151c0f33c8821072667b04e9e5c4b16 Mon Sep 17 00:00:00 2001
From: Mark de Wever 
Date: Tue, 4 Feb 2025 20:22:40 +0100
Subject: [PATCH] [libc++][chrono] implements GPS clock.

Completes:
- LWG3359  leap second support should allow for negative leap seconds

Implements parts of:
- P0355 Extending  to Calendars and Time Zones
- P1361 Integration of chrono with text formatting

NOTE The original version of this patch was written before finishing the
tzdb formatters so need to review the status of the "parts of papers"
are they still part of are complete after this patch?
---
 libcxx/docs/Status/FormatPaper.csv|   2 +-
 libcxx/include/CMakeLists.txt |   1 +
 libcxx/include/__chrono/convert_to_tm.h   |   6 +
 libcxx/include/__chrono/formatter.h   |  14 +
 libcxx/include/__chrono/gps_clock.h   |  84 ++
 libcxx/include/__chrono/ostream.h |   7 +
 libcxx/include/chrono |  29 +
 libcxx/include/module.modulemap   |   4 +
 libcxx/modules/std/chrono.inc |   2 -
 .../diagnostics/chrono.nodiscard.verify.cpp   |  11 +
 .../time.clock.gps/gps_time.ostream.pass.cpp  | 164 +++
 .../time.clock.gps.members/from_utc.pass.cpp  | 158 +++
 .../time.clock.gps.members/now.pass.cpp   |  33 +
 .../time.clock.gps.members/to_utc.pass.cpp| 153 +++
 .../time.clock.gps/types.compile.pass.cpp |  60 ++
 .../time/time.syn/formatter.gps_time.pass.cpp | 990 ++
 16 files changed, 1715 insertions(+), 3 deletions(-)
 create mode 100644 libcxx/include/__chrono/gps_clock.h
 create mode 100644 
libcxx/test/std/time/time.clock/time.clock.gps/gps_time.ostream.pass.cpp
 create mode 100644 
libcxx/test/std/time/time.clock/time.clock.gps/time.clock.gps.members/from_utc.pass.cpp
 create mode 100644 
libcxx/test/std/time/time.clock/time.clock.gps/time.clock.gps.members/now.pass.cpp
 create mode 100644 
libcxx/test/std/time/time.clock/time.clock.gps/time.clock.gps.members/to_utc.pass.cpp
 create mode 100644 
libcxx/test/std/time/time.clock/time.clock.gps/types.compile.pass.cpp
 create mode 100644 libcxx/test/std/time/time.syn/formatter.gps_time.pass.cpp

diff --git a/libcxx/docs/Status/FormatPaper.csv 
b/libcxx/docs/Status/FormatPaper.csv
index beec97b8c01790c..6387b5ac20a3d9a 100644
--- a/libcxx/docs/Status/FormatPaper.csv
+++ b/libcxx/docs/Status/FormatPaper.csv
@@ -4,7 +4,7 @@ Section,Description,Dependencies,Assignee,Status,First released 
version
 `[time.syn] `_,"Formatter 
``chrono::sys_time``",,Mark de Wever,|Complete|,17
 `[time.syn] `_,"Formatter 
``chrono::utc_time``",A  implementation,Mark de 
Wever,|Complete|,20
 `[time.syn] `_,"Formatter 
``chrono::tai_time``",,Mark de Wever,|Complete|,21
-`[time.syn] `_,"Formatter 
``chrono::gps_time``",A  implementation,Mark de Wever,,,
+`[time.syn] `_,"Formatter 
``chrono::gps_time``",,Mark de Wever,|Complete|,21
 `[time.syn] `_,"Formatter 
``chrono::file_time``",,Mark de Wever,|Complete|,17
 `[time.syn] `_,"Formatter 
``chrono::local_time``",,Mark de Wever,|Complete|,17
 `[time.syn] `_,"Formatter 
``chrono::local-time-format-t``",,,|Nothing To Do|,
diff --git a/libcxx/include/CMakeLists.txt b/libcxx/include/CMakeLists.txt
index ce805b4eb7b8b4f..4aab32a7850db6e 100644
--- a/libcxx/include/CMakeLists.txt
+++ b/libcxx/include/CMakeLists.txt
@@ -256,6 +256,7 @@ set(files
   __chrono/exception.h
   __chrono/file_clock.h
   __chrono/formatter.h
+  __chrono/gps_clock.h
   __chrono/hh_mm_ss.h
   __chrono/high_resolution_clock.h
   __chrono/leap_second.h
diff --git a/libcxx/include/__chrono/convert_to_tm.h 
b/libcxx/include/__chrono/convert_to_tm.h
index d9ccf693160d292..0a6b62772609162 100644
--- a/libcxx/include/__chrono/convert_to_tm.h
+++ b/libcxx/include/__chrono/convert_to_tm.h
@@ -15,6 +15,7 @@
 #include <__chrono/day.h>
 #include <__chrono/duration.h>
 #include <__chrono/file_clock.h>
+#include <__chrono/gps_clock.h>
 #include <__chrono/hh_mm_ss.h>
 #include <__chrono/local_info.h>
 #include <__chrono/month.h>
@@ -124,6 +125,11 @@ _LIBCPP_HIDE_FROM_ABI _Tm 
__convert_to_tm(chrono::tai_time<_Duration> __tp) {
   return 
std::__convert_to_tm<_Tm>(chrono::sys_time<_Rp>{__tp.time_since_epoch() - 
__offset});
 }
 
+template 
+_LIBCPP_HIDE_FROM_ABI _Tm __con

[llvm-branch-commits] [clang] [flang] [lld] [llvm] [Flang] LLVM_ENABLE_RUNTIMES=flang-rt (PR #110217)

[via llvm-branch-commits]

h-vetinari wrote:

The last commit from main here is 2a84e1e65ad7f84c2dbcf37241a7d1805a523e0d (see 
branch 
[history](https://github.com/llvm/llvm-project/commits/users/meinersbur/flang_runtime/)),
 which means that the fix you're referring to 
(https://github.com/llvm/llvm-project/commit/7fa1257c35581268deb5f0fc2faa3ae46358f958)
 is already included. :)

@meinersbur, let me know when I should try rebuilding this again.

https://github.com/llvm/llvm-project/pull/110217
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[llvm-branch-commits] [llvm] release/20.x: [RISCV] Use getSignedConstant for negative values. (#125903) (PR #125953)

[via llvm-branch-commits]

https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/125953

Backport 0d7ee520d3a9b8997adf8eaaa22b33db9659d94e

Requested by: @topperc

>From faa55e48821c02017d0e9c71602c46467de9fd6e Mon Sep 17 00:00:00 2001
From: Craig Topper 
Date: Wed, 5 Feb 2025 14:49:01 -0800
Subject: [PATCH] [RISCV] Use getSignedConstant for negative values. (#125903)

The APInt constructor asserts if bits are set past the size of the APInt
unless it is signed. This currently fails on RV32 because more than XLen
bits are set.

(cherry picked from commit 0d7ee520d3a9b8997adf8eaaa22b33db9659d94e)
---
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 4 ++--
 llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll  | 1 +
 llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll | 1 +
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp 
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 8d09e534b1858bc..8b5ee3e67ce637c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -16297,7 +16297,7 @@ static SDValue performVP_REVERSECombine(SDNode *N, 
SelectionDAG &DAG,
   SDValue Temp2 = DAG.getNode(ISD::MUL, DL, XLenVT, Temp1,
   DAG.getConstant(ElemWidthByte, DL, XLenVT));
   SDValue Base = DAG.getNode(ISD::ADD, DL, XLenVT, VPLoad->getBasePtr(), 
Temp2);
-  SDValue Stride = DAG.getConstant(-ElemWidthByte, DL, XLenVT);
+  SDValue Stride = DAG.getSignedConstant(-ElemWidthByte, DL, XLenVT);
 
   MachineFunction &MF = DAG.getMachineFunction();
   MachinePointerInfo PtrInfo(VPLoad->getAddressSpace());
@@ -16358,7 +16358,7 @@ static SDValue performVP_STORECombine(SDNode *N, 
SelectionDAG &DAG,
   DAG.getConstant(ElemWidthByte, DL, XLenVT));
   SDValue Base =
   DAG.getNode(ISD::ADD, DL, XLenVT, VPStore->getBasePtr(), Temp2);
-  SDValue Stride = DAG.getConstant(-ElemWidthByte, DL, XLenVT);
+  SDValue Stride = DAG.getSignedConstant(-ElemWidthByte, DL, XLenVT);
 
   MachineFunction &MF = DAG.getMachineFunction();
   MachinePointerInfo PtrInfo(VPStore->getAddressSpace());
diff --git a/llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll 
b/llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll
index 50e26bd14107002..24d8e56fa17febc 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll
@@ -1,4 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+f,+v -verify-machineinstrs < %s | 
FileCheck %s
 ; RUN: llc -mtriple=riscv64 -mattr=+f,+v -verify-machineinstrs < %s | 
FileCheck %s
 
 define  @test_reverse_load_combiner(* 
%ptr, i32 zeroext %evl) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll 
b/llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll
index 4896a1367935ac3..a2466c48b0ab7d9 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll
@@ -1,4 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+f,+v -verify-machineinstrs < %s | 
FileCheck %s
 ; RUN: llc -mtriple=riscv64 -mattr=+f,+v -verify-machineinstrs < %s | 
FileCheck %s
 
 define void @test_store_reverse_combiner( %val, * %ptr, i32 zeroext %evl) {

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[llvm-branch-commits] [llvm] release/20.x: [RISCV] Use getSignedConstant for negative values. (#125903) (PR #125953)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-backend-risc-v

Author: None (llvmbot)


Changes

Backport 0d7ee520d3a9b8997adf8eaaa22b33db9659d94e

Requested by: @topperc

---
Full diff: https://github.com/llvm/llvm-project/pull/125953.diff


3 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+2-2) 
- (modified) llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll (+1) 
- (modified) llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll (+1) 


``diff
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp 
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 8d09e534b1858bc..8b5ee3e67ce637c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -16297,7 +16297,7 @@ static SDValue performVP_REVERSECombine(SDNode *N, 
SelectionDAG &DAG,
   SDValue Temp2 = DAG.getNode(ISD::MUL, DL, XLenVT, Temp1,
   DAG.getConstant(ElemWidthByte, DL, XLenVT));
   SDValue Base = DAG.getNode(ISD::ADD, DL, XLenVT, VPLoad->getBasePtr(), 
Temp2);
-  SDValue Stride = DAG.getConstant(-ElemWidthByte, DL, XLenVT);
+  SDValue Stride = DAG.getSignedConstant(-ElemWidthByte, DL, XLenVT);
 
   MachineFunction &MF = DAG.getMachineFunction();
   MachinePointerInfo PtrInfo(VPLoad->getAddressSpace());
@@ -16358,7 +16358,7 @@ static SDValue performVP_STORECombine(SDNode *N, 
SelectionDAG &DAG,
   DAG.getConstant(ElemWidthByte, DL, XLenVT));
   SDValue Base =
   DAG.getNode(ISD::ADD, DL, XLenVT, VPStore->getBasePtr(), Temp2);
-  SDValue Stride = DAG.getConstant(-ElemWidthByte, DL, XLenVT);
+  SDValue Stride = DAG.getSignedConstant(-ElemWidthByte, DL, XLenVT);
 
   MachineFunction &MF = DAG.getMachineFunction();
   MachinePointerInfo PtrInfo(VPStore->getAddressSpace());
diff --git a/llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll 
b/llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll
index 50e26bd14107002..24d8e56fa17febc 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll
@@ -1,4 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+f,+v -verify-machineinstrs < %s | 
FileCheck %s
 ; RUN: llc -mtriple=riscv64 -mattr=+f,+v -verify-machineinstrs < %s | 
FileCheck %s
 
 define  @test_reverse_load_combiner(* 
%ptr, i32 zeroext %evl) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll 
b/llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll
index 4896a1367935ac3..a2466c48b0ab7d9 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll
@@ -1,4 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+f,+v -verify-machineinstrs < %s | 
FileCheck %s
 ; RUN: llc -mtriple=riscv64 -mattr=+f,+v -verify-machineinstrs < %s | 
FileCheck %s
 
 define void @test_store_reverse_combiner( %val, * %ptr, i32 zeroext %evl) {

``




https://github.com/llvm/llvm-project/pull/125953
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[llvm-branch-commits] [llvm] release/20.x: [RISCV] Use getSignedConstant for negative values. (#125903) (PR #125953)

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[llvm-branch-commits] [llvm] release/20.x: [RISCV] Use getSignedConstant for negative values. (#125903) (PR #125953)

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https://github.com/preames approved this pull request.

LGTM

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[llvm-branch-commits] [llvm] [llvm] Extract and propagate indirect call type id (PR #87575)

[via llvm-branch-commits]

https://github.com/Prabhuk updated 
https://github.com/llvm/llvm-project/pull/87575

>From 1a8d810d352fbe84c0521c7614689b60ade693c8 Mon Sep 17 00:00:00 2001
From: Necip Fazil Yildiran 
Date: Tue, 19 Nov 2024 15:25:34 -0800
Subject: [PATCH] Fixed the tests and addressed most of the review comments.

Created using spr 1.3.6-beta.1
---
 llvm/include/llvm/CodeGen/MachineFunction.h   | 15 +++--
 .../CodeGen/AArch64/call-site-info-typeid.ll  | 28 +++--
 .../test/CodeGen/ARM/call-site-info-typeid.ll | 28 +++--
 .../CodeGen/MIR/X86/call-site-info-typeid.ll  | 58 ---
 .../CodeGen/MIR/X86/call-site-info-typeid.mir | 13 ++---
 .../CodeGen/Mips/call-site-info-typeid.ll | 28 +++--
 .../test/CodeGen/X86/call-site-info-typeid.ll | 28 +++--
 7 files changed, 71 insertions(+), 127 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h 
b/llvm/include/llvm/CodeGen/MachineFunction.h
index bb0b87a3a04a37b..44633df38a6516e 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -493,7 +493,7 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
 /// Callee type id.
 ConstantInt *TypeId = nullptr;
 
-CallSiteInfo() {}
+CallSiteInfo() = default;
 
 /// Extracts the numeric type id from the CallBase's type operand bundle,
 /// and sets TypeId. This is used as type id for the indirect call in the
@@ -503,12 +503,11 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
   if (!CB.isIndirectCall())
 return;
 
-  auto Opt = CB.getOperandBundle(LLVMContext::OB_type);
-  if (!Opt.has_value()) {
-errs() << "warning: cannot find indirect call type operand bundle for  
"
-  "call graph section\n";
+  std::optional Opt =
+  CB.getOperandBundle(LLVMContext::OB_type);
+  // Return if the operand bundle for call graph section cannot be found.
+  if (!Opt.has_value())
 return;
-  }
 
   // Get generalized type id string
   auto OB = Opt.value();
@@ -520,9 +519,9 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
  "invalid type identifier");
 
   // Compute numeric type id from generalized type id string
-  uint64_t TypeIdVal = llvm::MD5Hash(TypeIdStr->getString());
+  uint64_t TypeIdVal = MD5Hash(TypeIdStr->getString());
   IntegerType *Int64Ty = Type::getInt64Ty(CB.getContext());
-  TypeId = llvm::ConstantInt::get(Int64Ty, TypeIdVal, /*IsSigned=*/false);
+  TypeId = ConstantInt::get(Int64Ty, TypeIdVal, /*IsSigned=*/false);
 }
   };
 
diff --git a/llvm/test/CodeGen/AArch64/call-site-info-typeid.ll 
b/llvm/test/CodeGen/AArch64/call-site-info-typeid.ll
index f0a6b44755c5c89..f3b98c2c7a395d8 100644
--- a/llvm/test/CodeGen/AArch64/call-site-info-typeid.ll
+++ b/llvm/test/CodeGen/AArch64/call-site-info-typeid.ll
@@ -1,14 +1,9 @@
-; Tests that call site type ids can be extracted and set from type operand
-; bundles.
+;; Tests that call site type ids can be extracted and set from type operand
+;; bundles.
 
-; Verify the exact typeId value to ensure it is not garbage but the value
-; computed as the type id from the type operand bundle.
-; RUN: llc --call-graph-section -mtriple aarch64-linux-gnu %s 
-stop-before=finalize-isel -o - | FileCheck %s
-
-; ModuleID = 'test.c'
-source_filename = "test.c"
-target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
-target triple = "aarch64-unknown-linux-gnu"
+;; Verify the exact typeId value to ensure it is not garbage but the value
+;; computed as the type id from the type operand bundle.
+; RUN: llc --call-graph-section -mtriple aarch64-linux-gnu < %s 
-stop-before=finalize-isel -o - | FileCheck %s
 
 define dso_local void @foo(i8 signext %a) !type !3 {
 entry:
@@ -19,10 +14,10 @@ entry:
 define dso_local i32 @main() !type !4 {
 entry:
   %retval = alloca i32, align 4
-  %fp = alloca void (i8)*, align 8
-  store i32 0, i32* %retval, align 4
-  store void (i8)* @foo, void (i8)** %fp, align 8
-  %0 = load void (i8)*, void (i8)** %fp, align 8
+  %fp = alloca ptr, align 8
+  store i32 0, ptr %retval, align 4
+  store ptr @foo, ptr %fp, align 8
+  %0 = load ptr, ptr %fp, align 8
   ; CHECK: callSites:
   ; CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: [], typeId:
   ; CHECK-NEXT: 7854600665770582568 }
@@ -30,10 +25,5 @@ entry:
   ret i32 0
 }
 
-!llvm.module.flags = !{!0, !1, !2}
-
-!0 = !{i32 1, !"wchar_size", i32 4}
-!1 = !{i32 7, !"uwtable", i32 1}
-!2 = !{i32 7, !"frame-pointer", i32 2}
 !3 = !{i64 0, !"_ZTSFvcE.generalized"}
 !4 = !{i64 0, !"_ZTSFiE.generalized"}
diff --git a/llvm/test/CodeGen/ARM/call-site-info-typeid.ll 
b/llvm/test/CodeGen/ARM/call-site-info-typeid.ll
index ec7f8a425051b8b..9feeef9a564cc4f 100644
--- a/llvm/test/CodeGen/ARM/call-site-info-typeid.ll
+++ b/llvm/test/CodeGen/ARM/call-site-info-typeid.ll
@@ -1,14 +1,9 @@
-; Tests that call site type ids can be extracted and set from type operand
-; bundles.
+;; Tests 

[llvm-branch-commits] [clang] [llvm] [llvm] Introduce type id operand bundle (PR #87573)

[via llvm-branch-commits]

https://github.com/Prabhuk updated 
https://github.com/llvm/llvm-project/pull/87573

>From a8a5848885e12c771f12cfa33b4dbc6a0272e925 Mon Sep 17 00:00:00 2001
From: Prabhuk 
Date: Mon, 22 Apr 2024 11:34:04 -0700
Subject: [PATCH 1/6] Update clang/lib/CodeGen/CodeGenModule.cpp

Cleaner if checks.

Co-authored-by: Matt Arsenault 
---
 clang/lib/CodeGen/CodeGenModule.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index e19bbee996f5829..ff1586d2fa8abeb 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -2711,7 +2711,7 @@ void 
CodeGenModule::CreateFunctionTypeMetadataForIcall(const FunctionDecl *FD,
 void CodeGenModule::CreateFunctionTypeMetadataForIcall(const QualType &QT,
llvm::CallBase *CB) {
   // Only if needed for call graph section and only for indirect calls.
-  if (!(CodeGenOpts.CallGraphSection && CB && CB->isIndirectCall()))
+  if (!CodeGenOpts.CallGraphSection || !CB || !CB->isIndirectCall())
 return;
 
   auto *MD = CreateMetadataIdentifierGeneralized(QT);

>From 019b2ca5e1c263183ed114e0b967b4e77b4a17a8 Mon Sep 17 00:00:00 2001
From: Prabhuk 
Date: Mon, 22 Apr 2024 11:34:31 -0700
Subject: [PATCH 2/6] Update clang/lib/CodeGen/CodeGenModule.cpp

Update the comments as suggested.

Co-authored-by: Matt Arsenault 
---
 clang/lib/CodeGen/CodeGenModule.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index ff1586d2fa8abeb..5635a87d2358a70 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -2680,9 +2680,9 @@ void 
CodeGenModule::CreateFunctionTypeMetadataForIcall(const FunctionDecl *FD,
   bool EmittedMDIdGeneralized = false;
   if (CodeGenOpts.CallGraphSection &&
   (!F->hasLocalLinkage() ||
-   F->getFunction().hasAddressTaken(nullptr, /* IgnoreCallbackUses */ true,
-/* IgnoreAssumeLikeCalls */ true,
-/* IgnoreLLVMUsed */ false))) {
+   F->getFunction().hasAddressTaken(nullptr, /*IgnoreCallbackUses=*/ true,
+/*IgnoreAssumeLikeCalls=*/ true,
+/*IgnoreLLVMUsed=*/ false))) {
 F->addTypeMetadata(0, CreateMetadataIdentifierGeneralized(FD->getType()));
 EmittedMDIdGeneralized = true;
   }

>From 99242900c51778abd4b7e7f4361b09202b7abcda Mon Sep 17 00:00:00 2001
From: Prabhuk 
Date: Mon, 29 Apr 2024 11:53:40 -0700
Subject: [PATCH 3/6] dyn_cast to isa

Created using spr 1.3.6-beta.1
---
 clang/lib/CodeGen/CGCall.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp
index 526a63b24ff8341..45033ced1d83448 100644
--- a/clang/lib/CodeGen/CGCall.cpp
+++ b/clang/lib/CodeGen/CGCall.cpp
@@ -5713,8 +5713,8 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo 
&CallInfo,
 if (callOrInvoke && *callOrInvoke && (*callOrInvoke)->isIndirectCall()) {
   if (const FunctionDecl *FD = dyn_cast_or_null(TargetDecl)) 
{
 // Type id metadata is set only for C/C++ contexts.
-if (dyn_cast(FD) || dyn_cast(FD) ||
-dyn_cast(FD)) {
+if (isa(FD) || isa(FD) ||
+isa(FD)) {
   CGM.CreateFunctionTypeMetadataForIcall(FD->getType(), *callOrInvoke);
 }
   }

>From 24882b15939b781bcf28d87fdf4f6e8834b6cfde Mon Sep 17 00:00:00 2001
From: prabhukr 
Date: Tue, 10 Dec 2024 14:54:27 -0800
Subject: [PATCH 4/6] Address review comments. Break llvm and clang patches.

Created using spr 1.3.6-beta.1
---
 llvm/lib/IR/Verifier.cpp  | 7 +++
 llvm/test/Verifier/operand-bundles.ll | 4 ++--
 2 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index 0ad7ba555bfade6..b72672e7b8e5614 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -3707,10 +3707,9 @@ void Verifier::visitCallBase(CallBase &Call) {
 if (Intrinsic::ID ID = (Intrinsic::ID)F->getIntrinsicID())
   visitIntrinsicCall(ID, Call);
 
-  // Verify that a callsite has at most one "deopt", at most one "funclet", at
-  // most one "gc-transition", at most one "cfguardtarget", at most one "type",
-  // at most one "preallocated" operand bundle, and at most one "ptrauth"
-  // operand bundle.
+  // Verify that a callsite has at most one operand bundle for each of the
+  // following: "deopt", "funclet", "gc-transition", "cfguardtarget", "type",
+  // "preallocated", and "ptrauth".
   bool FoundDeoptBundle = false, FoundFuncletBundle = false,
FoundGCTransitionBundle = false, FoundCFGuardTargetBundle = false,
FoundPreallocatedBundle = false, FoundGCLiveBundle = false,
diff --git a/llvm/test/Verifier/operand-bundles.ll 

[llvm-branch-commits] [llvm] Add option to emit call graph section (PR #87572)

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https://github.com/Prabhuk updated 
https://github.com/llvm/llvm-project/pull/87572


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[llvm-branch-commits] [llvm][AsmPrinter] Emit call graph section (PR #87576)

[via llvm-branch-commits]

https://github.com/Prabhuk updated 
https://github.com/llvm/llvm-project/pull/87576


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[llvm-branch-commits] [llvm] [llvm] Extend CallSiteInfo with TypeId (PR #87574)

[via llvm-branch-commits]

https://github.com/Prabhuk updated 
https://github.com/llvm/llvm-project/pull/87574

>From 1d7ee612e408ee7e64e984eb08e6d7089a435d09 Mon Sep 17 00:00:00 2001
From: Necip Fazil Yildiran 
Date: Sun, 2 Feb 2025 00:58:49 +
Subject: [PATCH] Simplify MIR test.

Created using spr 1.3.6-beta.1
---
 .../CodeGen/MIR/X86/call-site-info-typeid.mir | 21 ++-
 1 file changed, 6 insertions(+), 15 deletions(-)

diff --git a/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir 
b/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
index 5ab797bfcc18f6..a99ee50a608fbc 100644
--- a/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
+++ b/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
@@ -8,11 +8,6 @@
 # CHECK-NEXT: 123456789 }
 
 --- |
-  ; ModuleID = 'test.ll'
-  source_filename = "test.ll"
-  target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
-  target triple = "x86_64-unknown-linux-gnu"
-  
   define dso_local void @foo(i8 signext %a) {
   entry:
 ret void
@@ -21,10 +16,10 @@
   define dso_local i32 @main() {
   entry:
 %retval = alloca i32, align 4
-%fp = alloca void (i8)*, align 8
-store i32 0, i32* %retval, align 4
-store void (i8)* @foo, void (i8)** %fp, align 8
-%0 = load void (i8)*, void (i8)** %fp, align 8
+%fp = alloca ptr, align 8
+store i32 0, ptr %retval, align 4
+store ptr @foo, ptr %fp, align 8
+%0 = load ptr, ptr %fp, align 8
 call void %0(i8 signext 97)
 ret i32 0
   }
@@ -42,12 +37,8 @@ body: |
 name:main
 tracksRegLiveness: true
 stack:
-  - { id: 0, name: retval, type: default, offset: 0, size: 4, alignment: 4, 
-  stack-id: default, callee-saved-register: '', callee-saved-restored: 
true, 
-  debug-info-variable: '', debug-info-expression: '', debug-info-location: 
'' }
-  - { id: 1, name: fp, type: default, offset: 0, size: 8, alignment: 8, 
-  stack-id: default, callee-saved-register: '', callee-saved-restored: 
true, 
-  debug-info-variable: '', debug-info-expression: '', debug-info-location: 
'' }
+  - { id: 0, name: retval, size: 4, alignment: 4 }
+  - { id: 1, name: fp, size: 8, alignment: 8 }
 callSites:
   - { bb: 0, offset: 6, fwdArgRegs: [], typeId: 
 123456789 }

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[llvm-branch-commits] [llvm] Add option to emit call graph section (PR #87572)

[via llvm-branch-commits]

https://github.com/Prabhuk updated 
https://github.com/llvm/llvm-project/pull/87572


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[llvm-branch-commits] [llvm] [llvm] Extend CallSiteInfo with TypeId (PR #87574)

[via llvm-branch-commits]

https://github.com/Prabhuk updated 
https://github.com/llvm/llvm-project/pull/87574

>From 1d7ee612e408ee7e64e984eb08e6d7089a435d09 Mon Sep 17 00:00:00 2001
From: Necip Fazil Yildiran 
Date: Sun, 2 Feb 2025 00:58:49 +
Subject: [PATCH] Simplify MIR test.

Created using spr 1.3.6-beta.1
---
 .../CodeGen/MIR/X86/call-site-info-typeid.mir | 21 ++-
 1 file changed, 6 insertions(+), 15 deletions(-)

diff --git a/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir 
b/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
index 5ab797bfcc18f6b..a99ee50a608fbc3 100644
--- a/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
+++ b/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
@@ -8,11 +8,6 @@
 # CHECK-NEXT: 123456789 }
 
 --- |
-  ; ModuleID = 'test.ll'
-  source_filename = "test.ll"
-  target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
-  target triple = "x86_64-unknown-linux-gnu"
-  
   define dso_local void @foo(i8 signext %a) {
   entry:
 ret void
@@ -21,10 +16,10 @@
   define dso_local i32 @main() {
   entry:
 %retval = alloca i32, align 4
-%fp = alloca void (i8)*, align 8
-store i32 0, i32* %retval, align 4
-store void (i8)* @foo, void (i8)** %fp, align 8
-%0 = load void (i8)*, void (i8)** %fp, align 8
+%fp = alloca ptr, align 8
+store i32 0, ptr %retval, align 4
+store ptr @foo, ptr %fp, align 8
+%0 = load ptr, ptr %fp, align 8
 call void %0(i8 signext 97)
 ret i32 0
   }
@@ -42,12 +37,8 @@ body: |
 name:main
 tracksRegLiveness: true
 stack:
-  - { id: 0, name: retval, type: default, offset: 0, size: 4, alignment: 4, 
-  stack-id: default, callee-saved-register: '', callee-saved-restored: 
true, 
-  debug-info-variable: '', debug-info-expression: '', debug-info-location: 
'' }
-  - { id: 1, name: fp, type: default, offset: 0, size: 8, alignment: 8, 
-  stack-id: default, callee-saved-register: '', callee-saved-restored: 
true, 
-  debug-info-variable: '', debug-info-expression: '', debug-info-location: 
'' }
+  - { id: 0, name: retval, size: 4, alignment: 4 }
+  - { id: 1, name: fp, size: 8, alignment: 8 }
 callSites:
   - { bb: 0, offset: 6, fwdArgRegs: [], typeId: 
 123456789 }

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[llvm-branch-commits] [llvm][AsmPrinter] Emit call graph section (PR #87576)

[via llvm-branch-commits]

https://github.com/Prabhuk updated 
https://github.com/llvm/llvm-project/pull/87576


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[llvm-branch-commits] [clang] release/20.x: [clang] Support member function poiners in Decl::getFunctionType() (#125077) (PR #125956)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: None (llvmbot)


Changes

Backport 692c9b210728323ac499a402ee6eb901f35856f2

Requested by: @MacDue

---
Full diff: https://github.com/llvm/llvm-project/pull/125956.diff


6 Files Affected:

- (modified) clang/include/clang/AST/DeclBase.h (+5-2) 
- (modified) clang/include/clang/Basic/Attr.td (+1-1) 
- (modified) clang/lib/AST/DeclBase.cpp (+2) 
- (modified) clang/test/AST/attr-print-emit.cpp (+5) 
- (added) clang/test/CodeGen/AArch64/sme-attributes-member-function-pointer.cpp 
(+37) 
- (added) clang/test/CodeGen/xfail-alloc-align-fn-pointers.cpp (+10) 


``diff
diff --git a/clang/include/clang/AST/DeclBase.h 
b/clang/include/clang/AST/DeclBase.h
index 2c0c3a8dc2f9d5..3bb82c1572ef9c 100644
--- a/clang/include/clang/AST/DeclBase.h
+++ b/clang/include/clang/AST/DeclBase.h
@@ -1257,8 +1257,11 @@ class alignas(8) Decl {
   int64_t getID() const;
 
   /// Looks through the Decl's underlying type to extract a FunctionType
-  /// when possible. Will return null if the type underlying the Decl does not
-  /// have a FunctionType.
+  /// when possible. This includes direct FunctionDecls, along with various
+  /// function types and typedefs. This includes function pointers/references,
+  /// member function pointers, and optionally if \p BlocksToo is set
+  /// Objective-C block pointers. Returns nullptr if the type underlying the
+  /// Decl does not have a FunctionType.
   const FunctionType *getFunctionType(bool BlocksToo = true) const;
 
   // Looks through the Decl's underlying type to determine if it's a
diff --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index f4ba2bc3c6de31..2a3a29bd2ee1cf 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -198,7 +198,7 @@ def OpenCLKernelFunction
 // inclusive nature of subject testing).
 def HasFunctionProto : SubsetSubjectgetFunctionType(true) != nullptr &&
-  isa(S->getFunctionType())) ||
+   
isa(S->getFunctionType())) ||
isa(S) ||
isa(S)}],
  "non-K&R-style functions">;
diff --git a/clang/lib/AST/DeclBase.cpp b/clang/lib/AST/DeclBase.cpp
index 8506b95f761fe5..adf6053392db37 100644
--- a/clang/lib/AST/DeclBase.cpp
+++ b/clang/lib/AST/DeclBase.cpp
@@ -1203,6 +1203,8 @@ const FunctionType *Decl::getFunctionType(bool BlocksToo) 
const {
 
   if (Ty->isFunctionPointerType())
 Ty = Ty->castAs()->getPointeeType();
+  else if (Ty->isMemberFunctionPointerType())
+Ty = Ty->castAs()->getPointeeType();
   else if (Ty->isFunctionReferenceType())
 Ty = Ty->castAs()->getPointeeType();
   else if (BlocksToo && Ty->isBlockPointerType())
diff --git a/clang/test/AST/attr-print-emit.cpp 
b/clang/test/AST/attr-print-emit.cpp
index a9bca6778d0f1a..77826f8f9af098 100644
--- a/clang/test/AST/attr-print-emit.cpp
+++ b/clang/test/AST/attr-print-emit.cpp
@@ -91,3 +91,8 @@ ANNOTATE_ATTR NONNULL_ATTR void 
fn_non_null_annotated_attr(int *) __attribute__(
 
 [[gnu::nonnull(1)]] [[gnu::always_inline]] void cxx11_attr(int*) ANNOTATE_ATTR;
 // CHECK: {{\[\[}}gnu::nonnull(1)]] {{\[\[}}gnu::always_inline]] void 
cxx11_attr(int *) __attribute__((annotate("Annotated")));
+
+struct Foo;
+
+// CHECK: void as_member_fn_ptr(int *(Foo::*member)(int) 
__attribute__((alloc_size(1;
+void as_member_fn_ptr(int* (Foo::*member)(int)  
__attribute__((alloc_size(1;
diff --git 
a/clang/test/CodeGen/AArch64/sme-attributes-member-function-pointer.cpp 
b/clang/test/CodeGen/AArch64/sme-attributes-member-function-pointer.cpp
new file mode 100644
index 00..ee784c816a0606
--- /dev/null
+++ b/clang/test/CodeGen/AArch64/sme-attributes-member-function-pointer.cpp
@@ -0,0 +1,37 @@
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 
-x c++ -std=c++20  -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK
+
+struct TestStruct;
+
+__arm_new("za", "zt0") void test(TestStruct& TS,
+  void (TestStruct::*streaming_member_ptr)() __arm_streaming,
+  void (TestStruct::*streaming_compat_member)() __arm_streaming_compatible,
+  void (TestStruct::*arm_in_member)() __arm_in("za", "zt0"),
+  void (TestStruct::*arm_inout_member)() __arm_inout("za", "zt0"),
+  void (TestStruct::*arm_preserves_member)() __arm_preserves("za", "zt0"),
+  void (TestStruct::*arm_agnostic_member)() __arm_agnostic("sme_za_state")) {
+
+  // CHECK: call void %{{.*}} [[STREAMING_MEMBER_CALL_ATTRS:#.+]]
+  (TS.*streaming_member_ptr)();
+
+  // CHECK: call void %{{.*}} [[STREAMING_COMPAT_MEMBER_CALL_ATTRS:#.+]]
+  (TS.*streaming_compat_member)();
+
+  // CHECK: call void %{{.*}} [[ARM_IN_MEMBER_CALL_ATTRS:#.+]]
+  (TS.*arm_in_member)();
+
+  // CHECK: call void %{{.*}} [[ARM_INOUT_MEMBER_CALL_ATTRS:#.+]]
+  (TS.*arm_inout_member)();
+
+  // CHECK: call void %{{.*}} [[ARM_PRESERVES_MEMBER_CALL_ATTRS:#.+]]

[llvm-branch-commits] [llvm] [llvm] Extract and propagate indirect call type id (PR #87575)

[via llvm-branch-commits]

https://github.com/Prabhuk updated 
https://github.com/llvm/llvm-project/pull/87575

>From 1a8d810d352fbe84c0521c7614689b60ade693c8 Mon Sep 17 00:00:00 2001
From: Necip Fazil Yildiran 
Date: Tue, 19 Nov 2024 15:25:34 -0800
Subject: [PATCH] Fixed the tests and addressed most of the review comments.

Created using spr 1.3.6-beta.1
---
 llvm/include/llvm/CodeGen/MachineFunction.h   | 15 +++--
 .../CodeGen/AArch64/call-site-info-typeid.ll  | 28 +++--
 .../test/CodeGen/ARM/call-site-info-typeid.ll | 28 +++--
 .../CodeGen/MIR/X86/call-site-info-typeid.ll  | 58 ---
 .../CodeGen/MIR/X86/call-site-info-typeid.mir | 13 ++---
 .../CodeGen/Mips/call-site-info-typeid.ll | 28 +++--
 .../test/CodeGen/X86/call-site-info-typeid.ll | 28 +++--
 7 files changed, 71 insertions(+), 127 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h 
b/llvm/include/llvm/CodeGen/MachineFunction.h
index bb0b87a3a04a37b..44633df38a6516e 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -493,7 +493,7 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
 /// Callee type id.
 ConstantInt *TypeId = nullptr;
 
-CallSiteInfo() {}
+CallSiteInfo() = default;
 
 /// Extracts the numeric type id from the CallBase's type operand bundle,
 /// and sets TypeId. This is used as type id for the indirect call in the
@@ -503,12 +503,11 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
   if (!CB.isIndirectCall())
 return;
 
-  auto Opt = CB.getOperandBundle(LLVMContext::OB_type);
-  if (!Opt.has_value()) {
-errs() << "warning: cannot find indirect call type operand bundle for  
"
-  "call graph section\n";
+  std::optional Opt =
+  CB.getOperandBundle(LLVMContext::OB_type);
+  // Return if the operand bundle for call graph section cannot be found.
+  if (!Opt.has_value())
 return;
-  }
 
   // Get generalized type id string
   auto OB = Opt.value();
@@ -520,9 +519,9 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
  "invalid type identifier");
 
   // Compute numeric type id from generalized type id string
-  uint64_t TypeIdVal = llvm::MD5Hash(TypeIdStr->getString());
+  uint64_t TypeIdVal = MD5Hash(TypeIdStr->getString());
   IntegerType *Int64Ty = Type::getInt64Ty(CB.getContext());
-  TypeId = llvm::ConstantInt::get(Int64Ty, TypeIdVal, /*IsSigned=*/false);
+  TypeId = ConstantInt::get(Int64Ty, TypeIdVal, /*IsSigned=*/false);
 }
   };
 
diff --git a/llvm/test/CodeGen/AArch64/call-site-info-typeid.ll 
b/llvm/test/CodeGen/AArch64/call-site-info-typeid.ll
index f0a6b44755c5c89..f3b98c2c7a395d8 100644
--- a/llvm/test/CodeGen/AArch64/call-site-info-typeid.ll
+++ b/llvm/test/CodeGen/AArch64/call-site-info-typeid.ll
@@ -1,14 +1,9 @@
-; Tests that call site type ids can be extracted and set from type operand
-; bundles.
+;; Tests that call site type ids can be extracted and set from type operand
+;; bundles.
 
-; Verify the exact typeId value to ensure it is not garbage but the value
-; computed as the type id from the type operand bundle.
-; RUN: llc --call-graph-section -mtriple aarch64-linux-gnu %s 
-stop-before=finalize-isel -o - | FileCheck %s
-
-; ModuleID = 'test.c'
-source_filename = "test.c"
-target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
-target triple = "aarch64-unknown-linux-gnu"
+;; Verify the exact typeId value to ensure it is not garbage but the value
+;; computed as the type id from the type operand bundle.
+; RUN: llc --call-graph-section -mtriple aarch64-linux-gnu < %s 
-stop-before=finalize-isel -o - | FileCheck %s
 
 define dso_local void @foo(i8 signext %a) !type !3 {
 entry:
@@ -19,10 +14,10 @@ entry:
 define dso_local i32 @main() !type !4 {
 entry:
   %retval = alloca i32, align 4
-  %fp = alloca void (i8)*, align 8
-  store i32 0, i32* %retval, align 4
-  store void (i8)* @foo, void (i8)** %fp, align 8
-  %0 = load void (i8)*, void (i8)** %fp, align 8
+  %fp = alloca ptr, align 8
+  store i32 0, ptr %retval, align 4
+  store ptr @foo, ptr %fp, align 8
+  %0 = load ptr, ptr %fp, align 8
   ; CHECK: callSites:
   ; CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: [], typeId:
   ; CHECK-NEXT: 7854600665770582568 }
@@ -30,10 +25,5 @@ entry:
   ret i32 0
 }
 
-!llvm.module.flags = !{!0, !1, !2}
-
-!0 = !{i32 1, !"wchar_size", i32 4}
-!1 = !{i32 7, !"uwtable", i32 1}
-!2 = !{i32 7, !"frame-pointer", i32 2}
 !3 = !{i64 0, !"_ZTSFvcE.generalized"}
 !4 = !{i64 0, !"_ZTSFiE.generalized"}
diff --git a/llvm/test/CodeGen/ARM/call-site-info-typeid.ll 
b/llvm/test/CodeGen/ARM/call-site-info-typeid.ll
index ec7f8a425051b8b..9feeef9a564cc4f 100644
--- a/llvm/test/CodeGen/ARM/call-site-info-typeid.ll
+++ b/llvm/test/CodeGen/ARM/call-site-info-typeid.ll
@@ -1,14 +1,9 @@
-; Tests that call site type ids can be extracted and set from type operand
-; bundles.
+;; Tests 

[llvm-branch-commits] [clang] release/20.x: [clang] Support member function poiners in Decl::getFunctionType() (#125077) (PR #125956)

[via llvm-branch-commits]

https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/125956

Backport 692c9b210728323ac499a402ee6eb901f35856f2

Requested by: @MacDue

>From d8cec6dfe6abee77a802b48588bec874eaea Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell 
Date: Mon, 3 Feb 2025 09:37:16 +
Subject: [PATCH] [clang] Support member function poiners in
 Decl::getFunctionType() (#125077)

This seems consistent with the documentation, which claims it:

```
/// Looks through the Decl's underlying type to extract a FunctionType
/// when possible. Will return null if the type underlying the Decl does not
/// have a FunctionType.
const FunctionType *getFunctionType(bool BlocksToo = true) const;
```
Note: This patch rewords this doc comment to clarify it includes various
function pointer types.

Without this, attaching attributes (which use `HasFunctionProto`) to
member function pointers errors with:

```
error: '' only applies to non-K&R-style functions
```

...which does not really make sense, since member functions are not K&C
functions.

With this change the Arm SME TypeAttrs work correctly on member function
pointers.

Note, however, that not all attributes work correctly when applied to
function pointers or member function pointers. For example,
`alloc_align` crashes when applied to a function pointer (on truck):
https://godbolt.org/z/YvMhnhKfx (as it only expects a `FunctionDecl` not
a `ParmVarDecl`). The same crash applies to member function pointers
(for the same reason).

(cherry picked from commit 692c9b210728323ac499a402ee6eb901f35856f2)
---
 clang/include/clang/AST/DeclBase.h|  7 +++-
 clang/include/clang/Basic/Attr.td |  2 +-
 clang/lib/AST/DeclBase.cpp|  2 +
 clang/test/AST/attr-print-emit.cpp|  5 +++
 ...sme-attributes-member-function-pointer.cpp | 37 +++
 .../CodeGen/xfail-alloc-align-fn-pointers.cpp | 10 +
 6 files changed, 60 insertions(+), 3 deletions(-)
 create mode 100644 
clang/test/CodeGen/AArch64/sme-attributes-member-function-pointer.cpp
 create mode 100644 clang/test/CodeGen/xfail-alloc-align-fn-pointers.cpp

diff --git a/clang/include/clang/AST/DeclBase.h 
b/clang/include/clang/AST/DeclBase.h
index 2c0c3a8dc2f9d5c..3bb82c1572ef9c5 100644
--- a/clang/include/clang/AST/DeclBase.h
+++ b/clang/include/clang/AST/DeclBase.h
@@ -1257,8 +1257,11 @@ class alignas(8) Decl {
   int64_t getID() const;
 
   /// Looks through the Decl's underlying type to extract a FunctionType
-  /// when possible. Will return null if the type underlying the Decl does not
-  /// have a FunctionType.
+  /// when possible. This includes direct FunctionDecls, along with various
+  /// function types and typedefs. This includes function pointers/references,
+  /// member function pointers, and optionally if \p BlocksToo is set
+  /// Objective-C block pointers. Returns nullptr if the type underlying the
+  /// Decl does not have a FunctionType.
   const FunctionType *getFunctionType(bool BlocksToo = true) const;
 
   // Looks through the Decl's underlying type to determine if it's a
diff --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index f4ba2bc3c6de31b..2a3a29bd2ee1cf4 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -198,7 +198,7 @@ def OpenCLKernelFunction
 // inclusive nature of subject testing).
 def HasFunctionProto : SubsetSubjectgetFunctionType(true) != nullptr &&
-  isa(S->getFunctionType())) ||
+   
isa(S->getFunctionType())) ||
isa(S) ||
isa(S)}],
  "non-K&R-style functions">;
diff --git a/clang/lib/AST/DeclBase.cpp b/clang/lib/AST/DeclBase.cpp
index 8506b95f761fe5b..adf6053392db370 100644
--- a/clang/lib/AST/DeclBase.cpp
+++ b/clang/lib/AST/DeclBase.cpp
@@ -1203,6 +1203,8 @@ const FunctionType *Decl::getFunctionType(bool BlocksToo) 
const {
 
   if (Ty->isFunctionPointerType())
 Ty = Ty->castAs()->getPointeeType();
+  else if (Ty->isMemberFunctionPointerType())
+Ty = Ty->castAs()->getPointeeType();
   else if (Ty->isFunctionReferenceType())
 Ty = Ty->castAs()->getPointeeType();
   else if (BlocksToo && Ty->isBlockPointerType())
diff --git a/clang/test/AST/attr-print-emit.cpp 
b/clang/test/AST/attr-print-emit.cpp
index a9bca6778d0f1a2..77826f8f9af0986 100644
--- a/clang/test/AST/attr-print-emit.cpp
+++ b/clang/test/AST/attr-print-emit.cpp
@@ -91,3 +91,8 @@ ANNOTATE_ATTR NONNULL_ATTR void 
fn_non_null_annotated_attr(int *) __attribute__(
 
 [[gnu::nonnull(1)]] [[gnu::always_inline]] void cxx11_attr(int*) ANNOTATE_ATTR;
 // CHECK: {{\[\[}}gnu::nonnull(1)]] {{\[\[}}gnu::always_inline]] void 
cxx11_attr(int *) __attribute__((annotate("Annotated")));
+
+struct Foo;
+
+// CHECK: void as_member_fn_ptr(int *(Foo::*member)(int) 
__attribute__((alloc_size(1;
+void as_member_fn_p

[llvm-branch-commits] [clang] release/20.x: [clang] Support member function poiners in Decl::getFunctionType() (#125077) (PR #125956)

[via llvm-branch-commits]

https://github.com/llvmbot milestoned 
https://github.com/llvm/llvm-project/pull/125956
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[llvm-branch-commits] [clang] release/20.x: [clang] Support member function poiners in Decl::getFunctionType() (#125077) (PR #125956)

[via llvm-branch-commits]

llvmbot wrote:

@efriedma-quic What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/125956
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[llvm-branch-commits] [clang] release/20.x: [clang] Support member function poiners in Decl::getFunctionType() (#125077) (PR #125956)

[Eli Friedman via llvm-branch-commits]

https://github.com/efriedma-quic approved this pull request.

LGTM.  This doesn't seem like a high priority to backport, but I guess it's 
safe enough for this point in the process.

https://github.com/llvm/llvm-project/pull/125956
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[llvm-branch-commits] [clang] [HLSL] Define the HLSLRootSignature Attr (PR #123985)

[Helena Kotas via llvm-branch-commits]

https://github.com/hekota edited 
https://github.com/llvm/llvm-project/pull/123985
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[llvm-branch-commits] [clang] [HLSL] Define the HLSLRootSignature Attr (PR #123985)

[Helena Kotas via llvm-branch-commits]

@@ -647,6 +648,43 @@ void SemaHLSL::emitLogicalOperatorFixIt(Expr *LHS, Expr 
*RHS,
   << NewFnName << FixItHint::CreateReplacement(FullRange, OS.str());
 }
 
+void SemaHLSL::handleRootSignatureAttr(Decl *D, const ParsedAttr &AL) {
+  using namespace llvm::hlsl::root_signature;
+  using namespace clang::hlsl;

hekota wrote:

These are usually places at the top of the file after `#include`s. If this is 
the only function where it is needed it might be cleaner to just use fully 
qualified names.

https://github.com/llvm/llvm-project/pull/123985
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[llvm-branch-commits] [clang] [HLSL] Define the HLSLRootSignature Attr (PR #123985)

[Helena Kotas via llvm-branch-commits]

@@ -0,0 +1,28 @@
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-library -ast-dump \
+// RUN:  -disable-llvm-passes -o - %s | FileCheck %s
+
+// This test ensures that the sample root signature is parsed without error and
+// the Attr AST Node is created succesfully. If an invalid root signature was
+// passed in then we would exit out of Sema before the Attr is created.
+
+#define SampleRS \
+  "DescriptorTable( " \
+  "  CBV(b1), " \
+  "  SRV(t1, numDescriptors = 8, " \
+  "  flags = DESCRIPTORS_VOLATILE), " \
+  "  UAV(u1, numDescriptors = 0, " \
+  "  flags = DESCRIPTORS_VOLATILE) " \
+  "), " \
+  "DescriptorTable(Sampler(s0, numDescriptors = 4, space = 1))"
+
+// CHECK:  HLSLRootSignatureAttr 0x{{[0-9A-Fa-f]+}} 


hekota wrote:

```suggestion
// CHECK:  HLSLRootSignatureAttr
```

https://github.com/llvm/llvm-project/pull/123985
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