[llvm-branch-commits] [clang] [clang] NFC: rename MatchedPackOnParmToNonPackOnArg to StrictPackMatch (PR #125418)
https://github.com/cor3ntin approved this pull request. Erich and Aaron are happy with the name, lets go with that https://github.com/llvm/llvm-project/pull/125418 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [Flang] Optionally do not compile the runtime in-tree (PR #122336)
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/122336
>From 4c676f468ba344ac0c388583a4ed28035d05ae89 Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Fri, 24 Jan 2025 15:00:16 +0100
Subject: [PATCH 1/2] users/meinersbur/flang_runtime_FLANG_INCLUDE_RUNTIME
---
flang/CMakeLists.txt| 6 +-
flang/test/CMakeLists.txt | 6 +-
flang/test/Driver/ctofortran.f90| 1 +
flang/test/Driver/exec.f90 | 1 +
flang/test/Runtime/no-cpp-dep.c | 2 +-
flang/test/lit.cfg.py | 5 -
flang/test/lit.site.cfg.py.in | 2 ++
flang/tools/f18/CMakeLists.txt | 2 +-
flang/unittests/CMakeLists.txt | 11 +-
flang/unittests/Evaluate/CMakeLists.txt | 27 +
10 files changed, 44 insertions(+), 19 deletions(-)
diff --git a/flang/CMakeLists.txt b/flang/CMakeLists.txt
index b619553ef830218..7d6dcb5c184a52d 100644
--- a/flang/CMakeLists.txt
+++ b/flang/CMakeLists.txt
@@ -247,6 +247,8 @@ else()
include_directories(SYSTEM ${MLIR_TABLEGEN_OUTPUT_DIR})
endif()
+option(FLANG_INCLUDE_RUNTIME "Build the runtime in-tree (deprecated; to be
replaced with LLVM_ENABLE_RUNTIMES=flang-rt)" ON)
+
set(FLANG_TOOLS_INSTALL_DIR "${CMAKE_INSTALL_BINDIR}" CACHE PATH
"Path for binary subdirectory (defaults to '${CMAKE_INSTALL_BINDIR}')")
mark_as_advanced(FLANG_TOOLS_INSTALL_DIR)
@@ -487,7 +489,9 @@ if (FLANG_CUF_RUNTIME)
find_package(CUDAToolkit REQUIRED)
endif()
-add_subdirectory(runtime)
+if (FLANG_INCLUDE_RUNTIME)
+ add_subdirectory(runtime)
+endif ()
if (LLVM_INCLUDE_EXAMPLES)
add_subdirectory(examples)
diff --git a/flang/test/CMakeLists.txt b/flang/test/CMakeLists.txt
index cab214c2ef4c8c1..e398e0786147aa7 100644
--- a/flang/test/CMakeLists.txt
+++ b/flang/test/CMakeLists.txt
@@ -71,9 +71,13 @@ set(FLANG_TEST_DEPENDS
llvm-objdump
llvm-readobj
split-file
- FortranRuntime
FortranDecimal
)
+
+if (FLANG_INCLUDE_RUNTIME)
+ list(APPEND FLANG_TEST_DEPENDS FortranRuntime)
+endif ()
+
if (LLVM_ENABLE_PLUGINS AND NOT WIN32)
list(APPEND FLANG_TEST_DEPENDS Bye)
endif()
diff --git a/flang/test/Driver/ctofortran.f90 b/flang/test/Driver/ctofortran.f90
index 78eac32133b18e1..10c7adaccc9588b 100644
--- a/flang/test/Driver/ctofortran.f90
+++ b/flang/test/Driver/ctofortran.f90
@@ -1,4 +1,5 @@
! UNSUPPORTED: system-windows
+! REQUIRES: flang-rt
! RUN: split-file %s %t
! RUN: chmod +x %t/runtest.sh
! RUN: %t/runtest.sh %t %t/ffile.f90 %t/cfile.c %flang | FileCheck %s
diff --git a/flang/test/Driver/exec.f90 b/flang/test/Driver/exec.f90
index fd174005ddf62ac..9ca91ee24011c9f 100644
--- a/flang/test/Driver/exec.f90
+++ b/flang/test/Driver/exec.f90
@@ -1,4 +1,5 @@
! UNSUPPORTED: system-windows
+! REQUIRES: flang-rt
! Verify that flang can correctly build executables.
! RUN: %flang %s -o %t
diff --git a/flang/test/Runtime/no-cpp-dep.c b/flang/test/Runtime/no-cpp-dep.c
index b1a5fa004014cc8..7303ce63fdec410 100644
--- a/flang/test/Runtime/no-cpp-dep.c
+++ b/flang/test/Runtime/no-cpp-dep.c
@@ -3,7 +3,7 @@ This test makes sure that flang's runtime does not depend on
the C++ runtime
library. It tries to link this simple file against libFortranRuntime.a with
a C compiler.
-REQUIRES: c-compiler
+REQUIRES: c-compiler, flang-rt
RUN: %if system-aix %{ export OBJECT_MODE=64 %}
RUN: %cc -std=c99 %s -I%include %libruntime -lm \
diff --git a/flang/test/lit.cfg.py b/flang/test/lit.cfg.py
index c452b6d231c89f0..f4580afc8c47b12 100644
--- a/flang/test/lit.cfg.py
+++ b/flang/test/lit.cfg.py
@@ -163,10 +163,13 @@
ToolSubst("%not_todo_abort_cmd", command=FindTool("not"),
unresolved="fatal")
)
+if config.flang_include_runtime:
+config.available_features.add("flang-rt")
+
# Define some variables to help us test that the flang runtime doesn't depend
on
# the C++ runtime libraries. For this we need a C compiler. If for some reason
# we don't have one, we can just disable the test.
-if config.cc:
+if config.flang_include_runtime and config.cc:
libruntime = os.path.join(config.flang_lib_dir, "libFortranRuntime.a")
include = os.path.join(config.flang_src_dir, "include")
diff --git a/flang/test/lit.site.cfg.py.in b/flang/test/lit.site.cfg.py.in
index d1a0ac763cf8a06..697ba3fa797633d 100644
--- a/flang/test/lit.site.cfg.py.in
+++ b/flang/test/lit.site.cfg.py.in
@@ -1,6 +1,7 @@
@LIT_SITE_CFG_IN_HEADER@
import sys
+import lit.util
config.llvm_tools_dir = lit_config.substitute("@LLVM_TOOLS_DIR@")
config.llvm_shlib_dir = lit_config.substitute(path(r"@SHLIBDIR@"))
@@ -32,6 +33,7 @@ else:
config.openmp_module_dir = None
config.flang_runtime_f128_math_lib = "@FLANG_RUNTIME_F128_MATH_LIB@"
config.have_ldbl_mant_dig_113 = "@HAVE_LDBL_MANT_DIG_113@"
+config.flang_include_runtime =
lit.util.pythonize_bool("@FLANG_INCLUDE_RUNTIME@")
import lit.llvm
lit.llvm.initialize(lit_config, config)
diff --git a/flang/to
[llvm-branch-commits] [clang] [flang] [lld] [Flang] Rename libFortranRuntime.a to libflang_rt.a (PR #122341)
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/122341
>From 875607fdecfada90a80ec732637ea9595fe72ba3 Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Fri, 24 Jan 2025 16:42:24 +0100
Subject: [PATCH 1/3] [Flang] Rename libFortranRuntime.a to libflang_rt.a
---
clang/lib/Driver/ToolChains/CommonArgs.cpp| 4 +-
clang/lib/Driver/ToolChains/Flang.cpp | 8 ++--
flang/CMakeLists.txt | 2 +-
flang/docs/FlangDriver.md | 6 +--
flang/docs/GettingStarted.md | 6 +--
flang/docs/OpenACC-descriptor-management.md | 2 +-
flang/docs/ReleaseNotes.md| 2 +
.../ExternalHelloWorld/CMakeLists.txt | 2 +-
flang/lib/Optimizer/Builder/IntrinsicCall.cpp | 2 +-
flang/runtime/CMakeLists.txt | 40 +++
flang/runtime/CUDA/CMakeLists.txt | 2 +-
flang/runtime/Float128Math/CMakeLists.txt | 2 +-
flang/runtime/time-intrinsic.cpp | 2 +-
flang/test/CMakeLists.txt | 8 +++-
.../test/Driver/gcc-toolchain-install-dir.f90 | 2 +-
flang/test/Driver/linker-flags.f90| 8 ++--
.../test/Driver/msvc-dependent-lib-flags.f90 | 8 ++--
flang/test/Driver/nostdlib.f90| 2 +-
flang/test/Runtime/no-cpp-dep.c | 2 +-
flang/test/lit.cfg.py | 2 +-
flang/tools/f18/CMakeLists.txt| 8 ++--
flang/unittests/CMakeLists.txt| 2 +-
flang/unittests/Evaluate/CMakeLists.txt | 4 +-
flang/unittests/Runtime/CMakeLists.txt| 2 +-
flang/unittests/Runtime/CUDA/CMakeLists.txt | 2 +-
lld/COFF/MinGW.cpp| 2 +-
26 files changed, 73 insertions(+), 59 deletions(-)
diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp
b/clang/lib/Driver/ToolChains/CommonArgs.cpp
index b5273dd8cf1e3a5..c7b0a660ee021fc 100644
--- a/clang/lib/Driver/ToolChains/CommonArgs.cpp
+++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp
@@ -1321,7 +1321,7 @@ void tools::addOpenMPHostOffloadingArgs(const Compilation
&C,
/// Add Fortran runtime libs
void tools::addFortranRuntimeLibs(const ToolChain &TC, const ArgList &Args,
llvm::opt::ArgStringList &CmdArgs) {
- // Link FortranRuntime
+ // Link flang_rt
// These are handled earlier on Windows by telling the frontend driver to
// add the correct libraries to link against as dependents in the object
// file.
@@ -1337,7 +1337,7 @@ void tools::addFortranRuntimeLibs(const ToolChain &TC,
const ArgList &Args,
if (AsNeeded)
addAsNeededOption(TC, Args, CmdArgs, /*as_needed=*/false);
}
-CmdArgs.push_back("-lFortranRuntime");
+CmdArgs.push_back("-lflang_rt");
addArchSpecificRPath(TC, Args, CmdArgs);
}
diff --git a/clang/lib/Driver/ToolChains/Flang.cpp
b/clang/lib/Driver/ToolChains/Flang.cpp
index f1bf32b32382704..68a17edf8ca341f 100644
--- a/clang/lib/Driver/ToolChains/Flang.cpp
+++ b/clang/lib/Driver/ToolChains/Flang.cpp
@@ -360,26 +360,26 @@ static void processVSRuntimeLibrary(const ToolChain &TC,
const ArgList &Args,
case options::OPT__SLASH_MT:
CmdArgs.push_back("-D_MT");
CmdArgs.push_back("--dependent-lib=libcmt");
-CmdArgs.push_back("--dependent-lib=FortranRuntime.static.lib");
+CmdArgs.push_back("--dependent-lib=flang_rt.static.lib");
break;
case options::OPT__SLASH_MTd:
CmdArgs.push_back("-D_MT");
CmdArgs.push_back("-D_DEBUG");
CmdArgs.push_back("--dependent-lib=libcmtd");
-CmdArgs.push_back("--dependent-lib=FortranRuntime.static_dbg.lib");
+CmdArgs.push_back("--dependent-lib=flang_rt.static_dbg.lib");
break;
case options::OPT__SLASH_MD:
CmdArgs.push_back("-D_MT");
CmdArgs.push_back("-D_DLL");
CmdArgs.push_back("--dependent-lib=msvcrt");
-CmdArgs.push_back("--dependent-lib=FortranRuntime.dynamic.lib");
+CmdArgs.push_back("--dependent-lib=flang_rt.dynamic.lib");
break;
case options::OPT__SLASH_MDd:
CmdArgs.push_back("-D_MT");
CmdArgs.push_back("-D_DEBUG");
CmdArgs.push_back("-D_DLL");
CmdArgs.push_back("--dependent-lib=msvcrtd");
-CmdArgs.push_back("--dependent-lib=FortranRuntime.dynamic_dbg.lib");
+CmdArgs.push_back("--dependent-lib=flang_rt.dynamic_dbg.lib");
break;
}
}
diff --git a/flang/CMakeLists.txt b/flang/CMakeLists.txt
index 7d6dcb5c184a52d..8a8b8bfa73b0077 100644
--- a/flang/CMakeLists.txt
+++ b/flang/CMakeLists.txt
@@ -301,7 +301,7 @@ set(FLANG_DEFAULT_LINKER "" CACHE STRING
"Default linker to use (linker name or absolute path, empty for platform
default)")
set(FLANG_DEFAULT_RTLIB "" CACHE STRING
- "Default Fortran runtime library to use (\"libFortranRuntime\"), leave
empty for platform default.")
+ "Default Fortran runtime library to use (\"libflang_rt\"), leave empty for
platform default.")
if (NOT(FLANG_DEFAULT_RTLIB STREQUAL ""))
[llvm-branch-commits] [flang] [Flang] Promote FortranEvaluateTesting library (PR #124417)
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/124417
>From 71015c8f9ab17431d052472aec99dc67929a166e Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Fri, 24 Jan 2025 16:30:47 +0100
Subject: [PATCH] [Flang] Promote FortranEvaluateTesting library
---
.../flang/Testing}/fp-testing.h | 14 ++--
.../flang/Testing}/testing.h | 14 ++--
flang/lib/CMakeLists.txt | 4 +++
flang/lib/Testing/CMakeLists.txt | 20 +++
.../Evaluate => lib/Testing}/fp-testing.cpp | 10 +-
.../Evaluate => lib/Testing}/testing.cpp | 10 +-
flang/unittests/Evaluate/CMakeLists.txt | 35 ++-
.../Evaluate/ISO-Fortran-binding.cpp | 2 +-
.../Evaluate/bit-population-count.cpp | 2 +-
flang/unittests/Evaluate/expression.cpp | 2 +-
flang/unittests/Evaluate/folding.cpp | 2 +-
flang/unittests/Evaluate/integer.cpp | 2 +-
flang/unittests/Evaluate/intrinsics.cpp | 2 +-
.../Evaluate/leading-zero-bit-count.cpp | 2 +-
flang/unittests/Evaluate/logical.cpp | 2 +-
flang/unittests/Evaluate/real.cpp | 4 +--
flang/unittests/Evaluate/reshape.cpp | 2 +-
flang/unittests/Evaluate/uint128.cpp | 2 +-
18 files changed, 87 insertions(+), 44 deletions(-)
rename flang/{unittests/Evaluate => include/flang/Testing}/fp-testing.h (54%)
rename flang/{unittests/Evaluate => include/flang/Testing}/testing.h (74%)
create mode 100644 flang/lib/Testing/CMakeLists.txt
rename flang/{unittests/Evaluate => lib/Testing}/fp-testing.cpp (87%)
rename flang/{unittests/Evaluate => lib/Testing}/testing.cpp (88%)
diff --git a/flang/unittests/Evaluate/fp-testing.h
b/flang/include/flang/Testing/fp-testing.h
similarity index 54%
rename from flang/unittests/Evaluate/fp-testing.h
rename to flang/include/flang/Testing/fp-testing.h
index 9091963a99b32d..e223d2ef7d1b8b 100644
--- a/flang/unittests/Evaluate/fp-testing.h
+++ b/flang/include/flang/Testing/fp-testing.h
@@ -1,5 +1,13 @@
-#ifndef FORTRAN_TEST_EVALUATE_FP_TESTING_H_
-#define FORTRAN_TEST_EVALUATE_FP_TESTING_H_
+//===-- include/flang/Testing/fp-testing.h --*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef FORTRAN_TESTING_FP_TESTING_H_
+#define FORTRAN_TESTING_FP_TESTING_H_
#include "flang/Common/target-rounding.h"
#include
@@ -24,4 +32,4 @@ class ScopedHostFloatingPointEnvironment {
#endif
};
-#endif // FORTRAN_TEST_EVALUATE_FP_TESTING_H_
+#endif /* FORTRAN_TESTING_FP_TESTING_H_ */
diff --git a/flang/unittests/Evaluate/testing.h
b/flang/include/flang/Testing/testing.h
similarity index 74%
rename from flang/unittests/Evaluate/testing.h
rename to flang/include/flang/Testing/testing.h
index 422e2853c05bc6..404650c9a89f2c 100644
--- a/flang/unittests/Evaluate/testing.h
+++ b/flang/include/flang/Testing/testing.h
@@ -1,5 +1,13 @@
-#ifndef FORTRAN_EVALUATE_TESTING_H_
-#define FORTRAN_EVALUATE_TESTING_H_
+//===-- include/flang/Testing/testing.h -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef FORTRAN_TESTING_TESTING_H_
+#define FORTRAN_TESTING_TESTING_H_
#include
#include
@@ -33,4 +41,4 @@ FailureDetailPrinter Match(const char *file, int line, const
std::string &want,
FailureDetailPrinter Compare(const char *file, int line, const char *xs,
const char *rel, const char *ys, std::uint64_t x, std::uint64_t y);
} // namespace testing
-#endif // FORTRAN_EVALUATE_TESTING_H_
+#endif /* FORTRAN_TESTING_TESTING_H_ */
diff --git a/flang/lib/CMakeLists.txt b/flang/lib/CMakeLists.txt
index 05c3535b09b3d3..8b201d9a758a80 100644
--- a/flang/lib/CMakeLists.txt
+++ b/flang/lib/CMakeLists.txt
@@ -8,3 +8,7 @@ add_subdirectory(Frontend)
add_subdirectory(FrontendTool)
add_subdirectory(Optimizer)
+
+if (FLANG_INCLUDE_TESTS)
+ add_subdirectory(Testing)
+endif ()
diff --git a/flang/lib/Testing/CMakeLists.txt b/flang/lib/Testing/CMakeLists.txt
new file mode 100644
index 00..8051bc09736d16
--- /dev/null
+++ b/flang/lib/Testing/CMakeLists.txt
@@ -0,0 +1,20 @@
+#===-- lib/Testing/CMakeLists.txt
--===#
+#
+# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+# See https://llvm.org/LICENSE.txt for license information.
+# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+#
+#===
[llvm-branch-commits] [clang] [flang] [lld] [Flang] Don't use FortranDecimal for runtime (PR #121997)
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/121997
>From 2e50a1f563dcfec3dae1a5770ed4c90189cf7ba8 Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Fri, 24 Jan 2025 16:28:55 +0100
Subject: [PATCH] [Flang] Don't use FortranDecimal for runtime
---
clang/lib/Driver/ToolChains/CommonArgs.cpp| 3 +-
clang/lib/Driver/ToolChains/Flang.cpp | 4 -
flang/docs/FlangDriver.md | 7 +-
flang/lib/Decimal/CMakeLists.txt | 92 ++-
flang/runtime/CMakeLists.txt | 14 +--
flang/test/Driver/linker-flags.f90| 6 +-
.../test/Driver/msvc-dependent-lib-flags.f90 | 4 -
flang/test/Driver/nostdlib.f90| 1 -
flang/test/Runtime/no-cpp-dep.c | 2 +-
flang/test/lit.cfg.py | 3 -
lld/COFF/MinGW.cpp| 1 -
11 files changed, 18 insertions(+), 119 deletions(-)
diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp
b/clang/lib/Driver/ToolChains/CommonArgs.cpp
index f8967890f722cf..b5273dd8cf1e3a 100644
--- a/clang/lib/Driver/ToolChains/CommonArgs.cpp
+++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp
@@ -1321,7 +1321,7 @@ void tools::addOpenMPHostOffloadingArgs(const Compilation
&C,
/// Add Fortran runtime libs
void tools::addFortranRuntimeLibs(const ToolChain &TC, const ArgList &Args,
llvm::opt::ArgStringList &CmdArgs) {
- // Link FortranRuntime and FortranDecimal
+ // Link FortranRuntime
// These are handled earlier on Windows by telling the frontend driver to
// add the correct libraries to link against as dependents in the object
// file.
@@ -1338,7 +1338,6 @@ void tools::addFortranRuntimeLibs(const ToolChain &TC,
const ArgList &Args,
addAsNeededOption(TC, Args, CmdArgs, /*as_needed=*/false);
}
CmdArgs.push_back("-lFortranRuntime");
-CmdArgs.push_back("-lFortranDecimal");
addArchSpecificRPath(TC, Args, CmdArgs);
}
diff --git a/clang/lib/Driver/ToolChains/Flang.cpp
b/clang/lib/Driver/ToolChains/Flang.cpp
index 86ed25badfa2b7..f1bf32b3238270 100644
--- a/clang/lib/Driver/ToolChains/Flang.cpp
+++ b/clang/lib/Driver/ToolChains/Flang.cpp
@@ -361,21 +361,18 @@ static void processVSRuntimeLibrary(const ToolChain &TC,
const ArgList &Args,
CmdArgs.push_back("-D_MT");
CmdArgs.push_back("--dependent-lib=libcmt");
CmdArgs.push_back("--dependent-lib=FortranRuntime.static.lib");
-CmdArgs.push_back("--dependent-lib=FortranDecimal.static.lib");
break;
case options::OPT__SLASH_MTd:
CmdArgs.push_back("-D_MT");
CmdArgs.push_back("-D_DEBUG");
CmdArgs.push_back("--dependent-lib=libcmtd");
CmdArgs.push_back("--dependent-lib=FortranRuntime.static_dbg.lib");
-CmdArgs.push_back("--dependent-lib=FortranDecimal.static_dbg.lib");
break;
case options::OPT__SLASH_MD:
CmdArgs.push_back("-D_MT");
CmdArgs.push_back("-D_DLL");
CmdArgs.push_back("--dependent-lib=msvcrt");
CmdArgs.push_back("--dependent-lib=FortranRuntime.dynamic.lib");
-CmdArgs.push_back("--dependent-lib=FortranDecimal.dynamic.lib");
break;
case options::OPT__SLASH_MDd:
CmdArgs.push_back("-D_MT");
@@ -383,7 +380,6 @@ static void processVSRuntimeLibrary(const ToolChain &TC,
const ArgList &Args,
CmdArgs.push_back("-D_DLL");
CmdArgs.push_back("--dependent-lib=msvcrtd");
CmdArgs.push_back("--dependent-lib=FortranRuntime.dynamic_dbg.lib");
-CmdArgs.push_back("--dependent-lib=FortranDecimal.dynamic_dbg.lib");
break;
}
}
diff --git a/flang/docs/FlangDriver.md b/flang/docs/FlangDriver.md
index 23cbab30ee903e..be5633529f50cd 100644
--- a/flang/docs/FlangDriver.md
+++ b/flang/docs/FlangDriver.md
@@ -175,19 +175,18 @@ like this:
```
$ flang -v -o example example.o
-"/usr/bin/ld" [...] example.o [...] "-lFortranRuntime" "-lFortranDecimal" [...]
+"/usr/bin/ld" [...] example.o [...] "-lFortranRuntime" [...]
```
The automatically added libraries are:
* `FortranRuntime`: Provides most of the Flang runtime library.
-* `FortranDecimal`: Provides operations for decimal numbers.
If the code is C/C++ based and invokes Fortran routines, one can either use
Clang
or Flang as the linker driver. If Clang is used, it will automatically all
required runtime libraries needed by C++ (e.g., for STL) to the linker
invocation.
-In this case, one has to explicitly provide the Fortran runtime libraries
-`FortranRuntime` and/or `FortranDecimal`. An alternative is to use Flang to
link.
+In this case, one has to explicitly provide the Fortran runtime library
+`FortranRuntime`. An alternative is to use Flang to link.
In this case, it may be required to explicitly supply C++ runtime libraries.
On Darwin, the logical root where the system libraries are located (sysroot)
diff --git a/flang/lib/Decimal/CMakeLists.txt b/flang/lib/Decimal/CMakeLists.txt
index 880b190f1c5815..477d44e0565ebe 100644
[llvm-branch-commits] [llvm] [CodeGen][MachineScheduler] Remove the unimplemented print method. (PR #125702)
https://github.com/cdevadas created
https://github.com/llvm/llvm-project/pull/125702
None
>From 5e5b8548b647a7b6fdd0e10eda22fef9bb341159 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Fri, 31 Jan 2025 11:13:31 +0530
Subject: [PATCH] [CodeGen][MachineScheduler] Remove the unimplemented print
method.
---
llvm/lib/CodeGen/MachineScheduler.cpp | 6 --
1 file changed, 6 deletions(-)
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp
b/llvm/lib/CodeGen/MachineScheduler.cpp
index da46129ebaa048..df568711583186 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -222,8 +222,6 @@ class MachineSchedulerBase : public MachineSchedContext,
public:
MachineSchedulerBase(char &ID): MachineFunctionPass(ID) {}
- void print(raw_ostream &O, const Module* = nullptr) const override;
-
protected:
void scheduleRegions(ScheduleDAGInstrs &Scheduler, bool FixKillFlags);
};
@@ -666,10 +664,6 @@ void
MachineSchedulerBase::scheduleRegions(ScheduleDAGInstrs &Scheduler,
Scheduler.finalizeSchedule();
}
-void MachineSchedulerBase::print(raw_ostream &O, const Module* m) const {
- // unimplemented
-}
-
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void ReadyQueue::dump() const {
dbgs() << "Queue " << Name << ": ";
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[llvm-branch-commits] [llvm] release/20.x: [VPlan] Only use SCEV for live-ins in tryToWiden. (#125436) (PR #125659)
https://github.com/lukel97 approved this pull request. https://github.com/llvm/llvm-project/pull/125659 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [llvm] Add CMake flag to compile out the telemetry framework (#124850) (PR #125555)
JDevlieghere wrote: > /cherrypick > [13ded68](https://github.com/llvm/llvm-project/commit/13ded6829bf7ca793795c50d47dd2b95482e5cfa) That didn't work but the typo isn't critical for the release, so this is good to go. https://github.com/llvm/llvm-project/pull/12 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libc] 5596873 - Revert "[libc] Make LlvmLibcStackChkFail.Smash test compatible with asan, hwa…"
Author: Roland McGrath
Date: 2025-02-04T16:05:47-08:00
New Revision: 559687352284d56b1290327260111f8a6534801b
URL:
https://github.com/llvm/llvm-project/commit/559687352284d56b1290327260111f8a6534801b
DIFF:
https://github.com/llvm/llvm-project/commit/559687352284d56b1290327260111f8a6534801b.diff
LOG: Revert "[libc] Make LlvmLibcStackChkFail.Smash test compatible with asan,
hwa…"
This reverts commit 1e7624ca4f3c9df14242b532eeb9497c67bc4074.
Added:
Modified:
libc/test/src/compiler/stack_chk_guard_test.cpp
Removed:
diff --git a/libc/test/src/compiler/stack_chk_guard_test.cpp
b/libc/test/src/compiler/stack_chk_guard_test.cpp
index d1869a2af412e4..4ec8398c9fc95d 100644
--- a/libc/test/src/compiler/stack_chk_guard_test.cpp
+++ b/libc/test/src/compiler/stack_chk_guard_test.cpp
@@ -12,24 +12,19 @@
#include "src/string/memset.h"
#include "test/UnitTest/Test.h"
-namespace {
-
TEST(LlvmLibcStackChkFail, Death) {
EXPECT_DEATH([] { __stack_chk_fail(); }, WITH_SIGNAL(SIGABRT));
}
-// Disable sanitizers such as asan and hwasan that would catch the buffer
-// overrun before it clobbered the stack canary word. Function attributes
-// can't be applied to lambdas before C++23, so this has to be separate. When
-// https://github.com/llvm/llvm-project/issues/125760 is fixed, this can use
-// the modern spelling [[gnu::no_sanitize(...)]] without conditionalization.
-__attribute__((no_sanitize("all"))) void smash_stack() {
- int arr[20];
- LIBC_NAMESPACE::memset(arr, 0xAA, 2001);
-}
-
+// Disable the test when asan is enabled so that it doesn't immediately fail
+// after the memset, but before the stack canary is re-checked.
+#ifndef LIBC_HAS_ADDRESS_SANITIZER
TEST(LlvmLibcStackChkFail, Smash) {
- EXPECT_DEATH(smash_stack, WITH_SIGNAL(SIGABRT));
+ EXPECT_DEATH(
+ [] {
+int arr[20];
+LIBC_NAMESPACE::memset(arr, 0xAA, 2001);
+ },
+ WITH_SIGNAL(SIGABRT));
}
-
-} // namespace
+#endif // LIBC_HAS_ADDRESS_SANITIZER
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[llvm-branch-commits] [polly] [Polly] Remove ScopPass infrastructure (PR #125783)
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/125783
>From 67ff7b622fef21d39c524d0de9d4659d2444ccfd Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Wed, 5 Feb 2025 00:51:47 +0100
Subject: [PATCH] Remove ScopPass infrastructure
---
polly/docs/ReleaseNotes.rst | 1 +
polly/include/polly/CodeGen/CodeGeneration.h | 13 +-
polly/include/polly/CodeGen/IslAst.h | 21 +-
polly/include/polly/CodePreparation.h | 7 +-
polly/include/polly/DeLICM.h | 21 +-
polly/include/polly/DeadCodeElimination.h | 8 -
polly/include/polly/DependenceInfo.h | 26 +-
polly/include/polly/ForwardOpTree.h | 25 +-
polly/include/polly/JSONExporter.h| 17 +-
polly/include/polly/MaximalStaticExpansion.h | 20 --
polly/include/polly/Pass/PhaseManager.h | 6 +-
polly/include/polly/PruneUnprofitable.h | 16 +-
polly/include/polly/ScheduleOptimizer.h | 24 +-
polly/include/polly/ScopGraphPrinter.h| 1 -
polly/include/polly/ScopInfo.h| 1 -
polly/include/polly/ScopPass.h| 264 --
polly/include/polly/Simplify.h| 29 +-
polly/lib/Analysis/DependenceInfo.cpp | 27 --
polly/lib/Analysis/PruneUnprofitable.cpp | 16 --
polly/lib/Analysis/ScopDetection.cpp | 1 -
polly/lib/Analysis/ScopInfo.cpp | 1 -
polly/lib/Analysis/ScopPass.cpp | 134 -
polly/lib/CMakeLists.txt | 1 -
polly/lib/CodeGen/CodeGeneration.cpp | 13 -
polly/lib/CodeGen/IslAst.cpp | 19 --
polly/lib/Exchange/JSONExporter.cpp | 27 --
polly/lib/Pass/PhaseManager.cpp | 2 +
polly/lib/Support/PollyPasses.def | 44 ---
polly/lib/Support/RegisterPasses.cpp | 133 +
polly/lib/Transform/CodePreparation.cpp | 14 -
polly/lib/Transform/DeLICM.cpp| 43 ---
polly/lib/Transform/DeadCodeElimination.cpp | 23 --
polly/lib/Transform/FlattenSchedule.cpp | 1 -
polly/lib/Transform/ForwardOpTree.cpp | 42 ---
polly/lib/Transform/MatmulOptimizer.cpp | 1 -
.../lib/Transform/MaximalStaticExpansion.cpp | 42 ---
polly/lib/Transform/ScheduleOptimizer.cpp | 39 +--
polly/lib/Transform/ScopInliner.cpp | 1 -
polly/lib/Transform/Simplify.cpp | 35 ---
...invariant_load_base_pointer_conditional.ll | 2 +-
polly/unittests/CMakeLists.txt| 1 -
.../unittests/ScopPassManager/CMakeLists.txt | 7 -
.../ScopPassManager/PassManagerTest.cpp | 66 -
43 files changed, 42 insertions(+), 1193 deletions(-)
delete mode 100644 polly/include/polly/ScopPass.h
delete mode 100644 polly/lib/Analysis/ScopPass.cpp
delete mode 100644 polly/unittests/ScopPassManager/CMakeLists.txt
delete mode 100644 polly/unittests/ScopPassManager/PassManagerTest.cpp
diff --git a/polly/docs/ReleaseNotes.rst b/polly/docs/ReleaseNotes.rst
index 215a802843304f..6461af35e9625d 100644
--- a/polly/docs/ReleaseNotes.rst
+++ b/polly/docs/ReleaseNotes.rst
@@ -17,3 +17,4 @@ In Polly |version| the following important changes have been
incorporated.
* Polly's support for the legacy pass manager has been removed.
+ * The infrastructure around ScopPasses has been removed.
diff --git a/polly/include/polly/CodeGen/CodeGeneration.h
b/polly/include/polly/CodeGen/CodeGeneration.h
index 2340fbe016b493..bf0b8e69f46bb7 100644
--- a/polly/include/polly/CodeGen/CodeGeneration.h
+++ b/polly/include/polly/CodeGen/CodeGeneration.h
@@ -10,12 +10,16 @@
#define POLLY_CODEGENERATION_H
#include "polly/CodeGen/IRBuilder.h"
-#include "polly/ScopPass.h"
-#include "llvm/IR/PassManager.h"
+
+namespace llvm {
+class RegionInfo;
+}
namespace polly {
class IslAstInfo;
+using llvm::BasicBlock;
+
enum VectorizerChoice {
VECTORIZER_NONE,
VECTORIZER_STRIPMINE,
@@ -28,11 +32,6 @@ extern VectorizerChoice PollyVectorizerChoice;
/// UnreachableInst.
void markBlockUnreachable(BasicBlock &Block, PollyIRBuilder &Builder);
-struct CodeGenerationPass final : PassInfoMixin {
- PreservedAnalyses run(Scop &S, ScopAnalysisManager &SAM,
-ScopStandardAnalysisResults &AR, SPMUpdater &U);
-};
-
extern bool PerfMonitoring;
bool runCodeGeneration(Scop &S, llvm::RegionInfo &RI, IslAstInfo &AI);
diff --git a/polly/include/polly/CodeGen/IslAst.h
b/polly/include/polly/CodeGen/IslAst.h
index 3e1ff2c8a24da5..243ca46f9ba321 100644
--- a/polly/include/polly/CodeGen/IslAst.h
+++ b/polly/include/polly/CodeGen/IslAst.h
@@ -22,12 +22,11 @@
#define POLLY_ISLAST_H
#include "polly/DependenceInfo.h"
-#include "polly/ScopPass.h"
#include "llvm/ADT/SmallPtrSet.h"
-#include "llvm/IR/PassManager.h"
#include "isl/ctx.h"
namespace polly {
+using llvm::raw_ostream;
using llvm::SmallPtrSet;
class Dependences;
@@ -164,24 +163,6 @@ class Isl
[llvm-branch-commits] [clang] [X86][AVX10] Disable m[no-]avx10.1 and switch m[no-]avx10.2 to alias of 512 bit options (#124511) (PR #125057)
https://github.com/e-kud approved this pull request. LGTM. I don't remember that we've merged something avx10.1,2 related that may make the behavior different from PR to main, right, @phoebewang? https://github.com/llvm/llvm-project/pull/125057 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] PeepholeOpt: Fix looking for def of current copy to coalesce (PR #125533)
https://github.com/qcolombet approved this pull request. Let's roll with it then! https://github.com/llvm/llvm-project/pull/125533 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [polly] [Polly] Update ScopInliner for NPM (PR #125427)
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/125427
>From 06b025db36dff8c1a3b0b22ae884d6506611f455 Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Sun, 2 Feb 2025 18:48:32 +0100
Subject: [PATCH 1/2] Update ScopInliner to support NPM
---
polly/docs/ReleaseNotes.rst | 2 +
polly/include/polly/LinkAllPasses.h | 2 +-
polly/include/polly/ScopInliner.h | 34
polly/lib/Support/PollyPasses.def | 6 +
polly/lib/Support/RegisterPasses.cpp | 41 -
polly/lib/Transform/ScopInliner.cpp | 159 +++---
polly/test/ScopInliner/ignore-declares.ll | 3 +-
polly/test/ScopInliner/invariant-load-func.ll | 5 +-
polly/test/ScopInliner/simple-inline-loop.ll | 3 +-
9 files changed, 184 insertions(+), 71 deletions(-)
create mode 100644 polly/include/polly/ScopInliner.h
diff --git a/polly/docs/ReleaseNotes.rst b/polly/docs/ReleaseNotes.rst
index f7c9689089be27..f5ea47b69cf02b 100644
--- a/polly/docs/ReleaseNotes.rst
+++ b/polly/docs/ReleaseNotes.rst
@@ -11,3 +11,5 @@ In Polly |version| the following important changes have been
incorporated.
the new features that have recently been committed to our development
branch.
+ * ScopInliner has been updated for the New Pass Manager.
+
diff --git a/polly/include/polly/LinkAllPasses.h
b/polly/include/polly/LinkAllPasses.h
index 54e7c5a43ab93f..65846653f98e5f 100644
--- a/polly/include/polly/LinkAllPasses.h
+++ b/polly/include/polly/LinkAllPasses.h
@@ -120,7 +120,7 @@ struct PollyForcePassLinking {
namespace llvm {
void initializeCodePreparationPass(llvm::PassRegistry &);
-void initializeScopInlinerPass(llvm::PassRegistry &);
+void initializeScopInlinerWrapperPassPass(llvm::PassRegistry &);
void initializeScopDetectionWrapperPassPass(llvm::PassRegistry &);
void initializeScopDetectionPrinterLegacyPassPass(llvm::PassRegistry &);
void initializeScopInfoRegionPassPass(PassRegistry &);
diff --git a/polly/include/polly/ScopInliner.h
b/polly/include/polly/ScopInliner.h
new file mode 100644
index 00..014667804330fb
--- /dev/null
+++ b/polly/include/polly/ScopInliner.h
@@ -0,0 +1,34 @@
+//===-- ScopInliner.h ===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef POLLY_POLLYINLINER_H
+#define POLLY_POLLYINLINER_H
+
+#include "llvm/Analysis/CGSCCPassManager.h"
+#include "llvm/Analysis/LazyCallGraph.h"
+#include "llvm/IR/PassManager.h"
+
+namespace polly {
+class ScopInlinerPass : public llvm::PassInfoMixin {
+public:
+ ScopInlinerPass();
+
+ llvm::PreservedAnalyses run(llvm::LazyCallGraph::SCC &C,
+ llvm::CGSCCAnalysisManager &AM,
+ llvm::LazyCallGraph &CG,
+ llvm::CGSCCUpdateResult &UR);
+};
+
+llvm::Pass *createScopInlinerWrapperPass();
+} // namespace polly
+
+namespace llvm {
+void initializeScopInlinerWrapperPassPass(llvm::PassRegistry &);
+}
+
+#endif /* POLLY_POLLYINLINER_H */
diff --git a/polly/lib/Support/PollyPasses.def
b/polly/lib/Support/PollyPasses.def
index e068f31fdb703c..2c792a5867100f 100644
--- a/polly/lib/Support/PollyPasses.def
+++ b/polly/lib/Support/PollyPasses.def
@@ -1,3 +1,9 @@
+#ifndef CGSCC_PASS
+#define CGSCC_PASS(NAME, CREATE_PASS, PARSER)
+#endif
+CGSCC_PASS("polly-inline", ScopInlinerPass(), parseNoOptions)
+#undef CGSCC_PASS
+
#ifndef FUNCTION_ANALYSIS
#define FUNCTION_ANALYSIS(NAME, CREATE_PASS)
#endif
diff --git a/polly/lib/Support/RegisterPasses.cpp
b/polly/lib/Support/RegisterPasses.cpp
index a46e61aafbeb75..3ace336cb588be 100644
--- a/polly/lib/Support/RegisterPasses.cpp
+++ b/polly/lib/Support/RegisterPasses.cpp
@@ -35,6 +35,7 @@
#include "polly/ScopDetection.h"
#include "polly/ScopGraphPrinter.h"
#include "polly/ScopInfo.h"
+#include "polly/ScopInliner.h"
#include "polly/Simplify.h"
#include "polly/Support/DumpFunctionPass.h"
#include "polly/Support/DumpModulePass.h"
@@ -46,10 +47,13 @@
#include "llvm/Passes/PassBuilder.h"
#include "llvm/Passes/PassPlugin.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Error.h"
#include "llvm/Support/TargetSelect.h"
#include "llvm/Transforms/IPO.h"
+using namespace llvm;
namespace cl = llvm::cl;
+using namespace polly;
using llvm::FunctionPassManager;
using llvm::OptimizationLevel;
@@ -233,7 +237,7 @@ void initializePollyPasses(llvm::PassRegistry &Registry) {
initializePollyCanonicalizePass(Registry);
initializeScopDetectionWrapperPassPass(Registry);
initializeScopDetectionPrinterLegacyPassPass(Registry);
- initializeScopInlinerPass(Registry);
+ initializeScopInlinerWrapperPassPass(Registry);
initiali
[llvm-branch-commits] [clang] [lldb] [clang] NFC: rename MatchedPackOnParmToNonPackOnArg to StrictPackMatch (PR #125418)
https://github.com/mizvekov edited https://github.com/llvm/llvm-project/pull/125418 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [lldb] [clang] NFC: rename MatchedPackOnParmToNonPackOnArg to StrictPackMatch (PR #125418)
mizvekov wrote: All rebased, it's back to being a god-fearing all around NFC PR :) https://github.com/llvm/llvm-project/pull/125418 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [HLSL] Constant buffers codegen (PR #124886)
https://github.com/hekota updated
https://github.com/llvm/llvm-project/pull/124886
>From cf08adb6b9e181613e81d2cfbadbbb68e645fe33 Mon Sep 17 00:00:00 2001
From: Helena Kotas
Date: Tue, 28 Jan 2025 14:46:26 -0800
Subject: [PATCH 1/4] [HLSL] Translate cbuffer declarations to target type
dx.CBuffer - initial commit
---
clang/include/clang/AST/Decl.h| 6 +
clang/include/clang/AST/Type.h| 4 +-
clang/lib/AST/Decl.cpp| 17 +-
clang/lib/CodeGen/CGHLSLRuntime.cpp | 409 --
clang/lib/CodeGen/CGHLSLRuntime.h | 31 +-
clang/lib/CodeGen/Targets/DirectX.cpp | 11 +-
clang/lib/Sema/SemaHLSL.cpp | 3 +
clang/test/CodeGenHLSL/cbuf.hlsl | 33 --
clang/test/CodeGenHLSL/cbuf_in_namespace.hlsl | 29 --
clang/test/CodeGenHLSL/cbuffer.hlsl | 200 +
.../CodeGenHLSL/cbuffer_and_namespaces.hlsl | 63 +++
.../CodeGenHLSL/cbuffer_with_packoffset.hlsl | 40 ++
...uffer_with_static_global_and_function.hlsl | 32 ++
clang/test/CodeGenHLSL/resource-bindings.hlsl | 4 +
.../static_global_and_function_in_cb.hlsl | 22 -
15 files changed, 679 insertions(+), 225 deletions(-)
delete mode 100644 clang/test/CodeGenHLSL/cbuf.hlsl
delete mode 100644 clang/test/CodeGenHLSL/cbuf_in_namespace.hlsl
create mode 100644 clang/test/CodeGenHLSL/cbuffer.hlsl
create mode 100644 clang/test/CodeGenHLSL/cbuffer_and_namespaces.hlsl
create mode 100644 clang/test/CodeGenHLSL/cbuffer_with_packoffset.hlsl
create mode 100644
clang/test/CodeGenHLSL/cbuffer_with_static_global_and_function.hlsl
delete mode 100644 clang/test/CodeGenHLSL/static_global_and_function_in_cb.hlsl
diff --git a/clang/include/clang/AST/Decl.h b/clang/include/clang/AST/Decl.h
index 16403774e72b31..e1c7e3817699ce 100644
--- a/clang/include/clang/AST/Decl.h
+++ b/clang/include/clang/AST/Decl.h
@@ -5032,6 +5032,9 @@ class HLSLBufferDecl final : public NamedDecl, public
DeclContext {
SourceLocation KwLoc;
/// IsCBuffer - Whether the buffer is a cbuffer (and not a tbuffer).
bool IsCBuffer;
+ /// HasValidPackoffset - Whether the buffer has valid packoffset annotations
+ // on all declarations
+ bool HasPackoffset;
HLSLBufferDecl(DeclContext *DC, bool CBuffer, SourceLocation KwLoc,
IdentifierInfo *ID, SourceLocation IDLoc,
@@ -5052,6 +5055,9 @@ class HLSLBufferDecl final : public NamedDecl, public
DeclContext {
SourceLocation getRBraceLoc() const { return RBraceLoc; }
void setRBraceLoc(SourceLocation L) { RBraceLoc = L; }
bool isCBuffer() const { return IsCBuffer; }
+ void setHasPackoffset(bool PO) { HasPackoffset = PO; }
+ bool hasPackoffset() const { return HasPackoffset; }
+ const CXXRecordDecl *getLayoutStruct() const;
// Implement isa/cast/dyncast/etc.
static bool classof(const Decl *D) { return classofKind(D->getKind()); }
diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
index 1d9743520654eb..c3ff7ebd88516c 100644
--- a/clang/include/clang/AST/Type.h
+++ b/clang/include/clang/AST/Type.h
@@ -6266,8 +6266,8 @@ class HLSLAttributedResourceType : public Type, public
llvm::FoldingSetNode {
LLVM_PREFERRED_TYPE(bool)
uint8_t RawBuffer : 1;
-Attributes(llvm::dxil::ResourceClass ResourceClass, bool IsROV,
- bool RawBuffer)
+Attributes(llvm::dxil::ResourceClass ResourceClass, bool IsROV = false,
+ bool RawBuffer = false)
: ResourceClass(ResourceClass), IsROV(IsROV), RawBuffer(RawBuffer) {}
Attributes() : Attributes(llvm::dxil::ResourceClass::UAV, false, false) {}
diff --git a/clang/lib/AST/Decl.cpp b/clang/lib/AST/Decl.cpp
index beb5fcaefac535..fa7d03354a9937 100644
--- a/clang/lib/AST/Decl.cpp
+++ b/clang/lib/AST/Decl.cpp
@@ -1747,6 +1747,10 @@ void NamedDecl::printNestedNameSpecifier(raw_ostream &OS,
}
}
+// Suppress transparent contexts like export or HLSLBufferDecl context
+if (Ctx->isTransparentContext())
+ continue;
+
// Skip non-named contexts such as linkage specifications and ExportDecls.
const NamedDecl *ND = dyn_cast(Ctx);
if (!ND)
@@ -5713,7 +5717,7 @@ HLSLBufferDecl::HLSLBufferDecl(DeclContext *DC, bool
CBuffer,
SourceLocation IDLoc, SourceLocation LBrace)
: NamedDecl(Decl::Kind::HLSLBuffer, DC, IDLoc, DeclarationName(ID)),
DeclContext(Decl::Kind::HLSLBuffer), LBraceLoc(LBrace), KwLoc(KwLoc),
- IsCBuffer(CBuffer) {}
+ IsCBuffer(CBuffer), HasPackoffset(false) {}
HLSLBufferDecl *HLSLBufferDecl::Create(ASTContext &C,
DeclContext *LexicalParent, bool
CBuffer,
@@ -5743,6 +5747,17 @@ HLSLBufferDecl
*HLSLBufferDecl::CreateDeserialized(ASTContext &C,
SourceLocation(), SourceLocation());
}
+const CXXRecordDecl *HLSLBufferDecl::getLayoutStruct() const {
+ // Layout st
[llvm-branch-commits] [llvm] AMDGPU: Add baseline test for treating v_pk_mov_b32 like reg_sequence (PR #125656)
https://github.com/rampitec approved this pull request. https://github.com/llvm/llvm-project/pull/125656 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] release/20.x: [lldb] Add support for gdb-style 'x' packet (#124733) (PR #125653)
https://github.com/JDevlieghere approved this pull request. 👍 https://github.com/llvm/llvm-project/pull/125653 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] CodeGen][NewPM] Port PostRAScheduler to NPM. (PR #125798)
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/125798
>From fb306f5cd7859d6fbd82b761c8ef339485eeaa59 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Wed, 5 Feb 2025 01:24:06 +0530
Subject: [PATCH 1/2] Added missing namespace comment and some formatting
(NFC).
---
llvm/lib/CodeGen/PostRASchedulerList.cpp | 182 +++
1 file changed, 91 insertions(+), 91 deletions(-)
diff --git a/llvm/lib/CodeGen/PostRASchedulerList.cpp
b/llvm/lib/CodeGen/PostRASchedulerList.cpp
index badfd9a68d6a01..aa8e72ee9c45bb 100644
--- a/llvm/lib/CodeGen/PostRASchedulerList.cpp
+++ b/llvm/lib/CodeGen/PostRASchedulerList.cpp
@@ -73,120 +73,120 @@ DebugMod("postra-sched-debugmod",
AntiDepBreaker::~AntiDepBreaker() = default;
namespace {
- class PostRAScheduler : public MachineFunctionPass {
-const TargetInstrInfo *TII = nullptr;
-RegisterClassInfo RegClassInfo;
-
- public:
-static char ID;
-PostRAScheduler() : MachineFunctionPass(ID) {}
-
-void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.setPreservesCFG();
- AU.addRequired();
- AU.addRequired();
- AU.addRequired();
- AU.addPreserved();
- AU.addRequired();
- AU.addPreserved();
- MachineFunctionPass::getAnalysisUsage(AU);
-}
+class PostRAScheduler : public MachineFunctionPass {
+ const TargetInstrInfo *TII = nullptr;
+ RegisterClassInfo RegClassInfo;
+
+public:
+ static char ID;
+ PostRAScheduler() : MachineFunctionPass(ID) {}
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
+AU.setPreservesCFG();
+AU.addRequired();
+AU.addRequired();
+AU.addRequired();
+AU.addPreserved();
+AU.addRequired();
+AU.addPreserved();
+MachineFunctionPass::getAnalysisUsage(AU);
+ }
-MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs);
-}
+ MachineFunctionProperties getRequiredProperties() const override {
+return MachineFunctionProperties().set(
+MachineFunctionProperties::Property::NoVRegs);
+ }
-bool runOnMachineFunction(MachineFunction &Fn) override;
- };
- char PostRAScheduler::ID = 0;
+ bool runOnMachineFunction(MachineFunction &Fn) override;
+};
- class SchedulePostRATDList : public ScheduleDAGInstrs {
-/// AvailableQueue - The priority queue to use for the available SUnits.
-///
-LatencyPriorityQueue AvailableQueue;
+char PostRAScheduler::ID = 0;
-/// PendingQueue - This contains all of the instructions whose operands
have
-/// been issued, but their results are not ready yet (due to the latency of
-/// the operation). Once the operands becomes available, the instruction
is
-/// added to the AvailableQueue.
-std::vector PendingQueue;
+class SchedulePostRATDList : public ScheduleDAGInstrs {
+ /// AvailableQueue - The priority queue to use for the available SUnits.
+ ///
+ LatencyPriorityQueue AvailableQueue;
-/// HazardRec - The hazard recognizer to use.
-ScheduleHazardRecognizer *HazardRec;
+ /// PendingQueue - This contains all of the instructions whose operands have
+ /// been issued, but their results are not ready yet (due to the latency of
+ /// the operation). Once the operands becomes available, the instruction is
+ /// added to the AvailableQueue.
+ std::vector PendingQueue;
-/// AntiDepBreak - Anti-dependence breaking object, or NULL if none
-AntiDepBreaker *AntiDepBreak;
+ /// HazardRec - The hazard recognizer to use.
+ ScheduleHazardRecognizer *HazardRec;
-/// AA - AliasAnalysis for making memory reference queries.
-AliasAnalysis *AA;
+ /// AntiDepBreak - Anti-dependence breaking object, or NULL if none
+ AntiDepBreaker *AntiDepBreak;
-/// The schedule. Null SUnit*'s represent noop instructions.
-std::vector Sequence;
+ /// AA - AliasAnalysis for making memory reference queries.
+ AliasAnalysis *AA;
-/// Ordered list of DAG postprocessing steps.
-std::vector> Mutations;
+ /// The schedule. Null SUnit*'s represent noop instructions.
+ std::vector Sequence;
-/// The index in BB of RegionEnd.
-///
-/// This is the instruction number from the top of the current block, not
-/// the SlotIndex. It is only used by the AntiDepBreaker.
-unsigned EndIndex = 0;
+ /// Ordered list of DAG postprocessing steps.
+ std::vector> Mutations;
- public:
-SchedulePostRATDList(
-MachineFunction &MF, MachineLoopInfo &MLI, AliasAnalysis *AA,
-const RegisterClassInfo &,
-TargetSubtargetInfo::AntiDepBreakMode AntiDepMode,
-SmallVectorImpl &CriticalPathRCs);
+ /// The index in BB of RegionEnd.
+ ///
+ /// This is the instruction number from the top of the current block, not
+ /// the SlotIndex. It is only used by the AntiDepBreaker.
+ unsigned EndIndex = 0;
-~SchedulePostRATDList() override;
+pu
[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)
https://github.com/ergawy edited https://github.com/llvm/llvm-project/pull/125307 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)
@@ -1730,6 +1730,126 @@ buildDependData(std::optional dependKinds,
OperandRange dependVars,
}
}
+static bool privatizerReadsSourceVariable(omp::PrivateClauseOp &priv) {
+ if (priv.getDataSharingType() == omp::DataSharingClauseType::FirstPrivate)
+return true;
+
+ Region &initRegion = priv.getInitRegion();
+ if (initRegion.empty())
+return false;
+
+ BlockArgument sourceVariable = priv.getInitMoldArg();
+ if (!sourceVariable)
+return false;
+ return !sourceVariable.use_empty();
+}
+
+namespace {
+/// TaskContextStructManager takes care of creating and freeing a structure
+/// containing information needed by the task body to execute.
+class TaskContextStructManager {
+public:
+ TaskContextStructManager(llvm::IRBuilderBase &builder,
+ LLVM::ModuleTranslation &moduleTranslation,
+ MutableArrayRef privateDecls)
+ : builder{builder}, moduleTranslation{moduleTranslation},
+privateDecls{privateDecls} {}
+
+ /// Creates a heap allocated struct containing space for each private
+ /// variable. Returns nullptr if there are is no struct needed. Invariant:
ergawy wrote:
I think the comment needs to be updated, this method does not return a value.
https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)
https://github.com/ergawy commented: Thanks Tom! I have a few comments. Not much of an expert when it comes to tasks so I might have missed something worth noting. https://github.com/llvm/llvm-project/pull/125307 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: Temporal divergence lowering (non i1) (PR #124298)
https://github.com/ssahasra commented: The changes to UA look good to me. I can't comment much about the actual patch itself. https://github.com/llvm/llvm-project/pull/124298 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] CodeGen][NewPM] Port MachineScheduler to NPM. (PR #125703)
cdevadas wrote: ### Merge activity * **Feb 5, 12:58 AM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/125703). https://github.com/llvm/llvm-project/pull/125703 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [MachineVerifier][NewPM] Add method to run MF through verifier. (PR #125701)
cdevadas wrote: ### Merge activity * **Feb 5, 12:58 AM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/125701). https://github.com/llvm/llvm-project/pull/125701 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][MachineScheduler] Remove the unimplemented print method. (PR #125702)
cdevadas wrote: ### Merge activity * **Feb 5, 12:58 AM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/125702). https://github.com/llvm/llvm-project/pull/125702 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [HLSL] Implement default constant buffer `$Globals` (PR #125807)
https://github.com/hekota created
https://github.com/llvm/llvm-project/pull/125807
All variable declarations in the global scope that are not resources, static or
empty are implicitly added to implicit constant buffer `$Globals`.
Fixes #123801
Depends on #124886.
>From 42bb34f66f0030f55e1055c4ee0b362511b7f45b Mon Sep 17 00:00:00 2001
From: Helena Kotas
Date: Tue, 4 Feb 2025 22:01:49 -0800
Subject: [PATCH] [HLSL] Implement default constant buffer `$Globals`
All variable declarations in the global scope that are not resources, static or
empty are implicitly added to implicit constant buffer `$Globals`.
Fixes #123801
---
clang/include/clang/AST/Decl.h | 22 +++
clang/include/clang/Sema/SemaHLSL.h | 7 ++-
clang/lib/AST/Decl.cpp | 41 -
clang/lib/CodeGen/CGHLSLRuntime.cpp | 7 +--
clang/lib/CodeGen/CodeGenModule.cpp | 5 ++
clang/lib/Sema/Sema.cpp | 3 +-
clang/lib/Sema/SemaHLSL.cpp | 47 +--
clang/test/AST/HLSL/default_cbuffer.hlsl| 50
clang/test/CodeGenHLSL/basic_types.hlsl | 64 ++---
clang/test/CodeGenHLSL/default_cbuffer.hlsl | 43 ++
10 files changed, 242 insertions(+), 47 deletions(-)
create mode 100644 clang/test/AST/HLSL/default_cbuffer.hlsl
create mode 100644 clang/test/CodeGenHLSL/default_cbuffer.hlsl
diff --git a/clang/include/clang/AST/Decl.h b/clang/include/clang/AST/Decl.h
index 05e56978977f2b1..f86ddaf89bd9cfa 100644
--- a/clang/include/clang/AST/Decl.h
+++ b/clang/include/clang/AST/Decl.h
@@ -5038,6 +5038,11 @@ class HLSLBufferDecl final : public NamedDecl, public
DeclContext {
// LayoutStruct - Layout struct for the buffer
CXXRecordDecl *LayoutStruct;
+ // For default (implicit) constant buffer, a lisf of references of global
+ // decls that belong to the buffer. The decls are already parented by the
+ // translation unit context.
+ SmallVector DefaultBufferDecls;
+
HLSLBufferDecl(DeclContext *DC, bool CBuffer, SourceLocation KwLoc,
IdentifierInfo *ID, SourceLocation IDLoc,
SourceLocation LBrace);
@@ -5047,6 +5052,8 @@ class HLSLBufferDecl final : public NamedDecl, public
DeclContext {
bool CBuffer, SourceLocation KwLoc,
IdentifierInfo *ID, SourceLocation IDLoc,
SourceLocation LBrace);
+ static HLSLBufferDecl *CreateDefaultCBuffer(ASTContext &C,
+ DeclContext *LexicalParent);
static HLSLBufferDecl *CreateDeserialized(ASTContext &C, GlobalDeclID ID);
SourceRange getSourceRange() const override LLVM_READONLY {
@@ -5061,6 +5068,7 @@ class HLSLBufferDecl final : public NamedDecl, public
DeclContext {
bool hasPackoffset() const { return HasPackoffset; }
const CXXRecordDecl *getLayoutStruct() const { return LayoutStruct; }
void addLayoutStruct(CXXRecordDecl *LS);
+ void addDefaultBufferDecl(Decl *D);
// Implement isa/cast/dyncast/etc.
static bool classof(const Decl *D) { return classofKind(D->getKind()); }
@@ -5072,6 +5080,20 @@ class HLSLBufferDecl final : public NamedDecl, public
DeclContext {
return static_cast(const_cast(DC));
}
+ // Iterator for the buffer decls. Concatenates the list of decls parented
+ // by this HLSLBufferDecl with the list of default buffer decls.
+ using buffer_decl_iterator =
+ llvm::concat_iterator::const_iterator,
+decl_iterator>;
+ using buffer_decl_range = llvm::iterator_range;
+
+ buffer_decl_range buffer_decls() const {
+return buffer_decl_range(buffer_decls_begin(), buffer_decls_end());
+ }
+ buffer_decl_iterator buffer_decls_begin() const;
+ buffer_decl_iterator buffer_decls_end() const;
+ bool buffer_decls_empty();
+
friend class ASTDeclReader;
friend class ASTDeclWriter;
};
diff --git a/clang/include/clang/Sema/SemaHLSL.h
b/clang/include/clang/Sema/SemaHLSL.h
index f4cd11f423a84a0..b1cc856975532fa 100644
--- a/clang/include/clang/Sema/SemaHLSL.h
+++ b/clang/include/clang/Sema/SemaHLSL.h
@@ -103,13 +103,13 @@ class SemaHLSL : public SemaBase {
HLSLParamModifierAttr::Spelling Spelling);
void ActOnTopLevelFunction(FunctionDecl *FD);
void ActOnVariableDeclarator(VarDecl *VD);
+ void ActOnEndOfTranslationUnit(TranslationUnitDecl *TU);
void CheckEntryPoint(FunctionDecl *FD);
void CheckSemanticAnnotation(FunctionDecl *EntryPoint, const Decl *Param,
const HLSLAnnotationAttr *AnnotationAttr);
void DiagnoseAttrStageMismatch(
const Attr *A, llvm::Triple::EnvironmentType Stage,
std::initializer_list AllowedStages);
- void DiagnoseAvailabilityViolations(TranslationUnitDecl *TU);
QualType handleVectorBinOpConversion(ExprResult &LHS, ExprResult &RHS,
QualType LHSType,
[llvm-branch-commits] [clang] [HLSL] Implement default constant buffer `$Globals` (PR #125807)
https://github.com/hekota edited https://github.com/llvm/llvm-project/pull/125807 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [HLSL] Constant buffers codegen (PR #124886)
https://github.com/hekota edited https://github.com/llvm/llvm-project/pull/124886 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] CodeGen][NewPM] Port PostRAScheduler to NPM. (PR #125798)
cdevadas wrote: ### Merge activity * **Feb 5, 12:58 AM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/125798). https://github.com/llvm/llvm-project/pull/125798 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [HLSL] Implement default constant buffer `$Globals` (PR #125807)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff a8cdd4536867465e3d6e2b4ad8c49b27ee94dec8
42bb34f66f0030f55e1055c4ee0b362511b7f45b --extensions h,cpp --
clang/include/clang/AST/Decl.h clang/include/clang/Sema/SemaHLSL.h
clang/lib/AST/Decl.cpp clang/lib/CodeGen/CGHLSLRuntime.cpp
clang/lib/CodeGen/CodeGenModule.cpp clang/lib/Sema/Sema.cpp
clang/lib/Sema/SemaHLSL.cpp
``
View the diff from clang-format here.
``diff
diff --git a/clang/lib/AST/Decl.cpp b/clang/lib/AST/Decl.cpp
index eede936577..4eb648ce95 100644
--- a/clang/lib/AST/Decl.cpp
+++ b/clang/lib/AST/Decl.cpp
@@ -5755,9 +5755,8 @@ HLSLBufferDecl::CreateDefaultCBuffer(ASTContext &C,
HLSLBufferDecl *HLSLBufferDecl::CreateDeserialized(ASTContext &C,
GlobalDeclID ID) {
- return new (C, ID)
- HLSLBufferDecl(nullptr, false, SourceLocation(), nullptr,
- SourceLocation(), SourceLocation());
+ return new (C, ID) HLSLBufferDecl(nullptr, false, SourceLocation(), nullptr,
+SourceLocation(), SourceLocation());
}
void HLSLBufferDecl::addLayoutStruct(CXXRecordDecl *LS) {
``
https://github.com/llvm/llvm-project/pull/125807
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[llvm-branch-commits] [clang] release/20.x: [C++20] [Modules] Don't diagnose duplicated friend declarations between modules incorrectly (PR #125809)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/125809
Backport c5a9a72b3cd118a23193d01bf9393fbf1d4b90ae
Requested by: @ChuanqiXu9
>From d8a541445ede9e8bcbe4762c2b3139a64fb1cfd2 Mon Sep 17 00:00:00 2001
From: Chuanqi Xu
Date: Wed, 5 Feb 2025 13:41:48 +0800
Subject: [PATCH] [C++20] [Modules] Don't diagnose duplicated friend
declarations between modules incorrectly
Close https://github.com/llvm/llvm-project/issues/125521
We shouldn't use the ownership information for friend declarations to do
anything.
(cherry picked from commit c5a9a72b3cd118a23193d01bf9393fbf1d4b90ae)
---
clang/lib/AST/ASTContext.cpp | 3 +-
clang/lib/Serialization/ASTReaderDecl.cpp | 5 ++
clang/test/Modules/pr125521.cppm | 57 +++
3 files changed, 64 insertions(+), 1 deletion(-)
create mode 100644 clang/test/Modules/pr125521.cppm
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index e58091ce95f625..dbeb3d105ad17c 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -1055,7 +1055,8 @@ void ASTContext::PrintStats() const {
void ASTContext::mergeDefinitionIntoModule(NamedDecl *ND, Module *M,
bool NotifyListeners) {
if (NotifyListeners)
-if (auto *Listener = getASTMutationListener())
+if (auto *Listener = getASTMutationListener();
+Listener && !ND->isUnconditionallyVisible())
Listener->RedefinedHiddenDefinition(ND, M);
MergedDefModules[cast(ND->getCanonicalDecl())].push_back(M);
diff --git a/clang/lib/Serialization/ASTReaderDecl.cpp
b/clang/lib/Serialization/ASTReaderDecl.cpp
index 8210eb2143acf5..1aa94d5a22abe2 100644
--- a/clang/lib/Serialization/ASTReaderDecl.cpp
+++ b/clang/lib/Serialization/ASTReaderDecl.cpp
@@ -3746,6 +3746,11 @@ void
ASTDeclReader::checkMultipleDefinitionInNamedModules(ASTReader &Reader,
Func && Func->getTemplateSpecializationInfo())
return;
+ // The module ownership of in-class friend declaration is not
straightforward.
+ // Avoid diagnosing such cases.
+ if (D->getFriendObjectKind() || Previous->getFriendObjectKind())
+return;
+
Module *M = Previous->getOwningModule();
if (!M)
return;
diff --git a/clang/test/Modules/pr125521.cppm b/clang/test/Modules/pr125521.cppm
new file mode 100644
index 00..d064cdfe3eb73b
--- /dev/null
+++ b/clang/test/Modules/pr125521.cppm
@@ -0,0 +1,57 @@
+// RUN: rm -rf %t
+// RUN: mkdir -p %t
+// RUN: split-file %s %t
+//
+// RUN: %clang_cc1 -std=c++20 %t/mod2.cppm -emit-module-interface -o
%t/mod2.pcm
+// RUN: %clang_cc1 -std=c++20 %t/mod1.cppm -emit-module-interface -o
%t/mod1.pcm \
+// RUN: -fmodule-file=Mod2=%t/mod2.pcm
+// RUN: %clang_cc1 -std=c++20 %t/test.cc -fmodule-file=Mod2=%t/mod2.pcm
-fmodule-file=Mod=%t/mod1.pcm \
+// RUN: -fsyntax-only -verify
+
+// RUN: %clang_cc1 -std=c++20 %t/mod2.cppm -emit-module-interface -o
%t/mod2.pcm
+// RUN: %clang_cc1 -std=c++20 %t/mod1.cppm -emit-module-interface -o
%t/mod1.pcm \
+// RUN: -fmodule-file=Mod2=%t/mod2.pcm
+// RUN: %clang_cc1 -std=c++20 %t/mod1.pcm -fmodule-file=Mod2=%t/mod2.pcm
-emit-llvm -o - \
+// RUN: | FileCheck %t/mod1.cppm
+
+//--- hello.h
+template int get() noexcept {return 0;};
+
+template
+class List
+{
+template friend int get() noexcept;
+};
+
+//--- mod2.cppm
+module;
+#include "hello.h"
+export module Mod2;
+export const char *modFn2() {
+List a;
+return "hello";
+}
+
+//--- mod1.cppm
+module;
+#include "hello.h"
+export module Mod;
+import Mod2;
+export extern "C" const char *modFn() {
+List a;
+List b;
+return modFn2();
+}
+
+// Fine enough to check it won't crash.
+// CHECK: define {{.*}}@modFn
+
+//--- test.cc
+// expected-no-diagnostics
+import Mod;
+import Mod2;
+
+void test() {
+modFn();
+modFn2();
+}
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[llvm-branch-commits] [clang] release/20.x: [C++20] [Modules] Don't diagnose duplicated friend declarations between modules incorrectly (PR #125809)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: None (llvmbot)
Changes
Backport c5a9a72b3cd118a23193d01bf9393fbf1d4b90ae
Requested by: @ChuanqiXu9
---
Full diff: https://github.com/llvm/llvm-project/pull/125809.diff
3 Files Affected:
- (modified) clang/lib/AST/ASTContext.cpp (+2-1)
- (modified) clang/lib/Serialization/ASTReaderDecl.cpp (+5)
- (added) clang/test/Modules/pr125521.cppm (+57)
``diff
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index e58091ce95f6258..dbeb3d105ad17c4 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -1055,7 +1055,8 @@ void ASTContext::PrintStats() const {
void ASTContext::mergeDefinitionIntoModule(NamedDecl *ND, Module *M,
bool NotifyListeners) {
if (NotifyListeners)
-if (auto *Listener = getASTMutationListener())
+if (auto *Listener = getASTMutationListener();
+Listener && !ND->isUnconditionallyVisible())
Listener->RedefinedHiddenDefinition(ND, M);
MergedDefModules[cast(ND->getCanonicalDecl())].push_back(M);
diff --git a/clang/lib/Serialization/ASTReaderDecl.cpp
b/clang/lib/Serialization/ASTReaderDecl.cpp
index 8210eb2143acf56..1aa94d5a22abe28 100644
--- a/clang/lib/Serialization/ASTReaderDecl.cpp
+++ b/clang/lib/Serialization/ASTReaderDecl.cpp
@@ -3746,6 +3746,11 @@ void
ASTDeclReader::checkMultipleDefinitionInNamedModules(ASTReader &Reader,
Func && Func->getTemplateSpecializationInfo())
return;
+ // The module ownership of in-class friend declaration is not
straightforward.
+ // Avoid diagnosing such cases.
+ if (D->getFriendObjectKind() || Previous->getFriendObjectKind())
+return;
+
Module *M = Previous->getOwningModule();
if (!M)
return;
diff --git a/clang/test/Modules/pr125521.cppm b/clang/test/Modules/pr125521.cppm
new file mode 100644
index 000..d064cdfe3eb73bb
--- /dev/null
+++ b/clang/test/Modules/pr125521.cppm
@@ -0,0 +1,57 @@
+// RUN: rm -rf %t
+// RUN: mkdir -p %t
+// RUN: split-file %s %t
+//
+// RUN: %clang_cc1 -std=c++20 %t/mod2.cppm -emit-module-interface -o
%t/mod2.pcm
+// RUN: %clang_cc1 -std=c++20 %t/mod1.cppm -emit-module-interface -o
%t/mod1.pcm \
+// RUN: -fmodule-file=Mod2=%t/mod2.pcm
+// RUN: %clang_cc1 -std=c++20 %t/test.cc -fmodule-file=Mod2=%t/mod2.pcm
-fmodule-file=Mod=%t/mod1.pcm \
+// RUN: -fsyntax-only -verify
+
+// RUN: %clang_cc1 -std=c++20 %t/mod2.cppm -emit-module-interface -o
%t/mod2.pcm
+// RUN: %clang_cc1 -std=c++20 %t/mod1.cppm -emit-module-interface -o
%t/mod1.pcm \
+// RUN: -fmodule-file=Mod2=%t/mod2.pcm
+// RUN: %clang_cc1 -std=c++20 %t/mod1.pcm -fmodule-file=Mod2=%t/mod2.pcm
-emit-llvm -o - \
+// RUN: | FileCheck %t/mod1.cppm
+
+//--- hello.h
+template int get() noexcept {return 0;};
+
+template
+class List
+{
+template friend int get() noexcept;
+};
+
+//--- mod2.cppm
+module;
+#include "hello.h"
+export module Mod2;
+export const char *modFn2() {
+List a;
+return "hello";
+}
+
+//--- mod1.cppm
+module;
+#include "hello.h"
+export module Mod;
+import Mod2;
+export extern "C" const char *modFn() {
+List a;
+List b;
+return modFn2();
+}
+
+// Fine enough to check it won't crash.
+// CHECK: define {{.*}}@modFn
+
+//--- test.cc
+// expected-no-diagnostics
+import Mod;
+import Mod2;
+
+void test() {
+modFn();
+modFn2();
+}
``
https://github.com/llvm/llvm-project/pull/125809
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[llvm-branch-commits] [clang] release/20.x: [C++20] [Modules] Don't diagnose duplicated friend declarations between modules incorrectly (PR #125809)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/125809 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [HLSL] Constant buffers codegen (PR #124886)
https://github.com/hekota updated
https://github.com/llvm/llvm-project/pull/124886
>From cf08adb6b9e181613e81d2cfbadbbb68e645fe33 Mon Sep 17 00:00:00 2001
From: Helena Kotas
Date: Tue, 28 Jan 2025 14:46:26 -0800
Subject: [PATCH 1/4] [HLSL] Translate cbuffer declarations to target type
dx.CBuffer - initial commit
---
clang/include/clang/AST/Decl.h| 6 +
clang/include/clang/AST/Type.h| 4 +-
clang/lib/AST/Decl.cpp| 17 +-
clang/lib/CodeGen/CGHLSLRuntime.cpp | 409 --
clang/lib/CodeGen/CGHLSLRuntime.h | 31 +-
clang/lib/CodeGen/Targets/DirectX.cpp | 11 +-
clang/lib/Sema/SemaHLSL.cpp | 3 +
clang/test/CodeGenHLSL/cbuf.hlsl | 33 --
clang/test/CodeGenHLSL/cbuf_in_namespace.hlsl | 29 --
clang/test/CodeGenHLSL/cbuffer.hlsl | 200 +
.../CodeGenHLSL/cbuffer_and_namespaces.hlsl | 63 +++
.../CodeGenHLSL/cbuffer_with_packoffset.hlsl | 40 ++
...uffer_with_static_global_and_function.hlsl | 32 ++
clang/test/CodeGenHLSL/resource-bindings.hlsl | 4 +
.../static_global_and_function_in_cb.hlsl | 22 -
15 files changed, 679 insertions(+), 225 deletions(-)
delete mode 100644 clang/test/CodeGenHLSL/cbuf.hlsl
delete mode 100644 clang/test/CodeGenHLSL/cbuf_in_namespace.hlsl
create mode 100644 clang/test/CodeGenHLSL/cbuffer.hlsl
create mode 100644 clang/test/CodeGenHLSL/cbuffer_and_namespaces.hlsl
create mode 100644 clang/test/CodeGenHLSL/cbuffer_with_packoffset.hlsl
create mode 100644
clang/test/CodeGenHLSL/cbuffer_with_static_global_and_function.hlsl
delete mode 100644 clang/test/CodeGenHLSL/static_global_and_function_in_cb.hlsl
diff --git a/clang/include/clang/AST/Decl.h b/clang/include/clang/AST/Decl.h
index 16403774e72b31c..e1c7e3817699ce0 100644
--- a/clang/include/clang/AST/Decl.h
+++ b/clang/include/clang/AST/Decl.h
@@ -5032,6 +5032,9 @@ class HLSLBufferDecl final : public NamedDecl, public
DeclContext {
SourceLocation KwLoc;
/// IsCBuffer - Whether the buffer is a cbuffer (and not a tbuffer).
bool IsCBuffer;
+ /// HasValidPackoffset - Whether the buffer has valid packoffset annotations
+ // on all declarations
+ bool HasPackoffset;
HLSLBufferDecl(DeclContext *DC, bool CBuffer, SourceLocation KwLoc,
IdentifierInfo *ID, SourceLocation IDLoc,
@@ -5052,6 +5055,9 @@ class HLSLBufferDecl final : public NamedDecl, public
DeclContext {
SourceLocation getRBraceLoc() const { return RBraceLoc; }
void setRBraceLoc(SourceLocation L) { RBraceLoc = L; }
bool isCBuffer() const { return IsCBuffer; }
+ void setHasPackoffset(bool PO) { HasPackoffset = PO; }
+ bool hasPackoffset() const { return HasPackoffset; }
+ const CXXRecordDecl *getLayoutStruct() const;
// Implement isa/cast/dyncast/etc.
static bool classof(const Decl *D) { return classofKind(D->getKind()); }
diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
index 1d9743520654ebd..c3ff7ebd88516c7 100644
--- a/clang/include/clang/AST/Type.h
+++ b/clang/include/clang/AST/Type.h
@@ -6266,8 +6266,8 @@ class HLSLAttributedResourceType : public Type, public
llvm::FoldingSetNode {
LLVM_PREFERRED_TYPE(bool)
uint8_t RawBuffer : 1;
-Attributes(llvm::dxil::ResourceClass ResourceClass, bool IsROV,
- bool RawBuffer)
+Attributes(llvm::dxil::ResourceClass ResourceClass, bool IsROV = false,
+ bool RawBuffer = false)
: ResourceClass(ResourceClass), IsROV(IsROV), RawBuffer(RawBuffer) {}
Attributes() : Attributes(llvm::dxil::ResourceClass::UAV, false, false) {}
diff --git a/clang/lib/AST/Decl.cpp b/clang/lib/AST/Decl.cpp
index beb5fcaefac5353..fa7d03354a99379 100644
--- a/clang/lib/AST/Decl.cpp
+++ b/clang/lib/AST/Decl.cpp
@@ -1747,6 +1747,10 @@ void NamedDecl::printNestedNameSpecifier(raw_ostream &OS,
}
}
+// Suppress transparent contexts like export or HLSLBufferDecl context
+if (Ctx->isTransparentContext())
+ continue;
+
// Skip non-named contexts such as linkage specifications and ExportDecls.
const NamedDecl *ND = dyn_cast(Ctx);
if (!ND)
@@ -5713,7 +5717,7 @@ HLSLBufferDecl::HLSLBufferDecl(DeclContext *DC, bool
CBuffer,
SourceLocation IDLoc, SourceLocation LBrace)
: NamedDecl(Decl::Kind::HLSLBuffer, DC, IDLoc, DeclarationName(ID)),
DeclContext(Decl::Kind::HLSLBuffer), LBraceLoc(LBrace), KwLoc(KwLoc),
- IsCBuffer(CBuffer) {}
+ IsCBuffer(CBuffer), HasPackoffset(false) {}
HLSLBufferDecl *HLSLBufferDecl::Create(ASTContext &C,
DeclContext *LexicalParent, bool
CBuffer,
@@ -5743,6 +5747,17 @@ HLSLBufferDecl
*HLSLBufferDecl::CreateDeserialized(ASTContext &C,
SourceLocation(), SourceLocation());
}
+const CXXRecordDecl *HLSLBufferDecl::getLayoutStruct() const {
+ // Lay
[llvm-branch-commits] [llvm] CodeGen][NewPM] Port MachineScheduler to NPM. (PR #125703)
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/125703 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] CodeGen][NewPM] Port MachineScheduler to NPM. (PR #125703)
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/125703
>From 35a3a800bf08d30bc1311ad8146ac7759ed1f090 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Thu, 16 Jan 2025 10:26:09 +0530
Subject: [PATCH 1/2] CodeGen][NewPM] Port MachineScheduler to NPM.
---
llvm/include/llvm/CodeGen/MachineScheduler.h | 18 ++
llvm/include/llvm/InitializePasses.h | 4 +-
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 5 +-
.../llvm/Passes/MachinePassRegistry.def | 4 +-
llvm/lib/CodeGen/CodeGen.cpp | 4 +-
llvm/lib/CodeGen/MachineScheduler.cpp | 287 +-
llvm/lib/CodeGen/RegAllocBasic.cpp| 2 +-
llvm/lib/CodeGen/RegAllocGreedy.cpp | 2 +-
llvm/lib/Passes/PassBuilder.cpp | 1 +
.../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 +
.../test/CodeGen/AArch64/a55-fuse-address.mir | 1 +
.../CodeGen/AArch64/ampere1-sched-add.mir | 1 +
.../CodeGen/AArch64/cluster-frame-index.mir | 1 +
.../CodeGen/AArch64/dump-reserved-cycles.mir | 6 +
.../CodeGen/AArch64/dump-schedule-trace.mir | 17 ++
.../AArch64/force-enable-intervals.mir| 10 +
.../CodeGen/AArch64/machine-scheduler.mir | 1 +
.../macro-fusion-addsub-2reg-const1.mir | 2 +
.../CodeGen/AArch64/macro-fusion-last.mir | 2 +
.../AArch64/misched-branch-targets.mir| 3 +
llvm/test/CodeGen/AArch64/misched-bundle.mir | 1 +
.../misched-detail-resource-booking-01.mir| 8 +
.../misched-detail-resource-booking-02.mir| 7 +
.../AArch64/misched-fusion-arith-logic.mir| 2 +
.../CodeGen/AArch64/misched-fusion-cmp.mir| 1 +
.../AArch64/misched-fusion-crypto-eor.mir | 3 +
.../test/CodeGen/AArch64/misched-move-imm.mir | 1 +
.../AArch64/misched-predicate-virtreg.mir | 1 +
.../misched-sort-resource-in-trace.mir| 10 +
.../CodeGen/AArch64/sched-postidxalias.mir| 1 +
.../CodeGen/AArch64/sched-print-cycle.mir | 6 +
.../CodeGen/AArch64/scheduledag-constreg.mir | 1 +
llvm/test/CodeGen/AArch64/sve-aliasing.mir| 1 +
.../AMDGPU/at-least-one-def-value-assert.mir | 2 +
.../CodeGen/AMDGPU/cluster-flat-loads.mir | 1 +
.../AMDGPU/dbg-value-ends-sched-region.mir| 1 +
.../AMDGPU/debug-value-scheduler-crash.mir| 1 +
.../AMDGPU/debug-value-scheduler-liveins.mir | 1 +
.../CodeGen/AMDGPU/debug-value-scheduler.mir | 1 +
.../CodeGen/AMDGPU/flat-load-clustering.mir | 1 +
.../CodeGen/AMDGPU/high-RP-reschedule.mir | 6 +-
...ne-scheduler-sink-trivial-remats-debug.mir | 1 +
.../machine-scheduler-sink-trivial-remats.mir | 1 +
.../AMDGPU/macro-fusion-cluster-vcc-uses.mir | 1 +
...ssert-dead-def-subreg-use-other-subreg.mir | 3 +-
...ched-assert-onlydbg-value-empty-region.mir | 1 +
.../AMDGPU/sched-barrier-hang-weak-dep.mir| 1 +
.../CodeGen/AMDGPU/sched-crash-dbg-value.mir | 1 +
...dleMoveUp-subreg-def-across-subreg-def.mir | 1 +
.../AMDGPU/schedule-barrier-fpmode.mir| 2 +
llvm/test/CodeGen/AMDGPU/schedule-barrier.mir | 1 +
.../AMDGPU/sreg-xnull-regclass-bitwidth.mir | 1 +
llvm/test/CodeGen/ARM/cortex-m7-wideops.mir | 1 +
.../CodeGen/ARM/misched-branch-targets.mir| 2 +
.../CodeGen/PowerPC/topdepthreduce-postra.mir | 1 +
.../RISCV/misched-postra-direction.mir| 13 +
56 files changed, 366 insertions(+), 95 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineScheduler.h
b/llvm/include/llvm/CodeGen/MachineScheduler.h
index 4762494e6ccb77d..e1f1a1efecc724d 100644
--- a/llvm/include/llvm/CodeGen/MachineScheduler.h
+++ b/llvm/include/llvm/CodeGen/MachineScheduler.h
@@ -1385,6 +1385,24 @@ std::unique_ptr
createCopyConstrainDAGMutation(const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI);
+class MachineSchedulerPass : public PassInfoMixin {
+ const TargetMachine *TM;
+
+public:
+ MachineSchedulerPass(const TargetMachine *TM) : TM(TM) {}
+ PreservedAnalyses run(MachineFunction &MF,
+MachineFunctionAnalysisManager &MFAM);
+};
+
+class PostMachineSchedulerPass
+: public PassInfoMixin {
+ const TargetMachine *TM;
+
+public:
+ PostMachineSchedulerPass(const TargetMachine *TM) : TM(TM) {}
+ PreservedAnalyses run(MachineFunction &MF,
+MachineFunctionAnalysisManager &MFAM);
+};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINESCHEDULER_H
diff --git a/llvm/include/llvm/InitializePasses.h
b/llvm/include/llvm/InitializePasses.h
index 053f955d0df0a4d..e492de62acfa482 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -209,7 +209,7 @@ void initializeMachinePipelinerPass(PassRegistry &);
void initializeMachinePostDominatorTreeWrapperPassPass(PassRegistry &);
void initializeMachineRegionInfoPassPass(PassRegistry &);
void initializeMachineSanitizerBinaryMetadataPass(PassRegistry &);
-voi
[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)
@@ -1796,36 +1918,110 @@ convertOmpTaskOp(omp::TaskOp taskOp,
llvm::IRBuilderBase &builder,
// Allocate and initialize private variables
// TODO: package private variables up in a structure
builder.SetInsertPoint(initBlock->getTerminator());
- for (auto [privDecl, mlirPrivVar, blockArg] :
- llvm::zip_equal(privateDecls, mlirPrivateVars, privateBlockArgs)) {
-llvm::Type *llvmAllocType =
-moduleTranslation.convertType(privDecl.getType());
-// Allocations:
-builder.SetInsertPoint(allocaIP.getBlock()->getTerminator());
-llvm::Value *llvmPrivateVar = builder.CreateAlloca(
-llvmAllocType, /*ArraySize=*/nullptr, "omp.private.alloc");
+ // Create task variable structure
+ llvm::SmallVector privateVarAllocations;
+ taskStructMgr.generateTaskContextStruct();
+ // GEPs so that we can initialize the variables. Don't use these GEPs inside
+ // of the body otherwise it will be the GEP not the struct which is fowarded
+ // to the outlined function. GEPs forwarded in this way are passed in a
+ // stack-allocated (by OpenMPIRBuilder) structure which is not safe for tasks
+ // which may not be executed until after the current stack frame goes out of
+ // scope.
+ taskStructMgr.createGEPsToPrivateVars(privateVarAllocations);
+
+ for (auto [privDecl, mlirPrivVar, blockArg, llvmPrivateVarAlloc] :
+ llvm::zip_equal(privateDecls, mlirPrivateVars, privateBlockArgs,
+ privateVarAllocations)) {
+if (!llvmPrivateVarAlloc)
ergawy wrote:
nit: Just to more easily constrast it with the other loop below.
```suggestion
if (!privatizerReadsSourceVariable(privDecl))
```
https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)
@@ -1730,6 +1730,126 @@ buildDependData(std::optional dependKinds,
OperandRange dependVars,
}
}
+static bool privatizerReadsSourceVariable(omp::PrivateClauseOp &priv) {
+ if (priv.getDataSharingType() == omp::DataSharingClauseType::FirstPrivate)
+return true;
+
+ Region &initRegion = priv.getInitRegion();
+ if (initRegion.empty())
+return false;
+
+ BlockArgument sourceVariable = priv.getInitMoldArg();
+ if (!sourceVariable)
+return false;
+ return !sourceVariable.use_empty();
+}
+
+namespace {
+/// TaskContextStructManager takes care of creating and freeing a structure
+/// containing information needed by the task body to execute.
+class TaskContextStructManager {
+public:
+ TaskContextStructManager(llvm::IRBuilderBase &builder,
+ LLVM::ModuleTranslation &moduleTranslation,
+ MutableArrayRef privateDecls)
+ : builder{builder}, moduleTranslation{moduleTranslation},
+privateDecls{privateDecls} {}
+
+ /// Creates a heap allocated struct containing space for each private
+ /// variable. Returns nullptr if there are is no struct needed. Invariant:
+ /// privateVarTypes, privateDecls, and the elements of the structure should
+ /// all have the same order (although privateDecls which do not read from the
+ /// mold argument are skipped).
+ void generateTaskContextStruct();
+
+ /// Create GEPs to access each member of the structure representing a private
+ /// variable, adding them to llvmPrivateVars. Null values are added where
+ /// private decls were skipped so that the ordering continues to match the
+ /// private decls.
+ void createGEPsToPrivateVars(SmallVectorImpl
&llvmPrivateVars);
+
+ /// De-allocate the task context structure.
+ void freeStructPtr();
+
+ llvm::Value *getStructPtr() { return structPtr; }
+
+private:
+ llvm::IRBuilderBase &builder;
+ LLVM::ModuleTranslation &moduleTranslation;
+ MutableArrayRef privateDecls;
ergawy wrote:
I think an `ArrayRef` here is enough, no need for mutability, right?
https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)
@@ -1730,6 +1730,126 @@ buildDependData(std::optional dependKinds,
OperandRange dependVars,
}
}
+static bool privatizerReadsSourceVariable(omp::PrivateClauseOp &priv) {
+ if (priv.getDataSharingType() == omp::DataSharingClauseType::FirstPrivate)
+return true;
+
+ Region &initRegion = priv.getInitRegion();
+ if (initRegion.empty())
+return false;
+
+ BlockArgument sourceVariable = priv.getInitMoldArg();
+ if (!sourceVariable)
+return false;
+ return !sourceVariable.use_empty();
+}
+
+namespace {
+/// TaskContextStructManager takes care of creating and freeing a structure
+/// containing information needed by the task body to execute.
+class TaskContextStructManager {
+public:
+ TaskContextStructManager(llvm::IRBuilderBase &builder,
+ LLVM::ModuleTranslation &moduleTranslation,
+ MutableArrayRef privateDecls)
+ : builder{builder}, moduleTranslation{moduleTranslation},
+privateDecls{privateDecls} {}
+
+ /// Creates a heap allocated struct containing space for each private
+ /// variable. Returns nullptr if there are is no struct needed. Invariant:
+ /// privateVarTypes, privateDecls, and the elements of the structure should
+ /// all have the same order (although privateDecls which do not read from the
+ /// mold argument are skipped).
+ void generateTaskContextStruct();
ergawy wrote:
I think this does not need to be explicitely called. We can just call it on
construction and make it private.
https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)
@@ -1796,36 +1918,110 @@ convertOmpTaskOp(omp::TaskOp taskOp,
llvm::IRBuilderBase &builder,
// Allocate and initialize private variables
// TODO: package private variables up in a structure
builder.SetInsertPoint(initBlock->getTerminator());
- for (auto [privDecl, mlirPrivVar, blockArg] :
- llvm::zip_equal(privateDecls, mlirPrivateVars, privateBlockArgs)) {
-llvm::Type *llvmAllocType =
-moduleTranslation.convertType(privDecl.getType());
-// Allocations:
-builder.SetInsertPoint(allocaIP.getBlock()->getTerminator());
-llvm::Value *llvmPrivateVar = builder.CreateAlloca(
-llvmAllocType, /*ArraySize=*/nullptr, "omp.private.alloc");
+ // Create task variable structure
+ llvm::SmallVector privateVarAllocations;
+ taskStructMgr.generateTaskContextStruct();
+ // GEPs so that we can initialize the variables. Don't use these GEPs inside
+ // of the body otherwise it will be the GEP not the struct which is fowarded
+ // to the outlined function. GEPs forwarded in this way are passed in a
+ // stack-allocated (by OpenMPIRBuilder) structure which is not safe for tasks
+ // which may not be executed until after the current stack frame goes out of
+ // scope.
+ taskStructMgr.createGEPsToPrivateVars(privateVarAllocations);
+
+ for (auto [privDecl, mlirPrivVar, blockArg, llvmPrivateVarAlloc] :
+ llvm::zip_equal(privateDecls, mlirPrivateVars, privateBlockArgs,
+ privateVarAllocations)) {
+if (!llvmPrivateVarAlloc)
+ // to be handled inside the task
+ continue;
-// builder.SetInsertPoint(initBlock->getTerminator());
-auto err =
+llvm::Expected privateVarOrErr =
initPrivateVar(builder, moduleTranslation, privDecl, mlirPrivVar,
- blockArg, llvmPrivateVar, llvmPrivateVars, initBlock);
-if (err)
+ blockArg, llvmPrivateVarAlloc, initBlock);
+if (auto err = privateVarOrErr.takeError())
return handleError(std::move(err), *taskOp.getOperation());
+
+llvm::IRBuilderBase::InsertPointGuard guard(builder);
+builder.SetInsertPoint(builder.GetInsertBlock()->getTerminator());
ergawy wrote:
Do we guarantee that the insertion block is terminated here? Should we handle
the situation where it is not?
https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)
@@ -1730,6 +1730,126 @@ buildDependData(std::optional dependKinds,
OperandRange dependVars,
}
}
+static bool privatizerReadsSourceVariable(omp::PrivateClauseOp &priv) {
ergawy wrote:
nit: I think it would be nice to have on the op definition itself.
https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [mlir] [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)
@@ -1796,36 +1918,110 @@ convertOmpTaskOp(omp::TaskOp taskOp,
llvm::IRBuilderBase &builder,
// Allocate and initialize private variables
// TODO: package private variables up in a structure
builder.SetInsertPoint(initBlock->getTerminator());
- for (auto [privDecl, mlirPrivVar, blockArg] :
- llvm::zip_equal(privateDecls, mlirPrivateVars, privateBlockArgs)) {
-llvm::Type *llvmAllocType =
-moduleTranslation.convertType(privDecl.getType());
-// Allocations:
-builder.SetInsertPoint(allocaIP.getBlock()->getTerminator());
-llvm::Value *llvmPrivateVar = builder.CreateAlloca(
-llvmAllocType, /*ArraySize=*/nullptr, "omp.private.alloc");
+ // Create task variable structure
+ llvm::SmallVector privateVarAllocations;
ergawy wrote:
I think this can be moved inside the context struct manager and call
`createGEPsToPrivateVars` from the constructor. Just to make things a bit more
self-contained whenever possible.
https://github.com/llvm/llvm-project/pull/125307
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[llvm-branch-commits] [clang] [HLSL] Implement default constant buffer `$Globals` (PR #125807)
https://github.com/hekota ready_for_review https://github.com/llvm/llvm-project/pull/125807 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [HLSL] Implement default constant buffer `$Globals` (PR #125807)
llvmbot wrote:
@llvm/pr-subscribers-hlsl
Author: Helena Kotas (hekota)
Changes
All variable declarations in the global scope that are not resources, static or
empty are implicitly added to implicit constant buffer `$Globals`. They are
created in `hlsl_constant` address space and collected in an implicit
`HLSLBufferDecl` node that is added to the AST at the end of the translation
unit. Codegen is the same as for explicit constant buffers.
Fixes #123801
Depends on #124886.
---
Patch is 20.87 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/125807.diff
10 Files Affected:
- (modified) clang/include/clang/AST/Decl.h (+22)
- (modified) clang/include/clang/Sema/SemaHLSL.h (+6-1)
- (modified) clang/lib/AST/Decl.cpp (+39-2)
- (modified) clang/lib/CodeGen/CGHLSLRuntime.cpp (+2-5)
- (modified) clang/lib/CodeGen/CodeGenModule.cpp (+5)
- (modified) clang/lib/Sema/Sema.cpp (+1-2)
- (modified) clang/lib/Sema/SemaHLSL.cpp (+42-5)
- (added) clang/test/AST/HLSL/default_cbuffer.hlsl (+50)
- (modified) clang/test/CodeGenHLSL/basic_types.hlsl (+32-32)
- (added) clang/test/CodeGenHLSL/default_cbuffer.hlsl (+43)
``diff
diff --git a/clang/include/clang/AST/Decl.h b/clang/include/clang/AST/Decl.h
index 05e56978977f2b1..f86ddaf89bd9cfa 100644
--- a/clang/include/clang/AST/Decl.h
+++ b/clang/include/clang/AST/Decl.h
@@ -5038,6 +5038,11 @@ class HLSLBufferDecl final : public NamedDecl, public
DeclContext {
// LayoutStruct - Layout struct for the buffer
CXXRecordDecl *LayoutStruct;
+ // For default (implicit) constant buffer, a lisf of references of global
+ // decls that belong to the buffer. The decls are already parented by the
+ // translation unit context.
+ SmallVector DefaultBufferDecls;
+
HLSLBufferDecl(DeclContext *DC, bool CBuffer, SourceLocation KwLoc,
IdentifierInfo *ID, SourceLocation IDLoc,
SourceLocation LBrace);
@@ -5047,6 +5052,8 @@ class HLSLBufferDecl final : public NamedDecl, public
DeclContext {
bool CBuffer, SourceLocation KwLoc,
IdentifierInfo *ID, SourceLocation IDLoc,
SourceLocation LBrace);
+ static HLSLBufferDecl *CreateDefaultCBuffer(ASTContext &C,
+ DeclContext *LexicalParent);
static HLSLBufferDecl *CreateDeserialized(ASTContext &C, GlobalDeclID ID);
SourceRange getSourceRange() const override LLVM_READONLY {
@@ -5061,6 +5068,7 @@ class HLSLBufferDecl final : public NamedDecl, public
DeclContext {
bool hasPackoffset() const { return HasPackoffset; }
const CXXRecordDecl *getLayoutStruct() const { return LayoutStruct; }
void addLayoutStruct(CXXRecordDecl *LS);
+ void addDefaultBufferDecl(Decl *D);
// Implement isa/cast/dyncast/etc.
static bool classof(const Decl *D) { return classofKind(D->getKind()); }
@@ -5072,6 +5080,20 @@ class HLSLBufferDecl final : public NamedDecl, public
DeclContext {
return static_cast(const_cast(DC));
}
+ // Iterator for the buffer decls. Concatenates the list of decls parented
+ // by this HLSLBufferDecl with the list of default buffer decls.
+ using buffer_decl_iterator =
+ llvm::concat_iterator::const_iterator,
+decl_iterator>;
+ using buffer_decl_range = llvm::iterator_range;
+
+ buffer_decl_range buffer_decls() const {
+return buffer_decl_range(buffer_decls_begin(), buffer_decls_end());
+ }
+ buffer_decl_iterator buffer_decls_begin() const;
+ buffer_decl_iterator buffer_decls_end() const;
+ bool buffer_decls_empty();
+
friend class ASTDeclReader;
friend class ASTDeclWriter;
};
diff --git a/clang/include/clang/Sema/SemaHLSL.h
b/clang/include/clang/Sema/SemaHLSL.h
index f4cd11f423a84a0..b1cc856975532fa 100644
--- a/clang/include/clang/Sema/SemaHLSL.h
+++ b/clang/include/clang/Sema/SemaHLSL.h
@@ -103,13 +103,13 @@ class SemaHLSL : public SemaBase {
HLSLParamModifierAttr::Spelling Spelling);
void ActOnTopLevelFunction(FunctionDecl *FD);
void ActOnVariableDeclarator(VarDecl *VD);
+ void ActOnEndOfTranslationUnit(TranslationUnitDecl *TU);
void CheckEntryPoint(FunctionDecl *FD);
void CheckSemanticAnnotation(FunctionDecl *EntryPoint, const Decl *Param,
const HLSLAnnotationAttr *AnnotationAttr);
void DiagnoseAttrStageMismatch(
const Attr *A, llvm::Triple::EnvironmentType Stage,
std::initializer_list AllowedStages);
- void DiagnoseAvailabilityViolations(TranslationUnitDecl *TU);
QualType handleVectorBinOpConversion(ExprResult &LHS, ExprResult &RHS,
QualType LHSType, QualType RHSType,
@@ -159,11 +159,16 @@ class SemaHLSL : public SemaBase {
// List of all resource bindings
ResourceBindings Bindings;
+ // default constant buffer $Globals
+ HLSLBufferDecl *DefaultCBuffer;
+
privat
[llvm-branch-commits] [llvm] PeepholeOpt: Fix looking for def of current copy to coalesce (PR #125533)
@@ -1891,31 +1886,44 @@ define <32 x i64> @vp_cttz_v32i64(<32 x i64> %va, <32 x i1> %m, i32 zeroext %evl ; RV32-NEXT:addi a0, a0, 48 ; RV32-NEXT:vl8r.v v16, (a0) # Unknown-size Folded Reload ; RV32-NEXT:vand.vv v16, v24, v16, v0.t -; RV32-NEXT:vsub.vv v24, v8, v16, v0.t +; RV32-NEXT:vsub.vv v8, v8, v16, v0.t ; RV32-NEXT:csrr a0, vlenb -; RV32-NEXT:slli a0, a0, 5 +; RV32-NEXT:li a1, 40 +; RV32-NEXT:mul a0, a0, a1 ; RV32-NEXT:add a0, sp, a0 ; RV32-NEXT:addi a0, a0, 48 -; RV32-NEXT:vl8r.v v8, (a0) # Unknown-size Folded Reload -; RV32-NEXT:vand.vv v16, v24, v8, v0.t +; RV32-NEXT:vs8r.v v8, (a0) # Unknown-size Folded Spill wangpc-pp wrote: For RISCV, this is a regerssion since it requires more spill/reload. https://github.com/llvm/llvm-project/pull/125533 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] PeepholeOpt: Fix looking for def of current copy to coalesce (PR #125533)
@@ -354,44 +353,38 @@ define {<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>, <8 x
i64>, <8 x i64>} @load_
; RV32-NEXT:vmerge.vvm v20, v8, v16, v0
; RV32-NEXT:addi a1, sp, 16
; RV32-NEXT:vs4r.v v20, (a1) # Unknown-size Folded Spill
-; RV32-NEXT:vmv1r.v v0, v3
+; RV32-NEXT:vmv1r.v v0, v12
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a3, 68
-; RV32-NEXT:mul a1, a1, a3
+; RV32-NEXT:slli a1, a1, 6
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
; RV32-NEXT:vl8r.v v16, (a1) # Unknown-size Folded Reload
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a3, 76
+; RV32-NEXT:li a3, 72
wangpc-pp wrote:
This looks like an improvement.
https://github.com/llvm/llvm-project/pull/125533
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] PeepholeOpt: Fix looking for def of current copy to coalesce (PR #125533)
@@ -403,236 +396,253 @@ define {<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>, <8
x i64>, <8 x i64>} @load_
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
; RV32-NEXT:vs8r.v v24, (a1) # Unknown-size Folded Spill
-; RV32-NEXT:vmv1r.v v0, v1
+; RV32-NEXT:vmv1r.v v0, v13
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a3, 84
+; RV32-NEXT:li a3, 80
; RV32-NEXT:mul a1, a1, a3
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
; RV32-NEXT:vl8r.v v24, (a1) # Unknown-size Folded Reload
; RV32-NEXT:vsetivli zero, 16, e32, m4, ta, ma
-; RV32-NEXT:vmerge.vvm v4, v8, v24, v0
+; RV32-NEXT:vmerge.vvm v12, v8, v24, v0
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a3, 28
+; RV32-NEXT:li a3, 20
; RV32-NEXT:mul a1, a1, a3
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
-; RV32-NEXT:vs4r.v v4, (a1) # Unknown-size Folded Spill
-; RV32-NEXT:vmv1r.v v0, v14
+; RV32-NEXT:vs4r.v v12, (a1) # Unknown-size Folded Spill
+; RV32-NEXT:vmv1r.v v0, v1
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a3, 76
+; RV32-NEXT:li a3, 72
; RV32-NEXT:mul a1, a1, a3
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
; RV32-NEXT:vl8r.v v16, (a1) # Unknown-size Folded Reload
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a3, 68
-; RV32-NEXT:mul a1, a1, a3
+; RV32-NEXT:slli a1, a1, 6
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
; RV32-NEXT:vl8r.v v24, (a1) # Unknown-size Folded Reload
; RV32-NEXT:vsetvli zero, a2, e32, m8, ta, ma
; RV32-NEXT:vmerge.vvm v16, v24, v16, v0
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a2, 76
+; RV32-NEXT:li a2, 72
; RV32-NEXT:mul a1, a1, a2
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
; RV32-NEXT:vs8r.v v16, (a1) # Unknown-size Folded Spill
-; RV32-NEXT:vmv1r.v v0, v12
+; RV32-NEXT:vmv1r.v v0, v2
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a2, 84
+; RV32-NEXT:li a2, 80
; RV32-NEXT:mul a1, a1, a2
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
; RV32-NEXT:vl8r.v v16, (a1) # Unknown-size Folded Reload
; RV32-NEXT:vsetivli zero, 16, e32, m4, ta, ma
; RV32-NEXT:vmerge.vvm v8, v8, v16, v0
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a2, 68
-; RV32-NEXT:mul a1, a1, a2
+; RV32-NEXT:slli a1, a1, 6
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
; RV32-NEXT:vs4r.v v8, (a1) # Unknown-size Folded Spill
; RV32-NEXT:lui a1, 32
; RV32-NEXT:addi a1, a1, 4
; RV32-NEXT:vsetivli zero, 4, e32, m1, ta, ma
-; RV32-NEXT:vmv.v.x v16, a1
+; RV32-NEXT:vmv.v.x v12, a1
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a2, 40
+; RV32-NEXT:li a2, 36
; RV32-NEXT:mul a1, a1, a2
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
; RV32-NEXT:vl4r.v v8, (a1) # Unknown-size Folded Reload
; RV32-NEXT:vsetivli zero, 8, e64, m4, ta, ma
-; RV32-NEXT:vrgatherei16.vv v20, v8, v16
+; RV32-NEXT:vrgatherei16.vv v16, v8, v12
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a2, 52
+; RV32-NEXT:li a2, 48
; RV32-NEXT:mul a1, a1, a2
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
; RV32-NEXT:vl8r.v v8, (a1) # Unknown-size Folded Reload
; RV32-NEXT:vsetivli zero, 12, e32, m4, tu, ma
-; RV32-NEXT:vmv.v.v v20, v8
+; RV32-NEXT:vmv.v.v v16, v8
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a2, 84
+; RV32-NEXT:li a2, 80
; RV32-NEXT:mul a1, a1, a2
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
-; RV32-NEXT:vs4r.v v20, (a1) # Unknown-size Folded Spill
+; RV32-NEXT:vs4r.v v16, (a1) # Unknown-size Folded Spill
; RV32-NEXT:lui a1, 48
; RV32-NEXT:lui a2, %hi(.LCPI8_3)
; RV32-NEXT:addi a2, a2, %lo(.LCPI8_3)
; RV32-NEXT:addi a1, a1, 5
; RV32-NEXT:vsetivli zero, 8, e16, m1, ta, ma
-; RV32-NEXT:vle16.v v28, (a2)
+; RV32-NEXT:vle16.v v24, (a2)
; RV32-NEXT:vsetivli zero, 4, e32, m1, ta, ma
-; RV32-NEXT:vmv.v.x v20, a1
+; RV32-NEXT:vmv.v.x v25, a1
; RV32-NEXT:csrr a1, vlenb
; RV32-NEXT:li a2, 24
; RV32-NEXT:mul a1, a1, a2
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
-; RV32-NEXT:vl4r.v v12, (a1) # Unknown-size Folded Reload
+; RV32-NEXT:vl4r.v v8, (a1) # Unknown-size Folded Reload
; RV32-NEXT:vsetivli zero, 8, e64, m4, ta, ma
-; RV32-NEXT:vrgatherei16.vv v8, v12, v20
+; RV32-NEXT:vrgatherei16.vv v16, v8, v25
; RV32-NEXT:csrr a1, vlenb
-; RV32-NEXT:li a2, 44
+; RV32-NEXT:li a2, 40
; RV32-NEXT:mul a1, a1, a2
; RV32-NEXT:add a1, sp, a1
; RV32-NEXT:addi a1, a1, 16
-; RV32-NEXT:vl8r.v v16, (a1) # Unknown-size Folded Reload
+; RV32-NEXT:vl8r.v v8, (a1) # Unknown-size Folded Reload
; RV32-NEXT:vsetivli zero, 12, e32, m4, tu, ma
-; RV32-NEXT:vmv.v.v v8, v
[llvm-branch-commits] [llvm] PeepholeOpt: Fix looking for def of current copy to coalesce (PR #125533)
@@ -1891,31 +1886,44 @@ define <32 x i64> @vp_cttz_v32i64(<32 x i64> %va, <32 x i1> %m, i32 zeroext %evl ; RV32-NEXT:addi a0, a0, 48 ; RV32-NEXT:vl8r.v v16, (a0) # Unknown-size Folded Reload ; RV32-NEXT:vand.vv v16, v24, v16, v0.t -; RV32-NEXT:vsub.vv v24, v8, v16, v0.t +; RV32-NEXT:vsub.vv v8, v8, v16, v0.t ; RV32-NEXT:csrr a0, vlenb -; RV32-NEXT:slli a0, a0, 5 +; RV32-NEXT:li a1, 40 +; RV32-NEXT:mul a0, a0, a1 ; RV32-NEXT:add a0, sp, a0 ; RV32-NEXT:addi a0, a0, 48 -; RV32-NEXT:vl8r.v v8, (a0) # Unknown-size Folded Reload -; RV32-NEXT:vand.vv v16, v24, v8, v0.t +; RV32-NEXT:vs8r.v v8, (a0) # Unknown-size Folded Spill arsenm wrote: #120524 and similar may help here https://github.com/llvm/llvm-project/pull/125533 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM (PR #118462)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/118462
>From a5c1a65dd4e7b3d77a7cc74febe17437144db46e Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 3 Dec 2024 10:12:36 +
Subject: [PATCH 1/8] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to
NPM
---
.../llvm}/CodeGen/RegAllocPriorityAdvisor.h | 78 +++-
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 1 +
llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp | 6 +-
.../lib/CodeGen/MLRegAllocPriorityAdvisor.cpp | 184 +++---
llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp | 2 +-
llvm/lib/CodeGen/RegAllocGreedy.cpp | 9 +-
llvm/lib/CodeGen/RegAllocGreedy.h | 2 +-
llvm/lib/CodeGen/RegAllocPriorityAdvisor.cpp | 155 +++
llvm/lib/Passes/PassBuilder.cpp | 1 +
10 files changed, 320 insertions(+), 120 deletions(-)
rename llvm/{lib => include/llvm}/CodeGen/RegAllocPriorityAdvisor.h (57%)
diff --git a/llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
b/llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
similarity index 57%
rename from llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
rename to llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
index 0758743c2b1403e..a53739fdc3fc40b 100644
--- a/llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
+++ b/llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
@@ -9,8 +9,10 @@
#ifndef LLVM_CODEGEN_REGALLOCPRIORITYADVISOR_H
#define LLVM_CODEGEN_REGALLOCPRIORITYADVISOR_H
+#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
#include "llvm/CodeGen/SlotIndexes.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
namespace llvm {
@@ -68,12 +70,72 @@ class DummyPriorityAdvisor : public RegAllocPriorityAdvisor
{
unsigned getPriority(const LiveInterval &LI) const override;
};
-class RegAllocPriorityAdvisorAnalysis : public ImmutablePass {
+/// Common provider for getting the priority advisor and logging rewards.
+/// Legacy analysis forwards all calls to this provider.
+/// New analysis serves the provider as the analysis result.
+/// Expensive setup is done in the constructor, so that the advisor can be
+/// created quickly for every machine function.
+/// TODO: Remove once legacy PM support is dropped.
+class RegAllocPriorityAdvisorProvider {
public:
enum class AdvisorMode : int { Default, Release, Development, Dummy };
- RegAllocPriorityAdvisorAnalysis(AdvisorMode Mode)
- : ImmutablePass(ID), Mode(Mode){};
+ RegAllocPriorityAdvisorProvider(AdvisorMode Mode) : Mode(Mode) {}
+
+ virtual ~RegAllocPriorityAdvisorProvider() = default;
+
+ virtual void logRewardIfNeeded(const MachineFunction &MF,
+ llvm::function_ref GetReward) {};
+
+ virtual std::unique_ptr
+ getAdvisor(const MachineFunction &MF, const RAGreedy &RA) = 0;
+
+ void setAnalyses(SlotIndexes *SI) { this->SI = SI; }
+
+ AdvisorMode getAdvisorMode() const { return Mode; }
+
+protected:
+ SlotIndexes *SI;
+
+private:
+ const AdvisorMode Mode;
+};
+
+RegAllocPriorityAdvisorProvider *createReleaseModePriorityAdvisorProvider();
+
+RegAllocPriorityAdvisorProvider *
+createDevelopmentModePriorityAdvisorProvider(LLVMContext &Ctx);
+
+class RegAllocPriorityAdvisorAnalysis
+: public AnalysisInfoMixin {
+ static AnalysisKey Key;
+ friend AnalysisInfoMixin;
+
+public:
+ struct Result {
+// Owned by this analysis.
+RegAllocPriorityAdvisorProvider *Provider;
+
+bool invalidate(MachineFunction &MF, const PreservedAnalyses &PA,
+MachineFunctionAnalysisManager::Invalidator &Inv) {
+ auto PAC = PA.getChecker();
+ return !PAC.preservedWhenStateless() ||
+ Inv.invalidate(MF, PA);
+}
+ };
+
+ Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
+
+private:
+ void initializeProvider(LLVMContext &Ctx);
+ std::unique_ptr Provider;
+};
+
+class RegAllocPriorityAdvisorAnalysisLegacy : public ImmutablePass {
+public:
+ using AdvisorMode = RegAllocPriorityAdvisorProvider::AdvisorMode;
+ RegAllocPriorityAdvisorAnalysisLegacy(AdvisorMode Mode)
+ : ImmutablePass(ID), Mode(Mode) {};
static char ID;
/// Get an advisor for the given context (i.e. machine function, etc)
@@ -81,7 +143,7 @@ class RegAllocPriorityAdvisorAnalysis : public ImmutablePass
{
getAdvisor(const MachineFunction &MF, const RAGreedy &RA) = 0;
AdvisorMode getAdvisorMode() const { return Mode; }
virtual void logRewardIfNeeded(const MachineFunction &MF,
- llvm::function_ref GetReward){};
+ llvm::function_ref GetReward) {};
protected:
// This analysis preserves everything, and subclasses may have additional
@@ -97,11 +159,13 @@ class RegAllocPriorityAdvisorAnalysis : public
ImmutablePass {
/// Specialization for the API used by the analysis infrastructure to create
/// an inst
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocGreedy to NPM (PR #119540)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/119540
>From 56947074788655fe2131174fd672a000fee605cd Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 11 Dec 2024 08:51:55 +
Subject: [PATCH 1/5] [CodeGen][NewPM] Port RegAllocGreedy to NPM
---
llvm/include/llvm/CodeGen/MachineFunction.h | 1 +
llvm/include/llvm/CodeGen/Passes.h| 2 +-
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 9 +
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/CodeGen/RegAllocGreedy.cpp | 185 ++
llvm/lib/CodeGen/RegAllocGreedy.h | 57 +++---
llvm/lib/Passes/PassBuilder.cpp | 1 +
8 files changed, 196 insertions(+), 63 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h
b/llvm/include/llvm/CodeGen/MachineFunction.h
index c3eb27b9462879d..92acfa8e6bcf3f8 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -920,6 +920,7 @@ class LLVM_ABI MachineFunction {
/// Run the current MachineFunction through the machine code verifier, useful
/// for debugger use.
+ /// TODO: Add the param LiveStks
/// \returns true if no problems were found.
bool verify(LiveIntervals *LiveInts, SlotIndexes *Indexes,
const char *Banner = nullptr, raw_ostream *OS = nullptr,
diff --git a/llvm/include/llvm/CodeGen/Passes.h
b/llvm/include/llvm/CodeGen/Passes.h
index b5d2a7e6bf035b0..0182f21bee5f551 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -171,7 +171,7 @@ namespace llvm {
extern char &LiveRangeShrinkID;
/// Greedy register allocator.
- extern char &RAGreedyID;
+ extern char &RAGreedyLegacyID;
/// Basic register allocator.
extern char &RABasicID;
diff --git a/llvm/include/llvm/InitializePasses.h
b/llvm/include/llvm/InitializePasses.h
index 1bbfaedc9f992dd..e071dc665dcaee1 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -250,7 +250,7 @@ void
initializeProfileSummaryInfoWrapperPassPass(PassRegistry &);
void initializePromoteLegacyPassPass(PassRegistry &);
void initializeRABasicPass(PassRegistry &);
void initializePseudoProbeInserterPass(PassRegistry &);
-void initializeRAGreedyPass(PassRegistry &);
+void initializeRAGreedyLegacyPass(PassRegistry &);
void initializeReachingDefAnalysisPass(PassRegistry &);
void initializeReassociateLegacyPassPass(PassRegistry &);
void initializeRegAllocEvictionAdvisorAnalysisLegacyPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 509895e956f6afc..e9b853735d9346b 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -187,6 +187,15 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS(
return parseRegAllocFastPassOptions(*PB, Params);
},
"filter=reg-filter;no-clear-vregs")
+
+MACHINE_FUNCTION_PASS_WITH_PARAMS(
+"regallocgreedy", "RAGreedy",
+[](RegAllocFilterFunc F) { return RAGreedyPass(F); },
+[PB = this](StringRef Params) {
+ // TODO: parseRegAllocFilter(*PB, Params);
+ return Expected(nullptr);
+}, ""
+)
#undef MACHINE_FUNCTION_PASS_WITH_PARAMS
// After a pass is converted to new pass manager, its entry should be moved
from
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index ed871519e33bc2c..69b5e0bce862eec 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -112,7 +112,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializePreISelIntrinsicLoweringLegacyPassPass(Registry);
initializeProcessImplicitDefsPass(Registry);
initializeRABasicPass(Registry);
- initializeRAGreedyPass(Registry);
+ initializeRAGreedyLegacyPass(Registry);
initializeRegAllocFastPass(Registry);
initializeRegUsageInfoCollectorLegacyPass(Registry);
initializeRegUsageInfoPropagationLegacyPass(Registry);
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp
b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 65488c4e5200bb0..3d7f9790a13b09e 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -43,8 +43,10 @@
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
+#include "llvm/CodeGen/RegAllocGreedyPass.h"
#include "llvm/CodeGen/RegAllocPriorityAdvisor.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
@@ -55,6 +57,7 @@
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/VirtRegMap.h"
+#include "llvm/IR/Analysis.h"
[llvm-branch-commits] [llvm] release/20.x: [benchmark] Get number of CPUs with sysconf() on Linux (#125603) (PR #125669)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/125669 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [benchmark] Get number of CPUs with sysconf() on Linux (#125603) (PR #125669)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/125669
Backport fbe470c1b215e3f953a41db6b91d20ce0bcf5c4e
Requested by: @rorth
>From a63b53f91016edc4728a9e7e919b77cab9e409f3 Mon Sep 17 00:00:00 2001
From: Brad Smith
Date: Mon, 3 Feb 2025 22:43:43 -0500
Subject: [PATCH] [benchmark] Get number of CPUs with sysconf() on Linux
(#125603)
(cherry picked from commit c24774dc4f4402c3ad150363321cc972ed2669e7)
(cherry picked from commit fbe470c1b215e3f953a41db6b91d20ce0bcf5c4e)
---
third-party/benchmark/src/sysinfo.cc | 53 ++--
1 file changed, 3 insertions(+), 50 deletions(-)
diff --git a/third-party/benchmark/src/sysinfo.cc
b/third-party/benchmark/src/sysinfo.cc
index 2bed1663af2e955..8283a081ee80b4a 100644
--- a/third-party/benchmark/src/sysinfo.cc
+++ b/third-party/benchmark/src/sysinfo.cc
@@ -495,14 +495,14 @@ int GetNumCPUsImpl() {
return sysinfo.dwNumberOfProcessors; // number of logical
// processors in the current
// group
-#elif defined(BENCHMARK_OS_SOLARIS)
+#elif defined(__linux__) || defined(BENCHMARK_OS_SOLARIS)
// Returns -1 in case of a failure.
- long num_cpu = sysconf(_SC_NPROCESSORS_ONLN);
+ int num_cpu = static_cast(sysconf(_SC_NPROCESSORS_ONLN));
if (num_cpu < 0) {
PrintErrorAndDie("sysconf(_SC_NPROCESSORS_ONLN) failed with error: ",
strerror(errno));
}
- return (int)num_cpu;
+ return num_cpu;
#elif defined(BENCHMARK_OS_QNX)
return static_cast(_syspage_ptr->num_cpu);
#elif defined(BENCHMARK_OS_QURT)
@@ -511,53 +511,6 @@ int GetNumCPUsImpl() {
hardware_threads.max_hthreads = 1;
}
return hardware_threads.max_hthreads;
-#else
- int num_cpus = 0;
- int max_id = -1;
- std::ifstream f("/proc/cpuinfo");
- if (!f.is_open()) {
-PrintErrorAndDie("Failed to open /proc/cpuinfo");
- }
-#if defined(__alpha__)
- const std::string Key = "cpus detected";
-#else
- const std::string Key = "processor";
-#endif
- std::string ln;
- while (std::getline(f, ln)) {
-if (ln.empty()) continue;
-std::size_t split_idx = ln.find(':');
-std::string value;
-#if defined(__s390__)
-// s390 has another format in /proc/cpuinfo
-// it needs to be parsed differently
-if (split_idx != std::string::npos)
- value = ln.substr(Key.size() + 1, split_idx - Key.size() - 1);
-#else
-if (split_idx != std::string::npos) value = ln.substr(split_idx + 1);
-#endif
-if (ln.size() >= Key.size() && ln.compare(0, Key.size(), Key) == 0) {
- num_cpus++;
- if (!value.empty()) {
-const int cur_id = benchmark::stoi(value);
-max_id = std::max(cur_id, max_id);
- }
-}
- }
- if (f.bad()) {
-PrintErrorAndDie("Failure reading /proc/cpuinfo");
- }
- if (!f.eof()) {
-PrintErrorAndDie("Failed to read to end of /proc/cpuinfo");
- }
- f.close();
-
- if ((max_id + 1) != num_cpus) {
-fprintf(stderr,
-"CPU ID assignments in /proc/cpuinfo seem messed up."
-" This is usually caused by a bad BIOS.\n");
- }
- return num_cpus;
#endif
BENCHMARK_UNREACHABLE();
}
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[llvm-branch-commits] [llvm] release/20.x: [benchmark] Get number of CPUs with sysconf() on Linux (#125603) (PR #125669)
llvmbot wrote:
@llvm/pr-subscribers-third-party-benchmark
Author: None (llvmbot)
Changes
Backport fbe470c1b215e3f953a41db6b91d20ce0bcf5c4e
Requested by: @rorth
---
Full diff: https://github.com/llvm/llvm-project/pull/125669.diff
1 Files Affected:
- (modified) third-party/benchmark/src/sysinfo.cc (+3-50)
``diff
diff --git a/third-party/benchmark/src/sysinfo.cc
b/third-party/benchmark/src/sysinfo.cc
index 2bed1663af2e955..8283a081ee80b4a 100644
--- a/third-party/benchmark/src/sysinfo.cc
+++ b/third-party/benchmark/src/sysinfo.cc
@@ -495,14 +495,14 @@ int GetNumCPUsImpl() {
return sysinfo.dwNumberOfProcessors; // number of logical
// processors in the current
// group
-#elif defined(BENCHMARK_OS_SOLARIS)
+#elif defined(__linux__) || defined(BENCHMARK_OS_SOLARIS)
// Returns -1 in case of a failure.
- long num_cpu = sysconf(_SC_NPROCESSORS_ONLN);
+ int num_cpu = static_cast(sysconf(_SC_NPROCESSORS_ONLN));
if (num_cpu < 0) {
PrintErrorAndDie("sysconf(_SC_NPROCESSORS_ONLN) failed with error: ",
strerror(errno));
}
- return (int)num_cpu;
+ return num_cpu;
#elif defined(BENCHMARK_OS_QNX)
return static_cast(_syspage_ptr->num_cpu);
#elif defined(BENCHMARK_OS_QURT)
@@ -511,53 +511,6 @@ int GetNumCPUsImpl() {
hardware_threads.max_hthreads = 1;
}
return hardware_threads.max_hthreads;
-#else
- int num_cpus = 0;
- int max_id = -1;
- std::ifstream f("/proc/cpuinfo");
- if (!f.is_open()) {
-PrintErrorAndDie("Failed to open /proc/cpuinfo");
- }
-#if defined(__alpha__)
- const std::string Key = "cpus detected";
-#else
- const std::string Key = "processor";
-#endif
- std::string ln;
- while (std::getline(f, ln)) {
-if (ln.empty()) continue;
-std::size_t split_idx = ln.find(':');
-std::string value;
-#if defined(__s390__)
-// s390 has another format in /proc/cpuinfo
-// it needs to be parsed differently
-if (split_idx != std::string::npos)
- value = ln.substr(Key.size() + 1, split_idx - Key.size() - 1);
-#else
-if (split_idx != std::string::npos) value = ln.substr(split_idx + 1);
-#endif
-if (ln.size() >= Key.size() && ln.compare(0, Key.size(), Key) == 0) {
- num_cpus++;
- if (!value.empty()) {
-const int cur_id = benchmark::stoi(value);
-max_id = std::max(cur_id, max_id);
- }
-}
- }
- if (f.bad()) {
-PrintErrorAndDie("Failure reading /proc/cpuinfo");
- }
- if (!f.eof()) {
-PrintErrorAndDie("Failed to read to end of /proc/cpuinfo");
- }
- f.close();
-
- if ((max_id + 1) != num_cpus) {
-fprintf(stderr,
-"CPU ID assignments in /proc/cpuinfo seem messed up."
-" This is usually caused by a bad BIOS.\n");
- }
- return num_cpus;
#endif
BENCHMARK_UNREACHABLE();
}
``
https://github.com/llvm/llvm-project/pull/125669
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[llvm-branch-commits] [clang] [clang] NFC: rename MatchedPackOnParmToNonPackOnArg to StrictPackMatch (PR #125418)
@@ -1842,19 +1842,19 @@ class ClassTemplateSpecializationDecl : public CXXRecordDecl, unsigned SpecializationKind : 3; /// Indicate that we have matched a parameter pack with a non pack - /// argument, when the opposite match is also allowed (strict pack match). + /// argument, when the opposite match is also allowed. /// This needs to be cached as deduction is performed during declaration, /// and we need the information to be preserved so that it is consistent /// during instantiation. - bool MatchedPackOnParmToNonPackOnArg : 1; + bool StrictPackMatch : 1; mizvekov wrote: Hmm, the short name was one of the big pluses of this patch. Once the wording is merged, we can quote the paragraph number as well. Since it's a defined term, I don't think we need that mouthful of a name TBH. https://github.com/llvm/llvm-project/pull/125418 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [mlir] [IR] Make @llvm.memset prototype byte width dependent (PR #106537)
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/106537
>From 65a421f56e7e7bb9a72d0b5cc70f8cc7b4348c9b Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Thu, 1 Aug 2024 23:47:25 +0300
Subject: [PATCH] [IR] Make @llvm.memset prototype byte width dependent
This patch changes the type of the value argument of @llvm.memset and
similar intrinsics from i8 to iN, where N is the byte width specified
in data layout string.
Note that the argument still has fixed type (not overloaded), but type
checker will complain if the type does not match the byte width.
Ideally, the type of the argument would be dependent on the address
space of the pointer argument. It is easy to do this (and I did it
downstream as a PoC), but since data layout string doesn't currently
allow different byte widths for different address spaces, I refrained
from doing it now.
---
llvm/include/llvm-c/Core.h| 2 +-
llvm/include/llvm/IR/Intrinsics.h | 11 ++--
llvm/include/llvm/IR/Intrinsics.td| 13 ++--
llvm/lib/AsmParser/LLParser.cpp | 4 +-
llvm/lib/IR/Core.cpp | 4 +-
llvm/lib/IR/IRBuilder.cpp | 2 +-
llvm/lib/IR/Intrinsics.cpp| 61 +++
llvm/lib/IR/Verifier.cpp | 2 +-
llvm/lib/Transforms/IPO/ExpandVariadics.cpp | 2 +-
.../NumericalStabilitySanitizer.cpp | 2 +-
.../LLVMIR/LLVMToLLVMIRTranslation.cpp| 4 +-
11 files changed, 63 insertions(+), 44 deletions(-)
diff --git a/llvm/include/llvm-c/Core.h b/llvm/include/llvm-c/Core.h
index 43bb775e5781ae7..9f185c06f82adfa 100644
--- a/llvm/include/llvm-c/Core.h
+++ b/llvm/include/llvm-c/Core.h
@@ -2818,7 +2818,7 @@ LLVMValueRef LLVMGetIntrinsicDeclaration(LLVMModuleRef
Mod,
*
* @see llvm::Intrinsic::getType()
*/
-LLVMTypeRef LLVMIntrinsicGetType(LLVMContextRef Ctx, unsigned ID,
+LLVMTypeRef LLVMIntrinsicGetType(LLVMModuleRef Mod, unsigned ID,
LLVMTypeRef *ParamTypes, size_t ParamCount);
/**
diff --git a/llvm/include/llvm/IR/Intrinsics.h
b/llvm/include/llvm/IR/Intrinsics.h
index 82f72131b9d2f48..f9294797a8af5ff 100644
--- a/llvm/include/llvm/IR/Intrinsics.h
+++ b/llvm/include/llvm/IR/Intrinsics.h
@@ -22,6 +22,7 @@
namespace llvm {
+class DataLayout;
class Type;
class FunctionType;
class Function;
@@ -73,7 +74,7 @@ namespace Intrinsic {
std::string getNameNoUnnamedTypes(ID Id, ArrayRef Tys);
/// Return the function type for an intrinsic.
- FunctionType *getType(LLVMContext &Context, ID id, ArrayRef Tys =
{});
+ FunctionType *getType(Module *M, ID id, ArrayRef Tys = {});
/// Returns true if the intrinsic can be overloaded.
bool isOverloaded(ID id);
@@ -131,6 +132,7 @@ namespace Intrinsic {
struct IITDescriptor {
enum IITDescriptorKind {
Void,
+ Byte,
VarArg,
MMX,
Token,
@@ -239,7 +241,8 @@ namespace Intrinsic {
/// Returns false if the given type matches with the constraints, true
/// otherwise.
MatchIntrinsicTypesResult
- matchIntrinsicSignature(FunctionType *FTy, ArrayRef &Infos,
+ matchIntrinsicSignature(const DataLayout &DL, FunctionType *FTy,
+ ArrayRef &Infos,
SmallVectorImpl &ArgTys);
/// Verify if the intrinsic has variable arguments. This method is intended
to
@@ -254,8 +257,8 @@ namespace Intrinsic {
///
/// Returns false if the given ID and function type combination is not a
/// valid intrinsic call.
- bool getIntrinsicSignature(Intrinsic::ID, FunctionType *FT,
- SmallVectorImpl &ArgTys);
+ bool getIntrinsicSignature(const DataLayout &DL, Intrinsic::ID,
+ FunctionType *FT, SmallVectorImpl
&ArgTys);
/// Same as previous, but accepts a Function instead of ID and FunctionType.
bool getIntrinsicSignature(Function *F, SmallVectorImpl &ArgTys);
diff --git a/llvm/include/llvm/IR/Intrinsics.td
b/llvm/include/llvm/IR/Intrinsics.td
index ee877349a33149e..17b0dff0eb62b90 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -300,6 +300,7 @@ def IIT_V1 : IIT_Vec<1, 28>;
def IIT_VARARG : IIT_VT;
def IIT_HALF_VEC_ARG : IIT_Base<30>;
def IIT_SAME_VEC_WIDTH_ARG : IIT_Base<31>;
+def IIT_BYTE : IIT_Base<32>;
def IIT_VEC_OF_ANYPTRS_TO_ELT : IIT_Base<34>;
def IIT_I128 : IIT_Int<128, 35>;
def IIT_V512 : IIT_Vec<512, 36>;
@@ -382,6 +383,10 @@ class LLVMType {
!foreach(iit, IITs, iit.Number));
}
+class LLVMByteType : LLVMType {
+ let Sig = [IIT_BYTE.Number];
+}
+
class LLVMAnyType : LLVMType {
let ArgCode = !cond(
!eq(vt, Any) : ArgKind.Any,
@@ -481,7 +486,7 @@ class LLVMVectorOfBitcastsToInt
: LLVMMatchType;
def llvm_void_ty : LLVMType;
-
+def llvm_byte_ty : LLVMByteType;
def llvm_any_ty: LLVMAnyType;
def llvm_anyint_ty : LLVMAnyType
[llvm-branch-commits] [llvm] [ValueTracking] Make isBytewiseValue byte width agnostic (PR #106538)
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/106538
>From 67765a6e3e4c8e0475cd6baccb801cad1498b36e Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Fri, 2 Aug 2024 13:14:49 +0300
Subject: [PATCH] [ValueTracking] Make isBytewiseValue byte width agnostic
This is a simple change to show how easy it can be to support unusual
byte widths in the middle end.
---
llvm/lib/Analysis/ValueTracking.cpp | 30 +++--
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/llvm/lib/Analysis/ValueTracking.cpp
b/llvm/lib/Analysis/ValueTracking.cpp
index 55feb15dfb1527..abe4a9d225fcb0 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -6183,21 +6183,22 @@ KnownFPClass llvm::computeKnownFPClass(const Value *V,
}
Value *llvm::isBytewiseValue(Value *V, const DataLayout &DL) {
+ unsigned ByteWidth = DL.getByteWidth();
// All byte-wide stores are splatable, even of arbitrary variables.
- if (V->getType()->isIntegerTy(8))
+ if (V->getType()->isIntegerTy(ByteWidth))
return V;
LLVMContext &Ctx = V->getContext();
// Undef don't care.
- auto *UndefInt8 = UndefValue::get(Type::getInt8Ty(Ctx));
+ auto *UndefByte = UndefValue::get(Type::getIntNTy(Ctx, ByteWidth));
if (isa(V))
-return UndefInt8;
+return UndefByte;
// Return poison for zero-sized type.
if (DL.getTypeStoreSize(V->getType()).isZero())
-return PoisonValue::get(Type::getInt8Ty(Ctx));
+return PoisonValue::get(Type::getIntNTy(Ctx, ByteWidth));
Constant *C = dyn_cast(V);
if (!C) {
@@ -6212,7 +6213,7 @@ Value *llvm::isBytewiseValue(Value *V, const DataLayout
&DL) {
// Handle 'null' ConstantArrayZero etc.
if (C->isNullValue())
-return Constant::getNullValue(Type::getInt8Ty(Ctx));
+return Constant::getNullValue(Type::getIntNTy(Ctx, ByteWidth));
// Constant floating-point values can be handled as integer values if the
// corresponding integer value is "byteable". An important case is 0.0.
@@ -6229,13 +6230,14 @@ Value *llvm::isBytewiseValue(Value *V, const DataLayout
&DL) {
: nullptr;
}
- // We can handle constant integers that are multiple of 8 bits.
+ // We can handle constant integers that are multiple of the byte width.
if (ConstantInt *CI = dyn_cast(C)) {
-if (CI->getBitWidth() % 8 == 0) {
- assert(CI->getBitWidth() > 8 && "8 bits should be handled above!");
- if (!CI->getValue().isSplat(8))
+if (CI->getBitWidth() % ByteWidth == 0) {
+ assert(CI->getBitWidth() > ByteWidth &&
+ "single byte should be handled above!");
+ if (!CI->getValue().isSplat(ByteWidth))
return nullptr;
- return ConstantInt::get(Ctx, CI->getValue().trunc(8));
+ return ConstantInt::get(Ctx, CI->getValue().trunc(ByteWidth));
}
}
@@ -6255,15 +6257,15 @@ Value *llvm::isBytewiseValue(Value *V, const DataLayout
&DL) {
return LHS;
if (!LHS || !RHS)
return nullptr;
-if (LHS == UndefInt8)
+if (LHS == UndefByte)
return RHS;
-if (RHS == UndefInt8)
+if (RHS == UndefByte)
return LHS;
return nullptr;
};
if (ConstantDataSequential *CA = dyn_cast(C)) {
-Value *Val = UndefInt8;
+Value *Val = UndefByte;
for (unsigned I = 0, E = CA->getNumElements(); I != E; ++I)
if (!(Val = Merge(Val, isBytewiseValue(CA->getElementAsConstant(I),
DL
return nullptr;
@@ -6271,7 +6273,7 @@ Value *llvm::isBytewiseValue(Value *V, const DataLayout
&DL) {
}
if (isa(C)) {
-Value *Val = UndefInt8;
+Value *Val = UndefByte;
for (Value *Op : C->operands())
if (!(Val = Merge(Val, isBytewiseValue(Op, DL
return nullptr;
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[llvm-branch-commits] [clang] [llvm] [ValueTracking] Add CharWidth argument to getConstantStringInfo (NFC) (PR #106541)
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/106541
>From 57104d137fdb6e7c9add7ed3fcff37f1dcf56a7f Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Wed, 28 Aug 2024 23:51:13 +0300
Subject: [PATCH] [ValueTracking] Add CharWidth argument to
getConstantStringInfo (NFC)
The method assumes that host chars and target chars have the same width.
Add a CharWidth argument so that it can bail out if the requested char
width differs from the host char width.
Alternatively, the check could be done at call sites, but this is more
error-prone.
In the future, this method will be replaced with a different one that
allows host/target chars to have different widths. The prototype will
be the same except that StringRef is replaced with something that is
byte width agnostic. Adding CharWidth argument now reduces the future
diff.
---
clang/lib/CodeGen/CGBuiltin.cpp | 4 +-
llvm/include/llvm/Analysis/ValueTracking.h| 2 +-
llvm/lib/Analysis/ValueTracking.cpp | 7 +-
.../AMDGPU/AMDGPUPrintfRuntimeBinding.cpp | 4 +-
llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp | 2 +-
.../Target/SPIRV/SPIRVPrepareFunctions.cpp| 2 +-
.../WebAssembly/WebAssemblyAsmPrinter.cpp | 2 +-
.../AggressiveInstCombine.cpp | 12 +-
.../lib/Transforms/Utils/AMDGPUEmitPrintf.cpp | 4 +-
.../lib/Transforms/Utils/SimplifyLibCalls.cpp | 103 --
10 files changed, 96 insertions(+), 46 deletions(-)
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 11fa295dad9524..31cc4dfad5c134 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -19333,7 +19333,7 @@ void CodeGenFunction::ProcessOrderScopeAMDGCN(Value
*Order, Value *Scope,
// Some of the atomic builtins take the scope as a string name.
StringRef scp;
- if (llvm::getConstantStringInfo(Scope, scp)) {
+ if (llvm::getConstantStringInfo(Scope, scp, /*CharWidth=*/8)) {
SSID = getLLVMContext().getOrInsertSyncScopeID(scp);
return;
}
@@ -19893,7 +19893,7 @@ void
CodeGenFunction::AddAMDGPUFenceAddressSpaceMMRA(llvm::Instruction *Inst,
for (unsigned K = 2; K < E->getNumArgs(); ++K) {
llvm::Value *V = EmitScalarExpr(E->getArg(K));
StringRef AS;
-if (llvm::getConstantStringInfo(V, AS)) {
+if (llvm::getConstantStringInfo(V, AS, /*CharWidth=*/8)) {
MMRAs.push_back({Tag, AS});
// TODO: Delete the resulting unused constant?
continue;
diff --git a/llvm/include/llvm/Analysis/ValueTracking.h
b/llvm/include/llvm/Analysis/ValueTracking.h
index dba54be4c92f83..d69313f40fc5c4 100644
--- a/llvm/include/llvm/Analysis/ValueTracking.h
+++ b/llvm/include/llvm/Analysis/ValueTracking.h
@@ -692,7 +692,7 @@ bool getConstantDataArrayInfo(const Value *V,
ConstantDataArraySlice &Slice,
/// character by default. If TrimAtNul is set to false, then this returns any
/// trailing null characters as well as any other characters that come after
/// it.
-bool getConstantStringInfo(const Value *V, StringRef &Str,
+bool getConstantStringInfo(const Value *V, StringRef &Str, unsigned CharWidth,
bool TrimAtNul = true);
/// If we can compute the length of the string pointed to by the specified
diff --git a/llvm/lib/Analysis/ValueTracking.cpp
b/llvm/lib/Analysis/ValueTracking.cpp
index abe4a9d225fcb0..2983f118d45b7a 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -6572,9 +6572,12 @@ bool llvm::getConstantDataArrayInfo(const Value *V,
/// return true. When TrimAtNul is set, Str will contain only the bytes up
/// to but not including the first nul. Return false on failure.
bool llvm::getConstantStringInfo(const Value *V, StringRef &Str,
- bool TrimAtNul) {
+ unsigned CharWidth, bool TrimAtNul) {
+ if (CharWidth != CHAR_BIT)
+return false;
+
ConstantDataArraySlice Slice;
- if (!getConstantDataArrayInfo(V, Slice, 8))
+ if (!getConstantDataArrayInfo(V, Slice, CharWidth))
return false;
if (Slice.Array == nullptr) {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
index 459f85ae6169a1..c230b05c7f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
@@ -127,7 +127,7 @@ static_assert(NonLiteralStr.size() == 3);
static StringRef getAsConstantStr(Value *V) {
StringRef S;
- if (!getConstantStringInfo(V, S))
+ if (!getConstantStringInfo(V, S, /*CharWidth=*/8))
S = NonLiteralStr;
return S;
@@ -161,7 +161,7 @@ bool
AMDGPUPrintfRuntimeBindingImpl::lowerPrintfForGpu(Module &M) {
Value *Op = CI->getArgOperand(0);
StringRef FormatStr;
-if (!getConstantStringInfo(Op, FormatStr)) {
+if (!getConstantStringInfo(Op, FormatStr, /*CharWidth=*/8)) {
Value
[llvm-branch-commits] [llvm] [IR] Account for byte width in m_PtrAdd (PR #106540)
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/106540
>From 26dc400bb3e62f33c245082b9d29811d1444560c Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Thu, 29 Aug 2024 00:54:20 +0300
Subject: [PATCH] [IR] Account for byte width in m_PtrAdd
The method has few uses yet, so just pass DL argument to it. The change
follows m_PtrToIntSameSize, and I don't see a better way of delivering
the byte width to the method.
---
llvm/include/llvm/IR/PatternMatch.h | 13 ++
llvm/lib/Analysis/InstructionSimplify.cpp | 2 +-
.../InstCombineSimplifyDemanded.cpp | 7 ++---
.../InstCombine/InstructionCombining.cpp | 2 +-
llvm/unittests/IR/PatternMatch.cpp| 26 ++-
5 files changed, 34 insertions(+), 16 deletions(-)
diff --git a/llvm/include/llvm/IR/PatternMatch.h
b/llvm/include/llvm/IR/PatternMatch.h
index b3eeb1d7ba88a96..d59777062870aac 100644
--- a/llvm/include/llvm/IR/PatternMatch.h
+++ b/llvm/include/llvm/IR/PatternMatch.h
@@ -1891,15 +1891,17 @@ struct m_SplatOrPoisonMask {
};
template struct PtrAdd_match {
+ const DataLayout &DL;
PointerOpTy PointerOp;
OffsetOpTy OffsetOp;
- PtrAdd_match(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp)
- : PointerOp(PointerOp), OffsetOp(OffsetOp) {}
+ PtrAdd_match(const DataLayout &DL, const PointerOpTy &PointerOp,
+ const OffsetOpTy &OffsetOp)
+ : DL(DL), PointerOp(PointerOp), OffsetOp(OffsetOp) {}
template bool match(OpTy *V) {
auto *GEP = dyn_cast(V);
-return GEP && GEP->getSourceElementType()->isIntegerTy(8) &&
+return GEP && GEP->getSourceElementType()->isIntegerTy(DL.getByteWidth())
&&
PointerOp.match(GEP->getPointerOperand()) &&
OffsetOp.match(GEP->idx_begin()->get());
}
@@ -1941,8 +1943,9 @@ inline auto m_GEP(const OperandTypes &...Ops) {
/// Matches GEP with i8 source element type
template
inline PtrAdd_match
-m_PtrAdd(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp) {
- return PtrAdd_match(PointerOp, OffsetOp);
+m_PtrAdd(const DataLayout &DL, const PointerOpTy &PointerOp,
+ const OffsetOpTy &OffsetOp) {
+ return PtrAdd_match(DL, PointerOp, OffsetOp);
}
//===--===//
diff --git a/llvm/lib/Analysis/InstructionSimplify.cpp
b/llvm/lib/Analysis/InstructionSimplify.cpp
index 3cbc4107433ef3d..c9138dfcd3381c6 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -5390,7 +5390,7 @@ static Value *simplifyCastInst(unsigned CastOpc, Value
*Op, Type *Ty,
// ptrtoint (ptradd (Ptr, X - ptrtoint(Ptr))) -> X
Value *Ptr, *X;
if (CastOpc == Instruction::PtrToInt &&
- match(Op, m_PtrAdd(m_Value(Ptr),
+ match(Op, m_PtrAdd(Q.DL, m_Value(Ptr),
m_Sub(m_Value(X), m_PtrToInt(m_Deferred(Ptr) &&
X->getType() == Ty && Ty == Q.DL.getIndexType(Ptr->getType()))
return X;
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index 2c8939b5a051431..a26f4db275637f7 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -990,9 +990,10 @@ Value
*InstCombinerImpl::SimplifyDemandedUseBits(Instruction *I,
Value *InnerPtr;
uint64_t GEPIndex;
uint64_t PtrMaskImmediate;
-if (match(I, m_Intrinsic(
- m_PtrAdd(m_Value(InnerPtr), m_ConstantInt(GEPIndex)),
- m_ConstantInt(PtrMaskImmediate {
+if (match(I,
+ m_Intrinsic(
+ m_PtrAdd(DL, m_Value(InnerPtr), m_ConstantInt(GEPIndex)),
+ m_ConstantInt(PtrMaskImmediate {
LHSKnown = computeKnownBits(InnerPtr, Depth + 1, I);
if (!LHSKnown.isZero()) {
diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
index 5621511570b5819..4b1fba9141405ac 100644
--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -2418,7 +2418,7 @@ static Instruction
*canonicalizeGEPOfConstGEPI8(GetElementPtrInst &GEP,
auto &DL = IC.getDataLayout();
Value *Base;
const APInt *C1;
- if (!match(Src, m_PtrAdd(m_Value(Base), m_APInt(C1
+ if (!match(Src, m_PtrAdd(DL, m_Value(Base), m_APInt(C1
return nullptr;
Value *VarIndex;
const APInt *C2;
diff --git a/llvm/unittests/IR/PatternMatch.cpp
b/llvm/unittests/IR/PatternMatch.cpp
index e7600209e0b14bd..ce2f9ae29c4bca0 100644
--- a/llvm/unittests/IR/PatternMatch.cpp
+++ b/llvm/unittests/IR/PatternMatch.cpp
@@ -2618,26 +2618,40 @@ TEST_F(PatternMatchTest, ConstExpr) {
EXPECT_TRUE(match(V, m_ConstantExpr()));
}
-TEST_
[llvm-branch-commits] [llvm] [IRBuilder] Add getByteTy and use it in CreatePtrAdd (PR #106539)
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/106539
>From 6d95f98f2de990ff8971400966de74f62ef339bb Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Thu, 22 Aug 2024 15:10:58 +0300
Subject: [PATCH] [IRBuilder] Add getByteTy and use it in CreatePtrAdd
The change requires DataLayout instance to be available, which, in turn,
requires insertion point to be set. In-tree tests detected only one case
when the function was called without setting an insertion point, it was
changed to create a constant expression directly.
---
llvm/include/llvm/IR/IRBuilder.h | 10 +++--
.../Instrumentation/SanitizerCoverage.cpp | 5 ++---
llvm/unittests/IR/IRBuilderTest.cpp | 22 +++
3 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/llvm/include/llvm/IR/IRBuilder.h b/llvm/include/llvm/IR/IRBuilder.h
index 833c91fd974619c..63a3f5182486943 100644
--- a/llvm/include/llvm/IR/IRBuilder.h
+++ b/llvm/include/llvm/IR/IRBuilder.h
@@ -526,6 +526,12 @@ class IRBuilderBase {
// Type creation methods
//======//
+ /// Fetch the type representing a byte.
+ IntegerType *getByteTy() {
+const DataLayout &DL = BB->getDataLayout();
+return Type::getIntNTy(Context, DL.getByteWidth());
+ }
+
/// Fetch the type representing a single bit
IntegerType *getInt1Ty() {
return Type::getInt1Ty(Context);
@@ -1986,12 +1992,12 @@ class IRBuilderBase {
Value *CreatePtrAdd(Value *Ptr, Value *Offset, const Twine &Name = "",
GEPNoWrapFlags NW = GEPNoWrapFlags::none()) {
-return CreateGEP(getInt8Ty(), Ptr, Offset, Name, NW);
+return CreateGEP(getByteTy(), Ptr, Offset, Name, NW);
}
Value *CreateInBoundsPtrAdd(Value *Ptr, Value *Offset,
const Twine &Name = "") {
-return CreateGEP(getInt8Ty(), Ptr, Offset, Name,
+return CreateGEP(getByteTy(), Ptr, Offset, Name,
GEPNoWrapFlags::inBounds());
}
diff --git a/llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
b/llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
index ac033d92e30d854..23f7c0def69af7d 100644
--- a/llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
+++ b/llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
@@ -345,14 +345,13 @@ ModuleSanitizerCoverage::CreateSecStartEnd(Module &M,
const char *Section,
new GlobalVariable(M, Ty, false, Linkage, nullptr,
getSectionEnd(Section));
SecEnd->setVisibility(GlobalValue::HiddenVisibility);
- IRBuilder<> IRB(M.getContext());
if (!TargetTriple.isOSBinFormatCOFF())
return std::make_pair(SecStart, SecEnd);
// Account for the fact that on windows-msvc __start_* symbols actually
// point to a uint64_t before the start of the array.
- auto GEP =
- IRB.CreatePtrAdd(SecStart, ConstantInt::get(IntptrTy, sizeof(uint64_t)));
+ Constant *GEP = ConstantExpr::getGetElementPtr(
+ Int8Ty, SecStart, ConstantInt::get(IntptrTy, sizeof(uint64_t)));
return std::make_pair(GEP, SecEnd);
}
diff --git a/llvm/unittests/IR/IRBuilderTest.cpp
b/llvm/unittests/IR/IRBuilderTest.cpp
index 2fd52860e71b9f5..214eeddd24afd49 100644
--- a/llvm/unittests/IR/IRBuilderTest.cpp
+++ b/llvm/unittests/IR/IRBuilderTest.cpp
@@ -517,6 +517,14 @@ TEST_F(IRBuilderTest, DataLayout) {
EXPECT_FALSE(M->getDataLayout().isLegalInteger(32));
}
+TEST_F(IRBuilderTest, GetByteTy) {
+ IRBuilder<> Builder(BB);
+
+ EXPECT_TRUE(Builder.getByteTy()->isIntegerTy(8));
+ M->setDataLayout("b:32");
+ EXPECT_TRUE(Builder.getByteTy()->isIntegerTy(32));
+}
+
TEST_F(IRBuilderTest, GetIntTy) {
IRBuilder<> Builder(BB);
IntegerType *Ty1 = Builder.getInt1Ty();
@@ -528,6 +536,20 @@ TEST_F(IRBuilderTest, GetIntTy) {
EXPECT_EQ(IntPtrTy, IntegerType::get(Ctx, IntPtrBitSize));
}
+TEST_F(IRBuilderTest, CreatePtrAdd) {
+ IRBuilder<> Builder(BB);
+
+ M->setDataLayout("b:16-p:32:32");
+ Value *V = Builder.CreatePtrAdd(GV, ConstantInt::get(Ctx, APInt(32, 42)));
+ ASSERT_TRUE(isa(V));
+ EXPECT_TRUE(cast(V)->getResultElementType()->isIntegerTy(16));
+
+ M->setDataLayout("b:32-p:64:32");
+ V = Builder.CreateInBoundsPtrAdd(GV, ConstantInt::get(Ctx, APInt(64, 42)));
+ ASSERT_TRUE(isa(V));
+ EXPECT_TRUE(cast(V)->getResultElementType()->isIntegerTy(32));
+}
+
TEST_F(IRBuilderTest, UnaryOperators) {
IRBuilder Builder(BB);
Value *V = Builder.CreateLoad(GV->getValueType(), GV);
___
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[llvm-branch-commits] [llvm] [SimplifyLibCalls] Add initial support for non-8-bit bytes (PR #106542)
https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106542 >From 931d15e69f7c57a7c0a0708853ee50be1e27c769 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Wed, 28 Aug 2024 16:09:44 +0300 Subject: [PATCH] [SimplifyLibCalls] Add initial support for non-8-bit bytes The patch makes CharWidth argument of `getStringLength` mandatory and ensures the correct values are passed in most cases. This is *not* a complete support for unusual byte widths in SimplifyLibCalls since `getConstantStringInfo` returns false for those. The code guarded by `getConstantStringInfo` returning true is unchanged because the changes are currently not testable. --- llvm/include/llvm/Analysis/ValueTracking.h| 4 +- .../llvm/Transforms/Utils/SimplifyLibCalls.h | 4 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 3 +- llvm/lib/Analysis/ValueTracking.cpp | 40 ++-- .../InstCombine/InstCombineCalls.cpp | 12 +- .../InstCombine/InstructionCombining.cpp | 5 +- .../lib/Transforms/Utils/SimplifyLibCalls.cpp | 191 -- .../InstCombine/SimplifyLibCalls/fputs-b16.ll | 19 ++ .../SimplifyLibCalls/fwrite-b16.ll| 19 ++ .../SimplifyLibCalls/memchr-b16.ll| 34 .../SimplifyLibCalls/memcmp-b32.ll| 32 +++ .../SimplifyLibCalls/memcpy-b16.ll| 69 +++ .../SimplifyLibCalls/memcpy_chk-b16.ll| 17 ++ .../SimplifyLibCalls/mempcpy-b16.ll | 17 ++ .../SimplifyLibCalls/memrchr-b16.ll | 20 ++ .../SimplifyLibCalls/memset-b16.ll| 66 ++ .../SimplifyLibCalls/stpcpy-b16.ll| 31 +++ .../SimplifyLibCalls/stpcpy_chk-b16.ll| 44 .../SimplifyLibCalls/stpncpy-b16.ll | 47 + .../SimplifyLibCalls/strcat-b16.ll| 20 ++ .../SimplifyLibCalls/strchr-b16.ll| 45 + .../SimplifyLibCalls/strcmp-b32.ll| 50 + .../SimplifyLibCalls/strcpy-b16.ll| 18 ++ .../SimplifyLibCalls/strcpy_chk-b16.ll| 30 +++ .../SimplifyLibCalls/strlcpy-b16.ll | 18 ++ .../SimplifyLibCalls/strlen-b16.ll| 16 ++ .../SimplifyLibCalls/strncat-b16.ll | 20 ++ .../SimplifyLibCalls/strncmp-b32.ll | 34 .../SimplifyLibCalls/strncpy-b16.ll | 43 .../SimplifyLibCalls/strndup-b16.ll | 17 ++ .../SimplifyLibCalls/strnlen-b16.ll | 18 ++ .../SimplifyLibCalls/wcslen-b16.ll| 19 ++ llvm/test/Transforms/InstCombine/bcmp-1.ll| 2 +- llvm/test/Transforms/InstCombine/memcmp-1.ll | 2 +- llvm/test/Transforms/InstCombine/strncmp-1.ll | 2 +- 35 files changed, 928 insertions(+), 100 deletions(-) create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/fputs-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/fwrite-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/memchr-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/memcmp-b32.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/memcpy-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/memcpy_chk-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/mempcpy-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/memrchr-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/memset-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/stpcpy-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/stpcpy_chk-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/stpncpy-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/strcat-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/strchr-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/strcmp-b32.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/strcpy-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/strcpy_chk-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/strlcpy-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/strlen-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/strncat-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/strncmp-b32.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/strncpy-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/strndup-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/strnlen-b16.ll create mode 100644 llvm/test/Transforms/InstCombine/SimplifyLibCalls/wcslen-b16.ll diff --git a/llvm/include/llvm/Analysis/ValueTracking.h b/llvm/include/llvm/Analysis/ValueTracking.h index
[llvm-branch-commits] [llvm] [CodeGen][MachineScheduler] Remove the unimplemented print method. (PR #125702)
cdevadas wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/125702?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#125702** https://app.graphite.dev/github/pr/llvm/llvm-project/125702?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/125702?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#125701** https://app.graphite.dev/github/pr/llvm/llvm-project/125701?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#125700** https://app.graphite.dev/github/pr/llvm/llvm-project/125700?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/125702 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [MachineVerifier][NewPM] Add method to run MF through verifier. (PR #125701)
https://github.com/cdevadas created
https://github.com/llvm/llvm-project/pull/125701
None
>From effa5e3fb1b50bf6530c2c0f0bb6b953224c4ea9 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Tue, 4 Feb 2025 20:18:10 +0530
Subject: [PATCH] [MachineVerifier][NewPM] Add method to run MF through
verifier.
---
llvm/include/llvm/CodeGen/MachineFunction.h | 7 +++
llvm/lib/CodeGen/MachineVerifier.cpp| 6 ++
2 files changed, 13 insertions(+)
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h
b/llvm/include/llvm/CodeGen/MachineFunction.h
index c3eb27b9462879d..f1e595cde54e31f 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -918,6 +918,13 @@ class LLVM_ABI MachineFunction {
bool verify(Pass *p = nullptr, const char *Banner = nullptr,
raw_ostream *OS = nullptr, bool AbortOnError = true) const;
+ /// For New Pass Manager: Run the current MachineFunction through the machine
+ /// code verifier, useful for debugger use.
+ /// \returns true if no problems were found.
+ bool verify(MachineFunctionAnalysisManager &MFAM,
+ const char *Banner = nullptr, raw_ostream *OS = nullptr,
+ bool AbortOnError = true) const;
+
/// Run the current MachineFunction through the machine code verifier, useful
/// for debugger use.
/// \returns true if no problems were found.
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp
b/llvm/lib/CodeGen/MachineVerifier.cpp
index 8509369fe09c8f2..05afcbee701a80a 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -431,6 +431,12 @@ bool MachineFunction::verify(Pass *p, const char *Banner,
raw_ostream *OS,
return MachineVerifier(p, Banner, OS, AbortOnError).verify(*this);
}
+bool MachineFunction::verify(MachineFunctionAnalysisManager &MFAM,
+ const char *Banner, raw_ostream *OS,
+ bool AbortOnError) const {
+ return MachineVerifier(MFAM, Banner, OS, AbortOnError).verify(*this);
+}
+
bool MachineFunction::verify(LiveIntervals *LiveInts, SlotIndexes *Indexes,
const char *Banner, raw_ostream *OS,
bool AbortOnError) const {
___
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[llvm-branch-commits] [llvm] CodeGen][NewPM] Port MachineScheduler to NPM. (PR #125703)
cdevadas wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/125703?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#125703** https://app.graphite.dev/github/pr/llvm/llvm-project/125703?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/125703?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#125702** https://app.graphite.dev/github/pr/llvm/llvm-project/125702?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#125701** https://app.graphite.dev/github/pr/llvm/llvm-project/125701?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#125700** https://app.graphite.dev/github/pr/llvm/llvm-project/125700?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/125703 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [MachineVerifier][NewPM] Add method to run MF through verifier. (PR #125701)
cdevadas wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/125701?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#125701** https://app.graphite.dev/github/pr/llvm/llvm-project/125701?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/125701?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#125700** https://app.graphite.dev/github/pr/llvm/llvm-project/125700?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/125701 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] CodeGen][NewPM] Port MachineScheduler to NPM. (PR #125703)
https://github.com/cdevadas created
https://github.com/llvm/llvm-project/pull/125703
None
>From 35a3a800bf08d30bc1311ad8146ac7759ed1f090 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Thu, 16 Jan 2025 10:26:09 +0530
Subject: [PATCH] CodeGen][NewPM] Port MachineScheduler to NPM.
---
llvm/include/llvm/CodeGen/MachineScheduler.h | 18 ++
llvm/include/llvm/InitializePasses.h | 4 +-
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 5 +-
.../llvm/Passes/MachinePassRegistry.def | 4 +-
llvm/lib/CodeGen/CodeGen.cpp | 4 +-
llvm/lib/CodeGen/MachineScheduler.cpp | 287 +-
llvm/lib/CodeGen/RegAllocBasic.cpp| 2 +-
llvm/lib/CodeGen/RegAllocGreedy.cpp | 2 +-
llvm/lib/Passes/PassBuilder.cpp | 1 +
.../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 +
.../test/CodeGen/AArch64/a55-fuse-address.mir | 1 +
.../CodeGen/AArch64/ampere1-sched-add.mir | 1 +
.../CodeGen/AArch64/cluster-frame-index.mir | 1 +
.../CodeGen/AArch64/dump-reserved-cycles.mir | 6 +
.../CodeGen/AArch64/dump-schedule-trace.mir | 17 ++
.../AArch64/force-enable-intervals.mir| 10 +
.../CodeGen/AArch64/machine-scheduler.mir | 1 +
.../macro-fusion-addsub-2reg-const1.mir | 2 +
.../CodeGen/AArch64/macro-fusion-last.mir | 2 +
.../AArch64/misched-branch-targets.mir| 3 +
llvm/test/CodeGen/AArch64/misched-bundle.mir | 1 +
.../misched-detail-resource-booking-01.mir| 8 +
.../misched-detail-resource-booking-02.mir| 7 +
.../AArch64/misched-fusion-arith-logic.mir| 2 +
.../CodeGen/AArch64/misched-fusion-cmp.mir| 1 +
.../AArch64/misched-fusion-crypto-eor.mir | 3 +
.../test/CodeGen/AArch64/misched-move-imm.mir | 1 +
.../AArch64/misched-predicate-virtreg.mir | 1 +
.../misched-sort-resource-in-trace.mir| 10 +
.../CodeGen/AArch64/sched-postidxalias.mir| 1 +
.../CodeGen/AArch64/sched-print-cycle.mir | 6 +
.../CodeGen/AArch64/scheduledag-constreg.mir | 1 +
llvm/test/CodeGen/AArch64/sve-aliasing.mir| 1 +
.../AMDGPU/at-least-one-def-value-assert.mir | 2 +
.../CodeGen/AMDGPU/cluster-flat-loads.mir | 1 +
.../AMDGPU/dbg-value-ends-sched-region.mir| 1 +
.../AMDGPU/debug-value-scheduler-crash.mir| 1 +
.../AMDGPU/debug-value-scheduler-liveins.mir | 1 +
.../CodeGen/AMDGPU/debug-value-scheduler.mir | 1 +
.../CodeGen/AMDGPU/flat-load-clustering.mir | 1 +
.../CodeGen/AMDGPU/high-RP-reschedule.mir | 6 +-
...ne-scheduler-sink-trivial-remats-debug.mir | 1 +
.../machine-scheduler-sink-trivial-remats.mir | 1 +
.../AMDGPU/macro-fusion-cluster-vcc-uses.mir | 1 +
...ssert-dead-def-subreg-use-other-subreg.mir | 3 +-
...ched-assert-onlydbg-value-empty-region.mir | 1 +
.../AMDGPU/sched-barrier-hang-weak-dep.mir| 1 +
.../CodeGen/AMDGPU/sched-crash-dbg-value.mir | 1 +
...dleMoveUp-subreg-def-across-subreg-def.mir | 1 +
.../AMDGPU/schedule-barrier-fpmode.mir| 2 +
llvm/test/CodeGen/AMDGPU/schedule-barrier.mir | 1 +
.../AMDGPU/sreg-xnull-regclass-bitwidth.mir | 1 +
llvm/test/CodeGen/ARM/cortex-m7-wideops.mir | 1 +
.../CodeGen/ARM/misched-branch-targets.mir| 2 +
.../CodeGen/PowerPC/topdepthreduce-postra.mir | 1 +
.../RISCV/misched-postra-direction.mir| 13 +
56 files changed, 366 insertions(+), 95 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineScheduler.h
b/llvm/include/llvm/CodeGen/MachineScheduler.h
index 4762494e6ccb77d..e1f1a1efecc724d 100644
--- a/llvm/include/llvm/CodeGen/MachineScheduler.h
+++ b/llvm/include/llvm/CodeGen/MachineScheduler.h
@@ -1385,6 +1385,24 @@ std::unique_ptr
createCopyConstrainDAGMutation(const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI);
+class MachineSchedulerPass : public PassInfoMixin {
+ const TargetMachine *TM;
+
+public:
+ MachineSchedulerPass(const TargetMachine *TM) : TM(TM) {}
+ PreservedAnalyses run(MachineFunction &MF,
+MachineFunctionAnalysisManager &MFAM);
+};
+
+class PostMachineSchedulerPass
+: public PassInfoMixin {
+ const TargetMachine *TM;
+
+public:
+ PostMachineSchedulerPass(const TargetMachine *TM) : TM(TM) {}
+ PreservedAnalyses run(MachineFunction &MF,
+MachineFunctionAnalysisManager &MFAM);
+};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINESCHEDULER_H
diff --git a/llvm/include/llvm/InitializePasses.h
b/llvm/include/llvm/InitializePasses.h
index 053f955d0df0a4d..e492de62acfa482 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -209,7 +209,7 @@ void initializeMachinePipelinerPass(PassRegistry &);
void initializeMachinePostDominatorTreeWrapperPassPass(PassRegistry &);
void initializeMachineRegionInfoPassPass(PassRegistry &);
void initializeMachineSanitizerBinaryMetadataPass(PassRegistry &);
-v
[llvm-branch-commits] [llvm] CodeGen][NewPM] Port MachineScheduler to NPM. (PR #125703)
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
@llvm/pr-subscribers-backend-arm
Author: Christudasan Devadasan (cdevadas)
Changes
---
Patch is 63.84 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/125703.diff
56 Files Affected:
- (modified) llvm/include/llvm/CodeGen/MachineScheduler.h (+18)
- (modified) llvm/include/llvm/InitializePasses.h (+2-2)
- (modified) llvm/include/llvm/Passes/CodeGenPassBuilder.h (+3-2)
- (modified) llvm/include/llvm/Passes/MachinePassRegistry.def (+2-2)
- (modified) llvm/lib/CodeGen/CodeGen.cpp (+2-2)
- (modified) llvm/lib/CodeGen/MachineScheduler.cpp (+205-82)
- (modified) llvm/lib/CodeGen/RegAllocBasic.cpp (+1-1)
- (modified) llvm/lib/CodeGen/RegAllocGreedy.cpp (+1-1)
- (modified) llvm/lib/Passes/PassBuilder.cpp (+1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (+2)
- (modified) llvm/test/CodeGen/AArch64/a55-fuse-address.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/ampere1-sched-add.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/cluster-frame-index.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/dump-reserved-cycles.mir (+6)
- (modified) llvm/test/CodeGen/AArch64/dump-schedule-trace.mir (+17)
- (modified) llvm/test/CodeGen/AArch64/force-enable-intervals.mir (+10)
- (modified) llvm/test/CodeGen/AArch64/machine-scheduler.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/macro-fusion-addsub-2reg-const1.mir (+2)
- (modified) llvm/test/CodeGen/AArch64/macro-fusion-last.mir (+2)
- (modified) llvm/test/CodeGen/AArch64/misched-branch-targets.mir (+3)
- (modified) llvm/test/CodeGen/AArch64/misched-bundle.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
(+8)
- (modified) llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
(+7)
- (modified) llvm/test/CodeGen/AArch64/misched-fusion-arith-logic.mir (+2)
- (modified) llvm/test/CodeGen/AArch64/misched-fusion-cmp.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/misched-fusion-crypto-eor.mir (+3)
- (modified) llvm/test/CodeGen/AArch64/misched-move-imm.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/misched-predicate-virtreg.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/misched-sort-resource-in-trace.mir (+10)
- (modified) llvm/test/CodeGen/AArch64/sched-postidxalias.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/sched-print-cycle.mir (+6)
- (modified) llvm/test/CodeGen/AArch64/scheduledag-constreg.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/sve-aliasing.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir (+2)
- (modified) llvm/test/CodeGen/AMDGPU/cluster-flat-loads.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/debug-value-scheduler.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir (+4-2)
- (modified)
llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
(+1)
- (modified) llvm/test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir (+1)
- (modified)
llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir
(+2-1)
- (modified)
llvm/test/CodeGen/AMDGPU/sched-assert-onlydbg-value-empty-region.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/sched-barrier-hang-weak-dep.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir (+1)
- (modified)
llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
(+1)
- (modified) llvm/test/CodeGen/AMDGPU/schedule-barrier-fpmode.mir (+2)
- (modified) llvm/test/CodeGen/AMDGPU/schedule-barrier.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/sreg-xnull-regclass-bitwidth.mir (+1)
- (modified) llvm/test/CodeGen/ARM/cortex-m7-wideops.mir (+1)
- (modified) llvm/test/CodeGen/ARM/misched-branch-targets.mir (+2)
- (modified) llvm/test/CodeGen/PowerPC/topdepthreduce-postra.mir (+1)
- (modified) llvm/test/CodeGen/RISCV/misched-postra-direction.mir (+13)
``diff
diff --git a/llvm/include/llvm/CodeGen/MachineScheduler.h
b/llvm/include/llvm/CodeGen/MachineScheduler.h
index 4762494e6ccb77..e1f1a1efecc724 100644
--- a/llvm/include/llvm/CodeGen/MachineScheduler.h
+++ b/llvm/include/llvm/CodeGen/MachineScheduler.h
@@ -1385,6 +1385,24 @@ std::unique_ptr
createCopyConstrainDAGMutation(const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI);
+class MachineSchedulerPass : public PassInfoMixin {
+ const TargetMachine *TM;
+
+public:
+ MachineSchedulerPass(const TargetMachine *TM) : TM(TM) {}
+ PreservedAnalyses run(MachineFunction &MF,
+MachineFunctionAnalysisManager &MFAM);
+};
[llvm-branch-commits] [llvm] [CodeGen][MachineScheduler] Remove the unimplemented print method. (PR #125702)
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/125702 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DXIL] Add support for root signature flag element in DXContainer (PR #123147)
inbelic wrote: Okay, sounds good. In that case then we can remove the code that handles got multiple https://github.com/llvm/llvm-project/pull/123147 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] release/20.x: [lldb] Add support for gdb-style 'x' packet (#124733) (PR #125653)
labath wrote: In the future (see https://discourse.llvm.org/c/subprojects/lldb/8) we will be changing the packet format used by debug-/lldb-server. This ensures forwards-compatibility with those servers. https://github.com/llvm/llvm-project/pull/125653 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] release/20.x: [lldb] Add support for gdb-style 'x' packet (#124733) (PR #125653)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/125653
Backport 13d0318a9848ec322ceea4f37fb6b421d70407b0
Requested by: @labath
>From bee03a956372c94d65181a0d2ddccf03fc8cb499 Mon Sep 17 00:00:00 2001
From: Pavel Labath
Date: Fri, 31 Jan 2025 09:07:11 +0100
Subject: [PATCH] [lldb] Add support for gdb-style 'x' packet (#124733)
See also
https://discourse.llvm.org/t/rfc-fixing-incompatibilties-of-the-x-packet-w-r-t-gdb/84288
and https://sourceware.org/pipermail/gdb/2025-January/051705.html
(cherry picked from commit 13d0318a9848ec322ceea4f37fb6b421d70407b0)
---
.../Python/lldbsuite/test/gdbclientutils.py | 6 ++
.../GDBRemoteCommunicationClient.cpp | 22 +---
.../gdb-remote/GDBRemoteCommunicationClient.h | 11 +++-
.../Process/gdb-remote/ProcessGDBRemote.cpp | 36 +++-
.../gdb_remote_client/TestReadMemory.py | 55 +++
5 files changed, 106 insertions(+), 24 deletions(-)
create mode 100644
lldb/test/API/functionalities/gdb_remote_client/TestReadMemory.py
diff --git a/lldb/packages/Python/lldbsuite/test/gdbclientutils.py
b/lldb/packages/Python/lldbsuite/test/gdbclientutils.py
index 1784487323ad6be..4b782b3b470fe22 100644
--- a/lldb/packages/Python/lldbsuite/test/gdbclientutils.py
+++ b/lldb/packages/Python/lldbsuite/test/gdbclientutils.py
@@ -126,6 +126,9 @@ def respond(self, packet):
if packet[0] == "m":
addr, length = [int(x, 16) for x in packet[1:].split(",")]
return self.readMemory(addr, length)
+if packet[0] == "x":
+addr, length = [int(x, 16) for x in packet[1:].split(",")]
+return self.x(addr, length)
if packet[0] == "M":
location, encoded_data = packet[1:].split(":")
addr, length = [int(x, 16) for x in location.split(",")]
@@ -267,6 +270,9 @@ def writeRegister(self, register, value_hex):
def readMemory(self, addr, length):
return "00" * length
+def x(self, addr, length):
+return ""
+
def writeMemory(self, addr, data_hex):
return "OK"
diff --git
a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
index b3f1c6f052955b0..581dd8f8e0b6b64 100644
--- a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
+++ b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
@@ -275,7 +275,6 @@ void
GDBRemoteCommunicationClient::ResetDiscoverableSettings(bool did_exec) {
m_supports_vCont_s = eLazyBoolCalculate;
m_supports_vCont_S = eLazyBoolCalculate;
m_supports_p = eLazyBoolCalculate;
-m_supports_x = eLazyBoolCalculate;
m_supports_QSaveRegisterState = eLazyBoolCalculate;
m_qHostInfo_is_valid = eLazyBoolCalculate;
m_curr_pid_is_valid = eLazyBoolCalculate;
@@ -295,6 +294,7 @@ void
GDBRemoteCommunicationClient::ResetDiscoverableSettings(bool did_exec) {
m_supports_qXfer_siginfo_read = eLazyBoolCalculate;
m_supports_augmented_libraries_svr4_read = eLazyBoolCalculate;
m_uses_native_signals = eLazyBoolCalculate;
+m_x_packet_state.reset();
m_supports_qProcessInfoPID = true;
m_supports_qfProcessInfo = true;
m_supports_qUserName = true;
@@ -348,6 +348,7 @@ void GDBRemoteCommunicationClient::GetRemoteQSupported() {
m_supports_memory_tagging = eLazyBoolNo;
m_supports_qSaveCore = eLazyBoolNo;
m_uses_native_signals = eLazyBoolNo;
+ m_x_packet_state.reset();
m_max_packet_size = UINT64_MAX; // It's supposed to always be there, but if
// not, we assume no limit
@@ -401,6 +402,8 @@ void GDBRemoteCommunicationClient::GetRemoteQSupported() {
m_supports_qSaveCore = eLazyBoolYes;
else if (x == "native-signals+")
m_uses_native_signals = eLazyBoolYes;
+ else if (x == "binary-upload+")
+m_x_packet_state = xPacketState::Prefixed;
// Look for a list of compressions in the features list e.g.
//
qXfer:features:read+;PacketSize=2;qEcho+;SupportedCompressions=zlib-
// deflate,lzma
@@ -715,19 +718,20 @@ Status GDBRemoteCommunicationClient::WriteMemoryTags(
return status;
}
-bool GDBRemoteCommunicationClient::GetxPacketSupported() {
- if (m_supports_x == eLazyBoolCalculate) {
+GDBRemoteCommunicationClient::xPacketState
+GDBRemoteCommunicationClient::GetxPacketState() {
+ if (!m_x_packet_state)
+GetRemoteQSupported();
+ if (!m_x_packet_state) {
StringExtractorGDBRemote response;
-m_supports_x = eLazyBoolNo;
-char packet[256];
-snprintf(packet, sizeof(packet), "x0,0");
-if (SendPacketAndWaitForResponse(packet, response) ==
+m_x_packet_state = xPacketState::Unimplemented;
+if (SendPacketAndWaitForResponse("x0,0", response) ==
PacketResult::Success) {
if (response.IsOKResponse())
-m_supports_x = eLazyBoolYes;
+m_x_packet_state = xPacketStat
[llvm-branch-commits] [lldb] release/20.x: [lldb] Add support for gdb-style 'x' packet (#124733) (PR #125653)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/125653 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] release/20.x: [lldb] Add support for gdb-style 'x' packet (#124733) (PR #125653)
llvmbot wrote: @DavidSpickett What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/125653 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] release/20.x: [lldb] Add support for gdb-style 'x' packet (#124733) (PR #125653)
llvmbot wrote:
@llvm/pr-subscribers-lldb
Author: None (llvmbot)
Changes
Backport 13d0318a9848ec322ceea4f37fb6b421d70407b0
Requested by: @labath
---
Full diff: https://github.com/llvm/llvm-project/pull/125653.diff
5 Files Affected:
- (modified) lldb/packages/Python/lldbsuite/test/gdbclientutils.py (+6)
- (modified)
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp (+13-9)
- (modified)
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h (+9-2)
- (modified) lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
(+23-13)
- (added) lldb/test/API/functionalities/gdb_remote_client/TestReadMemory.py
(+55)
``diff
diff --git a/lldb/packages/Python/lldbsuite/test/gdbclientutils.py
b/lldb/packages/Python/lldbsuite/test/gdbclientutils.py
index 1784487323ad6b..4b782b3b470fe2 100644
--- a/lldb/packages/Python/lldbsuite/test/gdbclientutils.py
+++ b/lldb/packages/Python/lldbsuite/test/gdbclientutils.py
@@ -126,6 +126,9 @@ def respond(self, packet):
if packet[0] == "m":
addr, length = [int(x, 16) for x in packet[1:].split(",")]
return self.readMemory(addr, length)
+if packet[0] == "x":
+addr, length = [int(x, 16) for x in packet[1:].split(",")]
+return self.x(addr, length)
if packet[0] == "M":
location, encoded_data = packet[1:].split(":")
addr, length = [int(x, 16) for x in location.split(",")]
@@ -267,6 +270,9 @@ def writeRegister(self, register, value_hex):
def readMemory(self, addr, length):
return "00" * length
+def x(self, addr, length):
+return ""
+
def writeMemory(self, addr, data_hex):
return "OK"
diff --git
a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
index b3f1c6f052955b..581dd8f8e0b6b6 100644
--- a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
+++ b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
@@ -275,7 +275,6 @@ void
GDBRemoteCommunicationClient::ResetDiscoverableSettings(bool did_exec) {
m_supports_vCont_s = eLazyBoolCalculate;
m_supports_vCont_S = eLazyBoolCalculate;
m_supports_p = eLazyBoolCalculate;
-m_supports_x = eLazyBoolCalculate;
m_supports_QSaveRegisterState = eLazyBoolCalculate;
m_qHostInfo_is_valid = eLazyBoolCalculate;
m_curr_pid_is_valid = eLazyBoolCalculate;
@@ -295,6 +294,7 @@ void
GDBRemoteCommunicationClient::ResetDiscoverableSettings(bool did_exec) {
m_supports_qXfer_siginfo_read = eLazyBoolCalculate;
m_supports_augmented_libraries_svr4_read = eLazyBoolCalculate;
m_uses_native_signals = eLazyBoolCalculate;
+m_x_packet_state.reset();
m_supports_qProcessInfoPID = true;
m_supports_qfProcessInfo = true;
m_supports_qUserName = true;
@@ -348,6 +348,7 @@ void GDBRemoteCommunicationClient::GetRemoteQSupported() {
m_supports_memory_tagging = eLazyBoolNo;
m_supports_qSaveCore = eLazyBoolNo;
m_uses_native_signals = eLazyBoolNo;
+ m_x_packet_state.reset();
m_max_packet_size = UINT64_MAX; // It's supposed to always be there, but if
// not, we assume no limit
@@ -401,6 +402,8 @@ void GDBRemoteCommunicationClient::GetRemoteQSupported() {
m_supports_qSaveCore = eLazyBoolYes;
else if (x == "native-signals+")
m_uses_native_signals = eLazyBoolYes;
+ else if (x == "binary-upload+")
+m_x_packet_state = xPacketState::Prefixed;
// Look for a list of compressions in the features list e.g.
//
qXfer:features:read+;PacketSize=2;qEcho+;SupportedCompressions=zlib-
// deflate,lzma
@@ -715,19 +718,20 @@ Status GDBRemoteCommunicationClient::WriteMemoryTags(
return status;
}
-bool GDBRemoteCommunicationClient::GetxPacketSupported() {
- if (m_supports_x == eLazyBoolCalculate) {
+GDBRemoteCommunicationClient::xPacketState
+GDBRemoteCommunicationClient::GetxPacketState() {
+ if (!m_x_packet_state)
+GetRemoteQSupported();
+ if (!m_x_packet_state) {
StringExtractorGDBRemote response;
-m_supports_x = eLazyBoolNo;
-char packet[256];
-snprintf(packet, sizeof(packet), "x0,0");
-if (SendPacketAndWaitForResponse(packet, response) ==
+m_x_packet_state = xPacketState::Unimplemented;
+if (SendPacketAndWaitForResponse("x0,0", response) ==
PacketResult::Success) {
if (response.IsOKResponse())
-m_supports_x = eLazyBoolYes;
+m_x_packet_state = xPacketState::Bare;
}
}
- return m_supports_x;
+ return *m_x_packet_state;
}
lldb::pid_t GDBRemoteCommunicationClient::GetCurrentProcessID(bool allow_lazy)
{
diff --git
a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
index 898d176abc3465..1118a76d7211b5 100644
---
[llvm-branch-commits] [llvm] release/20.x: [VPlan] Only use SCEV for live-ins in tryToWiden. (#125436) (PR #125659)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/125659
Backport 30f3752e54fa7cd595a434a985efbe9a7abe9b65
Requested by: @fhahn
>From 2bbf2b25a1575f2b60780dbe05dc8a8f9b6d3ac1 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Mon, 3 Feb 2025 17:01:02 +
Subject: [PATCH] [VPlan] Only use SCEV for live-ins in tryToWiden. (#125436)
Replacing a recipe with a live-in may not be correct in all cases,
e.g. when replacing recipes involving header-phi recipes, like
reductions.
For now, only use SCEV to simplify live-ins.
More powerful input simplification can be built in top of
https://github.com/llvm/llvm-project/pull/124432 in the future.
Fixes https://github.com/llvm/llvm-project/issues/119173.
Fixes https://github.com/llvm/llvm-project/issues/125374.
PR: https://github.com/llvm/llvm-project/pull/125436
(cherry picked from commit 30f3752e54fa7cd595a434a985efbe9a7abe9b65)
---
.../Transforms/Vectorize/LoopVectorize.cpp| 8 +++-
.../AArch64/mul-simplification.ll | 41 +++
2 files changed, 20 insertions(+), 29 deletions(-)
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 57b7358049bcef..c4b159117e2e84 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -6615,8 +6615,10 @@
LoopVectorizationCostModel::getInstructionCost(Instruction *I,
// fold away. We can generalize this for all operations using the notion
// of neutral elements. (TODO)
if (I->getOpcode() == Instruction::Mul &&
-(PSE.getSCEV(I->getOperand(0))->isOne() ||
- PSE.getSCEV(I->getOperand(1))->isOne()))
+((TheLoop->isLoopInvariant(I->getOperand(0)) &&
+ PSE.getSCEV(I->getOperand(0))->isOne()) ||
+ (TheLoop->isLoopInvariant(I->getOperand(1)) &&
+ PSE.getSCEV(I->getOperand(1))->isOne(
return 0;
// Detect reduction patterns
@@ -8566,6 +8568,8 @@ VPWidenRecipe *VPRecipeBuilder::tryToWiden(Instruction *I,
// to replace operands with constants.
ScalarEvolution &SE = *PSE.getSE();
auto GetConstantViaSCEV = [this, &SE](VPValue *Op) {
+if (!Op->isLiveIn())
+ return Op;
Value *V = Op->getUnderlyingValue();
if (isa(V) || !SE.isSCEVable(V->getType()))
return Op;
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
index 6b55f5291efd8c..a8d44421a3c37b 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
@@ -7,24 +7,10 @@ target triple = "arm64-apple-macosx"
define i64 @mul_select_operand_known_1_via_scev() {
; CHECK-LABEL: define i64 @mul_select_operand_known_1_via_scev() {
; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT:br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT:br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT:[[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [
[[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT:[[VEC_PHI:%.*]] = phi <2 x i64> [ ,
%[[VECTOR_PH]] ], [ [[VEC_PHI]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT:[[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
-; CHECK-NEXT:br i1 true, label %[[MIDDLE_BLOCK:.*]], label
%[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT:[[TMP0:%.*]] = call i64 @llvm.vector.reduce.mul.v2i64(<2 x
i64> [[VEC_PHI]])
-; CHECK-NEXT:br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
-; CHECK: [[SCALAR_PH]]:
-; CHECK-NEXT:[[BC_MERGE_RDX:%.*]] = phi i64 [ [[TMP0]], %[[MIDDLE_BLOCK]]
], [ 12, %[[ENTRY]] ]
-; CHECK-NEXT:[[BC_RESUME_VAL:%.*]] = phi i32 [ 2, %[[MIDDLE_BLOCK]] ], [
0, %[[ENTRY]] ]
; CHECK-NEXT:br label %[[LOOP:.*]]
; CHECK: [[LOOP]]:
-; CHECK-NEXT:[[RED:%.*]] = phi i64 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [
[[RED_NEXT:%.*]], %[[LOOP]] ]
-; CHECK-NEXT:[[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [
[[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT:[[RED:%.*]] = phi i64 [ 12, %[[ENTRY]] ], [ [[RED_NEXT:%.*]],
%[[LOOP]] ]
+; CHECK-NEXT:[[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]],
%[[LOOP]] ]
; CHECK-NEXT:[[TMP1:%.*]] = and i32 [[IV]], 1
; CHECK-NEXT:[[CMP1_I:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT:[[NARROW_I:%.*]] = select i1 [[CMP1_I]], i32 1, i32 [[IV]]
@@ -32,9 +18,9 @@ define i64 @mul_select_operand_known_1_via_scev() {
; CHECK-NEXT:[[RED_NEXT]] = mul nsw i64 [[RED]], [[MUL]]
; CHECK-NEXT:[[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; CHECK-NEXT:[[EC:%.*]] = icmp eq i32 [[IV]], 1
-; CHECK-NEXT:br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop
[[LOOP3:![0-9]+]]
+; CHECK-NEXT:br i1 [[EC]], label %[[EXIT:.*]], label %[[
[llvm-branch-commits] [llvm] release/20.x: [VPlan] Only use SCEV for live-ins in tryToWiden. (#125436) (PR #125659)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/125659 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [VPlan] Only use SCEV for live-ins in tryToWiden. (#125436) (PR #125659)
llvmbot wrote: @lukel97 What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/125659 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM (PR #118462)
@@ -20,107 +20,181 @@
using namespace llvm;
-static cl::opt Mode(
+static cl::opt Mode(
"regalloc-enable-priority-advisor", cl::Hidden,
-cl::init(RegAllocPriorityAdvisorAnalysis::AdvisorMode::Default),
+cl::init(RegAllocPriorityAdvisorProvider::AdvisorMode::Default),
cl::desc("Enable regalloc advisor mode"),
cl::values(
-clEnumValN(RegAllocPriorityAdvisorAnalysis::AdvisorMode::Default,
+clEnumValN(RegAllocPriorityAdvisorProvider::AdvisorMode::Default,
"default", "Default"),
-clEnumValN(RegAllocPriorityAdvisorAnalysis::AdvisorMode::Release,
+clEnumValN(RegAllocPriorityAdvisorProvider::AdvisorMode::Release,
"release", "precompiled"),
-clEnumValN(RegAllocPriorityAdvisorAnalysis::AdvisorMode::Development,
+clEnumValN(RegAllocPriorityAdvisorProvider::AdvisorMode::Development,
"development", "for training"),
clEnumValN(
-RegAllocPriorityAdvisorAnalysis::AdvisorMode::Dummy, "dummy",
+RegAllocPriorityAdvisorProvider::AdvisorMode::Dummy, "dummy",
"prioritize low virtual register numbers for test and debug")));
-char RegAllocPriorityAdvisorAnalysis::ID = 0;
-INITIALIZE_PASS(RegAllocPriorityAdvisorAnalysis, "regalloc-priority",
+char RegAllocPriorityAdvisorAnalysisLegacy::ID = 0;
+INITIALIZE_PASS(RegAllocPriorityAdvisorAnalysisLegacy, "regalloc-priority",
"Regalloc priority policy", false, true)
namespace {
-class DefaultPriorityAdvisorAnalysis final
-: public RegAllocPriorityAdvisorAnalysis {
+
+class DefaultPriorityAdvisorProvider final
+: public RegAllocPriorityAdvisorProvider {
+public:
+ DefaultPriorityAdvisorProvider(bool NotAsRequested, LLVMContext &Ctx)
+ : RegAllocPriorityAdvisorProvider(AdvisorMode::Default) {
+if (NotAsRequested)
+ Ctx.emitError("Requested regalloc priority advisor analysis "
+"could be created. Using default");
+ }
+
+ // support for isa<> and dyn_cast.
+ static bool classof(const RegAllocPriorityAdvisorProvider *R) {
+return R->getAdvisorMode() == AdvisorMode::Default;
+ }
+
+ std::unique_ptr
+ getAdvisor(const MachineFunction &MF, const RAGreedy &RA,
+ SlotIndexes &SI) override {
+return std::make_unique(MF, RA, &SI);
+ }
+};
+
+class DummyPriorityAdvisorProvider final
+: public RegAllocPriorityAdvisorProvider {
+public:
+ DummyPriorityAdvisorProvider()
+ : RegAllocPriorityAdvisorProvider(AdvisorMode::Dummy) {}
+
+ static bool classof(const RegAllocPriorityAdvisorProvider *R) {
+return R->getAdvisorMode() == AdvisorMode::Dummy;
+ }
+
+ std::unique_ptr
+ getAdvisor(const MachineFunction &MF, const RAGreedy &RA,
+ SlotIndexes &SI) override {
+return std::make_unique(MF, RA, &SI);
+ }
+};
+
+class DefaultPriorityAdvisorAnalysisLegacy final
+: public RegAllocPriorityAdvisorAnalysisLegacy {
public:
- DefaultPriorityAdvisorAnalysis(bool NotAsRequested)
- : RegAllocPriorityAdvisorAnalysis(AdvisorMode::Default),
+ DefaultPriorityAdvisorAnalysisLegacy(bool NotAsRequested)
+ : RegAllocPriorityAdvisorAnalysisLegacy(AdvisorMode::Default),
NotAsRequested(NotAsRequested) {}
// support for isa<> and dyn_cast.
- static bool classof(const RegAllocPriorityAdvisorAnalysis *R) {
+ static bool classof(const RegAllocPriorityAdvisorAnalysisLegacy *R) {
return R->getAdvisorMode() == AdvisorMode::Default;
}
private:
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired();
-RegAllocPriorityAdvisorAnalysis::getAnalysisUsage(AU);
- }
- std::unique_ptr
- getAdvisor(const MachineFunction &MF, const RAGreedy &RA) override {
-return std::make_unique(
-MF, RA, &getAnalysis().getSI());
+RegAllocPriorityAdvisorAnalysisLegacy::getAnalysisUsage(AU);
}
+
bool doInitialization(Module &M) override {
-if (NotAsRequested)
- M.getContext().emitError("Requested regalloc priority advisor analysis "
- "could be created. Using default");
-return RegAllocPriorityAdvisorAnalysis::doInitialization(M);
+Provider.reset(
+new DefaultPriorityAdvisorProvider(NotAsRequested, M.getContext()));
+return false;
}
+
const bool NotAsRequested;
};
class DummyPriorityAdvisorAnalysis final
-: public RegAllocPriorityAdvisorAnalysis {
+: public RegAllocPriorityAdvisorAnalysisLegacy {
public:
+ using RegAllocPriorityAdvisorAnalysisLegacy::AdvisorMode;
DummyPriorityAdvisorAnalysis()
- : RegAllocPriorityAdvisorAnalysis(AdvisorMode::Dummy) {}
+ : RegAllocPriorityAdvisorAnalysisLegacy(AdvisorMode::Dummy) {}
// support for isa<> and dyn_cast.
- static bool classof(const RegAllocPriorityAdvisorAnalysis *R) {
+ static bool classof(const RegAllocPriorityAdvisorAnalysisLegacy *R) {
return R->getAdvisorMode() == AdvisorMode::Dummy;
}
pr
[llvm-branch-commits] [llvm] release/20.x: [VPlan] Only use SCEV for live-ins in tryToWiden. (#125436) (PR #125659)
llvmbot wrote:
@llvm/pr-subscribers-vectorizers
Author: None (llvmbot)
Changes
Backport 30f3752e54fa7cd595a434a985efbe9a7abe9b65
Requested by: @fhahn
---
Full diff: https://github.com/llvm/llvm-project/pull/125659.diff
2 Files Affected:
- (modified) llvm/lib/Transforms/Vectorize/LoopVectorize.cpp (+6-2)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
(+14-27)
``diff
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 57b7358049bcef..c4b159117e2e84 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -6615,8 +6615,10 @@
LoopVectorizationCostModel::getInstructionCost(Instruction *I,
// fold away. We can generalize this for all operations using the notion
// of neutral elements. (TODO)
if (I->getOpcode() == Instruction::Mul &&
-(PSE.getSCEV(I->getOperand(0))->isOne() ||
- PSE.getSCEV(I->getOperand(1))->isOne()))
+((TheLoop->isLoopInvariant(I->getOperand(0)) &&
+ PSE.getSCEV(I->getOperand(0))->isOne()) ||
+ (TheLoop->isLoopInvariant(I->getOperand(1)) &&
+ PSE.getSCEV(I->getOperand(1))->isOne(
return 0;
// Detect reduction patterns
@@ -8566,6 +8568,8 @@ VPWidenRecipe *VPRecipeBuilder::tryToWiden(Instruction *I,
// to replace operands with constants.
ScalarEvolution &SE = *PSE.getSE();
auto GetConstantViaSCEV = [this, &SE](VPValue *Op) {
+if (!Op->isLiveIn())
+ return Op;
Value *V = Op->getUnderlyingValue();
if (isa(V) || !SE.isSCEVable(V->getType()))
return Op;
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
index 6b55f5291efd8c..a8d44421a3c37b 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
@@ -7,24 +7,10 @@ target triple = "arm64-apple-macosx"
define i64 @mul_select_operand_known_1_via_scev() {
; CHECK-LABEL: define i64 @mul_select_operand_known_1_via_scev() {
; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT:br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT:br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT:[[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [
[[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT:[[VEC_PHI:%.*]] = phi <2 x i64> [ ,
%[[VECTOR_PH]] ], [ [[VEC_PHI]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT:[[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
-; CHECK-NEXT:br i1 true, label %[[MIDDLE_BLOCK:.*]], label
%[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT:[[TMP0:%.*]] = call i64 @llvm.vector.reduce.mul.v2i64(<2 x
i64> [[VEC_PHI]])
-; CHECK-NEXT:br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
-; CHECK: [[SCALAR_PH]]:
-; CHECK-NEXT:[[BC_MERGE_RDX:%.*]] = phi i64 [ [[TMP0]], %[[MIDDLE_BLOCK]]
], [ 12, %[[ENTRY]] ]
-; CHECK-NEXT:[[BC_RESUME_VAL:%.*]] = phi i32 [ 2, %[[MIDDLE_BLOCK]] ], [
0, %[[ENTRY]] ]
; CHECK-NEXT:br label %[[LOOP:.*]]
; CHECK: [[LOOP]]:
-; CHECK-NEXT:[[RED:%.*]] = phi i64 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [
[[RED_NEXT:%.*]], %[[LOOP]] ]
-; CHECK-NEXT:[[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [
[[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT:[[RED:%.*]] = phi i64 [ 12, %[[ENTRY]] ], [ [[RED_NEXT:%.*]],
%[[LOOP]] ]
+; CHECK-NEXT:[[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]],
%[[LOOP]] ]
; CHECK-NEXT:[[TMP1:%.*]] = and i32 [[IV]], 1
; CHECK-NEXT:[[CMP1_I:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT:[[NARROW_I:%.*]] = select i1 [[CMP1_I]], i32 1, i32 [[IV]]
@@ -32,9 +18,9 @@ define i64 @mul_select_operand_known_1_via_scev() {
; CHECK-NEXT:[[RED_NEXT]] = mul nsw i64 [[RED]], [[MUL]]
; CHECK-NEXT:[[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; CHECK-NEXT:[[EC:%.*]] = icmp eq i32 [[IV]], 1
-; CHECK-NEXT:br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop
[[LOOP3:![0-9]+]]
+; CHECK-NEXT:br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
; CHECK: [[EXIT]]:
-; CHECK-NEXT:[[RES:%.*]] = phi i64 [ [[RED_NEXT]], %[[LOOP]] ], [
[[TMP0]], %[[MIDDLE_BLOCK]] ]
+; CHECK-NEXT:[[RES:%.*]] = phi i64 [ [[RED_NEXT]], %[[LOOP]] ]
; CHECK-NEXT:ret i64 [[RES]]
;
entry:
@@ -65,17 +51,20 @@ define i32
@add_reduction_select_operand_constant_but_non_uniform() {
; CHECK-NEXT:br label %[[VECTOR_BODY:.*]]
; CHECK: [[VECTOR_BODY]]:
; CHECK-NEXT:[[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [
[[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT:[[VEC_PHI:%.*]] = phi <4 x i32> [ , %[[VECTOR_PH]] ], [ splat (i32 42), %[[VECTOR_BODY]] ]
-; CHECK-NEXT:[[VEC_PHI1:%.*]] = phi <4
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM (PR #118462)
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/118462 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Add info about the gdb x packet into the release notes (PR #125680)
https://github.com/labath milestoned https://github.com/llvm/llvm-project/pull/125680 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Add info about the gdb x packet into the release notes (PR #125680)
https://github.com/labath edited https://github.com/llvm/llvm-project/pull/125680 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] release/20.x: [lldb] Add support for gdb-style 'x' packet (#124733) (PR #125653)
labath wrote: > I agree with backporting this. > > There should be a release note for it. I know we could get away without it > because the relevant GDB has not been out (maybe not at all) at this point, > but it'll be something easy to point to for us in a few years time, and GDB > folks who want to confirm what we did without reading our source code. > > I suggest: > > ``` > * Support was added for handling the GDB Remote Protocol `x` packet in the > format introduced by GDB . LLDB currently uses a different format > for `x` and LLDB is now able to handle both formats. At some point in the > future support for LLDB's format of `x` will be removed. > ``` > > I think this can be done as a PR to the release branch? No need to complicate > this one. SG ~> #125680 > > And it would be good to add a note to > https://lldb.llvm.org/resources/lldbgdbremote.html#x-binary-memory-read (just > on `main`) that says something like: > > ``` > The format of this packet was decided before GDB introduced its own > format for x. Future versions of LLDB may not support the following format, > and new code should produce and expect the format used by GDB. > ``` Yes, I've been meaning to do that. Thanks for reminding me. ~> #125682 https://github.com/llvm/llvm-project/pull/125653 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang] NFC: rename MatchedPackOnParmToNonPackOnArg to StrictPackMatch (PR #125418)
https://github.com/mizvekov updated
https://github.com/llvm/llvm-project/pull/125418
>From f558c5838c48e47b62d3d0a3b5118c96d9ff47ec Mon Sep 17 00:00:00 2001
From: Matheus Izvekov
Date: Sun, 2 Feb 2025 13:31:20 -0300
Subject: [PATCH] [clang] NFC: rename MatchedPackOnParmToNonPackOnArg to
StrictPackMatch
This rename follows the proposed wording in P3310R5, which introduces
the term 'strict pack match' to refer to the same thing.
---
clang/include/clang/AST/DeclTemplate.h| 12 +++
clang/include/clang/Sema/Overload.h | 5 ++-
clang/include/clang/Sema/Sema.h | 33 +--
clang/include/clang/Sema/TemplateDeduction.h | 10 ++
clang/lib/AST/ASTImporter.cpp | 8 ++---
clang/lib/AST/DeclTemplate.cpp| 18 --
clang/lib/AST/JSONNodeDumper.cpp | 2 +-
clang/lib/AST/TextNodeDumper.cpp | 2 +-
clang/lib/Sema/SemaOverload.cpp | 30 +++--
clang/lib/Sema/SemaTemplate.cpp | 29
clang/lib/Sema/SemaTemplateDeduction.cpp | 21 ++--
clang/lib/Sema/SemaTemplateInstantiate.cpp| 16 -
.../lib/Sema/SemaTemplateInstantiateDecl.cpp | 2 +-
clang/lib/Sema/SemaType.cpp | 3 +-
clang/lib/Serialization/ASTReaderDecl.cpp | 2 +-
clang/lib/Serialization/ASTWriterDecl.cpp | 2 +-
16 files changed, 85 insertions(+), 110 deletions(-)
diff --git a/clang/include/clang/AST/DeclTemplate.h
b/clang/include/clang/AST/DeclTemplate.h
index 03c43765206b18..87406b0e030df1 100644
--- a/clang/include/clang/AST/DeclTemplate.h
+++ b/clang/include/clang/AST/DeclTemplate.h
@@ -1842,11 +1842,11 @@ class ClassTemplateSpecializationDecl : public
CXXRecordDecl,
unsigned SpecializationKind : 3;
/// Indicate that we have matched a parameter pack with a non pack
- /// argument, when the opposite match is also allowed (strict pack match).
+ /// argument, when the opposite match is also allowed.
/// This needs to be cached as deduction is performed during declaration,
/// and we need the information to be preserved so that it is consistent
/// during instantiation.
- bool MatchedPackOnParmToNonPackOnArg : 1;
+ bool StrictPackMatch : 1;
protected:
ClassTemplateSpecializationDecl(ASTContext &Context, Kind DK, TagKind TK,
@@ -1854,7 +1854,7 @@ class ClassTemplateSpecializationDecl : public
CXXRecordDecl,
SourceLocation IdLoc,
ClassTemplateDecl *SpecializedTemplate,
ArrayRef Args,
- bool MatchedPackOnParmToNonPackOnArg,
+ bool StrictPackMatch,
ClassTemplateSpecializationDecl *PrevDecl);
ClassTemplateSpecializationDecl(ASTContext &C, Kind DK);
@@ -1867,7 +1867,7 @@ class ClassTemplateSpecializationDecl : public
CXXRecordDecl,
Create(ASTContext &Context, TagKind TK, DeclContext *DC,
SourceLocation StartLoc, SourceLocation IdLoc,
ClassTemplateDecl *SpecializedTemplate,
- ArrayRef Args, bool MatchedPackOnParmToNonPackOnArg,
+ ArrayRef Args, bool StrictPackMatch,
ClassTemplateSpecializationDecl *PrevDecl);
static ClassTemplateSpecializationDecl *CreateDeserialized(ASTContext &C,
GlobalDeclID ID);
@@ -1938,9 +1938,7 @@ class ClassTemplateSpecializationDecl : public
CXXRecordDecl,
SpecializationKind = TSK;
}
- bool hasMatchedPackOnParmToNonPackOnArg() const {
-return MatchedPackOnParmToNonPackOnArg;
- }
+ bool hasStrictPackMatch() const { return StrictPackMatch; }
/// Get the point of instantiation (if any), or null if none.
SourceLocation getPointOfInstantiation() const {
diff --git a/clang/include/clang/Sema/Overload.h
b/clang/include/clang/Sema/Overload.h
index c7f2422b542dd1..c03ec00d03dc50 100644
--- a/clang/include/clang/Sema/Overload.h
+++ b/clang/include/clang/Sema/Overload.h
@@ -933,7 +933,7 @@ class Sema;
/// Have we matched any packs on the parameter side, versus any non-packs
on
/// the argument side, in a context where the opposite matching is also
/// allowed?
-bool HasMatchedPackOnParmToNonPackOnArg : 1;
+bool StrictPackMatch : 1;
/// True if the candidate was found using ADL.
LLVM_PREFERRED_TYPE(CallExpr::ADLCallKind)
@@ -1010,8 +1010,7 @@ class Sema;
friend class OverloadCandidateSet;
OverloadCandidate()
: IsSurrogate(false), IgnoreObjectArgument(false),
- TookAddressOfOverload(false),
- HasMatchedPackOnParmToNonPackOnArg(false),
+ TookAddressOfOverload(false), StrictPackMatch(false),
IsADLCandidate(llvm::to_underlying(CallExpr::NotADL)),
RewriteKind(CRK_None) {}
};
diff --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h
[llvm-branch-commits] [llvm] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (PR #120557)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/120557
>From e777f38f1bbeb99631ff4eaf02580f73440b3ff2 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 11 Dec 2024 10:57:21 +
Subject: [PATCH 1/4] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline
---
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 18 +++-
.../llvm/Passes/MachinePassRegistry.def | 4 ++--
.../include/llvm/Target/CGPassBuilderOption.h | 2 +-
llvm/lib/Passes/PassBuilder.cpp | 13
...plicit-def-remat-requires-impdef-check.mir | 1 +
...implicit-def-with-impdef-greedy-assert.mir | 1 +
llvm/test/CodeGen/AArch64/pr51516.mir | 1 +
llvm/test/CodeGen/AArch64/spill-fold.mir | 2 ++
.../extend-phi-subrange-not-in-parent.mir | 1 +
llvm/test/CodeGen/MIR/Generic/runPass.mir | 1 +
.../SystemZ/clear-liverange-spillreg.mir | 1 +
llvm/test/CodeGen/Thumb/high-reg-clobber.mir | 1 +
llvm/test/CodeGen/X86/limit-split-cost.mir| 1 +
.../test/tools/llc/new-pm/regalloc-amdgpu.mir | 17 +--
llvm/tools/llc/NewPMDriver.cpp| 21 +++
15 files changed, 71 insertions(+), 14 deletions(-)
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index aca9b3b888acc3..971217923f7ef1 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -1056,7 +1056,7 @@ void CodeGenPassBuilder::addMachineSSAOptimization(
///
/// A target that uses the standard regalloc pass order for fast or optimized
/// allocation may still override this for per-target regalloc
-/// selection. But -regalloc=... always takes precedence.
+/// selection. But -regalloc-npm=... always takes precedence.
template
void CodeGenPassBuilder::addTargetRegisterAllocator(
AddMachinePass &addPass, bool Optimized) const {
@@ -1073,6 +1073,22 @@ template
void CodeGenPassBuilder::addRegAllocPass(
AddMachinePass &addPass, bool Optimized) const {
// TODO: Parse Opt.RegAlloc to add register allocator.
+ // Use the specified -regalloc-npm={basic|greedy|fast|pbqp}
+ if (Opt.RegAlloc > RegAllocType::Default) {
+switch (Opt.RegAlloc) {
+ case RegAllocType::Fast:
+addPass(RegAllocFastPass());
+break;
+ case RegAllocType::Greedy:
+addPass(RAGreedyPass());
+break;
+ default:
+llvm_unreachable("Register allocator not supported yet.");
+}
+return;
+ }
+ // -regalloc=default or unspecified, so pick based on the optimization level.
+ derived().addTargetRegisterAllocator(addPass, Optimized);
}
template
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 52fabeb361f706..e6bb4c0de3d72c 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -188,12 +188,12 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS(
},
"filter=reg-filter;no-clear-vregs")
+// 'all' is the default filter
MACHINE_FUNCTION_PASS_WITH_PARAMS(
"greedy", "RAGreedyPass",
[](RAGreedyPass::Options Opts) { return RAGreedyPass(Opts); },
[PB = this](StringRef Params) {
- // TODO: parseRegAllocGreedyFilterFunc(*PB, Params);
- return Expected(RAGreedyPass::Options{});
+ return parseRegAllocGreedyFilterFunc(*PB, Params);
}, "reg-filter"
)
#undef MACHINE_FUNCTION_PASS_WITH_PARAMS
diff --git a/llvm/include/llvm/Target/CGPassBuilderOption.h
b/llvm/include/llvm/Target/CGPassBuilderOption.h
index d3d19c8a7dc9f2..c7c1572bcde603 100644
--- a/llvm/include/llvm/Target/CGPassBuilderOption.h
+++ b/llvm/include/llvm/Target/CGPassBuilderOption.h
@@ -52,7 +52,7 @@ struct CGPassBuilderOption {
bool RequiresCodeGenSCCOrder = false;
RunOutliner EnableMachineOutliner = RunOutliner::TargetDefault;
- StringRef RegAlloc = "default";
+ RegAllocType RegAlloc = RegAllocType::Default;
std::optional EnableGlobalISelAbort;
std::string FSProfileFile;
std::string FSRemappingFile;
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index 73f45d9b73b209..9ac536aa087093 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -1407,6 +1407,19 @@ parseBoundsCheckingOptions(StringRef Params) {
return Options;
}
+Expected parseRegAllocGreedyFilterFunc(PassBuilder &PB,
StringRef Params) {
+ if (Params.empty() || Params == "all") {
+return RAGreedyPass::Options();
+ }
+ std::optional Filter = PB.parseRegAllocFilter(Params);
+ if (!Filter) {
+return make_error(
+formatv("invalid regallocgreedy register filter '{0}' ", Params).str(),
+inconvertibleErrorCode());
+ }
+ return RAGreedyPass::Options{*Filter, Params};
+}
+
} // namespace
/// Tests whether a pass name starts with a valid prefix for a default pipeline
diff --git
a/llvm/test/CodeGen/AArch64/imp
[llvm-branch-commits] [llvm] AMDGPU: Add baseline test for treating v_pk_mov_b32 like reg_sequence (PR #125656)
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/125656
None
>From 10c3b75437159be1e89ab8c7bd952d384d2ca966 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Tue, 4 Feb 2025 14:16:32 +0700
Subject: [PATCH] AMDGPU: Add baseline test for treating v_pk_mov_b32 like
reg_sequence
---
.../AMDGPU/reg-sequence-like-v-pk-mov-b32.mir | 413 ++
1 file changed, 413 insertions(+)
create mode 100644 llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
diff --git a/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
b/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
new file mode 100644
index 00..90291221e8e178
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
@@ -0,0 +1,413 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
UTC_ARGS: --version 5
+# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=peephole-opt -o - %s |
FileCheck %s
+
+---
+name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_1_0
+tracksRegLiveness: true
+body: |
+ bb.0:
+liveins: $vgpr0, $vgpr1
+
+; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_1_0
+; CHECK: liveins: $vgpr0, $vgpr1
+; CHECK-NEXT: {{ $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE
[[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
+; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12,
[[REG_SEQUENCE]], 8, [[REG_SEQUENCE]], 0, 0, 0, 0, 0, implicit $exec
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0
+; CHECK-NEXT: $vgpr4 = COPY [[COPY2]]
+; CHECK-NEXT: $vgpr5 = COPY [[COPY3]]
+; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+%0:vgpr_32 = COPY $vgpr0
+%1:vgpr_32 = COPY $vgpr1
+%2:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
+%3:vreg_64_align2 = V_PK_MOV_B32 12, %2, 8, %2, 0, 0, 0, 0, 0, implicit
$exec
+%4:vgpr_32 = COPY %3.sub1
+%5:vgpr_32 = COPY %3.sub0
+$vgpr4 = COPY %4
+$vgpr5 = COPY %5
+S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+
+...
+
+---
+name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0
+tracksRegLiveness: true
+body: |
+ bb.0:
+liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+
+; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0
+; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+; CHECK-NEXT: {{ $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3
+; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE
[[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
+; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE
[[COPY2]], %subreg.sub0, [[COPY3]], %subreg.sub1
+; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12,
[[REG_SEQUENCE]], 8, [[REG_SEQUENCE1]], 0, 0, 0, 0, 0, implicit $exec
+; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1
+; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0
+; CHECK-NEXT: $vgpr4 = COPY [[COPY4]]
+; CHECK-NEXT: $vgpr5 = COPY [[COPY5]]
+; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+%0:vgpr_32 = COPY $vgpr0
+%1:vgpr_32 = COPY $vgpr1
+%2:vgpr_32 = COPY $vgpr2
+%3:vgpr_32 = COPY $vgpr3
+%4:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
+%5:vreg_64_align2 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1
+%6:vreg_64_align2 = V_PK_MOV_B32 12, %4, 8, %5, 0, 0, 0, 0, 0, implicit
$exec
+%7:vgpr_32 = COPY %6.sub1
+%8:vgpr_32 = COPY %6.sub0
+$vgpr4 = COPY %7
+$vgpr5 = COPY %8
+S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+
+...
+
+---
+name: v_pk_mov_b32__reg_sequence_shuffle_sgpr_sgpr_1_0
+tracksRegLiveness: true
+body: |
+ bb.0:
+liveins: $sgpr8, $sgpr9
+
+; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_sgpr_sgpr_1_0
+; CHECK: liveins: $sgpr8, $sgpr9
+; CHECK-NEXT: {{ $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr8
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr9
+; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]],
%subreg.sub0, [[COPY1]], %subreg.sub1
+; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12,
[[REG_SEQUENCE]], 8, [[REG_SEQUENCE]], 0, 0, 0, 0, 0, implicit $exec
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0
+; CHECK-NEXT: $vgpr4 = COPY [[COPY2]]
+; CHECK-NEXT: $vgpr
[llvm-branch-commits] [llvm] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM (PR #125351)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/125351
>From 1336185aae43251e8e1f4b4eddd69e78126de9d9 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Sat, 1 Feb 2025 18:21:24 +
Subject: [PATCH 1/2] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM
---
llvm/lib/Target/AMDGPU/AMDGPU.h | 2 +-
llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def | 2 +-
.../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 3 +-
.../AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 42 ++-
.../AMDGPU/SIOptimizeExecMaskingPreRA.h | 24 +++
.../CodeGen/AMDGPU/collapse-endcf-broken.mir | 1 +
...ask-pre-ra-non-empty-but-used-interval.mir | 1 +
7 files changed, 62 insertions(+), 13 deletions(-)
create mode 100644 llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.h
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index 31656c98ccd36f..692eb937efa674 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -368,7 +368,7 @@ struct AMDGPUUnifyMetadataPass :
PassInfoMixin {
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
-void initializeSIOptimizeExecMaskingPreRAPass(PassRegistry&);
+void initializeSIOptimizeExecMaskingPreRALegacyPass(PassRegistry &);
extern char &SIOptimizeExecMaskingPreRAID;
void initializeSIOptimizeVGPRLiveRangeLegacyPass(PassRegistry &);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
index 45e2f0d9097adf..95d82ae407e677 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
@@ -108,6 +108,7 @@ MACHINE_FUNCTION_PASS("si-lower-sgpr-spills",
SILowerSGPRSpillsPass())
MACHINE_FUNCTION_PASS("si-lower-wwm-copies", SILowerWWMCopiesPass())
MACHINE_FUNCTION_PASS("si-opt-vgpr-liverange", SIOptimizeVGPRLiveRangePass())
MACHINE_FUNCTION_PASS("si-optimize-exec-masking", SIOptimizeExecMaskingPass())
+MACHINE_FUNCTION_PASS("si-optimize-exec-masking-pre-ra",
SIOptimizeExecMaskingPreRAPass())
MACHINE_FUNCTION_PASS("si-peephole-sdwa", SIPeepholeSDWAPass())
MACHINE_FUNCTION_PASS("si-pre-allocate-wwm-regs", SIPreAllocateWWMRegsPass())
MACHINE_FUNCTION_PASS("si-shrink-instructions", SIShrinkInstructionsPass())
@@ -127,7 +128,6 @@ DUMMY_MACHINE_FUNCTION_PASS("si-insert-waitcnts",
SIInsertWaitcntsPass())
DUMMY_MACHINE_FUNCTION_PASS("si-late-branch-lowering",
SILateBranchLoweringPass())
DUMMY_MACHINE_FUNCTION_PASS("si-memory-legalizer", SIMemoryLegalizerPass())
DUMMY_MACHINE_FUNCTION_PASS("si-mode-register", SIModeRegisterPass())
-DUMMY_MACHINE_FUNCTION_PASS("si-optimize-exec-masking-pre-ra",
SIOptimizeExecMaskingPreRAPass())
DUMMY_MACHINE_FUNCTION_PASS("si-pre-emit-peephole", SIPreEmitPeepholePass())
// TODO: Move amdgpu-preload-kern-arg-prolog to MACHINE_FUNCTION_PASS since it
// already exists.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index d21f9c846c9513..27dc5a502d109b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -46,6 +46,7 @@
#include "SIMachineFunctionInfo.h"
#include "SIMachineScheduler.h"
#include "SIOptimizeExecMasking.h"
+#include "SIOptimizeExecMaskingPreRA.h"
#include "SIOptimizeVGPRLiveRange.h"
#include "SIPeepholeSDWA.h"
#include "SIPreAllocateWWMRegs.h"
@@ -495,7 +496,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void
LLVMInitializeAMDGPUTarget() {
initializeSIFoldOperandsLegacyPass(*PR);
initializeSIPeepholeSDWALegacyPass(*PR);
initializeSIShrinkInstructionsLegacyPass(*PR);
- initializeSIOptimizeExecMaskingPreRAPass(*PR);
+ initializeSIOptimizeExecMaskingPreRALegacyPass(*PR);
initializeSIOptimizeVGPRLiveRangeLegacyPass(*PR);
initializeSILoadStoreOptimizerLegacyPass(*PR);
initializeAMDGPUCtorDtorLoweringLegacyPass(*PR);
diff --git a/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
b/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
index 31f65d82a4d2bc..2a8a398d7429d0 100644
--- a/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
+++ b/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
@@ -12,6 +12,7 @@
///
//===--===//
+#include "SIOptimizeExecMaskingPreRA.h"
#include "AMDGPU.h"
#include "GCNSubtarget.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
@@ -25,7 +26,7 @@ using namespace llvm;
namespace {
-class SIOptimizeExecMaskingPreRA : public MachineFunctionPass {
+class SIOptimizeExecMaskingPreRA {
private:
const SIRegisterInfo *TRI;
const SIInstrInfo *TII;
@@ -42,11 +43,18 @@ class SIOptimizeExecMaskingPreRA : public
MachineFunctionPass {
bool optimizeVcndVcmpPair(MachineBasicBlock &MBB);
bool optimizeElseBranch(MachineBasicBlock &MBB);
+public:
+ SIOptimizeExecMaskingPreRA(LiveIntervals *LIS) : LIS(LIS) {}
+ bool run(MachineFunction &MF);
+};
+
+class
[llvm-branch-commits] [llvm] AMDGPU: Add baseline test for treating v_pk_mov_b32 like reg_sequence (PR #125656)
arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/125656?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#125657** https://app.graphite.dev/github/pr/llvm/llvm-project/125657?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#125656** https://app.graphite.dev/github/pr/llvm/llvm-project/125656?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/125656?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#125535** https://app.graphite.dev/github/pr/llvm/llvm-project/125535?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#125533** https://app.graphite.dev/github/pr/llvm/llvm-project/125533?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#125224** https://app.graphite.dev/github/pr/llvm/llvm-project/125224?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/125656 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] WIP: AMDGPU: Implement getRegSequenceLikeInputs for v_pk_mov_b32 (PR #125657)
arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/125657?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#125657** https://app.graphite.dev/github/pr/llvm/llvm-project/125657?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/125657?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#125656** https://app.graphite.dev/github/pr/llvm/llvm-project/125656?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#125535** https://app.graphite.dev/github/pr/llvm/llvm-project/125535?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#125533** https://app.graphite.dev/github/pr/llvm/llvm-project/125533?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#125224** https://app.graphite.dev/github/pr/llvm/llvm-project/125224?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/125657 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Add baseline test for treating v_pk_mov_b32 like reg_sequence (PR #125656)
https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/125656 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] WIP: AMDGPU: Implement getRegSequenceLikeInputs for v_pk_mov_b32 (PR #125657)
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
In principle we need this analysis to avoid regressions when
using v_pk_mov_b32 when shuffling to physical register inputs. However,
as it stands this only introduces regressions by decomposing every
useful case where we benefit from the instruction.
---
Patch is 379.75 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/125657.diff
13 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.cpp (+34)
- (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.h (+3)
- (modified) llvm/lib/Target/AMDGPU/VOP3PInstructions.td (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
(+14-14)
- (modified) llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v2f32.ll (+121-89)
- (modified) llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v3f32.ll (+143-129)
- (modified) llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v4f32.ll (+466-343)
- (modified) llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v2i32.ll (+121-89)
- (modified) llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v3i32.ll (+143-129)
- (modified) llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v4i32.ll (+466-343)
- (modified) llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v2p3.ll (+121-89)
- (modified) llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v3p3.ll (+143-129)
- (modified) llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v4p3.ll (+466-343)
``diff
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 35667801c809d5..3cae838321885d 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -9725,6 +9725,40 @@ MachineInstr *SIInstrInfo::foldMemoryOperandImpl(
return nullptr;
}
+bool SIInstrInfo::getRegSequenceLikeInputs(
+const MachineInstr &MI, unsigned DefIdx,
+SmallVectorImpl &InputRegs) const {
+ assert(MI.getOpcode() == AMDGPU::V_PK_MOV_B32 &&
+ "v_pk_mov_b32 is the only reg-sequence like instruction");
+ assert(DefIdx == 0);
+
+ unsigned Src0Mods = MI.getOperand(1).getImm();
+ const MachineOperand &Src0 = MI.getOperand(2);
+ unsigned Src1Mods = MI.getOperand(3).getImm();
+ const MachineOperand &Src1 = MI.getOperand(4);
+
+ unsigned SubReg0 =
+ Src0Mods & SISrcMods::OP_SEL_0 ? AMDGPU::sub1 : AMDGPU::sub0;
+ unsigned SubReg1 =
+ Src1Mods & SISrcMods::OP_SEL_0 ? AMDGPU::sub1 : AMDGPU::sub0;
+
+ if (!Src0.isUndef()) {
+// src0 will provide the result sub0 from src0.
+SubReg0 = RI.composeSubRegIndices(Src0.getSubReg(), SubReg0);
+InputRegs.push_back(
+RegSubRegPairAndIdx(Src0.getReg(), SubReg0, AMDGPU::sub0));
+ }
+
+ if (!Src1.isUndef()) {
+// src1 will provide the result's sub1 from src1.
+SubReg1 = RI.composeSubRegIndices(Src1.getSubReg(), SubReg1);
+InputRegs.push_back(
+RegSubRegPairAndIdx(Src1.getReg(), SubReg1, AMDGPU::sub1));
+ }
+
+ return true;
+}
+
unsigned SIInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
const MachineInstr &MI,
unsigned *PredCost) const {
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 933935a86f9f98..425ff77e8cdc3f 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -1437,6 +1437,9 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
int FrameIndex,
LiveIntervals *LIS = nullptr,
VirtRegMap *VRM = nullptr) const
override;
+ bool getRegSequenceLikeInputs(
+ const MachineInstr &MI, unsigned DefIdx,
+ SmallVectorImpl &InputRegs) const override;
unsigned getInstrLatency(const InstrItineraryData *ItinData,
const MachineInstr &MI,
diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
index 1afd68767cd3ba..a6f8035e93b182 100644
--- a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
@@ -1107,7 +1107,7 @@ let isCommutable = 1, isReMaterializable = 1 in {
defm V_PK_ADD_F32 : VOP3PInst<"v_pk_add_f32",
VOP3P_Profile, any_fadd>;
} // End SubtargetPredicate = HasPackedFP32Ops
- let SubtargetPredicate = HasPkMovB32 in
+ let SubtargetPredicate = HasPkMovB32, isRegSequence = 1 in
defm V_PK_MOV_B32 : VOP3PInst<"v_pk_mov_b32",
VOP3P_Profile>;
} // End isCommutable = 1, isReMaterializable = 1
diff --git a/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
b/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
index 90291221e8e178..602fc29bf1db36 100644
--- a/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
+++ b/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
@@ -15,8 +15,8 @@ body: |
; CHECK-NEXT: [[COPY
[llvm-branch-commits] [llvm] AMDGPU: Add baseline test for treating v_pk_mov_b32 like reg_sequence (PR #125656)
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
---
Patch is 20.10 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/125656.diff
1 Files Affected:
- (added) llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir (+413)
``diff
diff --git a/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
b/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
new file mode 100644
index 00..90291221e8e178
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
@@ -0,0 +1,413 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
UTC_ARGS: --version 5
+# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=peephole-opt -o - %s |
FileCheck %s
+
+---
+name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_1_0
+tracksRegLiveness: true
+body: |
+ bb.0:
+liveins: $vgpr0, $vgpr1
+
+; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_1_0
+; CHECK: liveins: $vgpr0, $vgpr1
+; CHECK-NEXT: {{ $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE
[[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
+; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12,
[[REG_SEQUENCE]], 8, [[REG_SEQUENCE]], 0, 0, 0, 0, 0, implicit $exec
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0
+; CHECK-NEXT: $vgpr4 = COPY [[COPY2]]
+; CHECK-NEXT: $vgpr5 = COPY [[COPY3]]
+; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+%0:vgpr_32 = COPY $vgpr0
+%1:vgpr_32 = COPY $vgpr1
+%2:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
+%3:vreg_64_align2 = V_PK_MOV_B32 12, %2, 8, %2, 0, 0, 0, 0, 0, implicit
$exec
+%4:vgpr_32 = COPY %3.sub1
+%5:vgpr_32 = COPY %3.sub0
+$vgpr4 = COPY %4
+$vgpr5 = COPY %5
+S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+
+...
+
+---
+name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0
+tracksRegLiveness: true
+body: |
+ bb.0:
+liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+
+; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0
+; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+; CHECK-NEXT: {{ $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3
+; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE
[[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
+; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE
[[COPY2]], %subreg.sub0, [[COPY3]], %subreg.sub1
+; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12,
[[REG_SEQUENCE]], 8, [[REG_SEQUENCE1]], 0, 0, 0, 0, 0, implicit $exec
+; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1
+; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0
+; CHECK-NEXT: $vgpr4 = COPY [[COPY4]]
+; CHECK-NEXT: $vgpr5 = COPY [[COPY5]]
+; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+%0:vgpr_32 = COPY $vgpr0
+%1:vgpr_32 = COPY $vgpr1
+%2:vgpr_32 = COPY $vgpr2
+%3:vgpr_32 = COPY $vgpr3
+%4:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
+%5:vreg_64_align2 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1
+%6:vreg_64_align2 = V_PK_MOV_B32 12, %4, 8, %5, 0, 0, 0, 0, 0, implicit
$exec
+%7:vgpr_32 = COPY %6.sub1
+%8:vgpr_32 = COPY %6.sub0
+$vgpr4 = COPY %7
+$vgpr5 = COPY %8
+S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+
+...
+
+---
+name: v_pk_mov_b32__reg_sequence_shuffle_sgpr_sgpr_1_0
+tracksRegLiveness: true
+body: |
+ bb.0:
+liveins: $sgpr8, $sgpr9
+
+; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_sgpr_sgpr_1_0
+; CHECK: liveins: $sgpr8, $sgpr9
+; CHECK-NEXT: {{ $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr8
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr9
+; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]],
%subreg.sub0, [[COPY1]], %subreg.sub1
+; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12,
[[REG_SEQUENCE]], 8, [[REG_SEQUENCE]], 0, 0, 0, 0, 0, implicit $exec
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0
+; CHECK-NEXT: $vgpr4 = COPY [[COPY2]]
+; CHECK-NEXT: $vgpr5 = COPY [[COPY3]]
+; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5
+%0:sreg_32 = COPY $sgpr8
+%1:sreg_32 = COPY $sgpr9
+%2:sreg_64 = R
[llvm-branch-commits] [llvm] WIP: AMDGPU: Implement getRegSequenceLikeInputs for v_pk_mov_b32 (PR #125657)
https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/125657 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] DAG: Avoid stack usage in bitcast operand promotion to legal vector (PR #125637)
arsenm wrote: ### Merge activity * **Feb 4, 4:28 AM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/125637). https://github.com/llvm/llvm-project/pull/125637 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] release/20.x: [lldb] Add support for gdb-style 'x' packet (#124733) (PR #125653)
DavidSpickett wrote: I agree with backporting this. There should be a release note for it. I know we could get away without it because the relevant GDB has not been out (maybe not at all) at this point, but it'll be something easy to point to for us in a few years time, and GDB folks who want to confirm what we did without reading our source code. I suggest: ``` * Support was added for handling the GDB Remote Protocol `x` packet in the format introduced by GDB . LLDB currently uses a different format for `x` and LLDB is now able to handle both formats. At some point in the future support for LLDB's format of `x` will be removed. ``` I think this can be done as a PR to the release branch? No need to complicate this one. And it would be good to add a note to https://lldb.llvm.org/resources/lldbgdbremote.html#x-binary-memory-read (just on `main`) that says something like: ``` The format of this packet was decided before GDB introduced its own format for x. Future versions of LLDB may not support the following format, and new code should produce and expect the format used by GDB. ``` https://github.com/llvm/llvm-project/pull/125653 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM (PR #118462)
@@ -20,107 +20,181 @@
using namespace llvm;
-static cl::opt Mode(
+static cl::opt Mode(
"regalloc-enable-priority-advisor", cl::Hidden,
-cl::init(RegAllocPriorityAdvisorAnalysis::AdvisorMode::Default),
+cl::init(RegAllocPriorityAdvisorProvider::AdvisorMode::Default),
cl::desc("Enable regalloc advisor mode"),
cl::values(
-clEnumValN(RegAllocPriorityAdvisorAnalysis::AdvisorMode::Default,
+clEnumValN(RegAllocPriorityAdvisorProvider::AdvisorMode::Default,
"default", "Default"),
-clEnumValN(RegAllocPriorityAdvisorAnalysis::AdvisorMode::Release,
+clEnumValN(RegAllocPriorityAdvisorProvider::AdvisorMode::Release,
"release", "precompiled"),
-clEnumValN(RegAllocPriorityAdvisorAnalysis::AdvisorMode::Development,
+clEnumValN(RegAllocPriorityAdvisorProvider::AdvisorMode::Development,
"development", "for training"),
clEnumValN(
-RegAllocPriorityAdvisorAnalysis::AdvisorMode::Dummy, "dummy",
+RegAllocPriorityAdvisorProvider::AdvisorMode::Dummy, "dummy",
"prioritize low virtual register numbers for test and debug")));
-char RegAllocPriorityAdvisorAnalysis::ID = 0;
-INITIALIZE_PASS(RegAllocPriorityAdvisorAnalysis, "regalloc-priority",
+char RegAllocPriorityAdvisorAnalysisLegacy::ID = 0;
+INITIALIZE_PASS(RegAllocPriorityAdvisorAnalysisLegacy, "regalloc-priority",
"Regalloc priority policy", false, true)
namespace {
-class DefaultPriorityAdvisorAnalysis final
-: public RegAllocPriorityAdvisorAnalysis {
+
+class DefaultPriorityAdvisorProvider final
+: public RegAllocPriorityAdvisorProvider {
+public:
+ DefaultPriorityAdvisorProvider(bool NotAsRequested, LLVMContext &Ctx)
+ : RegAllocPriorityAdvisorProvider(AdvisorMode::Default) {
+if (NotAsRequested)
+ Ctx.emitError("Requested regalloc priority advisor analysis "
+"could be created. Using default");
+ }
+
+ // support for isa<> and dyn_cast.
+ static bool classof(const RegAllocPriorityAdvisorProvider *R) {
+return R->getAdvisorMode() == AdvisorMode::Default;
+ }
+
+ std::unique_ptr
+ getAdvisor(const MachineFunction &MF, const RAGreedy &RA,
+ SlotIndexes &SI) override {
+return std::make_unique(MF, RA, &SI);
+ }
+};
+
+class DummyPriorityAdvisorProvider final
+: public RegAllocPriorityAdvisorProvider {
+public:
+ DummyPriorityAdvisorProvider()
+ : RegAllocPriorityAdvisorProvider(AdvisorMode::Dummy) {}
+
+ static bool classof(const RegAllocPriorityAdvisorProvider *R) {
+return R->getAdvisorMode() == AdvisorMode::Dummy;
+ }
+
+ std::unique_ptr
+ getAdvisor(const MachineFunction &MF, const RAGreedy &RA,
+ SlotIndexes &SI) override {
+return std::make_unique(MF, RA, &SI);
+ }
+};
+
+class DefaultPriorityAdvisorAnalysisLegacy final
+: public RegAllocPriorityAdvisorAnalysisLegacy {
public:
- DefaultPriorityAdvisorAnalysis(bool NotAsRequested)
- : RegAllocPriorityAdvisorAnalysis(AdvisorMode::Default),
+ DefaultPriorityAdvisorAnalysisLegacy(bool NotAsRequested)
+ : RegAllocPriorityAdvisorAnalysisLegacy(AdvisorMode::Default),
NotAsRequested(NotAsRequested) {}
// support for isa<> and dyn_cast.
- static bool classof(const RegAllocPriorityAdvisorAnalysis *R) {
+ static bool classof(const RegAllocPriorityAdvisorAnalysisLegacy *R) {
return R->getAdvisorMode() == AdvisorMode::Default;
}
private:
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired();
-RegAllocPriorityAdvisorAnalysis::getAnalysisUsage(AU);
- }
- std::unique_ptr
- getAdvisor(const MachineFunction &MF, const RAGreedy &RA) override {
-return std::make_unique(
-MF, RA, &getAnalysis().getSI());
+RegAllocPriorityAdvisorAnalysisLegacy::getAnalysisUsage(AU);
}
+
bool doInitialization(Module &M) override {
-if (NotAsRequested)
- M.getContext().emitError("Requested regalloc priority advisor analysis "
- "could be created. Using default");
-return RegAllocPriorityAdvisorAnalysis::doInitialization(M);
+Provider.reset(
+new DefaultPriorityAdvisorProvider(NotAsRequested, M.getContext()));
+return false;
}
+
const bool NotAsRequested;
};
class DummyPriorityAdvisorAnalysis final
-: public RegAllocPriorityAdvisorAnalysis {
+: public RegAllocPriorityAdvisorAnalysisLegacy {
public:
+ using RegAllocPriorityAdvisorAnalysisLegacy::AdvisorMode;
DummyPriorityAdvisorAnalysis()
- : RegAllocPriorityAdvisorAnalysis(AdvisorMode::Dummy) {}
+ : RegAllocPriorityAdvisorAnalysisLegacy(AdvisorMode::Dummy) {}
// support for isa<> and dyn_cast.
- static bool classof(const RegAllocPriorityAdvisorAnalysis *R) {
+ static bool classof(const RegAllocPriorityAdvisorAnalysisLegacy *R) {
return R->getAdvisorMode() == AdvisorMode::Dummy;
}
pr
[llvm-branch-commits] [clang] [X86][AVX10] Disable m[no-]avx10.1 and switch m[no-]avx10.2 to alias of 512 bit options (#124511) (PR #125057)
phoebewang wrote: @e-kud Please help review it. > It had the 'needs review' status and I missed it. We can get it into -rc2. Oh, I thought it notified reviewer automaticly. Maybe because it's manully cherry-pick. https://github.com/llvm/llvm-project/pull/125057 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Add info about the gdb x packet into the release notes (PR #125680)
https://github.com/labath created https://github.com/llvm/llvm-project/pull/125680 See also #125653. >From 3819df1b595c46dc393f107bf5fb6b3a21f7c185 Mon Sep 17 00:00:00 2001 From: Pavel Labath Date: Tue, 4 Feb 2025 14:02:53 +0100 Subject: [PATCH] Add info about the gdb x packet into the release notes See also #125653. --- llvm/docs/ReleaseNotes.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index e0acb8f48c5b940..9c86c3af9cbc3d0 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -590,6 +590,8 @@ Changes to LLDB * Incorrect floating-point register DWARF numbers for LoongArch were [fixed](https://github.com/llvm/llvm-project/pull/120391). +* Support was added for handling the GDB Remote Protocol `x` packet in the format introduced by GDB 16.2. LLDB currently uses a different format for `x` and LLDB is now able to handle both formats. At some point in the future support for LLDB's format of `x` will be removed. + Changes to BOLT - ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] WIP: [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)
https://github.com/tblah updated
https://github.com/llvm/llvm-project/pull/125307
>From afa9026eefb6c9cd613ed021a92e159f93c3667c Mon Sep 17 00:00:00 2001
From: Tom Eccles
Date: Fri, 24 Jan 2025 17:32:41 +
Subject: [PATCH 1/3] [mlir][OpenMP] Pack task private variables into a
heap-allocated context struct
See RFC:
https://discourse.llvm.org/t/rfc-openmp-supporting-delayed-task-execution-with-firstprivate-variables/83084
The aim here is to ensure that tasks which are not executed for a while
after they are created do not try to reference any data which are now
out of scope. This is done by packing the data referred to by the task
into a heap allocated structure (freed at the end of the task).
I decided to create the task context structure in
OpenMPToLLVMIRTranslation instead of adapting how it is done
CodeExtractor (via OpenMPIRBuilder] because CodeExtractor is (at least
in theory) generic code which could have other unrelated uses.
---
.../OpenMP/OpenMPToLLVMIRTranslation.cpp | 204 +++---
mlir/test/Target/LLVMIR/openmp-llvm.mlir | 5 +-
.../LLVMIR/openmp-task-privatization.mlir | 82 +++
3 files changed, 254 insertions(+), 37 deletions(-)
create mode 100644 mlir/test/Target/LLVMIR/openmp-task-privatization.mlir
diff --git
a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
index 8a9a69cefad8ee1..5c4deab492c8390 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
@@ -13,6 +13,7 @@
#include "mlir/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.h"
#include "mlir/Analysis/TopologicalSortUtils.h"
#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
+#include "mlir/Dialect/LLVMIR/LLVMTypes.h"
#include "mlir/Dialect/OpenMP/OpenMPDialect.h"
#include "mlir/Dialect/OpenMP/OpenMPInterfaces.h"
#include "mlir/IR/IRMapping.h"
@@ -24,10 +25,12 @@
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SetVector.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/TypeSwitch.h"
#include "llvm/Frontend/OpenMP/OMPConstants.h"
#include "llvm/Frontend/OpenMP/OMPIRBuilder.h"
#include "llvm/IR/DebugInfoMetadata.h"
+#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/IR/ReplaceConstant.h"
#include "llvm/Support/FileSystem.h"
@@ -1331,19 +1334,16 @@ findAssociatedValue(Value privateVar,
llvm::IRBuilderBase &builder,
/// Initialize a single (first)private variable. You probably want to use
/// allocateAndInitPrivateVars instead of this.
-static llvm::Error
-initPrivateVar(llvm::IRBuilderBase &builder,
- LLVM::ModuleTranslation &moduleTranslation,
- omp::PrivateClauseOp &privDecl, Value mlirPrivVar,
- BlockArgument &blockArg, llvm::Value *llvmPrivateVar,
- llvm::SmallVectorImpl &llvmPrivateVars,
- llvm::BasicBlock *privInitBlock,
- llvm::DenseMap *mappedPrivateVars = nullptr) {
+/// This returns the private variable which has been initialized. This
+/// variable should be mapped before constructing the body of the Op.
+static llvm::Expected initPrivateVar(
+llvm::IRBuilderBase &builder, LLVM::ModuleTranslation &moduleTranslation,
+omp::PrivateClauseOp &privDecl, Value mlirPrivVar, BlockArgument &blockArg,
+llvm::Value *llvmPrivateVar, llvm::BasicBlock *privInitBlock,
+llvm::DenseMap *mappedPrivateVars = nullptr) {
Region &initRegion = privDecl.getInitRegion();
if (initRegion.empty()) {
-moduleTranslation.mapValue(blockArg, llvmPrivateVar);
-llvmPrivateVars.push_back(llvmPrivateVar);
-return llvm::Error::success();
+return llvmPrivateVar;
}
// map initialization region block arguments
@@ -1363,17 +1363,15 @@ initPrivateVar(llvm::IRBuilderBase &builder,
assert(phis.size() == 1 && "expected one allocation to be yielded");
- // prefer the value yielded from the init region to the allocated private
- // variable in case the region is operating on arguments by-value (e.g.
- // Fortran character boxes).
- moduleTranslation.mapValue(blockArg, phis[0]);
- llvmPrivateVars.push_back(phis[0]);
-
// clear init region block argument mapping in case it needs to be
// re-created with a different source for another use of the same
// reduction decl
moduleTranslation.forgetMapping(initRegion);
- return llvm::Error::success();
+
+ // Prefer the value yielded from the init region to the allocated private
+ // variable in case the region is operating on arguments by-value (e.g.
+ // Fortran character boxes).
+ return phis[0];
}
/// Allocate and initialize delayed private variables. Returns the basic block
@@ -1415,11 +1413,13 @@ static llvm::Expected
allocateAndInitPrivateVars(
llvm::Value *llvmPrivateVar = builder.CreateAlloca(
llvmAllocType, /*ArraySize=*/nullptr, "omp.private.alloc");
-
[llvm-branch-commits] [mlir] WIP: [mlir][OpenMP] Pack task private variables into a heap-allocated context struct (PR #125307)
https://github.com/tblah edited https://github.com/llvm/llvm-project/pull/125307 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
