[llvm-branch-commits] [flang] [flang][CodeGen] Run PreCGRewrite on omp reduction declare ops (PR #84954)
https://github.com/tblah updated https://github.com/llvm/llvm-project/pull/84954
>From f951d16cf6cb1ab221f47ca2e712020b9af0af87 Mon Sep 17 00:00:00 2001
From: Tom Eccles
Date: Fri, 1 Mar 2024 16:59:09 +
Subject: [PATCH 1/3] [flang][CodeGen] Run PreCGRewrite on omp reduction
declare ops
OpenMP reduction declare operations can contain FIR code which needs to
be lowered to LLVM. With array reductions, these regions can contain
more complicated operations which need PreCGRewriting. A similar extra
case was already needed for fir::GlobalOp.
---
flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp | 5 +
1 file changed, 5 insertions(+)
diff --git a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
index 0170b56367cf3c..dd935e71762355 100644
--- a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
+++ b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
@@ -22,6 +22,7 @@
#include "mlir/Transforms/RegionUtils.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Debug.h"
+#include
namespace fir {
#define GEN_PASS_DEF_CODEGENREWRITE
@@ -319,6 +320,10 @@ class CodeGenRewrite : public
fir::impl::CodeGenRewriteBase {
runOn(func, func.getBody());
for (auto global : mod.getOps())
runOn(global, global.getRegion());
+for (auto omp : mod.getOps()) {
+ runOn(omp, omp.getInitializerRegion());
+ runOn(omp, omp.getReductionRegion());
+}
}
};
>From b909193418789d1bcb572b69070fdca9c2d35a7c Mon Sep 17 00:00:00 2001
From: Tom Eccles
Date: Thu, 14 Mar 2024 07:54:12 +
Subject: [PATCH 2/3] Fix include
---
flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
index dd935e71762355..097845e447842b 100644
--- a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
+++ b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
@@ -18,11 +18,11 @@
#include "flang/Optimizer/Dialect/FIROps.h"
#include "flang/Optimizer/Dialect/FIRType.h"
#include "flang/Optimizer/Dialect/Support/FIRContext.h"
+#include "mlir/Dialect/OpenMP/OpenMPDialect.h"
#include "mlir/Transforms/DialectConversion.h"
#include "mlir/Transforms/RegionUtils.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Debug.h"
-#include
namespace fir {
#define GEN_PASS_DEF_CODEGENREWRITE
>From 9d5026a16f4de4037d1fefa77d5c913085183150 Mon Sep 17 00:00:00 2001
From: Tom Eccles
Date: Thu, 14 Mar 2024 08:02:40 +
Subject: [PATCH 3/3] Run PreCGRewrite on all regions in the module
---
flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
index 097845e447842b..410e6400c9be14 100644
--- a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
+++ b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
@@ -284,7 +284,7 @@ class DeclareOpConversion : public
mlir::OpRewritePattern {
class CodeGenRewrite : public fir::impl::CodeGenRewriteBase {
public:
- void runOn(mlir::Operation *op, mlir::Region ®ion) {
+ void runOn(mlir::Operation *op) {
auto &context = getContext();
mlir::ConversionTarget target(context);
target.addLegalDialect {
void runOnOperation() override final {
// Call runOn on all top level regions that may contain
emboxOp/arrayCoorOp.
-auto mod = getOperation();
-for (auto func : mod.getOps())
- runOn(func, func.getBody());
-for (auto global : mod.getOps())
- runOn(global, global.getRegion());
-for (auto omp : mod.getOps()) {
- runOn(omp, omp.getInitializerRegion());
- runOn(omp, omp.getReductionRegion());
-}
+mlir::ModuleOp mod = getOperation();
+runOn(mod);
}
};
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[llvm-branch-commits] [flang] [flang][CodeGen] Run PreCGRewrite on omp reduction declare ops (PR #84954)
@@ -319,6 +320,10 @@ class CodeGenRewrite : public
fir::impl::CodeGenRewriteBase {
runOn(func, func.getBody());
for (auto global : mod.getOps())
runOn(global, global.getRegion());
+for (auto omp : mod.getOps()) {
tblah wrote:
Good idea. That does indeed work
https://github.com/llvm/llvm-project/pull/84954
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[llvm-branch-commits] [llvm] [AArch64][GlobalISel] Avoid splitting loads of large vector types into individual element loads (PR #85042)
https://github.com/davemgreen approved this pull request. Thanks. LGTM https://github.com/llvm/llvm-project/pull/85042 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] release/18.x: [mlir][NFC] Apply rule of five to *Pass classes (#80998) (PR #83971)
andrey-golubev wrote: > I think it's an ABI change (but I could be wrong), because some of the > implicit constructors are being deleted. What happens if a user of the > library was using these deleted constructors? I see your point. In this specific case, the special member functions were implicitly deleted anyway: the class used to have an explicit user-specified (non-default) copy ctor and that's about it. There is at least 1 member field in `Pass` that is non-movable and non-copyable. No copy-assignment operator -> implicitly deleted. No move semantics: move ctor would've dispatched to copy ctor, move assignment - implicitly deleted also. So the only case we've sacrificed with this patch is `X x(X())` (and other cases that call move ctor) - they are now rejected by the compiler instead of silently succeeding. Also, the users, I believe, are only within the inheritance chain, because all of this special member functions (except dtor) are under `protected` access specifier (unless there's some user lib that changes this at some lower level?). In any case, if there's already a released 18.0 then this change would only get into some other version and, as you mentioned, this is something you prefer to avoid for API/ABI incompatible changes. https://github.com/llvm/llvm-project/pull/83971 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang] run CFG conversion on omp reduction declare ops (PR #84953)
https://github.com/tblah updated https://github.com/llvm/llvm-project/pull/84953
>From 192da3c05fd8c0759f280e0895ffc2f09b2203e4 Mon Sep 17 00:00:00 2001
From: Tom Eccles
Date: Thu, 15 Feb 2024 12:12:29 +
Subject: [PATCH 1/2] [flang] run CFG conversion on omp reduction declare ops
Most FIR passes only look for FIR operations inside of functions (either
because they run only on func.func or they run on the module but iterate
over functions internally). But there can also be FIR operations inside
of fir.global, some OpenMP and OpenACC container operations.
This has worked so far for fir.global and OpenMP reductions because they
only contained very simple FIR code which doesn't need most passes to be
lowered into LLVM IR. I am not sure how OpenACC works.
In the long run, I hope to see a more systematic approach to making sure
that every pass runs on all of these container operations. I will write
an RFC for this soon.
In the meantime, this pass duplicates the CFG conversion pass to also
run on omp reduction operations. This is similar to how the
AbstractResult pass is already duplicated for fir.global operations.
Co-authored-by: Mats Petersson
---
.../flang/Optimizer/Transforms/Passes.h | 7 +++--
.../flang/Optimizer/Transforms/Passes.td | 12 ++--
flang/include/flang/Tools/CLOptions.inc | 4 ++-
.../Transforms/ControlFlowConverter.cpp | 30 ++-
flang/test/Driver/bbc-mlir-pass-pipeline.f90 | 5 +++-
.../test/Driver/mlir-debug-pass-pipeline.f90 | 16 +-
flang/test/Driver/mlir-pass-pipeline.f90 | 16 ++
flang/test/Fir/array-value-copy-2.fir | 4 +--
flang/test/Fir/basic-program.fir | 5 +++-
.../Fir/convert-to-llvm-openmp-and-fir.fir| 2 +-
flang/test/Fir/loop01.fir | 2 +-
flang/test/Fir/loop02.fir | 4 +--
flang/test/Lower/OpenMP/FIR/flush.f90 | 2 +-
flang/test/Lower/OpenMP/FIR/master.f90| 2 +-
.../Lower/OpenMP/FIR/parallel-sections.f90| 2 +-
15 files changed, 76 insertions(+), 37 deletions(-)
diff --git a/flang/include/flang/Optimizer/Transforms/Passes.h
b/flang/include/flang/Optimizer/Transforms/Passes.h
index e1d22c8c986da7..adf747ebdb400b 100644
--- a/flang/include/flang/Optimizer/Transforms/Passes.h
+++ b/flang/include/flang/Optimizer/Transforms/Passes.h
@@ -11,6 +11,7 @@
#include "flang/Optimizer/Dialect/FIROps.h"
#include "mlir/Dialect/LLVMIR/LLVMAttrs.h"
+#include "mlir/Dialect/OpenMP/OpenMPDialect.h"
#include "mlir/Pass/Pass.h"
#include "mlir/Pass/PassRegistry.h"
#include
@@ -37,7 +38,8 @@ namespace fir {
#define GEN_PASS_DECL_ANNOTATECONSTANTOPERANDS
#define GEN_PASS_DECL_ARRAYVALUECOPY
#define GEN_PASS_DECL_CHARACTERCONVERSION
-#define GEN_PASS_DECL_CFGCONVERSION
+#define GEN_PASS_DECL_CFGCONVERSIONONFUNC
+#define GEN_PASS_DECL_CFGCONVERSIONONREDUCTION
#define GEN_PASS_DECL_EXTERNALNAMECONVERSION
#define GEN_PASS_DECL_MEMREFDATAFLOWOPT
#define GEN_PASS_DECL_SIMPLIFYINTRINSICS
@@ -53,7 +55,8 @@ std::unique_ptr
createAbstractResultOnGlobalOptPass();
std::unique_ptr createAffineDemotionPass();
std::unique_ptr
createArrayValueCopyPass(fir::ArrayValueCopyOptions options = {});
-std::unique_ptr createFirToCfgPass();
+std::unique_ptr createFirToCfgOnFuncPass();
+std::unique_ptr createFirToCfgOnReductionPass();
std::unique_ptr createCharacterConversionPass();
std::unique_ptr createExternalNameConversionPass();
std::unique_ptr
diff --git a/flang/include/flang/Optimizer/Transforms/Passes.td
b/flang/include/flang/Optimizer/Transforms/Passes.td
index 5fb576fd876254..e6ea92d814400f 100644
--- a/flang/include/flang/Optimizer/Transforms/Passes.td
+++ b/flang/include/flang/Optimizer/Transforms/Passes.td
@@ -145,7 +145,8 @@ def CharacterConversion : Pass<"character-conversion"> {
];
}
-def CFGConversion : Pass<"cfg-conversion", "::mlir::func::FuncOp"> {
+class CFGConversionBase
+ : Pass<"cfg-conversion-on-" # optExt # "-opt", operation> {
let summary = "Convert FIR structured control flow ops to CFG ops.";
let description = [{
Transform the `fir.do_loop`, `fir.if`, `fir.iterate_while` and
@@ -154,7 +155,6 @@ def CFGConversion : Pass<"cfg-conversion",
"::mlir::func::FuncOp"> {
This pass is required before code gen to the LLVM IR dialect.
}];
- let constructor = "::fir::createFirToCfgPass()";
let dependentDialects = [
"fir::FIROpsDialect", "mlir::func::FuncDialect"
];
@@ -165,6 +165,14 @@ def CFGConversion : Pass<"cfg-conversion",
"::mlir::func::FuncOp"> {
];
}
+def CFGConversionOnFunc : CFGConversionBase<"func", "mlir::func::FuncOp"> {
+ let constructor = "::fir::createFirToCfgOnFuncPass()";
+}
+
+def CFGConversionOnReduction : CFGConversionBase<"reduce",
"mlir::omp::ReductionDeclareOp"> {
+ let constructor = "::fir::createFirToCfgOnReductionPass()";
+}
+
def ExternalNameConversion : Pass<"external-name-interop", "mlir::ModuleOp"> {
let summary = "Convert name for
[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/84455
>From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Tue, 12 Mar 2024 17:31:47 +0800
Subject: [PATCH 1/2] Reduce copies
Created using spr 1.3.4
---
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 89 +-
llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir | 30 +---
llvm/test/CodeGen/RISCV/rvv/zvlsseg-copy.mir | 175 +++
3 files changed, 106 insertions(+), 188 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 7895e87702c711..9fe5666d6a81f4 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -302,58 +302,38 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock
&MBB,
RISCVII::VLMUL LMul, unsigned NF) const
{
const TargetRegisterInfo *TRI = STI.getRegisterInfo();
- int I = 0, End = NF, Incr = 1;
unsigned SrcEncoding = TRI->getEncodingValue(SrcReg);
unsigned DstEncoding = TRI->getEncodingValue(DstReg);
unsigned LMulVal;
bool Fractional;
std::tie(LMulVal, Fractional) = RISCVVType::decodeVLMUL(LMul);
assert(!Fractional && "It is impossible be fractional lmul here.");
- if (forwardCopyWillClobberTuple(DstEncoding, SrcEncoding, NF * LMulVal)) {
-I = NF - 1;
-End = -1;
-Incr = -1;
- }
+ unsigned NumRegs = NF * LMulVal;
+ bool ReversedCopy =
+ forwardCopyWillClobberTuple(DstEncoding, SrcEncoding, NumRegs);
- for (; I != End; I += Incr) {
+ unsigned I = 0;
+ while (I != NumRegs) {
auto GetCopyInfo =
-[](RISCVII::VLMUL LMul,unsigned NF) -> std::tuple {
- unsigned Opc;
- unsigned SubRegIdx;
- unsigned VVOpc, VIOpc;
- switch (LMul) {
- default:
-llvm_unreachable("Impossible LMUL for vector register copy.");
- case RISCVII::LMUL_1:
-Opc = RISCV::VMV1R_V;
-SubRegIdx = RISCV::sub_vrm1_0;
-VVOpc = RISCV::PseudoVMV_V_V_M1;
-VIOpc = RISCV::PseudoVMV_V_I_M1;
-break;
- case RISCVII::LMUL_2:
-Opc = RISCV::VMV2R_V;
-SubRegIdx = RISCV::sub_vrm2_0;
-VVOpc = RISCV::PseudoVMV_V_V_M2;
-VIOpc = RISCV::PseudoVMV_V_I_M2;
-break;
- case RISCVII::LMUL_4:
-Opc = RISCV::VMV4R_V;
-SubRegIdx = RISCV::sub_vrm4_0;
-VVOpc = RISCV::PseudoVMV_V_V_M4;
-VIOpc = RISCV::PseudoVMV_V_I_M4;
-break;
- case RISCVII::LMUL_8:
-assert(NF == 1);
-Opc = RISCV::VMV8R_V;
-SubRegIdx = RISCV::sub_vrm1_0; // There is no sub_vrm8_0.
-VVOpc = RISCV::PseudoVMV_V_V_M8;
-VIOpc = RISCV::PseudoVMV_V_I_M8;
-break;
- }
- return {SubRegIdx, Opc, VVOpc, VIOpc};
+[&](unsigned SrcReg,
+unsigned DstReg) -> std::tuple {
+ unsigned SrcEncoding = TRI->getEncodingValue(SrcReg);
+ unsigned DstEncoding = TRI->getEncodingValue(DstReg);
+ if (!(SrcEncoding & 0b111) && !(DstEncoding & 0b111) && I + 8 <= NumRegs)
+return {8, RISCV::VRM8RegClass, RISCV::VMV8R_V,
RISCV::PseudoVMV_V_V_M8,
+RISCV::PseudoVMV_V_I_M8};
+ if (!(SrcEncoding & 0b11) && !(DstEncoding & 0b11) && I + 4 <= NumRegs)
+return {4, RISCV::VRM4RegClass, RISCV::VMV4R_V,
RISCV::PseudoVMV_V_V_M4,
+RISCV::PseudoVMV_V_I_M4};
+ if (!(SrcEncoding & 0b1) && !(DstEncoding & 0b1) && I + 2 <= NumRegs)
+return {2, RISCV::VRM2RegClass, RISCV::VMV2R_V,
RISCV::PseudoVMV_V_V_M2,
+RISCV::PseudoVMV_V_I_M2};
+ return {1, RISCV::VRRegClass, RISCV::VMV1R_V, RISCV::PseudoVMV_V_V_M1,
+ RISCV::PseudoVMV_V_I_M1};
};
-auto [SubRegIdx, Opc, VVOpc, VIOpc] = GetCopyInfo(LMul, NF);
+auto [NumCopied, RegClass, Opc, VVOpc, VIOpc] = GetCopyInfo(SrcReg,
DstReg);
MachineBasicBlock::const_iterator DefMBBI;
if (isConvertibleToVMV_V_V(STI, MBB, MBBI, DefMBBI, LMul)) {
@@ -364,6 +344,20 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock
&MBB,
}
}
+for (MCPhysReg Reg : RegClass.getRegisters()) {
+ if (TRI->getEncodingValue(Reg) == TRI->getEncodingValue(SrcReg)) {
+SrcReg = Reg;
+break;
+ }
+}
+
+for (MCPhysReg Reg : RegClass.getRegisters()) {
+ if (TRI->getEncodingValue(Reg) == TRI->getEncodingValue(DstReg)) {
+DstReg = Reg;
+break;
+ }
+}
+
auto EmitCopy = [&](MCRegister SrcReg, MCRegister DstReg, unsigned Opcode)
{
auto MIB = BuildMI(MBB, MBBI, DL, get(Opcode), DstReg);
bool UseVMV_V_I = RISCV::getRVVMCOpcode(Opcode) == RISCV::VMV_V_I;
@@ -385,13 +379,10 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock
&MBB,
}
};
-if (NF == 1) {
- EmitCopy(SrcReg, DstReg, Opc);
- return;
-}
-
-EmitCopy(TRI->getSubReg(SrcReg, SubRegIdx + I),
- TR
[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)
@@ -302,102 +302,87 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock
&MBB,
RISCVII::VLMUL LMul, unsigned NF) const
{
const TargetRegisterInfo *TRI = STI.getRegisterInfo();
- unsigned Opc;
- unsigned SubRegIdx;
- unsigned VVOpc, VIOpc;
- switch (LMul) {
- default:
-llvm_unreachable("Impossible LMUL for vector register copy.");
- case RISCVII::LMUL_1:
-Opc = RISCV::VMV1R_V;
-SubRegIdx = RISCV::sub_vrm1_0;
-VVOpc = RISCV::PseudoVMV_V_V_M1;
-VIOpc = RISCV::PseudoVMV_V_I_M1;
-break;
- case RISCVII::LMUL_2:
-Opc = RISCV::VMV2R_V;
-SubRegIdx = RISCV::sub_vrm2_0;
-VVOpc = RISCV::PseudoVMV_V_V_M2;
-VIOpc = RISCV::PseudoVMV_V_I_M2;
-break;
- case RISCVII::LMUL_4:
-Opc = RISCV::VMV4R_V;
-SubRegIdx = RISCV::sub_vrm4_0;
-VVOpc = RISCV::PseudoVMV_V_V_M4;
-VIOpc = RISCV::PseudoVMV_V_I_M4;
-break;
- case RISCVII::LMUL_8:
-assert(NF == 1);
-Opc = RISCV::VMV8R_V;
-SubRegIdx = RISCV::sub_vrm1_0; // There is no sub_vrm8_0.
-VVOpc = RISCV::PseudoVMV_V_V_M8;
-VIOpc = RISCV::PseudoVMV_V_I_M8;
-break;
- }
-
- bool UseVMV_V_V = false;
- bool UseVMV_V_I = false;
- MachineBasicBlock::const_iterator DefMBBI;
- if (isConvertibleToVMV_V_V(STI, MBB, MBBI, DefMBBI, LMul)) {
-UseVMV_V_V = true;
-Opc = VVOpc;
-
-if (DefMBBI->getOpcode() == VIOpc) {
- UseVMV_V_I = true;
- Opc = VIOpc;
-}
- }
-
- if (NF == 1) {
-auto MIB = BuildMI(MBB, MBBI, DL, get(Opc), DstReg);
-if (UseVMV_V_V)
- MIB.addReg(DstReg, RegState::Undef);
-if (UseVMV_V_I)
- MIB = MIB.add(DefMBBI->getOperand(2));
-else
- MIB = MIB.addReg(SrcReg, getKillRegState(KillSrc));
-if (UseVMV_V_V) {
- const MCInstrDesc &Desc = DefMBBI->getDesc();
- MIB.add(DefMBBI->getOperand(RISCVII::getVLOpNum(Desc))); // AVL
- MIB.add(DefMBBI->getOperand(RISCVII::getSEWOpNum(Desc))); // SEW
- MIB.addImm(0);// tu, mu
- MIB.addReg(RISCV::VL, RegState::Implicit);
- MIB.addReg(RISCV::VTYPE, RegState::Implicit);
-}
-return;
- }
-
- int I = 0, End = NF, Incr = 1;
unsigned SrcEncoding = TRI->getEncodingValue(SrcReg);
unsigned DstEncoding = TRI->getEncodingValue(DstReg);
unsigned LMulVal;
bool Fractional;
std::tie(LMulVal, Fractional) = RISCVVType::decodeVLMUL(LMul);
assert(!Fractional && "It is impossible be fractional lmul here.");
- if (forwardCopyWillClobberTuple(DstEncoding, SrcEncoding, NF * LMulVal)) {
-I = NF - 1;
-End = -1;
-Incr = -1;
- }
-
- for (; I != End; I += Incr) {
-auto MIB =
-BuildMI(MBB, MBBI, DL, get(Opc), TRI->getSubReg(DstReg, SubRegIdx +
I));
-if (UseVMV_V_V)
- MIB.addReg(TRI->getSubReg(DstReg, SubRegIdx + I), RegState::Undef);
-if (UseVMV_V_I)
- MIB = MIB.add(DefMBBI->getOperand(2));
-else
- MIB = MIB.addReg(TRI->getSubReg(SrcReg, SubRegIdx + I),
- getKillRegState(KillSrc));
-if (UseVMV_V_V) {
- const MCInstrDesc &Desc = DefMBBI->getDesc();
- MIB.add(DefMBBI->getOperand(RISCVII::getVLOpNum(Desc))); // AVL
- MIB.add(DefMBBI->getOperand(RISCVII::getSEWOpNum(Desc))); // SEW
- MIB.addImm(0);// tu, mu
- MIB.addReg(RISCV::VL, RegState::Implicit);
- MIB.addReg(RISCV::VTYPE, RegState::Implicit);
+ unsigned NumRegs = NF * LMulVal;
+ bool ReversedCopy =
+ forwardCopyWillClobberTuple(DstEncoding, SrcEncoding, NumRegs);
+
+ unsigned I = 0;
+ while (I != NumRegs) {
+auto GetCopyInfo =
+[&](unsigned SrcReg,
+unsigned DstReg) -> std::tuple {
+ unsigned SrcEncoding = TRI->getEncodingValue(SrcReg);
+ unsigned DstEncoding = TRI->getEncodingValue(DstReg);
+ if (!(SrcEncoding & 0b111) && !(DstEncoding & 0b111) && I + 8 <= NumRegs)
+return {8, RISCV::VRM8RegClass, RISCV::VMV8R_V,
RISCV::PseudoVMV_V_V_M8,
+RISCV::PseudoVMV_V_I_M8};
+ if (!(SrcEncoding & 0b11) && !(DstEncoding & 0b11) && I + 4 <= NumRegs)
+return {4, RISCV::VRM4RegClass, RISCV::VMV4R_V,
RISCV::PseudoVMV_V_V_M4,
+RISCV::PseudoVMV_V_I_M4};
+ if (!(SrcEncoding & 0b1) && !(DstEncoding & 0b1) && I + 2 <= NumRegs)
+return {2, RISCV::VRM2RegClass, RISCV::VMV2R_V,
RISCV::PseudoVMV_V_V_M2,
+RISCV::PseudoVMV_V_I_M2};
+ return {1, RISCV::VRRegClass, RISCV::VMV1R_V, RISCV::PseudoVMV_V_V_M1,
+ RISCV::PseudoVMV_V_I_M1};
+};
+
+auto [NumCopied, RegClass, Opc, VVOpc, VIOpc] = GetCopyInfo(SrcReg,
DstReg);
+
+MachineBasicBlock::const_iterator DefMBBI;
+if (isConvertibleToVMV_V_V(STI, MBB, MBBI, DefMBBI, LMul)) {
+ Opc = VVOpc;
+
+ if (DefMBBI->getOpcode() == VIOpc) {
+Opc = VIOpc;
+ }
}
+
+for (MCPhysReg Reg : RegClass.getRegisters()) {
+ if (TRI->getEncodingValue(Re
[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)
@@ -302,102 +302,87 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock
&MBB,
RISCVII::VLMUL LMul, unsigned NF) const
{
const TargetRegisterInfo *TRI = STI.getRegisterInfo();
- unsigned Opc;
- unsigned SubRegIdx;
- unsigned VVOpc, VIOpc;
- switch (LMul) {
- default:
-llvm_unreachable("Impossible LMUL for vector register copy.");
- case RISCVII::LMUL_1:
-Opc = RISCV::VMV1R_V;
-SubRegIdx = RISCV::sub_vrm1_0;
-VVOpc = RISCV::PseudoVMV_V_V_M1;
-VIOpc = RISCV::PseudoVMV_V_I_M1;
-break;
- case RISCVII::LMUL_2:
-Opc = RISCV::VMV2R_V;
-SubRegIdx = RISCV::sub_vrm2_0;
-VVOpc = RISCV::PseudoVMV_V_V_M2;
-VIOpc = RISCV::PseudoVMV_V_I_M2;
-break;
- case RISCVII::LMUL_4:
-Opc = RISCV::VMV4R_V;
-SubRegIdx = RISCV::sub_vrm4_0;
-VVOpc = RISCV::PseudoVMV_V_V_M4;
-VIOpc = RISCV::PseudoVMV_V_I_M4;
-break;
- case RISCVII::LMUL_8:
-assert(NF == 1);
-Opc = RISCV::VMV8R_V;
-SubRegIdx = RISCV::sub_vrm1_0; // There is no sub_vrm8_0.
-VVOpc = RISCV::PseudoVMV_V_V_M8;
-VIOpc = RISCV::PseudoVMV_V_I_M8;
-break;
- }
-
- bool UseVMV_V_V = false;
- bool UseVMV_V_I = false;
- MachineBasicBlock::const_iterator DefMBBI;
- if (isConvertibleToVMV_V_V(STI, MBB, MBBI, DefMBBI, LMul)) {
-UseVMV_V_V = true;
-Opc = VVOpc;
-
-if (DefMBBI->getOpcode() == VIOpc) {
- UseVMV_V_I = true;
- Opc = VIOpc;
-}
- }
-
- if (NF == 1) {
-auto MIB = BuildMI(MBB, MBBI, DL, get(Opc), DstReg);
-if (UseVMV_V_V)
- MIB.addReg(DstReg, RegState::Undef);
-if (UseVMV_V_I)
- MIB = MIB.add(DefMBBI->getOperand(2));
-else
- MIB = MIB.addReg(SrcReg, getKillRegState(KillSrc));
-if (UseVMV_V_V) {
- const MCInstrDesc &Desc = DefMBBI->getDesc();
- MIB.add(DefMBBI->getOperand(RISCVII::getVLOpNum(Desc))); // AVL
- MIB.add(DefMBBI->getOperand(RISCVII::getSEWOpNum(Desc))); // SEW
- MIB.addImm(0);// tu, mu
- MIB.addReg(RISCV::VL, RegState::Implicit);
- MIB.addReg(RISCV::VTYPE, RegState::Implicit);
-}
-return;
- }
-
- int I = 0, End = NF, Incr = 1;
unsigned SrcEncoding = TRI->getEncodingValue(SrcReg);
unsigned DstEncoding = TRI->getEncodingValue(DstReg);
unsigned LMulVal;
bool Fractional;
std::tie(LMulVal, Fractional) = RISCVVType::decodeVLMUL(LMul);
assert(!Fractional && "It is impossible be fractional lmul here.");
- if (forwardCopyWillClobberTuple(DstEncoding, SrcEncoding, NF * LMulVal)) {
-I = NF - 1;
-End = -1;
-Incr = -1;
- }
-
- for (; I != End; I += Incr) {
-auto MIB =
-BuildMI(MBB, MBBI, DL, get(Opc), TRI->getSubReg(DstReg, SubRegIdx +
I));
-if (UseVMV_V_V)
- MIB.addReg(TRI->getSubReg(DstReg, SubRegIdx + I), RegState::Undef);
-if (UseVMV_V_I)
- MIB = MIB.add(DefMBBI->getOperand(2));
-else
- MIB = MIB.addReg(TRI->getSubReg(SrcReg, SubRegIdx + I),
- getKillRegState(KillSrc));
-if (UseVMV_V_V) {
- const MCInstrDesc &Desc = DefMBBI->getDesc();
- MIB.add(DefMBBI->getOperand(RISCVII::getVLOpNum(Desc))); // AVL
- MIB.add(DefMBBI->getOperand(RISCVII::getSEWOpNum(Desc))); // SEW
- MIB.addImm(0);// tu, mu
- MIB.addReg(RISCV::VL, RegState::Implicit);
- MIB.addReg(RISCV::VTYPE, RegState::Implicit);
+ unsigned NumRegs = NF * LMulVal;
+ bool ReversedCopy =
+ forwardCopyWillClobberTuple(DstEncoding, SrcEncoding, NumRegs);
+
+ unsigned I = 0;
+ while (I != NumRegs) {
+auto GetCopyInfo =
+[&](unsigned SrcReg,
+unsigned DstReg) -> std::tuple {
+ unsigned SrcEncoding = TRI->getEncodingValue(SrcReg);
+ unsigned DstEncoding = TRI->getEncodingValue(DstReg);
+ if (!(SrcEncoding & 0b111) && !(DstEncoding & 0b111) && I + 8 <= NumRegs)
+return {8, RISCV::VRM8RegClass, RISCV::VMV8R_V,
RISCV::PseudoVMV_V_V_M8,
+RISCV::PseudoVMV_V_I_M8};
+ if (!(SrcEncoding & 0b11) && !(DstEncoding & 0b11) && I + 4 <= NumRegs)
+return {4, RISCV::VRM4RegClass, RISCV::VMV4R_V,
RISCV::PseudoVMV_V_V_M4,
+RISCV::PseudoVMV_V_I_M4};
+ if (!(SrcEncoding & 0b1) && !(DstEncoding & 0b1) && I + 2 <= NumRegs)
+return {2, RISCV::VRM2RegClass, RISCV::VMV2R_V,
RISCV::PseudoVMV_V_V_M2,
+RISCV::PseudoVMV_V_I_M2};
+ return {1, RISCV::VRRegClass, RISCV::VMV1R_V, RISCV::PseudoVMV_V_V_M1,
+ RISCV::PseudoVMV_V_I_M1};
+};
+
+auto [NumCopied, RegClass, Opc, VVOpc, VIOpc] = GetCopyInfo(SrcReg,
DstReg);
+
+MachineBasicBlock::const_iterator DefMBBI;
+if (isConvertibleToVMV_V_V(STI, MBB, MBBI, DefMBBI, LMul)) {
wangpc-pp wrote:
Fixed. Thanks for catching this!
https://github.com/llvm/llvm-project/pull/84455
___
llvm-branch-commits mailing l
[llvm-branch-commits] [flang] [flang] run CFG conversion on omp reduction declare ops (PR #84953)
tblah wrote: > Wouldn't it be cleaner to expose the patterns via a > `populateFirCfgConversionPatterns` function and reuse it in you extra pass > instead of making two pass from the initial file? > > We did this recently for the FirToLLVM patterns. #83492 Thanks for taking a look at this. I have extracted the patterns into an externally visible function, but I don't understand the benefit of splitting the two CFG conversion passes out into different files. I think this could be confusing because it would be unclear which file one should contain the definition of those conversion patterns. Keeping it in one file makes it clear that both do exactly the same thing on different target operations. https://github.com/llvm/llvm-project/pull/84953 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][CodeGen] Run PreCGRewrite on omp reduction declare ops (PR #84954)
https://github.com/kiranchandramohan approved this pull request. LG. Please wait for @clementval. https://github.com/llvm/llvm-project/pull/84954 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][CodeGen] Run PreCGRewrite on omp reduction declare ops (PR #84954)
@@ -18,6 +18,7 @@ #include "flang/Optimizer/Dialect/FIROps.h" #include "flang/Optimizer/Dialect/FIRType.h" #include "flang/Optimizer/Dialect/Support/FIRContext.h" +#include "mlir/Dialect/OpenMP/OpenMPDialect.h" kiranchandramohan wrote: The header is not necessary now? https://github.com/llvm/llvm-project/pull/84954 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/84455
>From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Tue, 12 Mar 2024 17:31:47 +0800
Subject: [PATCH 1/3] Reduce copies
Created using spr 1.3.4
---
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 89 +-
llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir | 30 +---
llvm/test/CodeGen/RISCV/rvv/zvlsseg-copy.mir | 175 +++
3 files changed, 106 insertions(+), 188 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 7895e87702c711..9fe5666d6a81f4 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -302,58 +302,38 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock
&MBB,
RISCVII::VLMUL LMul, unsigned NF) const
{
const TargetRegisterInfo *TRI = STI.getRegisterInfo();
- int I = 0, End = NF, Incr = 1;
unsigned SrcEncoding = TRI->getEncodingValue(SrcReg);
unsigned DstEncoding = TRI->getEncodingValue(DstReg);
unsigned LMulVal;
bool Fractional;
std::tie(LMulVal, Fractional) = RISCVVType::decodeVLMUL(LMul);
assert(!Fractional && "It is impossible be fractional lmul here.");
- if (forwardCopyWillClobberTuple(DstEncoding, SrcEncoding, NF * LMulVal)) {
-I = NF - 1;
-End = -1;
-Incr = -1;
- }
+ unsigned NumRegs = NF * LMulVal;
+ bool ReversedCopy =
+ forwardCopyWillClobberTuple(DstEncoding, SrcEncoding, NumRegs);
- for (; I != End; I += Incr) {
+ unsigned I = 0;
+ while (I != NumRegs) {
auto GetCopyInfo =
-[](RISCVII::VLMUL LMul,unsigned NF) -> std::tuple {
- unsigned Opc;
- unsigned SubRegIdx;
- unsigned VVOpc, VIOpc;
- switch (LMul) {
- default:
-llvm_unreachable("Impossible LMUL for vector register copy.");
- case RISCVII::LMUL_1:
-Opc = RISCV::VMV1R_V;
-SubRegIdx = RISCV::sub_vrm1_0;
-VVOpc = RISCV::PseudoVMV_V_V_M1;
-VIOpc = RISCV::PseudoVMV_V_I_M1;
-break;
- case RISCVII::LMUL_2:
-Opc = RISCV::VMV2R_V;
-SubRegIdx = RISCV::sub_vrm2_0;
-VVOpc = RISCV::PseudoVMV_V_V_M2;
-VIOpc = RISCV::PseudoVMV_V_I_M2;
-break;
- case RISCVII::LMUL_4:
-Opc = RISCV::VMV4R_V;
-SubRegIdx = RISCV::sub_vrm4_0;
-VVOpc = RISCV::PseudoVMV_V_V_M4;
-VIOpc = RISCV::PseudoVMV_V_I_M4;
-break;
- case RISCVII::LMUL_8:
-assert(NF == 1);
-Opc = RISCV::VMV8R_V;
-SubRegIdx = RISCV::sub_vrm1_0; // There is no sub_vrm8_0.
-VVOpc = RISCV::PseudoVMV_V_V_M8;
-VIOpc = RISCV::PseudoVMV_V_I_M8;
-break;
- }
- return {SubRegIdx, Opc, VVOpc, VIOpc};
+[&](unsigned SrcReg,
+unsigned DstReg) -> std::tuple {
+ unsigned SrcEncoding = TRI->getEncodingValue(SrcReg);
+ unsigned DstEncoding = TRI->getEncodingValue(DstReg);
+ if (!(SrcEncoding & 0b111) && !(DstEncoding & 0b111) && I + 8 <= NumRegs)
+return {8, RISCV::VRM8RegClass, RISCV::VMV8R_V,
RISCV::PseudoVMV_V_V_M8,
+RISCV::PseudoVMV_V_I_M8};
+ if (!(SrcEncoding & 0b11) && !(DstEncoding & 0b11) && I + 4 <= NumRegs)
+return {4, RISCV::VRM4RegClass, RISCV::VMV4R_V,
RISCV::PseudoVMV_V_V_M4,
+RISCV::PseudoVMV_V_I_M4};
+ if (!(SrcEncoding & 0b1) && !(DstEncoding & 0b1) && I + 2 <= NumRegs)
+return {2, RISCV::VRM2RegClass, RISCV::VMV2R_V,
RISCV::PseudoVMV_V_V_M2,
+RISCV::PseudoVMV_V_I_M2};
+ return {1, RISCV::VRRegClass, RISCV::VMV1R_V, RISCV::PseudoVMV_V_V_M1,
+ RISCV::PseudoVMV_V_I_M1};
};
-auto [SubRegIdx, Opc, VVOpc, VIOpc] = GetCopyInfo(LMul, NF);
+auto [NumCopied, RegClass, Opc, VVOpc, VIOpc] = GetCopyInfo(SrcReg,
DstReg);
MachineBasicBlock::const_iterator DefMBBI;
if (isConvertibleToVMV_V_V(STI, MBB, MBBI, DefMBBI, LMul)) {
@@ -364,6 +344,20 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock
&MBB,
}
}
+for (MCPhysReg Reg : RegClass.getRegisters()) {
+ if (TRI->getEncodingValue(Reg) == TRI->getEncodingValue(SrcReg)) {
+SrcReg = Reg;
+break;
+ }
+}
+
+for (MCPhysReg Reg : RegClass.getRegisters()) {
+ if (TRI->getEncodingValue(Reg) == TRI->getEncodingValue(DstReg)) {
+DstReg = Reg;
+break;
+ }
+}
+
auto EmitCopy = [&](MCRegister SrcReg, MCRegister DstReg, unsigned Opcode)
{
auto MIB = BuildMI(MBB, MBBI, DL, get(Opcode), DstReg);
bool UseVMV_V_I = RISCV::getRVVMCOpcode(Opcode) == RISCV::VMV_V_I;
@@ -385,13 +379,10 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock
&MBB,
}
};
-if (NF == 1) {
- EmitCopy(SrcReg, DstReg, Opc);
- return;
-}
-
-EmitCopy(TRI->getSubReg(SrcReg, SubRegIdx + I),
- TR
[llvm-branch-commits] [llvm] [RISCV] Store VLMul/NF into RegisterClass's TSFlags (PR #84894)
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/84894
>From 951478b16d8aa834bff4494dc6d05c5f1175d59f Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Tue, 12 Mar 2024 18:41:50 +0800
Subject: [PATCH] Fix wrong arguments
Created using spr 1.3.4
---
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 3e52583ec8ad82..1b3e6cf10189c5 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -495,10 +495,7 @@ void RISCVInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
RISCV::VRN4M1RegClass, RISCV::VRN4M2RegClass, RISCV::VRN5M1RegClass,
RISCV::VRN6M1RegClass, RISCV::VRN7M1RegClass, RISCV::VRN8M1RegClass}) {
if (RegClass.contains(DstReg, SrcReg)) {
- copyPhysRegVector(MBB, MBBI, DL, DstReg, SrcReg, KillSrc,
-getLMul(RegClass.TSFlags),
-/*NF=*/
-getNF(RegClass.TSFlags));
+ copyPhysRegVector(MBB, MBBI, DL, DstReg, SrcReg, KillSrc, RegClass);
return;
}
}
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [RISCV] Store VLMul/NF into RegisterClass's TSFlags (PR #84894)
https://github.com/wangpc-pp edited https://github.com/llvm/llvm-project/pull/84894 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [RISCV] Store VLMul/NF into RegisterClass's TSFlags (PR #84894)
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/84894
>From 951478b16d8aa834bff4494dc6d05c5f1175d59f Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Tue, 12 Mar 2024 18:41:50 +0800
Subject: [PATCH] Fix wrong arguments
Created using spr 1.3.4
---
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 3e52583ec8ad82..1b3e6cf10189c5 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -495,10 +495,7 @@ void RISCVInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
RISCV::VRN4M1RegClass, RISCV::VRN4M2RegClass, RISCV::VRN5M1RegClass,
RISCV::VRN6M1RegClass, RISCV::VRN7M1RegClass, RISCV::VRN8M1RegClass}) {
if (RegClass.contains(DstReg, SrcReg)) {
- copyPhysRegVector(MBB, MBBI, DL, DstReg, SrcReg, KillSrc,
-getLMul(RegClass.TSFlags),
-/*NF=*/
-getNF(RegClass.TSFlags));
+ copyPhysRegVector(MBB, MBBI, DL, DstReg, SrcReg, KillSrc, RegClass);
return;
}
}
___
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llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [RISCV] Support select optimization (PR #80124)
wangpc-pp wrote: Ping. Any more concerns? https://github.com/llvm/llvm-project/pull/80124 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][CodeGen] Run PreCGRewrite on omp reduction declare ops (PR #84954)
https://github.com/tblah updated https://github.com/llvm/llvm-project/pull/84954
>From f951d16cf6cb1ab221f47ca2e712020b9af0af87 Mon Sep 17 00:00:00 2001
From: Tom Eccles
Date: Fri, 1 Mar 2024 16:59:09 +
Subject: [PATCH 1/4] [flang][CodeGen] Run PreCGRewrite on omp reduction
declare ops
OpenMP reduction declare operations can contain FIR code which needs to
be lowered to LLVM. With array reductions, these regions can contain
more complicated operations which need PreCGRewriting. A similar extra
case was already needed for fir::GlobalOp.
---
flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp | 5 +
1 file changed, 5 insertions(+)
diff --git a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
index 0170b56367cf3c..dd935e71762355 100644
--- a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
+++ b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
@@ -22,6 +22,7 @@
#include "mlir/Transforms/RegionUtils.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Debug.h"
+#include
namespace fir {
#define GEN_PASS_DEF_CODEGENREWRITE
@@ -319,6 +320,10 @@ class CodeGenRewrite : public
fir::impl::CodeGenRewriteBase {
runOn(func, func.getBody());
for (auto global : mod.getOps())
runOn(global, global.getRegion());
+for (auto omp : mod.getOps()) {
+ runOn(omp, omp.getInitializerRegion());
+ runOn(omp, omp.getReductionRegion());
+}
}
};
>From b909193418789d1bcb572b69070fdca9c2d35a7c Mon Sep 17 00:00:00 2001
From: Tom Eccles
Date: Thu, 14 Mar 2024 07:54:12 +
Subject: [PATCH 2/4] Fix include
---
flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
index dd935e71762355..097845e447842b 100644
--- a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
+++ b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
@@ -18,11 +18,11 @@
#include "flang/Optimizer/Dialect/FIROps.h"
#include "flang/Optimizer/Dialect/FIRType.h"
#include "flang/Optimizer/Dialect/Support/FIRContext.h"
+#include "mlir/Dialect/OpenMP/OpenMPDialect.h"
#include "mlir/Transforms/DialectConversion.h"
#include "mlir/Transforms/RegionUtils.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Debug.h"
-#include
namespace fir {
#define GEN_PASS_DEF_CODEGENREWRITE
>From 9d5026a16f4de4037d1fefa77d5c913085183150 Mon Sep 17 00:00:00 2001
From: Tom Eccles
Date: Thu, 14 Mar 2024 08:02:40 +
Subject: [PATCH 3/4] Run PreCGRewrite on all regions in the module
---
flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
index 097845e447842b..410e6400c9be14 100644
--- a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
+++ b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
@@ -284,7 +284,7 @@ class DeclareOpConversion : public
mlir::OpRewritePattern {
class CodeGenRewrite : public fir::impl::CodeGenRewriteBase {
public:
- void runOn(mlir::Operation *op, mlir::Region ®ion) {
+ void runOn(mlir::Operation *op) {
auto &context = getContext();
mlir::ConversionTarget target(context);
target.addLegalDialect {
void runOnOperation() override final {
// Call runOn on all top level regions that may contain
emboxOp/arrayCoorOp.
-auto mod = getOperation();
-for (auto func : mod.getOps())
- runOn(func, func.getBody());
-for (auto global : mod.getOps())
- runOn(global, global.getRegion());
-for (auto omp : mod.getOps()) {
- runOn(omp, omp.getInitializerRegion());
- runOn(omp, omp.getReductionRegion());
-}
+mlir::ModuleOp mod = getOperation();
+runOn(mod);
}
};
>From c7ffde450f0d3480be4532c4b21ed5a036fb8424 Mon Sep 17 00:00:00 2001
From: Tom Eccles
Date: Thu, 14 Mar 2024 14:03:13 +
Subject: [PATCH 4/4] Remove unessecary include
---
flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
index 410e6400c9be14..4a05ad717f02f2 100644
--- a/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
+++ b/flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
@@ -18,7 +18,6 @@
#include "flang/Optimizer/Dialect/FIROps.h"
#include "flang/Optimizer/Dialect/FIRType.h"
#include "flang/Optimizer/Dialect/Support/FIRContext.h"
-#include "mlir/Dialect/OpenMP/OpenMPDialect.h"
#include "mlir/Transforms/DialectConversion.h"
#include "mlir/Transforms/RegionUtils.h"
#include "llvm/ADT/STLExtras.h"
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[llvm-branch-commits] [lld] [llvm] Backport fixes for ARM64EC import libraries (PR #84590)
dpaoliello wrote: @tstellar change made as requested, this is now ready to merge https://github.com/llvm/llvm-project/pull/84590 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] release/18.x: [lld][LoongArch] Fix handleUleb128 (PR #85238)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/85238 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] release/18.x: [lld][LoongArch] Fix handleUleb128 (PR #85238)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/85238
Backport d9b435c24ddd a41bcb393053
Requested by: @SixWeining
>From d71cc94f3111af54a66fe200a344ce2a1dbb4f43 Mon Sep 17 00:00:00 2001
From: Weining Lu
Date: Tue, 5 Mar 2024 22:01:07 +0800
Subject: [PATCH 1/2] [lld][test] Fix sanitizer buildbot failure
Buildbot failure:
https://lab.llvm.org/buildbot/#/builders/5/builds/41530/steps/9/logs/stdio
(cherry picked from commit d9b435c24cc8148fd97b42f6bb1124e52307)
---
lld/test/ELF/loongarch-reloc-leb128.s | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lld/test/ELF/loongarch-reloc-leb128.s
b/lld/test/ELF/loongarch-reloc-leb128.s
index 9e6f221e62b639..2dd327d1564ebd 100644
--- a/lld/test/ELF/loongarch-reloc-leb128.s
+++ b/lld/test/ELF/loongarch-reloc-leb128.s
@@ -99,4 +99,4 @@ w2:
.reloc ., R_LARCH_ADD_ULEB128, w2
.reloc ., R_LARCH_SUB_ULEB128, w1
.fill 10, 1, 0x80
-.byte 0
+.byte 1
>From 08823707f89013858f95d58720ad2b00596dd378 Mon Sep 17 00:00:00 2001
From: Weining Lu
Date: Tue, 5 Mar 2024 23:19:16 +0800
Subject: [PATCH 2/2] [lld][LoongArch] Fix handleUleb128
(cherry picked from commit a41bcb3930534ef1525b4fc30e53e818b39e2b60)
---
lld/ELF/Arch/LoongArch.cpp | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/lld/ELF/Arch/LoongArch.cpp b/lld/ELF/Arch/LoongArch.cpp
index 8a6f6db68f2909..464f5dfb320ccc 100644
--- a/lld/ELF/Arch/LoongArch.cpp
+++ b/lld/ELF/Arch/LoongArch.cpp
@@ -159,8 +159,9 @@ static bool isJirl(uint32_t insn) {
static void handleUleb128(uint8_t *loc, uint64_t val) {
const uint32_t maxcount = 1 + 64 / 7;
uint32_t count;
- uint64_t orig = decodeULEB128(loc, &count);
- if (count > maxcount)
+ const char *error = nullptr;
+ uint64_t orig = decodeULEB128(loc, &count, nullptr, &error);
+ if (count > maxcount || (count == maxcount && error))
errorOrWarn(getErrorLocation(loc) + "extra space for uleb128");
uint64_t mask = count < maxcount ? (1ULL << 7 * count) - 1 : -1ULL;
encodeULEB128((orig + val) & mask, loc, count);
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[llvm-branch-commits] [lld] release/18.x: [lld][LoongArch] Fix handleUleb128 (PR #85238)
llvmbot wrote:
@llvm/pr-subscribers-lld
Author: None (llvmbot)
Changes
Backport d9b435c24ddd a41bcb393053
Requested by: @SixWeining
---
Full diff: https://github.com/llvm/llvm-project/pull/85238.diff
2 Files Affected:
- (modified) lld/ELF/Arch/LoongArch.cpp (+3-2)
- (modified) lld/test/ELF/loongarch-reloc-leb128.s (+1-1)
``diff
diff --git a/lld/ELF/Arch/LoongArch.cpp b/lld/ELF/Arch/LoongArch.cpp
index 8a6f6db68f2909..464f5dfb320ccc 100644
--- a/lld/ELF/Arch/LoongArch.cpp
+++ b/lld/ELF/Arch/LoongArch.cpp
@@ -159,8 +159,9 @@ static bool isJirl(uint32_t insn) {
static void handleUleb128(uint8_t *loc, uint64_t val) {
const uint32_t maxcount = 1 + 64 / 7;
uint32_t count;
- uint64_t orig = decodeULEB128(loc, &count);
- if (count > maxcount)
+ const char *error = nullptr;
+ uint64_t orig = decodeULEB128(loc, &count, nullptr, &error);
+ if (count > maxcount || (count == maxcount && error))
errorOrWarn(getErrorLocation(loc) + "extra space for uleb128");
uint64_t mask = count < maxcount ? (1ULL << 7 * count) - 1 : -1ULL;
encodeULEB128((orig + val) & mask, loc, count);
diff --git a/lld/test/ELF/loongarch-reloc-leb128.s
b/lld/test/ELF/loongarch-reloc-leb128.s
index 9e6f221e62b639..2dd327d1564ebd 100644
--- a/lld/test/ELF/loongarch-reloc-leb128.s
+++ b/lld/test/ELF/loongarch-reloc-leb128.s
@@ -99,4 +99,4 @@ w2:
.reloc ., R_LARCH_ADD_ULEB128, w2
.reloc ., R_LARCH_SUB_ULEB128, w1
.fill 10, 1, 0x80
-.byte 0
+.byte 1
``
https://github.com/llvm/llvm-project/pull/85238
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[llvm-branch-commits] [lld] release/18.x: [lld][LoongArch] Fix handleUleb128 (PR #85238)
https://github.com/llvmbot updated
https://github.com/llvm/llvm-project/pull/85238
>From 0f067065dd5e5411d5ada08397abb79336e997c8 Mon Sep 17 00:00:00 2001
From: Weining Lu
Date: Tue, 5 Mar 2024 22:01:07 +0800
Subject: [PATCH 1/2] [lld][test] Fix sanitizer buildbot failure
Buildbot failure:
https://lab.llvm.org/buildbot/#/builders/5/builds/41530/steps/9/logs/stdio
(cherry picked from commit d9b435c24cc8148fd97b42f6bb1124e52307)
---
lld/test/ELF/loongarch-reloc-leb128.s | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lld/test/ELF/loongarch-reloc-leb128.s
b/lld/test/ELF/loongarch-reloc-leb128.s
index 9e6f221e62b639..2dd327d1564ebd 100644
--- a/lld/test/ELF/loongarch-reloc-leb128.s
+++ b/lld/test/ELF/loongarch-reloc-leb128.s
@@ -99,4 +99,4 @@ w2:
.reloc ., R_LARCH_ADD_ULEB128, w2
.reloc ., R_LARCH_SUB_ULEB128, w1
.fill 10, 1, 0x80
-.byte 0
+.byte 1
>From 93ef2cea6875fa2ab920dea3d1d2ac9716ddbe5f Mon Sep 17 00:00:00 2001
From: Weining Lu
Date: Tue, 5 Mar 2024 23:19:16 +0800
Subject: [PATCH 2/2] [lld][LoongArch] Fix handleUleb128
(cherry picked from commit a41bcb3930534ef1525b4fc30e53e818b39e2b60)
---
lld/ELF/Arch/LoongArch.cpp | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/lld/ELF/Arch/LoongArch.cpp b/lld/ELF/Arch/LoongArch.cpp
index 8a6f6db68f2909..464f5dfb320ccc 100644
--- a/lld/ELF/Arch/LoongArch.cpp
+++ b/lld/ELF/Arch/LoongArch.cpp
@@ -159,8 +159,9 @@ static bool isJirl(uint32_t insn) {
static void handleUleb128(uint8_t *loc, uint64_t val) {
const uint32_t maxcount = 1 + 64 / 7;
uint32_t count;
- uint64_t orig = decodeULEB128(loc, &count);
- if (count > maxcount)
+ const char *error = nullptr;
+ uint64_t orig = decodeULEB128(loc, &count, nullptr, &error);
+ if (count > maxcount || (count == maxcount && error))
errorOrWarn(getErrorLocation(loc) + "extra space for uleb128");
uint64_t mask = count < maxcount ? (1ULL << 7 * count) - 1 : -1ULL;
encodeULEB128((orig + val) & mask, loc, count);
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[llvm-branch-commits] [flang] [flang][CodeGen] Run PreCGRewrite on omp reduction declare ops (PR #84954)
https://github.com/jeanPerier approved this pull request. Thanks https://github.com/llvm/llvm-project/pull/84954 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang][runtime] Added Fortran::common::reference_wrapper for use on device. (PR #85178)
https://github.com/jeanPerier approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/85178 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libcxxabi] [libunwind] release/18.x: [runtimes] Prefer -fvisibility-global-new-delete=force-hidden (#84917) (PR #85126)
ldionne wrote: @tstellar Yes. I think I'll disable these tests which keep failing in the LLVM 18 release branch so we can remove some of the noise here. https://github.com/llvm/llvm-project/pull/85126 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang][runtime] Added custom visitor for IoStatementState variants. (PR #85179)
https://github.com/klausler requested changes to this pull request. It would be better to have the types that are available on the device declare themselves so in their declarations via a member or (better) inherited trait. The big variant union in `IoStatementState` could omit the host-only options when compiled for the device. https://github.com/llvm/llvm-project/pull/85179 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC][flang] Reorder const and RT_API_ATTRS. (PR #85180)
https://github.com/klausler approved this pull request. https://github.com/llvm/llvm-project/pull/85180 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++] Cherry-pick the disabling of modules tests onto release/18.x (PR #85247)
https://github.com/ldionne milestoned https://github.com/llvm/llvm-project/pull/85247 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++] Cherry-pick the disabling of modules tests onto release/18.x (PR #85247)
https://github.com/ldionne created
https://github.com/llvm/llvm-project/pull/85247
LIT was never really meant to generate tests during discovery, and we probably
shouldn't be doing this.
This hack is even worse than the initial attempt because it buries the
"UNSUPPORTED" at the bottom of the test.
Fixes #85242
>From 00f76b0f1cc512013fc942de9f0cfed129e5c914 Mon Sep 17 00:00:00 2001
From: Eric Fiselier
Date: Fri, 8 Mar 2024 12:17:07 -0500
Subject: [PATCH] Actually disable the module generation tests.
LIT was never really meant to generate tests during discovery,
and we probably shouldn't be doing this.
This hack is even worse than the initial attempt because it buries the
"UNSUPPORTED" at the bottom of the test.
---
libcxx/test/libcxx/module_std.gen.py| 5 +
libcxx/test/libcxx/module_std_compat.gen.py | 5 +
2 files changed, 10 insertions(+)
diff --git a/libcxx/test/libcxx/module_std.gen.py
b/libcxx/test/libcxx/module_std.gen.py
index a9a05a0cd74e61..3bc6ddbd882031 100644
--- a/libcxx/test/libcxx/module_std.gen.py
+++ b/libcxx/test/libcxx/module_std.gen.py
@@ -16,7 +16,11 @@
# to be one monolitic test. Since the test doesn't take very long it's
# not a huge issue.
+# WARNING: Disabled at the bottom. Fix this test and remove the UNSUPPORTED
line
+# TODO: Re-enable this test once we understand why it keeps timing out.
+
# RUN: %{python} %s %{libcxx}/utils
+# END.
import sys
@@ -35,4 +39,5 @@
print("//--- module_std.sh.cpp")
+print('// UNSUPPORTED: clang')
generator.write_test("std")
diff --git a/libcxx/test/libcxx/module_std_compat.gen.py
b/libcxx/test/libcxx/module_std_compat.gen.py
index 270d131779e5bf..c1e74eb379c8ab 100644
--- a/libcxx/test/libcxx/module_std_compat.gen.py
+++ b/libcxx/test/libcxx/module_std_compat.gen.py
@@ -16,7 +16,11 @@
# to be one monolitic test. Since the test doesn't take very long it's
# not a huge issue.
+# WARNING: Disabled at the bottom. Fix this test and remove the UNSUPPORTED
line
+# TODO: Re-enable this test once we understand why it keeps timing out.
+
# RUN: %{python} %s %{libcxx}/utils
+# END.
import sys
@@ -36,6 +40,7 @@
print("//--- module_std_compat.sh.cpp")
+print("// UNSUPPORTED: clang")
generator.write_test(
"std.compat",
module_c_headers,
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[llvm-branch-commits] [libcxx] [libc++] Cherry-pick the disabling of modules tests onto release/18.x (PR #85247)
llvmbot wrote:
@llvm/pr-subscribers-libcxx
Author: Louis Dionne (ldionne)
Changes
LIT was never really meant to generate tests during discovery, and we probably
shouldn't be doing this.
This hack is even worse than the initial attempt because it buries the
"UNSUPPORTED" at the bottom of the test.
Fixes #85242
---
Full diff: https://github.com/llvm/llvm-project/pull/85247.diff
2 Files Affected:
- (modified) libcxx/test/libcxx/module_std.gen.py (+5)
- (modified) libcxx/test/libcxx/module_std_compat.gen.py (+5)
``diff
diff --git a/libcxx/test/libcxx/module_std.gen.py
b/libcxx/test/libcxx/module_std.gen.py
index a9a05a0cd74e61..3bc6ddbd882031 100644
--- a/libcxx/test/libcxx/module_std.gen.py
+++ b/libcxx/test/libcxx/module_std.gen.py
@@ -16,7 +16,11 @@
# to be one monolitic test. Since the test doesn't take very long it's
# not a huge issue.
+# WARNING: Disabled at the bottom. Fix this test and remove the UNSUPPORTED
line
+# TODO: Re-enable this test once we understand why it keeps timing out.
+
# RUN: %{python} %s %{libcxx}/utils
+# END.
import sys
@@ -35,4 +39,5 @@
print("//--- module_std.sh.cpp")
+print('// UNSUPPORTED: clang')
generator.write_test("std")
diff --git a/libcxx/test/libcxx/module_std_compat.gen.py
b/libcxx/test/libcxx/module_std_compat.gen.py
index 270d131779e5bf..c1e74eb379c8ab 100644
--- a/libcxx/test/libcxx/module_std_compat.gen.py
+++ b/libcxx/test/libcxx/module_std_compat.gen.py
@@ -16,7 +16,11 @@
# to be one monolitic test. Since the test doesn't take very long it's
# not a huge issue.
+# WARNING: Disabled at the bottom. Fix this test and remove the UNSUPPORTED
line
+# TODO: Re-enable this test once we understand why it keeps timing out.
+
# RUN: %{python} %s %{libcxx}/utils
+# END.
import sys
@@ -36,6 +40,7 @@
print("//--- module_std_compat.sh.cpp")
+print("// UNSUPPORTED: clang")
generator.write_test(
"std.compat",
module_c_headers,
``
https://github.com/llvm/llvm-project/pull/85247
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[llvm-branch-commits] [flang][runtime] Added self-printing for InternalUnit. (PR #85181)
@@ -48,6 +55,10 @@ template class InternalDescriptorUnit :
public ConnectionState {
void BlankFillOutputRecord();
StaticDescriptor staticDescriptor_;
+ RT_OFFLOAD_VAR_GROUP_BEGIN
+ static constexpr std::size_t ownBufferSizeInBytes{1024};
+ RT_OFFLOAD_VAR_GROUP_END
klausler wrote:
Should this be one line lower?
https://github.com/llvm/llvm-project/pull/85181
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[llvm-branch-commits] [flang][runtime] Added self-printing for InternalUnit. (PR #85181)
https://github.com/klausler edited https://github.com/llvm/llvm-project/pull/85181 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang][runtime] Added self-printing for InternalUnit. (PR #85181)
https://github.com/klausler commented: If you want to support child I/O (user-defined derived type I/O) on the device, this approach of adding special behavior to the internal units won't work -- child I/O is embedded in external units. It might be clearer to support this device output path by extending the external unit class instead -- its `FileFrame` template in buffer.h can be instantiated on a `Store` that has no `Read` and only a rudimentary `Write`. https://github.com/llvm/llvm-project/pull/85181 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang][runtime] Added self-printing for InternalUnit. (PR #85181)
@@ -119,6 +120,9 @@ template void
InternalIoStatementState::BackspaceRecord() {
}
template int InternalIoStatementState::EndIoStatement() {
+ if constexpr (DIR == Direction::Output) {
klausler wrote:
If it is possible for the buffer flush to raise an error that the program can
catch via `ERR=` or `IOSTAT=`, do this in `CompleteOperation` instead.
https://github.com/llvm/llvm-project/pull/85181
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[llvm-branch-commits] [flang][runtime] Added self-printing for InternalUnit. (PR #85181)
@@ -41,6 +52,26 @@ InternalDescriptorUnit::InternalDescriptorUnit(
endfileRecordNumber = d.Elements() + 1;
}
+template void InternalDescriptorUnit::EndIoStatement() {
+ if constexpr (DIR == Direction::Output) {
+if (usesOwnBuffer) {
+ // Null terminate the buffer that contains just a single record.
+ Terminator terminator{__FILE__, __LINE__};
+ RUNTIME_CHECK(terminator,
+ furthestPositionInRecord <
+ static_cast(ownBufferSizeInBytes));
+ *reinterpret_cast(CurrentRecord() + furthestPositionInRecord) =
+ '\0';
+
+ // Print the buffer and deallocate memory.
+ // FIXME: this output does not match the regular unit 5 output.
klausler wrote:
The default output unit is 6.
https://github.com/llvm/llvm-project/pull/85181
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[llvm-branch-commits] [flang][runtime] Added self-printing for InternalUnit. (PR #85181)
@@ -41,6 +52,26 @@ InternalDescriptorUnit::InternalDescriptorUnit(
endfileRecordNumber = d.Elements() + 1;
}
+template void InternalDescriptorUnit::EndIoStatement() {
+ if constexpr (DIR == Direction::Output) {
+if (usesOwnBuffer) {
+ // Null terminate the buffer that contains just a single record.
+ Terminator terminator{__FILE__, __LINE__};
+ RUNTIME_CHECK(terminator,
+ furthestPositionInRecord <
+ static_cast(ownBufferSizeInBytes));
+ *reinterpret_cast(CurrentRecord() + furthestPositionInRecord) =
+ '\0';
+
+ // Print the buffer and deallocate memory.
+ // FIXME: this output does not match the regular unit 5 output.
+ std::printf("%s\n", descriptor().OffsetElement());
+ FreeMemory(descriptor().OffsetElement());
klausler wrote:
Why not `descriptor().Deallocate()` (and `descriptor().Allocate()`)?
https://github.com/llvm/llvm-project/pull/85181
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[llvm-branch-commits] [flang][runtime] Added self-printing for InternalUnit. (PR #85181)
@@ -48,6 +55,10 @@ template class InternalDescriptorUnit :
public ConnectionState {
void BlankFillOutputRecord();
StaticDescriptor staticDescriptor_;
+ RT_OFFLOAD_VAR_GROUP_BEGIN
+ static constexpr std::size_t ownBufferSizeInBytes{1024};
+ RT_OFFLOAD_VAR_GROUP_END
+ bool usesOwnBuffer{false};
klausler wrote:
The naming convention in the runtime (and front-end) has an underscore at the
end of the name of a private `class` data member.
https://github.com/llvm/llvm-project/pull/85181
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[llvm-branch-commits] [flang][runtime] Enable PRINT of integer32 for device. (PR #85182)
https://github.com/klausler edited https://github.com/llvm/llvm-project/pull/85182 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang][runtime] Enable PRINT of integer32 for device. (PR #85182)
https://github.com/klausler approved this pull request. https://github.com/llvm/llvm-project/pull/85182 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang][runtime] Enable PRINT of integer32 for device. (PR #85182)
@@ -368,7 +368,12 @@ static bool FormattedDerivedTypeIO(IoStatementState &io,
++j, descriptor.IncrementSubscripts(subscripts)) {
Fortran::common::optional result;
if (special) {
+#if !defined(RT_DEVICE_COMPILATION)
result = DefinedFormattedIo(io, descriptor, *type, *special, subscripts);
+#else
+ io.GetIoErrorHandler().Crash("not implemented yet: defined formatted
IO");
klausler wrote:
"... from the device"
https://github.com/llvm/llvm-project/pull/85182
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[llvm-branch-commits] [libcxx] [libc++] Cherry-pick the disabling of modules tests onto release/18.x (PR #85247)
mordante wrote: I'd rather fix the clang-tidy integration. I'm quite sure we have ODR violations since we use clang-tidy 18 with clang 17 libraries. These violations break the modules, but other clang-tidy checks may also have issues. Changing https://github.com/llvm/llvm-project/blob/release/18.x/libcxx/test/tools/clang_tidy_checks/CMakeLists.txt#L8 to 18.1 likely fixes the issue. I forgot about the release branch when I fixed this in main. https://github.com/llvm/llvm-project/pull/85247 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][CodeGen] Run PreCGRewrite on omp reduction declare ops (PR #84954)
https://github.com/clementval approved this pull request. LGTM. Just a nit comment for an even cleaner code. https://github.com/llvm/llvm-project/pull/84954 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][CodeGen] Run PreCGRewrite on omp reduction declare ops (PR #84954)
@@ -314,11 +314,8 @@ class CodeGenRewrite : public
fir::impl::CodeGenRewriteBase {
void runOnOperation() override final {
// Call runOn on all top level regions that may contain
emboxOp/arrayCoorOp.
-auto mod = getOperation();
-for (auto func : mod.getOps())
- runOn(func, func.getBody());
-for (auto global : mod.getOps())
- runOn(global, global.getRegion());
+mlir::ModuleOp mod = getOperation();
+runOn(mod);
clementval wrote:
nit: merge `ronOn()` in `runOnOperation()` since it has only a single use now.
https://github.com/llvm/llvm-project/pull/84954
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[llvm-branch-commits] [flang] [flang][CodeGen] Run PreCGRewrite on omp reduction declare ops (PR #84954)
https://github.com/clementval edited https://github.com/llvm/llvm-project/pull/84954 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][CodeGen] Run PreCGRewrite on omp reduction declare ops (PR #84954)
https://github.com/clementval edited https://github.com/llvm/llvm-project/pull/84954 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang] run CFG conversion on omp reduction declare ops (PR #84953)
clementval wrote: > > Wouldn't it be cleaner to expose the patterns via a > > `populateFirCfgConversionPatterns` function and reuse it in you extra pass > > instead of making two pass from the initial file? > > We did this recently for the FirToLLVM patterns. #83492 > > Thanks for taking a look at this. I have extracted the patterns into an > externally visible function, but I don't understand the benefit of splitting > the two CFG conversion passes out into different files. I think this could be > confusing because it would be unclear which file one should contain the > definition of those conversion patterns. Keeping it in one file makes it > clear that both do exactly the same thing on different target operations. Wouldn't applying the patterns on the module in a single pass work here as well? https://github.com/llvm/llvm-project/pull/84953 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] release/18.x: [ELF] Eliminate symbols demoted due to /DISCARD/ discarded sections (#85167) (PR #85266)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/85266
Backport 8fe3e70e810b409dce36f6d415e86f0f9b1cf22d
Requested by: @nikic
>From 122ba9f100705213774cff2038db953ff8174d91 Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Thu, 14 Mar 2024 09:51:27 -0700
Subject: [PATCH] [ELF] Eliminate symbols demoted due to /DISCARD/ discarded
sections (#85167)
#69295 demoted Defined symbols relative to discarded sections.
If such a symbol is unreferenced, the desired behavior is to
eliminate it from .symtab just like --gc-sections discarded
definitions.
Linux kernel's CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y configuration expects
that the unreferenced `unused` is not emitted to .symtab
(https://github.com/ClangBuiltLinux/linux/issues/2006).
For relocations referencing demoted symbols, the symbol index restores
to 0 like older lld (`R_X86_64_64 0` in `discard-section.s`).
Fix #85048
(cherry picked from commit 8fe3e70e810b409dce36f6d415e86f0f9b1cf22d)
---
lld/ELF/Writer.cpp | 3 +++
lld/test/ELF/linkerscript/discard-section.s | 25 +
2 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/lld/ELF/Writer.cpp b/lld/ELF/Writer.cpp
index 6df43a34be013a..8a08b0fcc90dbc 100644
--- a/lld/ELF/Writer.cpp
+++ b/lld/ELF/Writer.cpp
@@ -261,6 +261,9 @@ static void demoteDefined(Defined &sym,
DenseMap &map) {
Undefined(sym.file, sym.getName(), binding, sym.stOther, sym.type,
/*discardedSecIdx=*/map.lookup(sym.section))
.overwrite(sym);
+ // Eliminate from the symbol table, otherwise we would leave an undefined
+ // symbol if the symbol is unreferenced in the absence of GC.
+ sym.isUsedInRegularObj = false;
}
// If all references to a DSO happen to be weak, the DSO is not added to
diff --git a/lld/test/ELF/linkerscript/discard-section.s
b/lld/test/ELF/linkerscript/discard-section.s
index 24f3b2b73e991f..0bbebac59bb345 100644
--- a/lld/test/ELF/linkerscript/discard-section.s
+++ b/lld/test/ELF/linkerscript/discard-section.s
@@ -9,6 +9,9 @@
# RUN: ld.lld -r -T a.lds a.o b.o -o a.ro 2>&1 | FileCheck %s
--check-prefix=WARNING --implicit-check-not=warning:
# RUN: llvm-readelf -r -s a.ro | FileCheck %s --check-prefix=RELOC
+# RUN: ld.lld -r --gc-sections -T a.lds a.o b.o -o a.gc.ro --no-fatal-warnings
+# RUN: llvm-readelf -r -s a.gc.ro | FileCheck %s --check-prefix=RELOC-GC
+
# LOCAL: error: relocation refers to a discarded section: .aaa
# LOCAL-NEXT: >>> defined in a.o
# LOCAL-NEXT: >>> referenced by a.o:(.bbb+0x0)
@@ -32,16 +35,18 @@
# WARNING: warning: relocation refers to a discarded section: .aaa
# WARNING-NEXT: >>> referenced by a.o:(.rela.bbb+0x0)
+## GNU ld reports "defined in discarded secion" errors even in -r mode.
+## We set the symbol index to 0.
# RELOC: Relocation section '.rela.bbb' at offset {{.*}} contains 1
entries:
# RELOC-NEXT: Offset Info Type
Symbol's Value Symbol's Name + Addend
# RELOC-NEXT: R_X86_64_NONE
0
# RELOC-EMPTY:
# RELOC-NEXT: Relocation section '.rela.data' at offset {{.*}} contains 4
entries:
# RELOC-NEXT: Offset Info Type
Symbol's Value Symbol's Name + Addend
-# RELOC-NEXT: 00050001 R_X86_64_64
global + 0
-# RELOC-NEXT: 0008 00070001 R_X86_64_64
weak + 0
-# RELOC-NEXT: 0010 00060001 R_X86_64_64
weakref1 + 0
-# RELOC-NEXT: 0018 00080001 R_X86_64_64
weakref2 + 0
+# RELOC-NEXT: 0001 R_X86_64_64
0
+# RELOC-NEXT: 0008 0001 R_X86_64_64
0
+# RELOC-NEXT: 0010 0001 R_X86_64_64
0
+# RELOC-NEXT: 0018 0001 R_X86_64_64
0
# RELOC: Num:Value Size TypeBind Vis Ndx Name
# RELOC-NEXT: 0: 0 NOTYPE LOCAL DEFAULT UND
@@ -49,23 +54,25 @@
# RELOC-NEXT: 2: 0 SECTION LOCAL DEFAULT2 .bbb
# RELOC-NEXT: 3: 0 SECTION LOCAL DEFAULT4 .data
# RELOC-NEXT: 4: 0 NOTYPE GLOBAL DEFAULT1 _start
-# RELOC-NEXT: 5: 0 NOTYPE GLOBAL DEFAULT UND global
-# RELOC-NEXT: 6: 0 NOTYPE GLOBAL DEFAULT UND weakref1
-# RELOC-NEXT: 7: 0 NOTYPE GLOBAL DEFAULT UND weak
-# RELOC-NEXT: 8: 0 NOTYPE GLOBAL DEFAULT UND weakref2
# RELOC-EMPTY:
+# RELOC-GC: There are no relocations in this file.
+
#--- a.s
.globl _start
_start:
.section .aaa,"a"
-.globl global, weakref1
+.globl global, weakref1,
[llvm-branch-commits] [lld] release/18.x: [ELF] Eliminate symbols demoted due to /DISCARD/ discarded sections (#85167) (PR #85266)
llvmbot wrote: @nikic What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/85266 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] release/18.x: [ELF] Eliminate symbols demoted due to /DISCARD/ discarded sections (#85167) (PR #85266)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/85266 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] release/18.x: [ELF] Eliminate symbols demoted due to /DISCARD/ discarded sections (#85167) (PR #85266)
llvmbot wrote:
@llvm/pr-subscribers-lld-elf
Author: None (llvmbot)
Changes
Backport 8fe3e70e810b409dce36f6d415e86f0f9b1cf22d
Requested by: @nikic
---
Full diff: https://github.com/llvm/llvm-project/pull/85266.diff
2 Files Affected:
- (modified) lld/ELF/Writer.cpp (+3)
- (modified) lld/test/ELF/linkerscript/discard-section.s (+16-9)
``diff
diff --git a/lld/ELF/Writer.cpp b/lld/ELF/Writer.cpp
index 6df43a34be013a..8a08b0fcc90dbc 100644
--- a/lld/ELF/Writer.cpp
+++ b/lld/ELF/Writer.cpp
@@ -261,6 +261,9 @@ static void demoteDefined(Defined &sym,
DenseMap &map) {
Undefined(sym.file, sym.getName(), binding, sym.stOther, sym.type,
/*discardedSecIdx=*/map.lookup(sym.section))
.overwrite(sym);
+ // Eliminate from the symbol table, otherwise we would leave an undefined
+ // symbol if the symbol is unreferenced in the absence of GC.
+ sym.isUsedInRegularObj = false;
}
// If all references to a DSO happen to be weak, the DSO is not added to
diff --git a/lld/test/ELF/linkerscript/discard-section.s
b/lld/test/ELF/linkerscript/discard-section.s
index 24f3b2b73e991f..0bbebac59bb345 100644
--- a/lld/test/ELF/linkerscript/discard-section.s
+++ b/lld/test/ELF/linkerscript/discard-section.s
@@ -9,6 +9,9 @@
# RUN: ld.lld -r -T a.lds a.o b.o -o a.ro 2>&1 | FileCheck %s
--check-prefix=WARNING --implicit-check-not=warning:
# RUN: llvm-readelf -r -s a.ro | FileCheck %s --check-prefix=RELOC
+# RUN: ld.lld -r --gc-sections -T a.lds a.o b.o -o a.gc.ro --no-fatal-warnings
+# RUN: llvm-readelf -r -s a.gc.ro | FileCheck %s --check-prefix=RELOC-GC
+
# LOCAL: error: relocation refers to a discarded section: .aaa
# LOCAL-NEXT: >>> defined in a.o
# LOCAL-NEXT: >>> referenced by a.o:(.bbb+0x0)
@@ -32,16 +35,18 @@
# WARNING: warning: relocation refers to a discarded section: .aaa
# WARNING-NEXT: >>> referenced by a.o:(.rela.bbb+0x0)
+## GNU ld reports "defined in discarded secion" errors even in -r mode.
+## We set the symbol index to 0.
# RELOC: Relocation section '.rela.bbb' at offset {{.*}} contains 1
entries:
# RELOC-NEXT: Offset Info Type
Symbol's Value Symbol's Name + Addend
# RELOC-NEXT: R_X86_64_NONE
0
# RELOC-EMPTY:
# RELOC-NEXT: Relocation section '.rela.data' at offset {{.*}} contains 4
entries:
# RELOC-NEXT: Offset Info Type
Symbol's Value Symbol's Name + Addend
-# RELOC-NEXT: 00050001 R_X86_64_64
global + 0
-# RELOC-NEXT: 0008 00070001 R_X86_64_64
weak + 0
-# RELOC-NEXT: 0010 00060001 R_X86_64_64
weakref1 + 0
-# RELOC-NEXT: 0018 00080001 R_X86_64_64
weakref2 + 0
+# RELOC-NEXT: 0001 R_X86_64_64
0
+# RELOC-NEXT: 0008 0001 R_X86_64_64
0
+# RELOC-NEXT: 0010 0001 R_X86_64_64
0
+# RELOC-NEXT: 0018 0001 R_X86_64_64
0
# RELOC: Num:Value Size TypeBind Vis Ndx Name
# RELOC-NEXT: 0: 0 NOTYPE LOCAL DEFAULT UND
@@ -49,23 +54,25 @@
# RELOC-NEXT: 2: 0 SECTION LOCAL DEFAULT2 .bbb
# RELOC-NEXT: 3: 0 SECTION LOCAL DEFAULT4 .data
# RELOC-NEXT: 4: 0 NOTYPE GLOBAL DEFAULT1 _start
-# RELOC-NEXT: 5: 0 NOTYPE GLOBAL DEFAULT UND global
-# RELOC-NEXT: 6: 0 NOTYPE GLOBAL DEFAULT UND weakref1
-# RELOC-NEXT: 7: 0 NOTYPE GLOBAL DEFAULT UND weak
-# RELOC-NEXT: 8: 0 NOTYPE GLOBAL DEFAULT UND weakref2
# RELOC-EMPTY:
+# RELOC-GC: There are no relocations in this file.
+
#--- a.s
.globl _start
_start:
.section .aaa,"a"
-.globl global, weakref1
+.globl global, weakref1, unused
.weak weak, weakref2
global:
weak:
weakref1:
weakref2:
+## Eliminate `unused` just like GC discarded definitions.
+## Linux kernel's CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y configuration expects
+## that the unreferenced `unused` is not emitted to .symtab.
+unused:
.quad 0
.section .bbb,"aw"
``
https://github.com/llvm/llvm-project/pull/85266
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[llvm-branch-commits] [llvm] release/18.x: [llvm][AArch64] Autoupgrade function attributes from Module attributes. (#82763) (PR #84039)
https://github.com/nickdesaulniers closed https://github.com/llvm/llvm-project/pull/84039 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [llvm][AArch64] Autoupgrade function attributes from Module attributes. (#82763) (PR #84039)
nickdesaulniers wrote: Changing my mind here, we've identified the issue with this commit. https://github.com/llvm/llvm-project/pull/82763#issuecomment-1997950893 https://github.com/llvm/llvm-project/pull/84039 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 8b409ee - Revert "[llvm][AArch64] Autoupgrade function attributes from Module attribute…"
Author: Daniel Kiss
Date: 2024-03-14T19:15:27+01:00
New Revision: 8b409ee0cbb362e09cc80e4af9ef67681a7d9fbc
URL:
https://github.com/llvm/llvm-project/commit/8b409ee0cbb362e09cc80e4af9ef67681a7d9fbc
DIFF:
https://github.com/llvm/llvm-project/commit/8b409ee0cbb362e09cc80e4af9ef67681a7d9fbc.diff
LOG: Revert "[llvm][AArch64] Autoupgrade function attributes from Module
attribute…"
This reverts commit ded5de11faca916e0434df2e43653559d564c2df.
Added:
Modified:
llvm/include/llvm/IR/AutoUpgrade.h
llvm/lib/IR/AutoUpgrade.cpp
llvm/lib/Linker/IRMover.cpp
llvm/test/LTO/AArch64/link-branch-target-enforcement.ll
llvm/test/Linker/link-arm-and-thumb.ll
Removed:
llvm/test/LTO/AArch64/link-sign-return-address.ll
diff --git a/llvm/include/llvm/IR/AutoUpgrade.h
b/llvm/include/llvm/IR/AutoUpgrade.h
index 1ef32bcb121bec..152f781ffa9b30 100644
--- a/llvm/include/llvm/IR/AutoUpgrade.h
+++ b/llvm/include/llvm/IR/AutoUpgrade.h
@@ -88,9 +88,6 @@ namespace llvm {
/// info. Return true if module is modified.
bool UpgradeDebugInfo(Module &M);
- /// Copies module attributes to the functions in the module.
- void CopyModuleAttrToFunctions(Module &M);
-
/// Check whether a string looks like an old loop attachment tag.
inline bool mayBeOldLoopAttachmentTag(StringRef Name) {
return Name.starts_with("llvm.vectorizer.");
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
index 25992395e471b3..be0abb4b71dae2 100644
--- a/llvm/lib/IR/AutoUpgrade.cpp
+++ b/llvm/lib/IR/AutoUpgrade.cpp
@@ -5178,72 +5178,6 @@ void llvm::UpgradeFunctionAttributes(Function &F) {
Arg.removeAttrs(AttributeFuncs::typeIncompatible(Arg.getType()));
}
-// Check if the module attribute is present and not zero.
-static bool isModuleAttributeSet(Module &M, const StringRef &ModAttr) {
- const auto *Attr =
- mdconst::extract_or_null(M.getModuleFlag(ModAttr));
- return Attr && Attr->getZExtValue();
-}
-
-// Copy an attribute from module to the function if exists.
-// First value of the pair is used when the module attribute is not zero
-// the second otherwise.
-static void
-CopyModuleAttributeToFunction(Function &F, StringRef FnAttrName,
- StringRef ModAttrName,
- std::pair Values) {
- if (F.hasFnAttribute(FnAttrName))
-return;
- F.addFnAttr(FnAttrName, isModuleAttributeSet(*F.getParent(), ModAttrName)
- ? Values.first
- : Values.second);
-}
-
-// Copy a boolean attribute from module to the function if exists.
-// Module attribute treated false if zero otherwise true.
-static void CopyModuleAttributeToFunction(Function &F, StringRef AttrName) {
- CopyModuleAttributeToFunction(
- F, AttrName, AttrName,
- std::make_pair("true", "false"));
-}
-
-// Copy an attribute from module to the function if exists.
-// First value of the pair is used when the module attribute is not zero
-// the second otherwise.
-static void
-CopyModuleAttributeToFunction(Function &F, StringRef AttrName,
- std::pair Values) {
- CopyModuleAttributeToFunction(F, AttrName, AttrName, Values);
-}
-
-void llvm::CopyModuleAttrToFunctions(Module &M) {
- Triple T(M.getTargetTriple());
- if (!T.isThumb() && !T.isARM() && !T.isAArch64())
-return;
-
- for (Function &F : M.getFunctionList()) {
-if (F.isDeclaration())
- continue;
-
-if (!F.hasFnAttribute("sign-return-address")) {
- StringRef SignType = "none";
- if (isModuleAttributeSet(M, "sign-return-address"))
-SignType = "non-leaf";
-
- if (isModuleAttributeSet(M, "sign-return-address-all"))
-SignType = "all";
-
- F.addFnAttr("sign-return-address", SignType);
-}
-CopyModuleAttributeToFunction(F, "branch-target-enforcement");
-CopyModuleAttributeToFunction(F, "branch-protection-pauth-lr");
-CopyModuleAttributeToFunction(F, "guarded-control-stack");
-CopyModuleAttributeToFunction(
-F, "sign-return-address-key",
-std::make_pair("b_key", "a_key"));
- }
-}
-
static bool isOldLoopArgument(Metadata *MD) {
auto *T = dyn_cast_or_null(MD);
if (!T)
diff --git a/llvm/lib/Linker/IRMover.cpp b/llvm/lib/Linker/IRMover.cpp
index a9afb6f7348a8f..37d21119447b9c 100644
--- a/llvm/lib/Linker/IRMover.cpp
+++ b/llvm/lib/Linker/IRMover.cpp
@@ -1606,11 +1606,6 @@ Error IRLinker::run() {
// Loop over all of the linked values to compute type mappings.
computeTypeMapping();
- // Convert module level attributes to function level attributes because
- // after merging modules the attributes might change and would have
diff erent
- // effect on the functions as the original module would have.
- CopyModuleAttrToFunctions(*SrcM);
-
std::reverse(Worklist.begin(), Worklist.end());
while (!Worklist.empty()) {
GlobalValue *GV = Worklist.bac
[llvm-branch-commits] [flang] 3cf4d10 - Revert "[flang] Lower c_ptr_eq/ne for iso_c_binding (#85135)"
Author: Valentin Clement (バレンタイン クレメン)
Date: 2024-03-14T11:26:57-07:00
New Revision: 3cf4d107af3a283c43e416aa30a6bd678cb44fcc
URL:
https://github.com/llvm/llvm-project/commit/3cf4d107af3a283c43e416aa30a6bd678cb44fcc
DIFF:
https://github.com/llvm/llvm-project/commit/3cf4d107af3a283c43e416aa30a6bd678cb44fcc.diff
LOG: Revert "[flang] Lower c_ptr_eq/ne for iso_c_binding (#85135)"
This reverts commit 15788e8dd38ffaa4336eda4c03079b6ea4d7df6d.
Added:
Modified:
flang/include/flang/Optimizer/Builder/IntrinsicCall.h
flang/lib/Optimizer/Builder/IntrinsicCall.cpp
flang/module/__fortran_builtins.f90
Removed:
flang/test/Lower/Intrinsics/c_ptr_eq_ne.f90
diff --git a/flang/include/flang/Optimizer/Builder/IntrinsicCall.h
b/flang/include/flang/Optimizer/Builder/IntrinsicCall.h
index 6927488517e63b..ca15b4bc34b29e 100644
--- a/flang/include/flang/Optimizer/Builder/IntrinsicCall.h
+++ b/flang/include/flang/Optimizer/Builder/IntrinsicCall.h
@@ -208,9 +208,6 @@ struct IntrinsicLibrary {
void genCFProcPointer(llvm::ArrayRef);
fir::ExtendedValue genCFunLoc(mlir::Type,
llvm::ArrayRef);
fir::ExtendedValue genCLoc(mlir::Type, llvm::ArrayRef);
- template
- fir::ExtendedValue genCPtrCompare(mlir::Type,
-llvm::ArrayRef);
mlir::Value genCosd(mlir::Type, llvm::ArrayRef);
void genDateAndTime(llvm::ArrayRef);
mlir::Value genDim(mlir::Type, llvm::ArrayRef);
diff --git a/flang/lib/Optimizer/Builder/IntrinsicCall.cpp
b/flang/lib/Optimizer/Builder/IntrinsicCall.cpp
index 765bfb6f611f7e..94fcfa3503114e 100644
--- a/flang/lib/Optimizer/Builder/IntrinsicCall.cpp
+++ b/flang/lib/Optimizer/Builder/IntrinsicCall.cpp
@@ -177,8 +177,6 @@ static constexpr IntrinsicHandler handlers[]{
/*isElemental=*/false},
{"c_funloc", &I::genCFunLoc, {{{"x", asBox}}}, /*isElemental=*/false},
{"c_loc", &I::genCLoc, {{{"x", asBox}}}, /*isElemental=*/false},
-{"c_ptr_eq", &I::genCPtrCompare},
-{"c_ptr_ne", &I::genCPtrCompare},
{"ceiling", &I::genCeiling},
{"char", &I::genChar},
{"cmplx",
@@ -2799,23 +2797,6 @@ IntrinsicLibrary::genCLoc(mlir::Type resultType,
return genCLocOrCFunLoc(builder, loc, resultType, args);
}
-// C_PTR_EQ and C_PTR_NE
-template
-fir::ExtendedValue
-IntrinsicLibrary::genCPtrCompare(mlir::Type resultType,
- llvm::ArrayRef args) {
- assert(args.size() == 2);
- mlir::Value cPtr1 = fir::getBase(args[0]);
- mlir::Value cPtrVal1 =
- fir::factory::genCPtrOrCFunptrValue(builder, loc, cPtr1);
- mlir::Value cPtr2 = fir::getBase(args[1]);
- mlir::Value cPtrVal2 =
- fir::factory::genCPtrOrCFunptrValue(builder, loc, cPtr2);
- mlir::Value cmp =
- builder.create(loc, pred, cPtrVal1, cPtrVal2);
- return builder.createConvert(loc, resultType, cmp);
-}
-
// CEILING
mlir::Value IntrinsicLibrary::genCeiling(mlir::Type resultType,
llvm::ArrayRef args) {
diff --git a/flang/module/__fortran_builtins.f90
b/flang/module/__fortran_builtins.f90
index 3d3dbef6d018aa..62b20103221ade 100644
--- a/flang/module/__fortran_builtins.f90
+++ b/flang/module/__fortran_builtins.f90
@@ -110,7 +110,7 @@
public :: operator(==)
interface operator(/=)
-module procedure __builtin_c_ptr_ne
+module procedure __builtin_c_ptr_eq
end interface
public :: operator(/=)
diff --git a/flang/test/Lower/Intrinsics/c_ptr_eq_ne.f90
b/flang/test/Lower/Intrinsics/c_ptr_eq_ne.f90
deleted file mode 100644
index 38468739ead526..00
--- a/flang/test/Lower/Intrinsics/c_ptr_eq_ne.f90
+++ /dev/null
@@ -1,56 +0,0 @@
-! Test C_PTR_EQ and C_PTR_NE lowering.
-! RUN: bbc -emit-hlfir -o - %s | FileCheck %s
-
-function test_c_ptr_eq(ptr1, ptr2)
- use, intrinsic :: iso_c_binding
- type(c_ptr), intent(in) :: ptr1, ptr2
- logical :: test_c_ptr_eq
- test_c_ptr_eq = (ptr1 .eq. ptr2)
-end
-
-! CHECK-LABEL: func.func @_QPtest_c_ptr_eq(
-! CHECK-SAME: %[[ARG0:.*]]:
!fir.ref>
{fir.bindc_name = "ptr1"}, %[[ARG1:.*]]:
!fir.ref>
{fir.bindc_name = "ptr2"}) -> !fir.logical<4> {
-! CHECK: %[[DECL_ARG0:.*]]:2 = hlfir.declare %[[ARG0]] {fortran_attrs =
#fir.var_attrs, uniq_name = "_QFtest_c_ptr_eqEptr1"} :
(!fir.ref>) ->
(!fir.ref>,
!fir.ref>)
-! CHECK: %[[DECL_ARG1:.*]]:2 = hlfir.declare %[[ARG1]] {fortran_attrs =
#fir.var_attrs, uniq_name = "_QFtest_c_ptr_eqEptr2"} :
(!fir.ref>) ->
(!fir.ref>,
!fir.ref>)
-! CHECK: %[[ALLOCA:.*]] = fir.alloca !fir.logical<4> {bindc_name =
"test_c_ptr_eq", uniq_name = "_QFtest_c_ptr_eqEtest_c_ptr_eq"}
-! CHECK: %[[DECL_RET:.*]]:2 = hlfir.declare %[[ALLOCA]] {uniq_name =
"_QFtest_c_ptr_eqEtest_c_ptr_eq"} : (!fir.ref>) ->
(!fir.ref>, !fir.ref>)
-! CHECK: %[[FIELD_ADDRESS:.*]] = fir.field_index __address,
!fir.type<_QM__fortran_builtinsT__builtin_c_ptr{__address:i64}>
-! CHECK: %[[COORD_ADDRESS0:.*]] = fir.coordinate_of %[[DECL_ARG
[llvm-branch-commits] [clang] [llvm] [InstallAPI] Introduce Basic Verifier (PR #85106)
https://github.com/cyndyishida updated
https://github.com/llvm/llvm-project/pull/85106
>From 192f306f8d693af77e267e1caa52799a353f4064 Mon Sep 17 00:00:00 2001
From: Cyndy Ishida
Date: Tue, 12 Mar 2024 20:56:23 -0700
Subject: [PATCH 1/3] [InstallAPI] Introduce Basic Verifier
This adds basic support for calling the verifier on global declarations
that are expected to represent symbol exports. The driver now
exclusively uses this for knowing what symbols make up a TBD file.
Future patches will actually check against the dylib's symbol table.
---
clang/include/clang/AST/Availability.h| 3 +
clang/include/clang/InstallAPI/Context.h | 4 +
.../include/clang/InstallAPI/DylibVerifier.h | 79 ++-
clang/include/clang/InstallAPI/Frontend.h | 1 -
.../clang/InstallAPI/FrontendRecords.h| 49 ++--
clang/include/clang/InstallAPI/MachO.h| 3 +
clang/lib/InstallAPI/CMakeLists.txt | 2 +
clang/lib/InstallAPI/DylibVerifier.cpp| 212 ++
clang/lib/InstallAPI/Frontend.cpp | 49 ++--
clang/lib/InstallAPI/Visitor.cpp | 101 +
clang/test/InstallAPI/asm.test| 90
.../clang-installapi/ClangInstallAPI.cpp | 12 +-
clang/tools/clang-installapi/Options.cpp | 9 +-
llvm/include/llvm/TextAPI/Record.h| 7 +-
14 files changed, 524 insertions(+), 97 deletions(-)
create mode 100644 clang/lib/InstallAPI/DylibVerifier.cpp
create mode 100644 clang/test/InstallAPI/asm.test
diff --git a/clang/include/clang/AST/Availability.h
b/clang/include/clang/AST/Availability.h
index ae3acbeffe7f18..5cfbaf0cdfbd21 100644
--- a/clang/include/clang/AST/Availability.h
+++ b/clang/include/clang/AST/Availability.h
@@ -75,6 +75,9 @@ struct AvailabilityInfo {
/// Determine if this AvailabilityInfo represents the default availability.
bool isDefault() const { return *this == AvailabilityInfo(); }
+ /// Check if the symbol has been obsoleted.
+ bool isObsoleted() const { return !Obsoleted.empty(); }
+
/// Check if the symbol is unconditionally deprecated.
///
/// i.e. \code __attribute__((deprecated)) \endcode
diff --git a/clang/include/clang/InstallAPI/Context.h
b/clang/include/clang/InstallAPI/Context.h
index bdb576d7d85fb6..074ff6f969773c 100644
--- a/clang/include/clang/InstallAPI/Context.h
+++ b/clang/include/clang/InstallAPI/Context.h
@@ -18,6 +18,7 @@
namespace clang {
namespace installapi {
class FrontendRecordsSlice;
+class DylibVerifier;
/// Struct used for generating validating InstallAPI.
/// The attributes captured represent all necessary information
@@ -45,6 +46,9 @@ struct InstallAPIContext {
/// DiagnosticsEngine for all error reporting.
DiagnosticsEngine *Diags = nullptr;
+ /// Verifier when binary dylib is passed as input.
+ std::unique_ptr Verifier = nullptr;
+
/// File Path of output location.
llvm::StringRef OutputLoc{};
diff --git a/clang/include/clang/InstallAPI/DylibVerifier.h
b/clang/include/clang/InstallAPI/DylibVerifier.h
index 1a6121b3a258b5..72c4743fdf65e0 100644
--- a/clang/include/clang/InstallAPI/DylibVerifier.h
+++ b/clang/include/clang/InstallAPI/DylibVerifier.h
@@ -9,10 +9,12 @@
#ifndef LLVM_CLANG_INSTALLAPI_DYLIBVERIFIER_H
#define LLVM_CLANG_INSTALLAPI_DYLIBVERIFIER_H
-#include "llvm/TextAPI/Target.h"
+#include "clang/Basic/Diagnostic.h"
+#include "clang/InstallAPI/MachO.h"
namespace clang {
namespace installapi {
+struct FrontendAttrs;
/// A list of InstallAPI verification modes.
enum class VerificationMode {
@@ -22,6 +24,81 @@ enum class VerificationMode {
Pedantic,
};
+/// Service responsible to tracking state of verification across the
+/// lifetime of InstallAPI.
+/// As declarations are collected during AST traversal, they are
+/// compared as symbols against what is available in the binary dylib.
+class DylibVerifier {
+private:
+ struct SymbolContext;
+
+public:
+ enum class Result { NoVerify, Ignore, Valid, Invalid };
+ struct VerifierContext {
+// Current target being verified against the AST.
+llvm::MachO::Target Target;
+
+// Query state of verification after AST has been traversed.
+Result FrontendState;
+
+// First error for AST traversal, which is tied to the target triple.
+bool DiscoveredFirstError;
+ };
+
+ DylibVerifier() = default;
+
+ DylibVerifier(llvm::MachO::Records &&Dylib, DiagnosticsEngine *Diag,
+VerificationMode Mode, bool Demangle)
+ : Dylib(std::move(Dylib)), Diag(Diag), Mode(Mode), Demangle(Demangle),
+Exports(std::make_unique()) {}
+
+ Result verify(GlobalRecord *R, const FrontendAttrs *FA);
+ Result verify(ObjCInterfaceRecord *R, const FrontendAttrs *FA);
+ Result verify(ObjCIVarRecord *R, const FrontendAttrs *FA,
+const StringRef SuperClass);
+
+ /// Initialize target for verification.
+ void setTarget(const Target &T);
+
+ /// Release ownership over exports.
+ std::unique_ptr
[llvm-branch-commits] [clang] [llvm] [InstallAPI] Introduce Basic Verifier (PR #85106)
https://github.com/cyndyishida updated
https://github.com/llvm/llvm-project/pull/85106
>From 192f306f8d693af77e267e1caa52799a353f4064 Mon Sep 17 00:00:00 2001
From: Cyndy Ishida
Date: Tue, 12 Mar 2024 20:56:23 -0700
Subject: [PATCH] [InstallAPI] Introduce Basic Verifier
This adds basic support for calling the verifier on global declarations
that are expected to represent symbol exports. The driver now
exclusively uses this for knowing what symbols make up a TBD file.
Future patches will actually check against the dylib's symbol table.
---
clang/include/clang/AST/Availability.h| 3 +
clang/include/clang/InstallAPI/Context.h | 4 +
.../include/clang/InstallAPI/DylibVerifier.h | 79 ++-
clang/include/clang/InstallAPI/Frontend.h | 1 -
.../clang/InstallAPI/FrontendRecords.h| 49 ++--
clang/include/clang/InstallAPI/MachO.h| 3 +
clang/lib/InstallAPI/CMakeLists.txt | 2 +
clang/lib/InstallAPI/DylibVerifier.cpp| 212 ++
clang/lib/InstallAPI/Frontend.cpp | 49 ++--
clang/lib/InstallAPI/Visitor.cpp | 101 +
clang/test/InstallAPI/asm.test| 90
.../clang-installapi/ClangInstallAPI.cpp | 12 +-
clang/tools/clang-installapi/Options.cpp | 9 +-
llvm/include/llvm/TextAPI/Record.h| 7 +-
14 files changed, 524 insertions(+), 97 deletions(-)
create mode 100644 clang/lib/InstallAPI/DylibVerifier.cpp
create mode 100644 clang/test/InstallAPI/asm.test
diff --git a/clang/include/clang/AST/Availability.h
b/clang/include/clang/AST/Availability.h
index ae3acbeffe7f18..5cfbaf0cdfbd21 100644
--- a/clang/include/clang/AST/Availability.h
+++ b/clang/include/clang/AST/Availability.h
@@ -75,6 +75,9 @@ struct AvailabilityInfo {
/// Determine if this AvailabilityInfo represents the default availability.
bool isDefault() const { return *this == AvailabilityInfo(); }
+ /// Check if the symbol has been obsoleted.
+ bool isObsoleted() const { return !Obsoleted.empty(); }
+
/// Check if the symbol is unconditionally deprecated.
///
/// i.e. \code __attribute__((deprecated)) \endcode
diff --git a/clang/include/clang/InstallAPI/Context.h
b/clang/include/clang/InstallAPI/Context.h
index bdb576d7d85fb6..074ff6f969773c 100644
--- a/clang/include/clang/InstallAPI/Context.h
+++ b/clang/include/clang/InstallAPI/Context.h
@@ -18,6 +18,7 @@
namespace clang {
namespace installapi {
class FrontendRecordsSlice;
+class DylibVerifier;
/// Struct used for generating validating InstallAPI.
/// The attributes captured represent all necessary information
@@ -45,6 +46,9 @@ struct InstallAPIContext {
/// DiagnosticsEngine for all error reporting.
DiagnosticsEngine *Diags = nullptr;
+ /// Verifier when binary dylib is passed as input.
+ std::unique_ptr Verifier = nullptr;
+
/// File Path of output location.
llvm::StringRef OutputLoc{};
diff --git a/clang/include/clang/InstallAPI/DylibVerifier.h
b/clang/include/clang/InstallAPI/DylibVerifier.h
index 1a6121b3a258b5..72c4743fdf65e0 100644
--- a/clang/include/clang/InstallAPI/DylibVerifier.h
+++ b/clang/include/clang/InstallAPI/DylibVerifier.h
@@ -9,10 +9,12 @@
#ifndef LLVM_CLANG_INSTALLAPI_DYLIBVERIFIER_H
#define LLVM_CLANG_INSTALLAPI_DYLIBVERIFIER_H
-#include "llvm/TextAPI/Target.h"
+#include "clang/Basic/Diagnostic.h"
+#include "clang/InstallAPI/MachO.h"
namespace clang {
namespace installapi {
+struct FrontendAttrs;
/// A list of InstallAPI verification modes.
enum class VerificationMode {
@@ -22,6 +24,81 @@ enum class VerificationMode {
Pedantic,
};
+/// Service responsible to tracking state of verification across the
+/// lifetime of InstallAPI.
+/// As declarations are collected during AST traversal, they are
+/// compared as symbols against what is available in the binary dylib.
+class DylibVerifier {
+private:
+ struct SymbolContext;
+
+public:
+ enum class Result { NoVerify, Ignore, Valid, Invalid };
+ struct VerifierContext {
+// Current target being verified against the AST.
+llvm::MachO::Target Target;
+
+// Query state of verification after AST has been traversed.
+Result FrontendState;
+
+// First error for AST traversal, which is tied to the target triple.
+bool DiscoveredFirstError;
+ };
+
+ DylibVerifier() = default;
+
+ DylibVerifier(llvm::MachO::Records &&Dylib, DiagnosticsEngine *Diag,
+VerificationMode Mode, bool Demangle)
+ : Dylib(std::move(Dylib)), Diag(Diag), Mode(Mode), Demangle(Demangle),
+Exports(std::make_unique()) {}
+
+ Result verify(GlobalRecord *R, const FrontendAttrs *FA);
+ Result verify(ObjCInterfaceRecord *R, const FrontendAttrs *FA);
+ Result verify(ObjCIVarRecord *R, const FrontendAttrs *FA,
+const StringRef SuperClass);
+
+ /// Initialize target for verification.
+ void setTarget(const Target &T);
+
+ /// Release ownership over exports.
+ std::unique_ptr getE
[llvm-branch-commits] [libcxx] [libc++] Cherry-pick the disabling of modules tests onto release/18.x (PR #85247)
https://github.com/ldionne closed https://github.com/llvm/llvm-project/pull/85247 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++] Cherry-pick the disabling of modules tests onto release/18.x (PR #85247)
ldionne wrote: @mordante So should I close this PR? https://github.com/llvm/llvm-project/pull/85247 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++] Cherry-pick the disabling of modules tests onto release/18.x (PR #85247)
mordante wrote: > @mordante So should I close this PR? I see you already did. Do you want to make a fix for the release branch or do you want me to pick that up? https://github.com/llvm/llvm-project/pull/85247 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++] Cherry-pick the disabling of modules tests onto release/18.x (PR #85247)
ldionne wrote: Is the fix only to switch to 18.1 in the cmake? I can do that if that's it, I just don't fully understand the situation w/ clang tidy ODR violations since you were the one to make these changes https://github.com/llvm/llvm-project/pull/85247 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++] Cherry-pick the disabling of modules tests onto release/18.x (PR #85247)
mordante wrote: > Is the fix only to switch to 18.1 in the cmake? I can do that if that's it, I > just don't fully understand the situation w/ clang tidy ODR violations since > you were the one to make these changes That should be all. I'm also happy to do it, but that will be tomorrow. https://github.com/llvm/llvm-project/pull/85247 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++] Use clang-tidy version that matches the compiler we use in the CI (PR #85305)
https://github.com/ldionne milestoned https://github.com/llvm/llvm-project/pull/85305 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++] Use clang-tidy version that matches the compiler we use in the CI (PR #85305)
https://github.com/ldionne created
https://github.com/llvm/llvm-project/pull/85305
This works around ODR violations in the clang-tidy plugin we use to perform the
modules tests.
Fixes #85242
>From 810c55db5c92f5786a4c2b1b1336dd8b62f28f86 Mon Sep 17 00:00:00 2001
From: Louis Dionne
Date: Thu, 14 Mar 2024 16:18:54 -0400
Subject: [PATCH] [libc++] Use clang-tidy version that matches the compiler we
use in the CI
This works around ODR violations in the clang-tidy plugin we use to
perform the modules tests.
Fixes #85242
---
libcxx/test/tools/clang_tidy_checks/CMakeLists.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libcxx/test/tools/clang_tidy_checks/CMakeLists.txt
b/libcxx/test/tools/clang_tidy_checks/CMakeLists.txt
index 978e7095216522..a52140e2b9938a 100644
--- a/libcxx/test/tools/clang_tidy_checks/CMakeLists.txt
+++ b/libcxx/test/tools/clang_tidy_checks/CMakeLists.txt
@@ -5,7 +5,7 @@
set(LLVM_DIR_SAVE ${LLVM_DIR})
set(Clang_DIR_SAVE ${Clang_DIR})
-find_package(Clang 18)
+find_package(Clang 18.1)
if (NOT Clang_FOUND)
find_package(Clang 17)
endif()
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[llvm-branch-commits] [libcxx] [libc++] Use clang-tidy version that matches the compiler we use in the CI (PR #85305)
llvmbot wrote:
@llvm/pr-subscribers-libcxx
Author: Louis Dionne (ldionne)
Changes
This works around ODR violations in the clang-tidy plugin we use to perform the
modules tests.
Fixes #85242
---
Full diff: https://github.com/llvm/llvm-project/pull/85305.diff
1 Files Affected:
- (modified) libcxx/test/tools/clang_tidy_checks/CMakeLists.txt (+1-1)
``diff
diff --git a/libcxx/test/tools/clang_tidy_checks/CMakeLists.txt
b/libcxx/test/tools/clang_tidy_checks/CMakeLists.txt
index 978e7095216522..a52140e2b9938a 100644
--- a/libcxx/test/tools/clang_tidy_checks/CMakeLists.txt
+++ b/libcxx/test/tools/clang_tidy_checks/CMakeLists.txt
@@ -5,7 +5,7 @@
set(LLVM_DIR_SAVE ${LLVM_DIR})
set(Clang_DIR_SAVE ${Clang_DIR})
-find_package(Clang 18)
+find_package(Clang 18.1)
if (NOT Clang_FOUND)
find_package(Clang 17)
endif()
``
https://github.com/llvm/llvm-project/pull/85305
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[llvm-branch-commits] [libcxx] [libc++] Cherry-pick the disabling of modules tests onto release/18.x (PR #85247)
ldionne wrote: No worries! I just created https://github.com/llvm/llvm-project/pull/85305, hopefully that should do the trick. https://github.com/llvm/llvm-project/pull/85247 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC] [hwasan] factor get[PC|FP] out of HWASan class (PR #84404)
@@ -1246,32 +1244,16 @@ Value
*HWAddressSanitizer::getHwasanThreadSlotPtr(IRBuilder<> &IRB, Type *Ty) {
return nullptr;
}
-Value *HWAddressSanitizer::getPC(IRBuilder<> &IRB) {
- if (TargetTriple.getArch() == Triple::aarch64)
-return readRegister(IRB, "pc");
- return IRB.CreatePtrToInt(IRB.GetInsertBlock()->getParent(), IntptrTy);
-}
-
-Value *HWAddressSanitizer::getFP(IRBuilder<> &IRB) {
- if (!CachedSP) {
-// FIXME: use addressofreturnaddress (but implement it in aarch64 backend
-// first).
-Function *F = IRB.GetInsertBlock()->getParent();
-Module *M = F->getParent();
-auto *GetStackPointerFn = Intrinsic::getDeclaration(
-M, Intrinsic::frameaddress,
-IRB.getPtrTy(M->getDataLayout().getAllocaAddrSpace()));
-CachedSP = IRB.CreatePtrToInt(
-IRB.CreateCall(GetStackPointerFn, {Constant::getNullValue(Int32Ty)}),
-IntptrTy);
- }
+Value *HWAddressSanitizer::getCachedSP(IRBuilder<> &IRB) {
+ if (!CachedSP)
+CachedSP = memtag::getSP(IRB);
fmayer wrote:
I don't understand what we are talking about. If you say the naming is
incorrect, yeah, maybe. But the change is obviously NFC, because all it does is
* rename getFP to getCachedSP
* pull out the `(!CachedSP)` into a function
https://github.com/llvm/llvm-project/pull/84404
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[llvm-branch-commits] [llvm] [NFC] [hwasan] factor get[PC|FP] out of HWASan class (PR #84404)
https://github.com/fmayer updated
https://github.com/llvm/llvm-project/pull/84404
>From de96c71240c4c1021d8267cd8ccee4abc9299257 Mon Sep 17 00:00:00 2001
From: Florian Mayer
Date: Thu, 14 Mar 2024 13:52:22 -0700
Subject: [PATCH] rename
Created using spr 1.3.4
---
.../Transforms/Utils/MemoryTaggingSupport.h | 2 +-
.../Instrumentation/HWAddressSanitizer.cpp| 30 +--
.../Transforms/Utils/MemoryTaggingSupport.cpp | 4 +--
3 files changed, 17 insertions(+), 19 deletions(-)
diff --git a/llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
b/llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
index cbbb8ff34a59e6..8c77e5efc96a3e 100644
--- a/llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
+++ b/llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
@@ -81,7 +81,7 @@ uint64_t getAllocaSizeInBytes(const AllocaInst &AI);
void alignAndPadAlloca(memtag::AllocaInfo &Info, llvm::Align Align);
Value *readRegister(IRBuilder<> &IRB, StringRef Name);
-Value *getSP(IRBuilder<> &IRB);
+Value *getFP(IRBuilder<> &IRB);
Value *getPC(const Triple &TargetTriple, IRBuilder<> &IRB);
} // namespace memtag
diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
index 58361fc9d6dfae..0c15941dda8bb6 100644
--- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -371,7 +371,7 @@ class HWAddressSanitizer {
void instrumentGlobal(GlobalVariable *GV, uint8_t Tag);
void instrumentGlobals();
- Value *getCachedSP(IRBuilder<> &IRB);
+ Value *getCachedFP(IRBuilder<> &IRB);
Value *getFrameRecordInfo(IRBuilder<> &IRB);
void instrumentPersonalityFunctions();
@@ -446,7 +446,7 @@ class HWAddressSanitizer {
Value *ShadowBase = nullptr;
Value *StackBaseTag = nullptr;
- Value *CachedSP = nullptr;
+ Value *CachedFP = nullptr;
GlobalValue *ThreadPtrGlobal = nullptr;
};
@@ -1166,10 +1166,10 @@ Value *HWAddressSanitizer::getStackBaseTag(IRBuilder<>
&IRB) {
// Extract some entropy from the stack pointer for the tags.
// Take bits 20..28 (ASLR entropy) and xor with bits 0..8 (these differ
// between functions).
- Value *StackPointerLong = getCachedSP(IRB);
+ Value *FramePointerLong = getCachedFP(IRB);
Value *StackTag =
- applyTagMask(IRB, IRB.CreateXor(StackPointerLong,
- IRB.CreateLShr(StackPointerLong, 20)));
+ applyTagMask(IRB, IRB.CreateXor(FramePointerLong,
+ IRB.CreateLShr(FramePointerLong, 20)));
StackTag->setName("hwasan.stack.base.tag");
return StackTag;
}
@@ -1183,9 +1183,9 @@ Value *HWAddressSanitizer::getAllocaTag(IRBuilder<> &IRB,
Value *StackTag,
}
Value *HWAddressSanitizer::getUARTag(IRBuilder<> &IRB) {
- Value *StackPointerLong = getCachedSP(IRB);
+ Value *FramePointerLong = getCachedFP(IRB);
Value *UARTag =
- applyTagMask(IRB, IRB.CreateLShr(StackPointerLong, PointerTagShift));
+ applyTagMask(IRB, IRB.CreateLShr(FramePointerLong, PointerTagShift));
UARTag->setName("hwasan.uar.tag");
return UARTag;
@@ -1244,16 +1244,16 @@ Value
*HWAddressSanitizer::getHwasanThreadSlotPtr(IRBuilder<> &IRB, Type *Ty) {
return nullptr;
}
-Value *HWAddressSanitizer::getCachedSP(IRBuilder<> &IRB) {
- if (!CachedSP)
-CachedSP = memtag::getSP(IRB);
- return CachedSP;
+Value *HWAddressSanitizer::getCachedFP(IRBuilder<> &IRB) {
+ if (!CachedFP)
+CachedFP = memtag::getFP(IRB);
+ return CachedFP;
}
Value *HWAddressSanitizer::getFrameRecordInfo(IRBuilder<> &IRB) {
// Prepare ring buffer data.
Value *PC = memtag::getPC(TargetTriple, IRB);
- Value *SP = getCachedSP(IRB);
+ Value *FP = getCachedFP(IRB);
// Mix SP and PC.
// Assumptions:
@@ -1261,8 +1261,8 @@ Value *HWAddressSanitizer::getFrameRecordInfo(IRBuilder<>
&IRB) {
// SP is 0xsss0 (4 lower bits are zero)
// We only really need ~20 lower non-zero bits (), so we mix like this:
// 0x
- SP = IRB.CreateShl(SP, 44);
- return IRB.CreateOr(PC, SP);
+ FP = IRB.CreateShl(FP, 44);
+ return IRB.CreateOr(PC, FP);
}
void HWAddressSanitizer::emitPrologue(IRBuilder<> &IRB, bool WithFrameRecord) {
@@ -1615,7 +1615,7 @@ void HWAddressSanitizer::sanitizeFunction(Function &F,
ShadowBase = nullptr;
StackBaseTag = nullptr;
- CachedSP = nullptr;
+ CachedFP = nullptr;
}
void HWAddressSanitizer::instrumentGlobal(GlobalVariable *GV, uint8_t Tag) {
diff --git a/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
b/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
index 8b97a2745b1f8a..14cb965ff167f6 100644
--- a/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
+++ b/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
@@ -256,9 +256,7 @@ Value *getPC(const Triple &TargetTriple, IRBuilder<> &IRB) {
IRB.getIntPtrTy(M->getDataLay
[llvm-branch-commits] [llvm] [NFC] [hwasan] factor get[PC|FP] out of HWASan class (PR #84404)
@@ -236,5 +238,37 @@ void alignAndPadAlloca(memtag::AllocaInfo &Info,
llvm::Align Alignment) {
Info.AI = NewAI;
}
+Value *readRegister(IRBuilder<> &IRB, StringRef Name) {
+ Module *M = IRB.GetInsertBlock()->getParent()->getParent();
+ Function *ReadRegister = Intrinsic::getDeclaration(
+ M, Intrinsic::read_register, IRB.getIntPtrTy(M->getDataLayout()));
+ MDNode *MD =
+ MDNode::get(M->getContext(), {MDString::get(M->getContext(), Name)});
+ Value *Args[] = {MetadataAsValue::get(M->getContext(), MD)};
+ return IRB.CreateCall(ReadRegister, Args);
+}
+
+Value *getPC(const Triple &TargetTriple, IRBuilder<> &IRB) {
+ Module *M = IRB.GetInsertBlock()->getParent()->getParent();
+ if (TargetTriple.getArch() == Triple::aarch64)
+return memtag::readRegister(IRB, "pc");
+ return IRB.CreatePtrToInt(IRB.GetInsertBlock()->getParent(),
+IRB.getIntPtrTy(M->getDataLayout()));
+}
+
+Value *getSP(IRBuilder<> &IRB) {
fmayer wrote:
Done
https://github.com/llvm/llvm-project/pull/84404
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[llvm-branch-commits] [llvm] [NFC] [hwasan] factor get[PC|FP] out of HWASan class (PR #84404)
@@ -236,5 +238,37 @@ void alignAndPadAlloca(memtag::AllocaInfo &Info,
llvm::Align Alignment) {
Info.AI = NewAI;
}
+Value *readRegister(IRBuilder<> &IRB, StringRef Name) {
+ Module *M = IRB.GetInsertBlock()->getParent()->getParent();
+ Function *ReadRegister = Intrinsic::getDeclaration(
+ M, Intrinsic::read_register, IRB.getIntPtrTy(M->getDataLayout()));
+ MDNode *MD =
+ MDNode::get(M->getContext(), {MDString::get(M->getContext(), Name)});
+ Value *Args[] = {MetadataAsValue::get(M->getContext(), MD)};
+ return IRB.CreateCall(ReadRegister, Args);
+}
+
+Value *getPC(const Triple &TargetTriple, IRBuilder<> &IRB) {
+ Module *M = IRB.GetInsertBlock()->getParent()->getParent();
+ if (TargetTriple.getArch() == Triple::aarch64)
+return memtag::readRegister(IRB, "pc");
+ return IRB.CreatePtrToInt(IRB.GetInsertBlock()->getParent(),
+IRB.getIntPtrTy(M->getDataLayout()));
+}
+
+Value *getSP(IRBuilder<> &IRB) {
+ // FIXME: use addressofreturnaddress (but implement it in aarch64 backend
fmayer wrote:
Done
https://github.com/llvm/llvm-project/pull/84404
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[llvm-branch-commits] [lld] release/18.x: [ELF] Eliminate symbols demoted due to /DISCARD/ discarded sections (#85167) (PR #85266)
https://github.com/MaskRay approved this pull request. https://github.com/llvm/llvm-project/pull/85266 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [NFC] [hwasan] factor get[PC|FP] out of HWASan class (PR #84404)
https://github.com/fmayer updated
https://github.com/llvm/llvm-project/pull/84404
>From de96c71240c4c1021d8267cd8ccee4abc9299257 Mon Sep 17 00:00:00 2001
From: Florian Mayer
Date: Thu, 14 Mar 2024 13:52:22 -0700
Subject: [PATCH 1/2] rename
Created using spr 1.3.4
---
.../Transforms/Utils/MemoryTaggingSupport.h | 2 +-
.../Instrumentation/HWAddressSanitizer.cpp| 30 +--
.../Transforms/Utils/MemoryTaggingSupport.cpp | 4 +--
3 files changed, 17 insertions(+), 19 deletions(-)
diff --git a/llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
b/llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
index cbbb8ff34a59e6..8c77e5efc96a3e 100644
--- a/llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
+++ b/llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
@@ -81,7 +81,7 @@ uint64_t getAllocaSizeInBytes(const AllocaInst &AI);
void alignAndPadAlloca(memtag::AllocaInfo &Info, llvm::Align Align);
Value *readRegister(IRBuilder<> &IRB, StringRef Name);
-Value *getSP(IRBuilder<> &IRB);
+Value *getFP(IRBuilder<> &IRB);
Value *getPC(const Triple &TargetTriple, IRBuilder<> &IRB);
} // namespace memtag
diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
index 58361fc9d6dfae..0c15941dda8bb6 100644
--- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -371,7 +371,7 @@ class HWAddressSanitizer {
void instrumentGlobal(GlobalVariable *GV, uint8_t Tag);
void instrumentGlobals();
- Value *getCachedSP(IRBuilder<> &IRB);
+ Value *getCachedFP(IRBuilder<> &IRB);
Value *getFrameRecordInfo(IRBuilder<> &IRB);
void instrumentPersonalityFunctions();
@@ -446,7 +446,7 @@ class HWAddressSanitizer {
Value *ShadowBase = nullptr;
Value *StackBaseTag = nullptr;
- Value *CachedSP = nullptr;
+ Value *CachedFP = nullptr;
GlobalValue *ThreadPtrGlobal = nullptr;
};
@@ -1166,10 +1166,10 @@ Value *HWAddressSanitizer::getStackBaseTag(IRBuilder<>
&IRB) {
// Extract some entropy from the stack pointer for the tags.
// Take bits 20..28 (ASLR entropy) and xor with bits 0..8 (these differ
// between functions).
- Value *StackPointerLong = getCachedSP(IRB);
+ Value *FramePointerLong = getCachedFP(IRB);
Value *StackTag =
- applyTagMask(IRB, IRB.CreateXor(StackPointerLong,
- IRB.CreateLShr(StackPointerLong, 20)));
+ applyTagMask(IRB, IRB.CreateXor(FramePointerLong,
+ IRB.CreateLShr(FramePointerLong, 20)));
StackTag->setName("hwasan.stack.base.tag");
return StackTag;
}
@@ -1183,9 +1183,9 @@ Value *HWAddressSanitizer::getAllocaTag(IRBuilder<> &IRB,
Value *StackTag,
}
Value *HWAddressSanitizer::getUARTag(IRBuilder<> &IRB) {
- Value *StackPointerLong = getCachedSP(IRB);
+ Value *FramePointerLong = getCachedFP(IRB);
Value *UARTag =
- applyTagMask(IRB, IRB.CreateLShr(StackPointerLong, PointerTagShift));
+ applyTagMask(IRB, IRB.CreateLShr(FramePointerLong, PointerTagShift));
UARTag->setName("hwasan.uar.tag");
return UARTag;
@@ -1244,16 +1244,16 @@ Value
*HWAddressSanitizer::getHwasanThreadSlotPtr(IRBuilder<> &IRB, Type *Ty) {
return nullptr;
}
-Value *HWAddressSanitizer::getCachedSP(IRBuilder<> &IRB) {
- if (!CachedSP)
-CachedSP = memtag::getSP(IRB);
- return CachedSP;
+Value *HWAddressSanitizer::getCachedFP(IRBuilder<> &IRB) {
+ if (!CachedFP)
+CachedFP = memtag::getFP(IRB);
+ return CachedFP;
}
Value *HWAddressSanitizer::getFrameRecordInfo(IRBuilder<> &IRB) {
// Prepare ring buffer data.
Value *PC = memtag::getPC(TargetTriple, IRB);
- Value *SP = getCachedSP(IRB);
+ Value *FP = getCachedFP(IRB);
// Mix SP and PC.
// Assumptions:
@@ -1261,8 +1261,8 @@ Value *HWAddressSanitizer::getFrameRecordInfo(IRBuilder<>
&IRB) {
// SP is 0xsss0 (4 lower bits are zero)
// We only really need ~20 lower non-zero bits (), so we mix like this:
// 0x
- SP = IRB.CreateShl(SP, 44);
- return IRB.CreateOr(PC, SP);
+ FP = IRB.CreateShl(FP, 44);
+ return IRB.CreateOr(PC, FP);
}
void HWAddressSanitizer::emitPrologue(IRBuilder<> &IRB, bool WithFrameRecord) {
@@ -1615,7 +1615,7 @@ void HWAddressSanitizer::sanitizeFunction(Function &F,
ShadowBase = nullptr;
StackBaseTag = nullptr;
- CachedSP = nullptr;
+ CachedFP = nullptr;
}
void HWAddressSanitizer::instrumentGlobal(GlobalVariable *GV, uint8_t Tag) {
diff --git a/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
b/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
index 8b97a2745b1f8a..14cb965ff167f6 100644
--- a/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
+++ b/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
@@ -256,9 +256,7 @@ Value *getPC(const Triple &TargetTriple, IRBuilder<> &IRB) {
IRB.getIntPtrTy(M->getDat
[llvm-branch-commits] [llvm] [NFC] [hwasan] factor get[PC|FP] out of HWASan class (PR #84404)
https://github.com/vitalybuka approved this pull request. https://github.com/llvm/llvm-project/pull/84404 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [NFC] [hwasan] factor get[PC|FP] out of HWASan class (PR #84404)
@@ -1246,32 +1244,16 @@ Value
*HWAddressSanitizer::getHwasanThreadSlotPtr(IRBuilder<> &IRB, Type *Ty) {
return nullptr;
}
-Value *HWAddressSanitizer::getPC(IRBuilder<> &IRB) {
- if (TargetTriple.getArch() == Triple::aarch64)
-return readRegister(IRB, "pc");
- return IRB.CreatePtrToInt(IRB.GetInsertBlock()->getParent(), IntptrTy);
-}
-
-Value *HWAddressSanitizer::getFP(IRBuilder<> &IRB) {
- if (!CachedSP) {
-// FIXME: use addressofreturnaddress (but implement it in aarch64 backend
-// first).
-Function *F = IRB.GetInsertBlock()->getParent();
-Module *M = F->getParent();
-auto *GetStackPointerFn = Intrinsic::getDeclaration(
-M, Intrinsic::frameaddress,
-IRB.getPtrTy(M->getDataLayout().getAllocaAddrSpace()));
-CachedSP = IRB.CreatePtrToInt(
-IRB.CreateCall(GetStackPointerFn, {Constant::getNullValue(Int32Ty)}),
-IntptrTy);
- }
+Value *HWAddressSanitizer::getCachedSP(IRBuilder<> &IRB) {
+ if (!CachedSP)
+CachedSP = memtag::getSP(IRB);
vitalybuka wrote:
Sorry, when I commented I thought you are actually switching to SP, so I
thought it's not NFC.
https://github.com/llvm/llvm-project/pull/84404
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[llvm-branch-commits] [llvm] [NFC] [hwasan] factor get[PC|FP] out of HWASan class (PR #84404)
https://github.com/fmayer closed https://github.com/llvm/llvm-project/pull/84404 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang][runtime] Added custom visitor for IoStatementState variants. (PR #85179)
vzakhari wrote:
> It would be better to have the types that are available on the device declare
> themselves so in their declarations via a member or (better) inherited trait.
Like this. I will add the type trait for those types that are available on the
device.
> The big variant union in `IoStatementState` could omit the host-only options
> when compiled for the device.
I am not sure what you are suggesting. I cannot comment out (e.g. with
`RT_DEVICE_OUTPUT` check) the members of `std::variant<...> u_` union, because
this will require commenting out all class declarations that try to explicitly
access/emplace an instance of the commented out class into the union member.
For example,
```
class NoUnitIoStatementState : public IoStatementBase {
...
template
NoUnitIoStatementState(A &stmt, const char *sourceFile = nullptr,
int sourceLine = 0, int badUnitNumber = -1)
: IoStatementBase{sourceFile, sourceLine}, ioStatementState_{stmt},
badUnitNumber_{badUnitNumber} {}
...
};
class NoopStatementState : public NoUnitIoStatementState {
public:
NoopStatementState(
const char *sourceFile = nullptr, int sourceLine = 0, int unitNumber = -1)
: NoUnitIoStatementState{*this, sourceFile, sourceLine, unitNumber} {}
...
};
```
`ioStatementState_{stmt}` is invalid if the union does not have
`NoUnitIoStatementState` variant. There are more examples like this, and there
is a lot of code that will need to be commented out for the device compilation
if I modify the union declaration. Maybe I misunderstood your comment, though.
https://github.com/llvm/llvm-project/pull/85179
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[llvm-branch-commits] [clang] [InstallAPI] Verify that declarations in headers map to exports found in dylib (PR #85348)
https://github.com/cyndyishida created
https://github.com/llvm/llvm-project/pull/85348
* This completes support for verifying every declaration found in a header is
discovered in the dylib. Diagnostics are reported for each class for
differences that are representable in TBD files.
* This patch also now captures unavailable attributes that depend on target
triples. This is needed for proper tbd file generation.
>From 56efc49e5616b1b9958263ae89a914d19421b4bd Mon Sep 17 00:00:00 2001
From: Cyndy Ishida
Date: Wed, 13 Mar 2024 18:57:14 -0700
Subject: [PATCH] [InstallAPI] Verify that declarations in header map to
symbols found in dylib
* This patch completes support for verifying every declaration found in a
header is discovered in the dylib. Diagnostics are reported for each
class for differences that is representable in TBD files.
* This patch also now captures unavailable attributes that depend on target
triples. This is needed for proper tbd file generation.
---
clang/include/clang/AST/Availability.h| 13 +-
.../clang/Basic/DiagnosticInstallAPIKinds.td | 23 +
.../include/clang/InstallAPI/DylibVerifier.h | 57 +-
clang/include/clang/InstallAPI/Frontend.h | 3 +
clang/include/clang/InstallAPI/MachO.h| 1 +
clang/lib/AST/Availability.cpp| 6 +-
clang/lib/InstallAPI/DylibVerifier.cpp| 326 -
clang/lib/InstallAPI/Visitor.cpp | 2 +-
clang/test/InstallAPI/availability.test | 626 ++
clang/test/InstallAPI/diagnostics-cpp.test| 461 +
clang/test/InstallAPI/hiddens.test| 262
.../clang-installapi/ClangInstallAPI.cpp | 6 +-
clang/tools/clang-installapi/Options.cpp | 4 +-
13 files changed, 1766 insertions(+), 24 deletions(-)
create mode 100644 clang/test/InstallAPI/availability.test
create mode 100644 clang/test/InstallAPI/diagnostics-cpp.test
create mode 100644 clang/test/InstallAPI/hiddens.test
diff --git a/clang/include/clang/AST/Availability.h
b/clang/include/clang/AST/Availability.h
index 5cfbaf0cdfbd21..2ccc607d4b63dc 100644
--- a/clang/include/clang/AST/Availability.h
+++ b/clang/include/clang/AST/Availability.h
@@ -67,6 +67,7 @@ struct AvailabilityInfo {
VersionTuple Introduced;
VersionTuple Deprecated;
VersionTuple Obsoleted;
+ bool Unavailable = false;
bool UnconditionallyDeprecated = false;
bool UnconditionallyUnavailable = false;
@@ -78,6 +79,9 @@ struct AvailabilityInfo {
/// Check if the symbol has been obsoleted.
bool isObsoleted() const { return !Obsoleted.empty(); }
+ /// Check if the symbol is unavailable for the active platform and os
version.
+ bool isUnavailable() const { return Unavailable; }
+
/// Check if the symbol is unconditionally deprecated.
///
/// i.e. \code __attribute__((deprecated)) \endcode
@@ -91,9 +95,10 @@ struct AvailabilityInfo {
}
AvailabilityInfo(StringRef Domain, VersionTuple I, VersionTuple D,
- VersionTuple O, bool UD, bool UU)
+ VersionTuple O, bool U, bool UD, bool UU)
: Domain(Domain), Introduced(I), Deprecated(D), Obsoleted(O),
-UnconditionallyDeprecated(UD), UnconditionallyUnavailable(UU) {}
+Unavailable(U), UnconditionallyDeprecated(UD),
+UnconditionallyUnavailable(UU) {}
friend bool operator==(const AvailabilityInfo &Lhs,
const AvailabilityInfo &Rhs);
@@ -105,10 +110,10 @@ struct AvailabilityInfo {
inline bool operator==(const AvailabilityInfo &Lhs,
const AvailabilityInfo &Rhs) {
return std::tie(Lhs.Introduced, Lhs.Deprecated, Lhs.Obsoleted,
- Lhs.UnconditionallyDeprecated,
+ Lhs.Unavailable, Lhs.UnconditionallyDeprecated,
Lhs.UnconditionallyUnavailable) ==
std::tie(Rhs.Introduced, Rhs.Deprecated, Rhs.Obsoleted,
- Rhs.UnconditionallyDeprecated,
+ Rhs.Unavailable, Rhs.UnconditionallyDeprecated,
Rhs.UnconditionallyUnavailable);
}
diff --git a/clang/include/clang/Basic/DiagnosticInstallAPIKinds.td
b/clang/include/clang/Basic/DiagnosticInstallAPIKinds.td
index 31be4f09cf3a1c..5ed2e23425dc5f 100644
--- a/clang/include/clang/Basic/DiagnosticInstallAPIKinds.td
+++ b/clang/include/clang/Basic/DiagnosticInstallAPIKinds.td
@@ -17,4 +17,27 @@ def err_no_install_name : Error<"no install name specified:
add -install_name ;
} // end of command line category.
+let CategoryName = "Verification" in {
+def warn_target: Warning<"violations found for %0">;
+def err_library_missing_symbol : Error<"declaration has external linkage, but
dynamic library doesn't have symbol '%0'">;
+def warn_library_missing_symbol : Warning<"declaration has external linkage,
but dynamic library doesn't have symbol '%0'">;
+def err_library_hidden_symbol : Error<"declaration has external linkage, but
symbol has internal linkage in dynamic library
[llvm-branch-commits] [clang] [InstallAPI] Verify that declarations in headers map to exports found in dylib (PR #85348)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Cyndy Ishida (cyndyishida)
Changes
* This completes support for verifying every declaration found in a header is
discovered in the dylib. Diagnostics are reported for each class for
differences that are representable in TBD files.
* This patch also now captures unavailable attributes that depend on target
triples. This is needed for proper tbd file generation.
---
Patch is 85.46 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/85348.diff
13 Files Affected:
- (modified) clang/include/clang/AST/Availability.h (+9-4)
- (modified) clang/include/clang/Basic/DiagnosticInstallAPIKinds.td (+23)
- (modified) clang/include/clang/InstallAPI/DylibVerifier.h (+51-6)
- (modified) clang/include/clang/InstallAPI/Frontend.h (+3)
- (modified) clang/include/clang/InstallAPI/MachO.h (+1)
- (modified) clang/lib/AST/Availability.cpp (+3-3)
- (modified) clang/lib/InstallAPI/DylibVerifier.cpp (+321-5)
- (modified) clang/lib/InstallAPI/Visitor.cpp (+1-1)
- (added) clang/test/InstallAPI/availability.test (+626)
- (added) clang/test/InstallAPI/diagnostics-cpp.test (+461)
- (added) clang/test/InstallAPI/hiddens.test (+262)
- (modified) clang/tools/clang-installapi/ClangInstallAPI.cpp (+2-4)
- (modified) clang/tools/clang-installapi/Options.cpp (+3-1)
``diff
diff --git a/clang/include/clang/AST/Availability.h
b/clang/include/clang/AST/Availability.h
index 5cfbaf0cdfbd21..2ccc607d4b63dc 100644
--- a/clang/include/clang/AST/Availability.h
+++ b/clang/include/clang/AST/Availability.h
@@ -67,6 +67,7 @@ struct AvailabilityInfo {
VersionTuple Introduced;
VersionTuple Deprecated;
VersionTuple Obsoleted;
+ bool Unavailable = false;
bool UnconditionallyDeprecated = false;
bool UnconditionallyUnavailable = false;
@@ -78,6 +79,9 @@ struct AvailabilityInfo {
/// Check if the symbol has been obsoleted.
bool isObsoleted() const { return !Obsoleted.empty(); }
+ /// Check if the symbol is unavailable for the active platform and os
version.
+ bool isUnavailable() const { return Unavailable; }
+
/// Check if the symbol is unconditionally deprecated.
///
/// i.e. \code __attribute__((deprecated)) \endcode
@@ -91,9 +95,10 @@ struct AvailabilityInfo {
}
AvailabilityInfo(StringRef Domain, VersionTuple I, VersionTuple D,
- VersionTuple O, bool UD, bool UU)
+ VersionTuple O, bool U, bool UD, bool UU)
: Domain(Domain), Introduced(I), Deprecated(D), Obsoleted(O),
-UnconditionallyDeprecated(UD), UnconditionallyUnavailable(UU) {}
+Unavailable(U), UnconditionallyDeprecated(UD),
+UnconditionallyUnavailable(UU) {}
friend bool operator==(const AvailabilityInfo &Lhs,
const AvailabilityInfo &Rhs);
@@ -105,10 +110,10 @@ struct AvailabilityInfo {
inline bool operator==(const AvailabilityInfo &Lhs,
const AvailabilityInfo &Rhs) {
return std::tie(Lhs.Introduced, Lhs.Deprecated, Lhs.Obsoleted,
- Lhs.UnconditionallyDeprecated,
+ Lhs.Unavailable, Lhs.UnconditionallyDeprecated,
Lhs.UnconditionallyUnavailable) ==
std::tie(Rhs.Introduced, Rhs.Deprecated, Rhs.Obsoleted,
- Rhs.UnconditionallyDeprecated,
+ Rhs.Unavailable, Rhs.UnconditionallyDeprecated,
Rhs.UnconditionallyUnavailable);
}
diff --git a/clang/include/clang/Basic/DiagnosticInstallAPIKinds.td
b/clang/include/clang/Basic/DiagnosticInstallAPIKinds.td
index 31be4f09cf3a1c..5ed2e23425dc5f 100644
--- a/clang/include/clang/Basic/DiagnosticInstallAPIKinds.td
+++ b/clang/include/clang/Basic/DiagnosticInstallAPIKinds.td
@@ -17,4 +17,27 @@ def err_no_install_name : Error<"no install name specified:
add -install_name ;
} // end of command line category.
+let CategoryName = "Verification" in {
+def warn_target: Warning<"violations found for %0">;
+def err_library_missing_symbol : Error<"declaration has external linkage, but
dynamic library doesn't have symbol '%0'">;
+def warn_library_missing_symbol : Warning<"declaration has external linkage,
but dynamic library doesn't have symbol '%0'">;
+def err_library_hidden_symbol : Error<"declaration has external linkage, but
symbol has internal linkage in dynamic library '%0'">;
+def warn_library_hidden_symbol : Warning<"declaration has external linkage,
but symbol has internal linkage in dynamic library '%0'">;
+def warn_header_hidden_symbol : Warning<"symbol exported in dynamic library,
but marked hidden in declaration '%0'">;
+def err_header_hidden_symbol : Error<"symbol exported in dynamic library, but
marked hidden in declaration '%0'">;
+def err_header_symbol_missing : Error<"no declaration found for exported
symbol '%0' in dynamic library">;
+def warn_header_availability_mismatch : Warning<"declaration '%0' is marked
%select{available|unavailable}1,"
+
[llvm-branch-commits] [mlir] [mlir][sparse] Add `has_runtime_library` test op (PR #85355)
https://github.com/matthias-springer created
https://github.com/llvm/llvm-project/pull/85355
This commit adds a new test-only op:
`sparse_tensor.has_runtime_library`. The op returns "1" if the sparse compiler
runs in runtime library mode.
This op is useful for writing test cases that require different IR depending on
whether the sparse compiler runs in runtime library or codegen mode.
This commit fixes a memory leak in `sparse_pack_d.mlir`. This test case uses
`sparse_tensor.assemble` to create a sparse tensor SSA value from existing
buffers. This runtime library reallocates+copies the existing buffers; the
codegen path does not. Therefore, the test requires additional deallocations
when running in runtime library mode.
Alternatives considered:
- Make the codegen path allocate. "Codegen" is the "default" compilation mode
and it is handling `sparse_tensor.assemble` correctly. The issue is with the
runtime library path, which should not allocate. Therefore, it is better to put
a workaround in the runtime library path than to work around the issue with a
new flag in the codegen path.
- Add a `sparse_tensor.runtime_only` attribute to
`bufferization.dealloc_tensor`. Verifying that the attribute can only be
attached to `bufferization.dealloc_tensor` may introduce an unwanted dependency
of `MLIRSparseTensorDialect` on `MLIRBufferizationDialect`.
>From c4fefa0fbe3eb17f460a39f7a8334a03a068eeb8 Mon Sep 17 00:00:00 2001
From: Matthias Springer
Date: Fri, 15 Mar 2024 03:05:04 +
Subject: [PATCH] [mlir][sparse] Add `has_runtime_library` test op
This commit adds a new test-only op:
`sparse_tensor.has_runtime_library`. The op returns "1" if the sparse
compiler runs in runtime library mode.
This op is useful for writing test cases that require different IR
depending on whether the sparse compiler runs in runtime library or
codegen mode.
This commit fixes a memory leak in `sparse_pack_d.mlir`. This test case
uses `sparse_tensor.assemble` to create a sparse tensor SSA value from
existing buffers. This runtime library reallocates+copies the existing
buffers; the codegen path does not. Therefore, the test requires
additional deallocations when running in runtime library mode.
Alternatives considered:
- Make the codegen path allocate. "Codegen" is the "default" compilation
mode and it is handling `sparse_tensor.assemble` correctly. The issue
is with the runtime library path, which should not allocate.
Therefore, it is better to put a workaround in the runtime library
path than to work around the issue with a new flag in the codegen
path.
- Add a `sparse_tensor.runtime_only` attribute to
`bufferization.dealloc_tensor`. Verifying that the attribute can only
be attached to `bufferization.dealloc_tensor` may introduce an
unwanted dependency of `MLIRSparseTensorDialect` on
`MLIRBufferizationDialect`.
---
.../SparseTensor/IR/SparseTensorOps.td| 13 +-
.../Transforms/SparseTensorCodegen.cpp| 43 ---
.../Transforms/SparseTensorConversion.cpp | 18 +++-
.../SparseTensor/CPU/sparse_pack_d.mlir | 14 --
4 files changed, 66 insertions(+), 22 deletions(-)
diff --git a/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
b/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
index 0498576fcffc51..1b2981ac751f3e 100644
--- a/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
+++ b/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
@@ -1419,7 +1419,7 @@ def SparseTensor_ForeachOp : SparseTensor_Op<"foreach",
}
//===--===//
-// Sparse Tensor Debugging Operations.
+// Sparse Tensor Debugging and Test-Only Operations.
//===--===//
def SparseTensor_PrintOp : SparseTensor_Op<"print">,
@@ -1440,4 +1440,15 @@ def SparseTensor_PrintOp : SparseTensor_Op<"print">,
let assemblyFormat = "$tensor attr-dict `:` type($tensor)";
}
+def SparseTensor_HasRuntimeLibraryOp
+: SparseTensor_Op<"has_runtime_library", []>, Results<(outs I1:$result)> {
+ string summary = "Indicates whether running in runtime/codegen mode";
+ string description = [{
+Returns a boolean value that indicates whether the sparse compiler runs in
+runtime library mode or not. For testing only: This op is useful for
writing
+test cases that require different IR depending on runtime/codegen mode.
+ }];
+ let assemblyFormat = "attr-dict";
+}
+
#endif // SPARSETENSOR_OPS
diff --git a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
index 7ff2fc25328a6c..5679f277e14866 100644
--- a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
+++ b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
@@ -1561,6 +1561,19 @@ struct SparseNewConverter : public
OpConversionPattern {
}
};
+
[llvm-branch-commits] [mlir] [mlir][sparse] Add `has_runtime_library` test op (PR #85355)
llvmbot wrote:
@llvm/pr-subscribers-mlir
Author: Matthias Springer (matthias-springer)
Changes
This commit adds a new test-only op:
`sparse_tensor.has_runtime_library`. The op returns "1" if the sparse compiler
runs in runtime library mode.
This op is useful for writing test cases that require different IR depending on
whether the sparse compiler runs in runtime library or codegen mode.
This commit fixes a memory leak in `sparse_pack_d.mlir`. This test case uses
`sparse_tensor.assemble` to create a sparse tensor SSA value from existing
buffers. This runtime library reallocates+copies the existing buffers; the
codegen path does not. Therefore, the test requires additional deallocations
when running in runtime library mode.
Alternatives considered:
- Make the codegen path allocate. "Codegen" is the "default" compilation mode
and it is handling `sparse_tensor.assemble` correctly. The issue is with the
runtime library path, which should not allocate. Therefore, it is better to put
a workaround in the runtime library path than to work around the issue with a
new flag in the codegen path.
- Add a `sparse_tensor.runtime_only` attribute to
`bufferization.dealloc_tensor`. Verifying that the attribute can only be
attached to `bufferization.dealloc_tensor` may introduce an unwanted dependency
of `MLIRSparseTensorDialect` on `MLIRBufferizationDialect`.
---
Full diff: https://github.com/llvm/llvm-project/pull/85355.diff
4 Files Affected:
- (modified) mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
(+12-1)
- (modified) mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
(+28-15)
- (modified)
mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp (+16-2)
- (modified) mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir
(+10-4)
``diff
diff --git a/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
b/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
index 0498576fcffc51..1b2981ac751f3e 100644
--- a/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
+++ b/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
@@ -1419,7 +1419,7 @@ def SparseTensor_ForeachOp : SparseTensor_Op<"foreach",
}
//===--===//
-// Sparse Tensor Debugging Operations.
+// Sparse Tensor Debugging and Test-Only Operations.
//===--===//
def SparseTensor_PrintOp : SparseTensor_Op<"print">,
@@ -1440,4 +1440,15 @@ def SparseTensor_PrintOp : SparseTensor_Op<"print">,
let assemblyFormat = "$tensor attr-dict `:` type($tensor)";
}
+def SparseTensor_HasRuntimeLibraryOp
+: SparseTensor_Op<"has_runtime_library", []>, Results<(outs I1:$result)> {
+ string summary = "Indicates whether running in runtime/codegen mode";
+ string description = [{
+Returns a boolean value that indicates whether the sparse compiler runs in
+runtime library mode or not. For testing only: This op is useful for
writing
+test cases that require different IR depending on runtime/codegen mode.
+ }];
+ let assemblyFormat = "attr-dict";
+}
+
#endif // SPARSETENSOR_OPS
diff --git a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
index 7ff2fc25328a6c..5679f277e14866 100644
--- a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
+++ b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
@@ -1561,6 +1561,19 @@ struct SparseNewConverter : public
OpConversionPattern {
}
};
+struct SparseHasRuntimeLibraryConverter
+: public OpConversionPattern {
+ using OpConversionPattern::OpConversionPattern;
+ LogicalResult
+ matchAndRewrite(HasRuntimeLibraryOp op, OpAdaptor adaptor,
+ ConversionPatternRewriter &rewriter) const override {
+auto i1Type = rewriter.getI1Type();
+rewriter.replaceOpWithNewOp(
+op, i1Type, rewriter.getIntegerAttr(i1Type, 0));
+return success();
+ }
+};
+
} // namespace
//===--===//
@@ -1572,21 +1585,21 @@ struct SparseNewConverter : public
OpConversionPattern {
void mlir::populateSparseTensorCodegenPatterns(
TypeConverter &typeConverter, RewritePatternSet &patterns,
bool createSparseDeallocs, bool enableBufferInitialization) {
- patterns.add,
- SparseSliceGetterOpConverter,
- SparseToPositionsConverter, SparseToCoordinatesConverter,
- SparseToCoordinatesBufferConverter, SparseToValuesConverter,
- SparseConvertConverter, SparseNewConverter,
- SparseNumberOfEntriesConverter>(typeConverter,
- patterns.getContext());
+ patterns.add<
+ SparseAssembleOpConverter, SparseDisassembleOpConverter,
+ SparseReturnConverter, Spa
[llvm-branch-commits] [mlir] [mlir][sparse] Add `has_runtime_library` test op (PR #85355)
@@ -140,10 +140,16 @@ module {
sparse_tensor.print %s1 : tensor<4x3x2xf32, #BatchedCSR>
sparse_tensor.print %s2 : tensor<4x3x2xf32, #CSRDense>
-// FIXME: doing this explicitly crashes runtime
-// bufferization.dealloc_tensor %s0 : tensor<4x3x2xf32, #CCC>
-// bufferization.dealloc_tensor %s1 : tensor<4x3x2xf32, #BatchedCSR>
-// bufferization.dealloc_tensor %s2 : tensor<4x3x2xf32, #CSRDense>
+%has_runtime = sparse_tensor.has_runtime_library
matthias-springer wrote:
Note: This check is no longer needed when switching to the buffer deallocation
pass. When running in codegen mode, `dealloc_tensor` will turn into a no-op.
https://github.com/llvm/llvm-project/pull/85355
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[llvm-branch-commits] [mlir] [mlir][sparse] Fix memory leaks (part 3) (PR #85184)
https://github.com/aartbik approved this pull request. https://github.com/llvm/llvm-project/pull/85184 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][sparse] Fix memory leaks (part 3) (PR #85184)
https://github.com/aartbik edited https://github.com/llvm/llvm-project/pull/85184 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][sparse] Fix memory leaks (part 3) (PR #85184)
@@ -167,12 +169,14 @@ module {
call @dump(%d31) : (tensor<2x3x4xf64>) -> ()
//
-// Release sparse tensors.
+// Release tensors.
aartbik wrote:
same
https://github.com/llvm/llvm-project/pull/85184
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[llvm-branch-commits] [mlir] [mlir][sparse] Fix memory leaks (part 3) (PR #85184)
@@ -114,12 +114,14 @@ module {
call @dump(%d31) : (tensor<2x3x4xf64>) -> ()
//
-// Release sparse tensors.
+// Release tensors.
aartbik wrote:
we usually say
// Release the resources.
so perhaps use that here too
https://github.com/llvm/llvm-project/pull/85184
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[llvm-branch-commits] [mlir] [mlir][sparse] Add `has_runtime_library` test op (PR #85355)
https://github.com/aartbik edited https://github.com/llvm/llvm-project/pull/85355 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][sparse] Add `has_runtime_library` test op (PR #85355)
https://github.com/aartbik approved this pull request. https://github.com/llvm/llvm-project/pull/85355 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][sparse] Add `has_runtime_library` test op (PR #85355)
@@ -140,10 +140,16 @@ module {
sparse_tensor.print %s1 : tensor<4x3x2xf32, #BatchedCSR>
sparse_tensor.print %s2 : tensor<4x3x2xf32, #CSRDense>
-// FIXME: doing this explicitly crashes runtime
-// bufferization.dealloc_tensor %s0 : tensor<4x3x2xf32, #CCC>
-// bufferization.dealloc_tensor %s1 : tensor<4x3x2xf32, #BatchedCSR>
-// bufferization.dealloc_tensor %s2 : tensor<4x3x2xf32, #CSRDense>
+%has_runtime = sparse_tensor.has_runtime_library
aartbik wrote:
Can you add this information in a TODO inside the test, so we remember later
https://github.com/llvm/llvm-project/pull/85355
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[llvm-branch-commits] [lld] 122ba9f - [ELF] Eliminate symbols demoted due to /DISCARD/ discarded sections (#85167)
Author: Fangrui Song
Date: 2024-03-14T17:01:14Z
New Revision: 122ba9f100705213774cff2038db953ff8174d91
URL:
https://github.com/llvm/llvm-project/commit/122ba9f100705213774cff2038db953ff8174d91
DIFF:
https://github.com/llvm/llvm-project/commit/122ba9f100705213774cff2038db953ff8174d91.diff
LOG: [ELF] Eliminate symbols demoted due to /DISCARD/ discarded sections
(#85167)
#69295 demoted Defined symbols relative to discarded sections.
If such a symbol is unreferenced, the desired behavior is to
eliminate it from .symtab just like --gc-sections discarded
definitions.
Linux kernel's CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y configuration expects
that the unreferenced `unused` is not emitted to .symtab
(https://github.com/ClangBuiltLinux/linux/issues/2006).
For relocations referencing demoted symbols, the symbol index restores
to 0 like older lld (`R_X86_64_64 0` in `discard-section.s`).
Fix #85048
(cherry picked from commit 8fe3e70e810b409dce36f6d415e86f0f9b1cf22d)
Added:
Modified:
lld/ELF/Writer.cpp
lld/test/ELF/linkerscript/discard-section.s
Removed:
diff --git a/lld/ELF/Writer.cpp b/lld/ELF/Writer.cpp
index 6df43a34be013a..8a08b0fcc90dbc 100644
--- a/lld/ELF/Writer.cpp
+++ b/lld/ELF/Writer.cpp
@@ -261,6 +261,9 @@ static void demoteDefined(Defined &sym,
DenseMap &map) {
Undefined(sym.file, sym.getName(), binding, sym.stOther, sym.type,
/*discardedSecIdx=*/map.lookup(sym.section))
.overwrite(sym);
+ // Eliminate from the symbol table, otherwise we would leave an undefined
+ // symbol if the symbol is unreferenced in the absence of GC.
+ sym.isUsedInRegularObj = false;
}
// If all references to a DSO happen to be weak, the DSO is not added to
diff --git a/lld/test/ELF/linkerscript/discard-section.s
b/lld/test/ELF/linkerscript/discard-section.s
index 24f3b2b73e991f..0bbebac59bb345 100644
--- a/lld/test/ELF/linkerscript/discard-section.s
+++ b/lld/test/ELF/linkerscript/discard-section.s
@@ -9,6 +9,9 @@
# RUN: ld.lld -r -T a.lds a.o b.o -o a.ro 2>&1 | FileCheck %s
--check-prefix=WARNING --implicit-check-not=warning:
# RUN: llvm-readelf -r -s a.ro | FileCheck %s --check-prefix=RELOC
+# RUN: ld.lld -r --gc-sections -T a.lds a.o b.o -o a.gc.ro --no-fatal-warnings
+# RUN: llvm-readelf -r -s a.gc.ro | FileCheck %s --check-prefix=RELOC-GC
+
# LOCAL: error: relocation refers to a discarded section: .aaa
# LOCAL-NEXT: >>> defined in a.o
# LOCAL-NEXT: >>> referenced by a.o:(.bbb+0x0)
@@ -32,16 +35,18 @@
# WARNING: warning: relocation refers to a discarded section: .aaa
# WARNING-NEXT: >>> referenced by a.o:(.rela.bbb+0x0)
+## GNU ld reports "defined in discarded secion" errors even in -r mode.
+## We set the symbol index to 0.
# RELOC: Relocation section '.rela.bbb' at offset {{.*}} contains 1
entries:
# RELOC-NEXT: Offset Info Type
Symbol's Value Symbol's Name + Addend
# RELOC-NEXT: R_X86_64_NONE
0
# RELOC-EMPTY:
# RELOC-NEXT: Relocation section '.rela.data' at offset {{.*}} contains 4
entries:
# RELOC-NEXT: Offset Info Type
Symbol's Value Symbol's Name + Addend
-# RELOC-NEXT: 00050001 R_X86_64_64
global + 0
-# RELOC-NEXT: 0008 00070001 R_X86_64_64
weak + 0
-# RELOC-NEXT: 0010 00060001 R_X86_64_64
weakref1 + 0
-# RELOC-NEXT: 0018 00080001 R_X86_64_64
weakref2 + 0
+# RELOC-NEXT: 0001 R_X86_64_64
0
+# RELOC-NEXT: 0008 0001 R_X86_64_64
0
+# RELOC-NEXT: 0010 0001 R_X86_64_64
0
+# RELOC-NEXT: 0018 0001 R_X86_64_64
0
# RELOC: Num:Value Size TypeBind Vis Ndx Name
# RELOC-NEXT: 0: 0 NOTYPE LOCAL DEFAULT UND
@@ -49,23 +54,25 @@
# RELOC-NEXT: 2: 0 SECTION LOCAL DEFAULT2 .bbb
# RELOC-NEXT: 3: 0 SECTION LOCAL DEFAULT4 .data
# RELOC-NEXT: 4: 0 NOTYPE GLOBAL DEFAULT1 _start
-# RELOC-NEXT: 5: 0 NOTYPE GLOBAL DEFAULT UND global
-# RELOC-NEXT: 6: 0 NOTYPE GLOBAL DEFAULT UND weakref1
-# RELOC-NEXT: 7: 0 NOTYPE GLOBAL DEFAULT UND weak
-# RELOC-NEXT: 8: 0 NOTYPE GLOBAL DEFAULT UND weakref2
# RELOC-EMPTY:
+# RELOC-GC: There are no relocations in this file.
+
#--- a.s
.globl _start
_start:
.section .aaa,"a"
-.globl global, weakref1
+.globl global,
[llvm-branch-commits] [lld] release/18.x: [ELF] Eliminate symbols demoted due to /DISCARD/ discarded sections (#85167) (PR #85266)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/85266 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
