[llvm-branch-commits] [llvm] e222953 - [X86] Add segment and address-size override prefixes

[Bill Wendling via llvm-branch-commits]

Author: Bill Wendling
Date: 2021-01-19T23:54:31-08:00
New Revision: e22295385c7fb1104620a497da8eab935768fd78

URL: 
https://github.com/llvm/llvm-project/commit/e22295385c7fb1104620a497da8eab935768fd78
DIFF: 
https://github.com/llvm/llvm-project/commit/e22295385c7fb1104620a497da8eab935768fd78.diff

LOG: [X86] Add segment and address-size override prefixes

X86 allows for the "addr32" and "addr16" address size override prefixes.
Also, these and the segment override prefixes should be recognized as
valid prefixes.

Differential Revision: https://reviews.llvm.org/D94726

Added: 
llvm/test/MC/X86/addr16-32.s
llvm/test/MC/X86/segment-prefix.s

Modified: 
llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm/lib/Target/X86/X86InstrSystem.td

Removed: 




diff  --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp 
b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 406327e46f32..e4ffe3f71100 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -3260,11 +3260,13 @@ bool 
X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
   // repz repnz ; GAS errors for the use of two similar prefixes
   // lock addq %rax, %rbx ; Destination operand must be of memory type
   // xacquire   ; xacquire must be accompanied by 'lock'
-  bool isPrefix = StringSwitch(Name)
-  .Cases("rex64", "data32", "data16", true)
-  .Cases("xacquire", "xrelease", true)
-  .Cases("acquire", "release", isParsingIntelSyntax())
-  .Default(false);
+  bool IsPrefix =
+  StringSwitch(Name)
+  .Cases("cs", "ds", "es", "fs", "gs", "ss", true)
+  .Cases("rex64", "data32", "data16", "addr32", "addr16", true)
+  .Cases("xacquire", "xrelease", true)
+  .Cases("acquire", "release", isParsingIntelSyntax())
+  .Default(false);
 
   auto isLockRepeatNtPrefix = [](StringRef N) {
 return StringSwitch(N)
@@ -,7 +3335,7 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo 
&Info, StringRef Name,
   Name = Next;
   PatchedName = Name;
   ForcedDataPrefix = X86::Mode32Bit;
-  isPrefix = false;
+  IsPrefix = false;
 }
   }
 
@@ -3350,7 +3352,7 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo 
&Info, StringRef Name,
   // prefix juxtaposed with an operation like "lock incl 4(%rax)", because we
   // just want to parse the "lock" as the first instruction and the "incl" as
   // the next one.
-  if (getLexer().isNot(AsmToken::EndOfStatement) && !isPrefix) {
+  if (getLexer().isNot(AsmToken::EndOfStatement) && !IsPrefix) {
 // Parse '*' modifier.
 if (getLexer().is(AsmToken::Star))
   Operands.push_back(X86Operand::CreateToken("*", consumeToken()));
@@ -3387,7 +3389,7 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo 
&Info, StringRef Name,
 
   // Consume the EndOfStatement or the prefix separator Slash
   if (getLexer().is(AsmToken::EndOfStatement) ||
-  (isPrefix && getLexer().is(AsmToken::Slash)))
+  (IsPrefix && getLexer().is(AsmToken::Slash)))
 Parser.Lex();
   else if (CurlyAsEndOfStatement)
 // Add an actual EndOfStatement before the curly brace

diff  --git a/llvm/lib/Target/X86/X86InstrSystem.td 
b/llvm/lib/Target/X86/X86InstrSystem.td
index f57ca7ffec7f..eb8740896e5d 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -171,6 +171,17 @@ def FS_PREFIX : I<0x64, PrefixByte, (outs), (ins), "fs", 
[]>;
 def GS_PREFIX : I<0x65, PrefixByte, (outs), (ins), "gs", []>;
 } // SchedRW
 
+//===--===//
+// Address-size override prefixes.
+//
+
+let SchedRW = [WriteNop] in {
+def ADDR16_PREFIX : I<0x67, PrefixByte, (outs), (ins), "addr16", []>,
+  Requires<[In32BitMode]>;
+def ADDR32_PREFIX : I<0x67, PrefixByte, (outs), (ins), "addr32", []>,
+  Requires<[In64BitMode]>;
+} // SchedRW
+
 
//===--===//
 // Moves to and from segment registers.
 //

diff  --git a/llvm/test/MC/X86/addr16-32.s b/llvm/test/MC/X86/addr16-32.s
new file mode 100644
index ..8812ee8bd609
--- /dev/null
+++ b/llvm/test/MC/X86/addr16-32.s
@@ -0,0 +1,23 @@
+# RUN: llvm-mc %s -triple x86_64-linux-gnu -filetype=obj -o - | llvm-objdump 
-d - | FileCheck %s
+
+.text
+.global foo
+foo:
+   insl
+   gs outsl
+   .code64
+   addr32 insl
+   addr32 gs outsl
+   .code32
+   addr16 insl
+   addr16 gs outsl
+   .code64
+   retq
+
+# CHECK: :
+# CHECK-NEXT: 6dinsl   %dx, %es:(%rdi)
+# CHECK-NEXT: 65 6f outsl  %gs:(%rsi), %dx
+# CHECK-NEXT: 67 6d insl   %dx, %es:(%edi)
+# CHECK-N

[llvm-branch-commits] [lldb] 7fce3b2 - [lldb][docs] Remove -webkit-hyphens in table cells so that table widths are correct on Safari

[Raphael Isemann via llvm-branch-commits]

Author: Raphael Isemann
Date: 2021-01-20T09:05:28+01:00
New Revision: 7fce3b240b6b313b1becf19ddf3f2a904c34ced2

URL: 
https://github.com/llvm/llvm-project/commit/7fce3b240b6b313b1becf19ddf3f2a904c34ced2
DIFF: 
https://github.com/llvm/llvm-project/commit/7fce3b240b6b313b1becf19ddf3f2a904c34ced2.diff

LOG: [lldb][docs] Remove -webkit-hyphens in table cells so that table widths 
are correct on Safari

The tables in the new LLDB documentation currently are less wide than their
contents. The reason for that seems to be the `-webkit-hyphens: auto` property
that sphinx is setting for all `p` tags. The `p` tags in the generated Python
documentation seem to trigger some Safari layout issue, so Safari is calculating
the cell width to be smaller than it should be (which ends up looking like this
{F15104344} ).

This patch just sets that property back to the browser default `manual`. Not
sure if that's the proper workaround, but I clicked around on the website with
the changed CSS and nothing looked funny (which is I believe how webdev unit
testing works).

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D94991

Added: 


Modified: 
lldb/docs/_static/lldb.css

Removed: 




diff  --git a/lldb/docs/_static/lldb.css b/lldb/docs/_static/lldb.css
index 53b725940831..6df20b7dd6e4 100644
--- a/lldb/docs/_static/lldb.css
+++ b/lldb/docs/_static/lldb.css
@@ -44,6 +44,13 @@ table.mapping td.content {
   padding-bottom: 15px;
 }
 
+/* Workaround for a Safari bug that would otherwise make table cells less wide
+than the containing text. This just sets it back to the default browser
+property.*/
+td p {
+  -webkit-hyphens: manual !important;
+}
+
 div.sphinxsidebar .caption {
   font-family: Helvetica, Verdana, sans-serif;
   font-size: 10pt;



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[llvm-branch-commits] [lldb] 3c69ff4 - [lldb][docs] Filter out 'thisown' attribute and inheritance boilerplate

[Raphael Isemann via llvm-branch-commits]

Author: Raphael Isemann
Date: 2021-01-20T09:07:36+01:00
New Revision: 3c69ff4b03abaa3b7b80f4f3f2a1c1806e2d4495

URL: 
https://github.com/llvm/llvm-project/commit/3c69ff4b03abaa3b7b80f4f3f2a1c1806e2d4495
DIFF: 
https://github.com/llvm/llvm-project/commit/3c69ff4b03abaa3b7b80f4f3f2a1c1806e2d4495.diff

LOG: [lldb][docs] Filter out 'thisown' attribute and inheritance boilerplate

This patch implements a filter that post-processes some of the generated RST 
sources
of the Python API docs. I mainly want to avoid two things:

1. Filter out all the inheritance boilerplate that just keeps mentioning for
every class that it inherits from the builtin 'object'. There is no inheritance
in the SB API.

2. More importantly, removes the SWIG generated `thisown` attribute from the
public documentation. I don't think we want users to mess with that attribute
and this is probably causing more confusion than it would help anyone. It also
makes the documentation for some smaller classes more verbose than necessary.

This patch just uses the sphinx event for reading source and removes the parts
that we don't want in documentation.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D94967

Added: 


Modified: 
lldb/docs/conf.py

Removed: 




diff  --git a/lldb/docs/conf.py b/lldb/docs/conf.py
index 2c7cd5d94c1f..b9b94672cbde 100644
--- a/lldb/docs/conf.py
+++ b/lldb/docs/conf.py
@@ -298,3 +298,36 @@ def process_md(name):
 
 # How to display URL addresses: 'footnote', 'no', or 'inline'.
 #texinfo_show_urls = 'footnote'
+
+empty_attr_summary = re.compile(r'\.\. rubric:: Attributes Summary\s*\.\. 
autosummary::\s*\.\. rubric::')
+empty_attr_documentation = re.compile(r'\.\. rubric:: Attributes 
Documentation\s*\.\. rubric::')
+
+def cleanup_source(app, docname, source):
+""" Cleans up source files generated by automodapi. """
+# Don't cleanup anything beside automodapi-generated sources.
+if not automodapi_toctreedirnm in docname:
+  return
+processed = source[0]
+
+# Don't show the list of inheritance info as there is no inheritance in the
+# SBI API. This avoids all the repeated text on all doc pages that a
+# class inherits from 'object'.
+
+processed = processed.replace(":show-inheritance:", "")
+# Remove the SWIG generated 'thisown' attribute. It just bloats the 
generated
+# documentation and users shouldn't fiddle with the value anyway.
+processed = re.sub(r'~SB[a-zA-Z]+\.thisown', "", processed)
+processed = processed.replace("  .. autoattribute:: thisown", "")
+
+# After removing 'thisown', many objects don't have any attributes left.
+# Remove all now empty attribute summary/documentation sections with
+# some rather ugly regex.
+processed = empty_attr_summary.sub('.. rubric::', processed)
+processed = empty_attr_documentation.sub('.. rubric::', processed)
+
+# Replace the original source with the processed one (source is a single
+# element list).
+source[0] = processed
+
+def setup(app):
+app.connect('source-read', cleanup_source)



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[llvm-branch-commits] [llvm] 255a507 - [NFC][InstructionCost] Use InstructionCost in lib/Transforms/IPO/IROutliner.cpp

[David Sherwood via llvm-branch-commits]

Author: David Sherwood
Date: 2021-01-20T08:33:59Z
New Revision: 255a507716bca63a375f3b8a379ccbbc58cb40da

URL: 
https://github.com/llvm/llvm-project/commit/255a507716bca63a375f3b8a379ccbbc58cb40da
DIFF: 
https://github.com/llvm/llvm-project/commit/255a507716bca63a375f3b8a379ccbbc58cb40da.diff

LOG: [NFC][InstructionCost] Use InstructionCost in 
lib/Transforms/IPO/IROutliner.cpp

In places where we call a TTI.getXXCost() function I have changed
the code to use InstructionCost instead of unsigned. This is in
preparation for later on when we will change the TTI interfaces
to return InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: 
http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Differential Revision: https://reviews.llvm.org/D94427

Added: 


Modified: 
llvm/include/llvm/Transforms/IPO/IROutliner.h
llvm/lib/Transforms/IPO/IROutliner.cpp

Removed: 




diff  --git a/llvm/include/llvm/Transforms/IPO/IROutliner.h 
b/llvm/include/llvm/Transforms/IPO/IROutliner.h
index 0346803e9ad7..eefcbe5235c1 100644
--- a/llvm/include/llvm/Transforms/IPO/IROutliner.h
+++ b/llvm/include/llvm/Transforms/IPO/IROutliner.h
@@ -44,6 +44,7 @@
 #include "llvm/Analysis/IRSimilarityIdentifier.h"
 #include "llvm/IR/PassManager.h"
 #include "llvm/IR/ValueMap.h"
+#include "llvm/Support/InstructionCost.h"
 #include "llvm/Transforms/Utils/CodeExtractor.h"
 #include 
 
@@ -150,7 +151,7 @@ struct OutlinableRegion {
   ///
   /// \param [in] TTI - The TargetTransformInfo for the parent function.
   /// \returns the code size of the region
-  unsigned getBenefit(TargetTransformInfo &TTI);
+  InstructionCost getBenefit(TargetTransformInfo &TTI);
 };
 
 /// This class is a pass that identifies similarity in a Module, extracts
@@ -214,14 +215,14 @@ class IROutliner {
   /// \param [in] CurrentGroup - The collection of OutlinableRegions to be
   /// analyzed.
   /// \returns the number of outlined instructions across all regions.
-  unsigned findBenefitFromAllRegions(OutlinableGroup &CurrentGroup);
+  InstructionCost findBenefitFromAllRegions(OutlinableGroup &CurrentGroup);
 
   /// Find the number of instructions that will be added by reloading 
arguments.
   ///
   /// \param [in] CurrentGroup - The collection of OutlinableRegions to be
   /// analyzed.
   /// \returns the number of added reload instructions across all regions.
-  unsigned findCostOutputReloads(OutlinableGroup &CurrentGroup);
+  InstructionCost findCostOutputReloads(OutlinableGroup &CurrentGroup);
 
   /// Find the cost and the benefit of \p CurrentGroup and save it back to
   /// \p CurrentGroup.

diff  --git a/llvm/lib/Transforms/IPO/IROutliner.cpp 
b/llvm/lib/Transforms/IPO/IROutliner.cpp
index 909e26b9a6e1..4b6a4f3d8fc4 100644
--- a/llvm/lib/Transforms/IPO/IROutliner.cpp
+++ b/llvm/lib/Transforms/IPO/IROutliner.cpp
@@ -86,10 +86,10 @@ struct OutlinableGroup {
 
   /// The number of instructions that will be outlined by extracting \ref
   /// Regions.
-  unsigned Benefit = 0;
+  InstructionCost Benefit = 0;
   /// The number of added instructions needed for the outlining of the \ref
   /// Regions.
-  unsigned Cost = 0;
+  InstructionCost Cost = 0;
 
   /// The argument that needs to be marked with the swifterr attribute.  If not
   /// needed, there is no value.
@@ -243,8 +243,8 @@ constantMatches(Value *V, unsigned GVN,
   return false;
 }
 
-unsigned OutlinableRegion::getBenefit(TargetTransformInfo &TTI) {
-  InstructionCost Benefit(0);
+InstructionCost OutlinableRegion::getBenefit(TargetTransformInfo &TTI) {
+  InstructionCost Benefit = 0;
 
   // Estimate the benefit of outlining a specific sections of the program.  We
   // delegate mostly this task to the TargetTransformInfo so that if the target
@@ -274,7 +274,7 @@ unsigned OutlinableRegion::getBenefit(TargetTransformInfo 
&TTI) {
 }
   }
 
-  return *Benefit.getValue();
+  return Benefit;
 }
 
 /// Find whether \p Region matches the global value numbering to Constant
@@ -1287,8 +1287,9 @@ void IROutliner::pruneIncompatibleRegions(
   }
 }
 
-unsigned IROutliner::findBenefitFromAllRegions(OutlinableGroup &CurrentGroup) {
-  unsigned RegionBenefit = 0;
+InstructionCost
+IROutliner::findBenefitFromAllRegions(OutlinableGroup &CurrentGroup) {
+  InstructionCost RegionBenefit = 0;
   for (OutlinableRegion *Region : CurrentGroup.Regions) {
 TargetTransformInfo &TTI = getTTI(*Region->StartBB->getParent());
 // We add the number of instructions in the region to the benefit as an
@@ -1301,8 +1302,9 @@ unsigned 
IROutliner::findBenefitFromAllRegions(OutlinableGroup &CurrentGroup) {
   return RegionBenefit;
 }
 
-unsigned IROutliner::findCostOutputReloads(OutlinableGroup &CurrentGroup) {
-  unsigned OverallCost = 0;
+InstructionCost
+IROutliner::findCostOutputReloads(OutlinableGroup &CurrentGroup) {
+  InstructionCost OverallCo

[llvm-branch-commits] [lldb] b3c260d - [lldb][docs] Expand CSS fix for LLDB doc tables

[Raphael Isemann via llvm-branch-commits]

Author: Raphael Isemann
Date: 2021-01-20T10:30:00+01:00
New Revision: b3c260d8fa07ed1202afdda9ca4c437a2a847080

URL: 
https://github.com/llvm/llvm-project/commit/b3c260d8fa07ed1202afdda9ca4c437a2a847080
DIFF: 
https://github.com/llvm/llvm-project/commit/b3c260d8fa07ed1202afdda9ca4c437a2a847080.diff

LOG: [lldb][docs] Expand CSS fix for LLDB doc tables

Apparently the sphinx version on the server doesn't place  tags in the
table cells, so the previous fix from commit 7fce3b240b6b313b1becf19ddf3f2a90
didn't fix the bug for that sphinx version. Just expand the CSS workaround
to all  tags.

Added: 


Modified: 
lldb/docs/_static/lldb.css

Removed: 




diff  --git a/lldb/docs/_static/lldb.css b/lldb/docs/_static/lldb.css
index 6df20b7dd6e4..e1e49f84c903 100644
--- a/lldb/docs/_static/lldb.css
+++ b/lldb/docs/_static/lldb.css
@@ -47,7 +47,7 @@ table.mapping td.content {
 /* Workaround for a Safari bug that would otherwise make table cells less wide
 than the containing text. This just sets it back to the default browser
 property.*/
-td p {
+td {
   -webkit-hyphens: manual !important;
 }
 



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[llvm-branch-commits] [llvm] 2aeaaf8 - [GlobalISel] Add missing operand update when copy is required

[Mikael Holmen via llvm-branch-commits]

Author: Gabriel Hjort Åkerlund
Date: 2021-01-20T10:32:52+01:00
New Revision: 2aeaaf841b58b2a6721f9271ae897e392fd0b357

URL: 
https://github.com/llvm/llvm-project/commit/2aeaaf841b58b2a6721f9271ae897e392fd0b357
DIFF: 
https://github.com/llvm/llvm-project/commit/2aeaaf841b58b2a6721f9271ae897e392fd0b357.diff

LOG: [GlobalISel] Add missing operand update when copy is required

When constraining an operand register using constrainOperandRegClass(),
the function may emit a COPY in case the provided register class does
not match the current operand register class. However, the operand
itself is not updated to make use of the COPY, thereby resulting in
incorrect code. This patch fixes that bug by updating the machine
operand accordingly.

Reviewed By: dsanders

Differential Revision: https://reviews.llvm.org/D91244

Added: 


Modified: 
llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
llvm/include/llvm/CodeGen/GlobalISel/Utils.h
llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
llvm/lib/CodeGen/GlobalISel/Utils.cpp
llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h 
b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
index bf9991eb08de..5b8243a93e7f 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
@@ -527,16 +527,6 @@ class InstructionSelector {
 "Subclasses must override this with a tablegen-erated function");
   }
 
-  /// Constrain a register operand of an instruction \p I to a specified
-  /// register class. This could involve inserting COPYs before (for uses) or
-  /// after (for defs) and may replace the operand of \p I.
-  /// \returns whether operand regclass constraining succeeded.
-  bool constrainOperandRegToRegClass(MachineInstr &I, unsigned OpIdx,
- const TargetRegisterClass &RC,
- const TargetInstrInfo &TII,
- const TargetRegisterInfo &TRI,
- const RegisterBankInfo &RBI) const;
-
   bool isOperandImmEqual(const MachineOperand &MO, int64_t Value,
  const MachineRegisterInfo &MRI) const;
 

diff  --git a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h 
b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
index bcb84c337f5e..82e26b0bc355 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
@@ -1058,8 +1058,12 @@ bool InstructionSelector::executeMatchTable(
   int64_t OpIdx = MatchTable[CurrentIdx++];
   int64_t RCEnum = MatchTable[CurrentIdx++];
   assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
-  constrainOperandRegToRegClass(*OutMIs[InsnID].getInstr(), OpIdx,
-*TRI.getRegClass(RCEnum), TII, TRI, RBI);
+  MachineInstr &I = *OutMIs[InsnID].getInstr();
+  MachineFunction &MF = *I.getParent()->getParent();
+  MachineRegisterInfo &MRI = MF.getRegInfo();
+  const TargetRegisterClass &RC = *TRI.getRegClass(RCEnum);
+  MachineOperand &MO = I.getOperand(OpIdx);
+  constrainOperandRegClass(MF, TRI, MRI, TII, RBI, I, RC, MO);
   DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
   dbgs() << CurrentIdx << ": 
GIR_ConstrainOperandRC(OutMIs["
  << InsnID << "], " << OpIdx << ", " << RCEnum

diff  --git a/llvm/include/llvm/CodeGen/GlobalISel/Utils.h 
b/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
index 9bd5180f7222..ed75cde6f316 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
@@ -52,9 +52,10 @@ Register constrainRegToClass(MachineRegisterInfo &MRI,
 
 /// Constrain the Register operand OpIdx, so that it is now constrained to the
 /// TargetRegisterClass passed as an argument (RegClass).
-/// If this fails, create a new virtual register in the correct class and
-/// insert a COPY before \p InsertPt if it is a use or after if it is a
-/// definition. The debug location of \p InsertPt is used for the new copy.
+/// If this fails, create a new virtual register in the correct class and 
insert
+/// a COPY before \p InsertPt if it is a use or after if it is a definition.
+/// In both cases, the function also updates the register of RegMo. The debug
+/// location of \p InsertPt is used for the new copy.
 ///
 /// \return The virtual register constrained to the right register class.
 Register constrainOperandRegClass(const MachineFunction &MF,
@@ -64,12 +65,13 @@ Register constrainOperandRegClass(const MachineFunction &MF,

[llvm-branch-commits] [llvm] 4ab704d - [AMDGPU][MC] Add tfe disassembler support MIMG opcodes

[Petar Avramovic via llvm-branch-commits]

Author: Petar Avramovic
Date: 2021-01-20T10:37:09+01:00
New Revision: 4ab704d62820396af5bd4a4322a5cbc2700a7ec3

URL: 
https://github.com/llvm/llvm-project/commit/4ab704d62820396af5bd4a4322a5cbc2700a7ec3
DIFF: 
https://github.com/llvm/llvm-project/commit/4ab704d62820396af5bd4a4322a5cbc2700a7ec3.diff

LOG: [AMDGPU][MC] Add tfe disassembler support MIMG opcodes

With tfe on there can be a vgpr write to vdata+1.
Add tablegen support for 5 register vdata store.
This is required for 4 register vdata store with tfe.

Differential Revision: https://reviews.llvm.org/D94960

Added: 


Modified: 
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
llvm/lib/Target/AMDGPU/MIMGInstructions.td
llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
llvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt
llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
llvm/test/MC/Disassembler/AMDGPU/mimg_vi.txt

Removed: 




diff  --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp 
b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
index 08b340c8fd66..4a4aad02938a 100644
--- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -545,9 +545,8 @@ DecodeStatus AMDGPUDisassembler::convertMIMGInst(MCInst 
&MI) const {
 DstSize = (DstSize + 1) / 2;
   }
 
-  // FIXME: Add tfe support
   if (MI.getOperand(TFEIdx).getImm())
-return MCDisassembler::Success;
+DstSize += 1;
 
   if (DstSize == Info->VDataDwords && AddrSize == Info->VAddrDwords)
 return MCDisassembler::Success;

diff  --git a/llvm/lib/Target/AMDGPU/MIMGInstructions.td 
b/llvm/lib/Target/AMDGPU/MIMGInstructions.td
index 7baa6823d16a..54c8cdf196ac 100644
--- a/llvm/lib/Target/AMDGPU/MIMGInstructions.td
+++ b/llvm/lib/Target/AMDGPU/MIMGInstructions.td
@@ -413,6 +413,8 @@ multiclass MIMG_Store  op, string asm, bit has_d16, 
bit mip = 0> {
 defm _V3 : MIMG_Store_Addr_Helper ;
 let VDataDwords = 4 in
 defm _V4 : MIMG_Store_Addr_Helper ;
+let VDataDwords = 5 in
+defm _V5 : MIMG_Store_Addr_Helper ;
   }
 }
 

diff  --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt 
b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
index 1e688c94d793..4b9c899003e4 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
@@ -43,6 +43,54 @@
 # GFX10: image_load_mip_pck_sgn v[16:19], v[8:10], s[4:11] dmask:0xf 
dim:SQ_RSRC_IMG_2D unorm r128 ; encoding: 
[0x08,0x9f,0x14,0xf0,0x08,0x10,0x01,0x00]
 0x08,0x9f,0x14,0xf0,0x08,0x10,0x01,0x00
 
+# GFX10: image_load v16, v[8:9], s[96:103] dmask:0x1 dim:SQ_RSRC_IMG_2D ; 
encoding: [0x08,0x01,0x00,0xf0,0x08,0x10,0x18,0x00]
+0x08,0x01,0x00,0xf0,0x08,0x10,0x18,0x00
+
+# GFX10: image_load v[16:17], v[8:9], s[96:103] dmask:0x3 dim:SQ_RSRC_IMG_2D ; 
encoding: [0x08,0x03,0x00,0xf0,0x08,0x10,0x18,0x00]
+0x08,0x03,0x00,0xf0,0x08,0x10,0x18,0x00
+
+# GFX10: image_load v[16:18], v[8:9], s[96:103] dmask:0x7 dim:SQ_RSRC_IMG_2D ; 
encoding: [0x08,0x07,0x00,0xf0,0x08,0x10,0x18,0x00]
+0x08,0x07,0x00,0xf0,0x08,0x10,0x18,0x00
+
+# GFX10: image_load v[16:19], v[8:9], s[96:103] dmask:0xf dim:SQ_RSRC_IMG_2D ; 
encoding: [0x08,0x0f,0x00,0xf0,0x08,0x10,0x18,0x00]
+0x08,0x0f,0x00,0xf0,0x08,0x10,0x18,0x00
+
+# GFX10: image_load v[16:17], v[8:9], s[96:103] dmask:0x1 dim:SQ_RSRC_IMG_2D 
tfe ; encoding: [0x08,0x01,0x01,0xf0,0x08,0x10,0x18,0x00]
+0x08,0x01,0x01,0xf0,0x08,0x10,0x18,0x00
+
+# GFX10: image_load v[16:18], v[8:9], s[96:103] dmask:0x3 dim:SQ_RSRC_IMG_2D 
tfe ; encoding: [0x08,0x03,0x01,0xf0,0x08,0x10,0x18,0x00]
+0x08,0x03,0x01,0xf0,0x08,0x10,0x18,0x00
+
+# GFX10: image_load v[16:19], v[8:9], s[96:103] dmask:0x7 dim:SQ_RSRC_IMG_2D 
tfe ; encoding: [0x08,0x07,0x01,0xf0,0x08,0x10,0x18,0x00]
+0x08,0x07,0x01,0xf0,0x08,0x10,0x18,0x00
+
+# GFX10: image_load v[16:20], v[8:9], s[96:103] dmask:0xf dim:SQ_RSRC_IMG_2D 
tfe ; encoding: [0x08,0x0f,0x01,0xf0,0x08,0x10,0x18,0x00]
+0x08,0x0f,0x01,0xf0,0x08,0x10,0x18,0x00
+
+# GFX10: image_load v16, v[8:9], s[96:103] dmask:0x1 dim:SQ_RSRC_IMG_2D d16 ; 
encoding: [0x08,0x01,0x00,0xf0,0x08,0x10,0x18,0x80]
+0x08,0x01,0x00,0xf0,0x08,0x10,0x18,0x80
+
+# GFX10: image_load v16, v[8:9], s[96:103] dmask:0x3 dim:SQ_RSRC_IMG_2D d16 ; 
encoding: [0x08,0x03,0x00,0xf0,0x08,0x10,0x18,0x80]
+0x08,0x03,0x00,0xf0,0x08,0x10,0x18,0x80
+
+# GFX10: image_load v[16:17], v[8:9], s[96:103] dmask:0x7 dim:SQ_RSRC_IMG_2D 
d16 ; encoding: [0x08,0x07,0x00,0xf0,0x08,0x10,0x18,0x80]
+0x08,0x07,0x00,0xf0,0x08,0x10,0x18,0x80
+
+# GFX10: image_load v[16:17], v[8:9], s[96:103] dmask:0xf dim:SQ_RSRC_IMG_2D 
d16 ; encoding: [0x08,0x0f,0x00,0xf0,0x08,0x10,0x18,0x80]
+0x08,0x0f,0x00,0xf0,0x08,0x10,0x18,0x80
+
+# GFX10: image_load v[16:17], v[8:9], s[96:103] dmask:0x1 dim:SQ_RSRC_IMG_2D 
tfe d16 ; encoding: [0x08,0x01,0x01,0xf0,0x08,0x10,0x18,0x80]
+0x08,0x01,0x01,0xf0,0x08,0x10,0x18,0x80
+

[llvm-branch-commits] [clang] e20d466 - [clang][cli] Port more options to new parsing system

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2021-01-20T10:48:22+01:00
New Revision: e20d46628a31a984074f2e1029e67734d5c2ab0d

URL: 
https://github.com/llvm/llvm-project/commit/e20d46628a31a984074f2e1029e67734d5c2ab0d
DIFF: 
https://github.com/llvm/llvm-project/commit/e20d46628a31a984074f2e1029e67734d5c2ab0d.diff

LOG: [clang][cli] Port more options to new parsing system

This patch adds marshalling information to more options.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D94957

Added: 


Modified: 
clang/include/clang/Driver/Options.td
clang/lib/Frontend/CompilerInvocation.cpp

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 8150b24e337b..500022c2c99b 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -3071,10 +3071,10 @@ def mwavefrontsize64 : Flag<["-"], "mwavefrontsize64">, 
Group,
 def mno_wavefrontsize64 : Flag<["-"], "mno-wavefrontsize64">, Group,
   HelpText<"Specify wavefront size 32 mode (AMDGPU only)">;
 
-def munsafe_fp_atomics : Flag<["-"], "munsafe-fp-atomics">, Group,
-  HelpText<"Enable unsafe floating point atomic instructions (AMDGPU only)">,
-  Flags<[CC1Option]>;
-def mno_unsafe_fp_atomics : Flag<["-"], "mno-unsafe-fp-atomics">, 
Group;
+defm unsafe_fp_atomics : BoolCC1Option<"unsafe-fp-atomics",
+  TargetOpts<"AllowAMDGPUUnsafeFPAtomics">, DefaultsToFalse,
+  ChangedBy,
+  ResetBy, BothFlags<[]>, "m">, Group;
 
 def faltivec : Flag<["-"], "faltivec">, Group, Flags<[NoXarchOption]>;
 def fno_altivec : Flag<["-"], "fno-altivec">, Group, 
Flags<[NoXarchOption]>;
@@ -4378,7 +4378,10 @@ def analyzer_checker_option_help_developer : Flag<["-"], 
"analyzer-checker-optio
   MarshallingInfoFlag>;
 
 def analyzer_config_compatibility_mode : Separate<["-"], 
"analyzer-config-compatibility-mode">,
-  HelpText<"Don't emit errors on invalid analyzer-config inputs">;
+  HelpText<"Don't emit errors on invalid analyzer-config inputs">,
+  Values<"true,false">, NormalizedValues<[[{false}], [{true}]]>,
+  MarshallingInfoString, 
[{true}]>,
+  AutoNormalizeEnum;
 
 def analyzer_config_compatibility_mode_EQ : Joined<["-"], 
"analyzer-config-compatibility-mode=">,
   Alias;
@@ -4842,7 +4845,8 @@ def plugin_arg : JoinedAndSeparate<["-"], "plugin-arg-">,
 MetaVarName<" ">,
 HelpText<"Pass  to plugin ">;
 def add_plugin : Separate<["-"], "add-plugin">, MetaVarName<"">,
-  HelpText<"Use the named plugin action in addition to the default action">;
+  HelpText<"Use the named plugin action in addition to the default action">,
+  MarshallingInfoStringVector>;
 def ast_dump_filter : Separate<["-"], "ast-dump-filter">,
   MetaVarName<"">,
   HelpText<"Use with -ast-dump or -ast-print to dump/print only AST 
declaration"
@@ -5118,10 +5122,13 @@ def fhalf_no_semantic_interposition : Flag<["-"], 
"fhalf-no-semantic-interpositi
 def fno_validate_pch : Flag<["-"], "fno-validate-pch">,
   HelpText<"Disable validation of precompiled headers">,
   MarshallingInfoFlag>;
-def fallow_pch_with_errors : Flag<["-"], "fallow-pch-with-compiler-errors">,
-  HelpText<"Accept a PCH file that was created with compiler errors">;
 def fallow_pcm_with_errors : Flag<["-"], "fallow-pcm-with-compiler-errors">,
-  HelpText<"Accept a PCM file that was created with compiler errors">;
+  HelpText<"Accept a PCM file that was created with compiler errors">,
+  MarshallingInfoFlag>;
+def fallow_pch_with_errors : Flag<["-"], "fallow-pch-with-compiler-errors">,
+  HelpText<"Accept a PCH file that was created with compiler errors">,
+  MarshallingInfoFlag>,
+  ImpliedByAnyOf<[fallow_pcm_with_errors]>;
 def dump_deserialized_pch_decls : Flag<["-"], "dump-deserialized-decls">,
   HelpText<"Dump declarations that are deserialized from PCH, for testing">,
   MarshallingInfoFlag>;

diff  --git a/clang/lib/Frontend/CompilerInvocation.cpp 
b/clang/lib/Frontend/CompilerInvocation.cpp
index dac0dc6921a5..24b8fd19dd50 100644
--- a/clang/lib/Frontend/CompilerInvocation.cpp
+++ b/clang/lib/Frontend/CompilerInvocation.cpp
@@ -634,13 +634,6 @@ static bool ParseAnalyzerArgs(AnalyzerOptions &Opts, 
ArgList &Args,
 }
   }
 
-  Opts.ShouldEmitErrorsOnInvalidConfigValue =
-  /* negated */!llvm::StringSwitch(
-   
Args.getLastArgValue(OPT_analyzer_config_compatibility_mode))
-.Case("true", true)
-.Case("false", false)
-.Default(false);
-
   Opts.CheckersAndPackages.clear();
   for (const Arg *A :
Args.filtered(OPT_analyzer_checker, OPT_analyzer_disable_checker)) {
@@ -828,10 +821,6 @@ static void parseAnalyzerConfigs(AnalyzerOptions &AnOpts,
<< "a filename";
 }
 
-static void ParseCommentArgs(CommentOptions &Opts, ArgList &Args) {
-  Opts.ParseAllComments = Args.hasArg(OPT_fparse_all_comments);
-}
-
 /// Create a new Regex instance out

[llvm-branch-commits] [clang-tools-extra] 536a1b0 - [clangd] Allow CDBs to have background work to block on.

[Sam McCall via llvm-branch-commits]

Author: Sam McCall
Date: 2021-01-20T11:11:01+01:00
New Revision: 536a1b0ea21163eaee53652c527ea20cf45bc675

URL: 
https://github.com/llvm/llvm-project/commit/536a1b0ea21163eaee53652c527ea20cf45bc675
DIFF: 
https://github.com/llvm/llvm-project/commit/536a1b0ea21163eaee53652c527ea20cf45bc675.diff

LOG: [clangd] Allow CDBs to have background work to block on.

In preparation for moving DirectoryBasedCompilationDatabase broadcasting off
the main thread.

Differential Revision: https://reviews.llvm.org/D94603

Added: 


Modified: 
clang-tools-extra/clangd/ClangdServer.cpp
clang-tools-extra/clangd/ClangdServer.h
clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
clang-tools-extra/clangd/GlobalCompilationDatabase.h

Removed: 




diff  --git a/clang-tools-extra/clangd/ClangdServer.cpp 
b/clang-tools-extra/clangd/ClangdServer.cpp
index a76250fa168e7..0818d08811e0d 100644
--- a/clang-tools-extra/clangd/ClangdServer.cpp
+++ b/clang-tools-extra/clangd/ClangdServer.cpp
@@ -139,7 +139,8 @@ ClangdServer::Options::operator TUScheduler::Options() 
const {
 ClangdServer::ClangdServer(const GlobalCompilationDatabase &CDB,
const ThreadsafeFS &TFS, const Options &Opts,
Callbacks *Callbacks)
-: ConfigProvider(Opts.ConfigProvider), TFS(TFS), 
ServerCallbacks(Callbacks),
+: ConfigProvider(Opts.ConfigProvider), CDB(CDB), TFS(TFS),
+  ServerCallbacks(Callbacks),
   DynamicIdx(Opts.BuildDynamicSymbolIndex
  ? new FileIndex(Opts.HeavyweightDynamicSymbolIndex,
  Opts.CollectMainFileRefs)
@@ -870,6 +871,7 @@ Context ClangdServer::createProcessingContext(PathRef File) 
const {
 LLVM_NODISCARD bool
 ClangdServer::blockUntilIdleForTest(llvm::Optional TimeoutSeconds) {
   return WorkScheduler.blockUntilIdle(timeoutSeconds(TimeoutSeconds)) &&
+ CDB.blockUntilIdle(timeoutSeconds(TimeoutSeconds)) &&
  (!BackgroundIdx ||
   BackgroundIdx->blockUntilIdleForTest(TimeoutSeconds));
 }

diff  --git a/clang-tools-extra/clangd/ClangdServer.h 
b/clang-tools-extra/clangd/ClangdServer.h
index ff2fc85781038..d10c54f402b42 100644
--- a/clang-tools-extra/clangd/ClangdServer.h
+++ b/clang-tools-extra/clangd/ClangdServer.h
@@ -362,6 +362,7 @@ class ClangdServer {
   Context createProcessingContext(PathRef) const;
   config::Provider *ConfigProvider = nullptr;
 
+  const GlobalCompilationDatabase &CDB;
   const ThreadsafeFS &TFS;
   Callbacks *ServerCallbacks = nullptr;
   mutable std::mutex ConfigDiagnosticsMu;

diff  --git a/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp 
b/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
index fde4e56ac72d8..457cdef2bd8b5 100644
--- a/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
+++ b/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
@@ -636,5 +636,11 @@ tooling::CompileCommand 
DelegatingCDB::getFallbackCommand(PathRef File) const {
   return Base->getFallbackCommand(File);
 }
 
+bool DelegatingCDB::blockUntilIdle(Deadline D) const {
+  if (!Base)
+return true;
+  return Base->blockUntilIdle(D);
+}
+
 } // namespace clangd
 } // namespace clang

diff  --git a/clang-tools-extra/clangd/GlobalCompilationDatabase.h 
b/clang-tools-extra/clangd/GlobalCompilationDatabase.h
index 125bd77a52073..d009905bbecf2 100644
--- a/clang-tools-extra/clangd/GlobalCompilationDatabase.h
+++ b/clang-tools-extra/clangd/GlobalCompilationDatabase.h
@@ -51,6 +51,10 @@ class GlobalCompilationDatabase {
   /// Clangd should treat the results as unreliable.
   virtual tooling::CompileCommand getFallbackCommand(PathRef File) const;
 
+  /// If the CDB does any asynchronous work, wait for it to complete.
+  /// For use in tests.
+  virtual bool blockUntilIdle(Deadline D) const { return true; }
+
   using CommandChanged = Event>;
   /// The callback is notified when files may have new compile commands.
   /// The argument is a list of full file paths.
@@ -75,6 +79,8 @@ class DelegatingCDB : public GlobalCompilationDatabase {
 
   tooling::CompileCommand getFallbackCommand(PathRef File) const override;
 
+  bool blockUntilIdle(Deadline D) const override;
+
 private:
   const GlobalCompilationDatabase *Base;
   std::unique_ptr BaseOwner;



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[llvm-branch-commits] [clang-tools-extra] de4ba70 - [clangd] Move DirBasedCDB broadcasting onto its own thread.

[Sam McCall via llvm-branch-commits]

Author: Sam McCall
Date: 2021-01-20T11:22:55+01:00
New Revision: de4ba7073bd7e200aca704e6a26403e07bc246a5

URL: 
https://github.com/llvm/llvm-project/commit/de4ba7073bd7e200aca704e6a26403e07bc246a5
DIFF: 
https://github.com/llvm/llvm-project/commit/de4ba7073bd7e200aca704e6a26403e07bc246a5.diff

LOG: [clangd] Move DirBasedCDB broadcasting onto its own thread.

This is on the critical path (it blocks getting the compile command for
the first file).

It's not trivially fast: it involves processing all filenames in the CDB
and doing some IO to look for shadowing CDBs.

And we may make this slower soon - making CDB configurable implies evaluating
the config for each listed to see which ones really are owned by the
broadcasted CDB.

Differential Revision: https://reviews.llvm.org/D94606

Added: 


Modified: 
clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
clang-tools-extra/clangd/GlobalCompilationDatabase.h
clang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp 
b/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
index 457cdef2bd8b..3ee2d2d5dec0 100644
--- a/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
+++ b/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
@@ -11,6 +11,7 @@
 #include "SourceCode.h"
 #include "support/Logger.h"
 #include "support/Path.h"
+#include "support/Threading.h"
 #include "support/ThreadsafeFS.h"
 #include "clang/Frontend/CompilerInvocation.h"
 #include "clang/Tooling/ArgumentsAdjusters.h"
@@ -22,12 +23,15 @@
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/ScopeExit.h"
 #include "llvm/ADT/SmallString.h"
+#include "llvm/ADT/StringMap.h"
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/FileUtilities.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/Program.h"
 #include "llvm/Support/VirtualFileSystem.h"
+#include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -357,7 +361,7 @@ bool 
DirectoryBasedGlobalCompilationDatabase::DirectoryCache::load(
 
 DirectoryBasedGlobalCompilationDatabase::
 DirectoryBasedGlobalCompilationDatabase(const Options &Opts)
-: Opts(Opts) {
+: Opts(Opts), Broadcaster(std::make_unique(*this)) {
   if (Opts.CompileCommandsDir)
 OnlyDirCache = std::make_unique(*Opts.CompileCommandsDir);
 }
@@ -472,25 +476,107 @@ DirectoryBasedGlobalCompilationDatabase::lookupCDB(
   Result.CDB = std::move(CDB);
   Result.PI.SourceRoot = DirCache->Path;
 
-  // FIXME: Maybe make the following part async, since this can block
-  // retrieval of compile commands.
   if (ShouldBroadcast)
 broadcastCDB(Result);
   return Result;
 }
 
-void DirectoryBasedGlobalCompilationDatabase::broadcastCDB(
-CDBLookupResult Result) const {
-  vlog("Broadcasting compilation database from {0}", Result.PI.SourceRoot);
-  assert(Result.CDB && "Trying to broadcast an invalid CDB!");
+// The broadcast thread announces files with new compile commands to the world.
+// Primarily this is used to enqueue them for background indexing.
+//
+// It's on a separate thread because:
+//  - otherwise it would block the first parse of the initial file
+//  - we need to enumerate all files in the CDB, of which there are many
+//  - we (will) have to evaluate config for every file in the CDB, which is 
slow
+class DirectoryBasedGlobalCompilationDatabase::BroadcastThread {
+  class Filter;
+  DirectoryBasedGlobalCompilationDatabase &Parent;
+
+  std::mutex Mu;
+  std::condition_variable CV;
+  // Shutdown flag (CV is notified after writing).
+  // This is atomic so that broadcasts can also observe it and abort early.
+  std::atomic ShouldStop = {false};
+  struct Task {
+CDBLookupResult Lookup;
+Context Ctx;
+  };
+  std::deque Queue;
+  llvm::Optional ActiveTask;
+  std::thread Thread; // Must be last member.
+
+  // Thread body: this is just the basic queue procesing boilerplate.
+  void run() {
+std::unique_lock Lock(Mu);
+while (true) {
+  bool Stopping = false;
+  CV.wait(Lock, [&] {
+return (Stopping = ShouldStop.load(std::memory_order_acquire)) ||
+   !Queue.empty();
+  });
+  if (Stopping) {
+Queue.clear();
+CV.notify_all();
+return;
+  }
+  ActiveTask = std::move(Queue.front());
+  Queue.pop_front();
 
-  std::vector AllFiles = Result.CDB->getAllFiles();
+  Lock.unlock();
+  {
+WithContext WithCtx(std::move(ActiveTask->Ctx));
+process(ActiveTask->Lookup);
+  }
+  Lock.lock();
+  ActiveTask.reset();
+  CV.notify_all();
+}
+  }
+
+  // Inspects a new CDB and broadcasts the files it owns.
+  void process(const CDBLookupResult &T);
+
+public:
+  BroadcastThread(DirectoryBasedGlobalCompilationDatabase &Parent)
+  : Parent(Parent), Thread([this] { run(); }) {}
+
+  void enqueue(CDBLookupResult Lookup) {
+ 

[llvm-branch-commits] [clang-tools-extra] e6be5c7 - [clangd] Remove the recovery-ast options.

[Sam McCall via llvm-branch-commits]

Author: Sam McCall
Date: 2021-01-20T11:23:57+01:00
New Revision: e6be5c7cd6d227144f874623e2764890f80cad32

URL: 
https://github.com/llvm/llvm-project/commit/e6be5c7cd6d227144f874623e2764890f80cad32
DIFF: 
https://github.com/llvm/llvm-project/commit/e6be5c7cd6d227144f874623e2764890f80cad32.diff

LOG: [clangd] Remove the recovery-ast options.

These force a couple of flags or that are now on by default.
So the flags don't currently do anything unless the compile command has
-fno-recovery-ast explicitly.

(For turning recovery *off* for debugging we can inject the flag with config)

This leaves the command-line flags around with no effect, I'm planning to add
a "retired flag" mechanism shortly in a separate patch.

Differential Revision: https://reviews.llvm.org/D94724

Added: 


Modified: 
clang-tools-extra/clangd/ClangdServer.cpp
clang-tools-extra/clangd/ClangdServer.h
clang-tools-extra/clangd/Compiler.cpp
clang-tools-extra/clangd/Compiler.h
clang-tools-extra/clangd/tool/ClangdMain.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/ClangdServer.cpp 
b/clang-tools-extra/clangd/ClangdServer.cpp
index 0818d08811e0..123d755f267e 100644
--- a/clang-tools-extra/clangd/ClangdServer.cpp
+++ b/clang-tools-extra/clangd/ClangdServer.cpp
@@ -147,8 +147,6 @@ ClangdServer::ClangdServer(const GlobalCompilationDatabase 
&CDB,
  : nullptr),
   ClangTidyProvider(Opts.ClangTidyProvider),
   SuggestMissingIncludes(Opts.SuggestMissingIncludes),
-  BuildRecoveryAST(Opts.BuildRecoveryAST),
-  PreserveRecoveryASTType(Opts.PreserveRecoveryASTType),
   WorkspaceRoot(Opts.WorkspaceRoot),
   // Pass a callback into `WorkScheduler` to extract symbols from a newly
   // parsed file and rebuild the file index synchronously each time an AST
@@ -214,8 +212,6 @@ void ClangdServer::addDocument(PathRef File, 
llvm::StringRef Contents,
   Inputs.Opts = std::move(Opts);
   Inputs.Index = Index;
   Inputs.ClangTidyProvider = ClangTidyProvider;
-  Inputs.Opts.BuildRecoveryAST = BuildRecoveryAST;
-  Inputs.Opts.PreserveRecoveryASTType = PreserveRecoveryASTType;
   bool NewFile = WorkScheduler.update(File, Inputs, WantDiags);
   // If we loaded Foo.h, we want to make sure Foo.cpp is indexed.
   if (NewFile && BackgroundIdx)
@@ -253,8 +249,6 @@ void ClangdServer::codeComplete(PathRef File, Position Pos,
 }
 ParseInputs ParseInput{IP->Command, &TFS, IP->Contents.str()};
 ParseInput.Index = Index;
-ParseInput.Opts.BuildRecoveryAST = BuildRecoveryAST;
-ParseInput.Opts.PreserveRecoveryASTType = PreserveRecoveryASTType;
 
 CodeCompleteOpts.MainFileSignals = IP->Signals;
 // FIXME(ibiryukov): even if Preamble is non-null, we may want to check
@@ -300,8 +294,6 @@ void ClangdServer::signatureHelp(PathRef File, Position Pos,
 
 ParseInputs ParseInput{IP->Command, &TFS, IP->Contents.str()};
 ParseInput.Index = Index;
-ParseInput.Opts.BuildRecoveryAST = BuildRecoveryAST;
-ParseInput.Opts.PreserveRecoveryASTType = PreserveRecoveryASTType;
 CB(clangd::signatureHelp(File, Pos, *PreambleData, ParseInput));
   };
 

diff  --git a/clang-tools-extra/clangd/ClangdServer.h 
b/clang-tools-extra/clangd/ClangdServer.h
index d10c54f402b4..832f8b04a11d 100644
--- a/clang-tools-extra/clangd/ClangdServer.h
+++ b/clang-tools-extra/clangd/ClangdServer.h
@@ -118,14 +118,6 @@ class ClangdServer {
 /// checks will be disabled.
 TidyProviderRef ClangTidyProvider;
 
-/// If true, force -frecovery-ast flag.
-/// If false, respect the value in clang.
-bool BuildRecoveryAST = false;
-
-/// If true, force -frecovery-ast-type flag.
-/// If false, respect the value in clang.
-bool PreserveRecoveryASTType = false;
-
 /// Clangd's workspace root. Relevant for "workspace" operations not bound
 /// to a particular file.
 /// FIXME: If not set, should use the current working directory.
@@ -388,11 +380,6 @@ class ClangdServer {
   // can be caused by missing includes (e.g. member access in incomplete type).
   bool SuggestMissingIncludes = false;
 
-  // If true, preserve expressions in AST for broken code.
-  bool BuildRecoveryAST = true;
-  // If true, preserve the type for recovery AST.
-  bool PreserveRecoveryASTType = false;
-
   // GUARDED_BY(CachedCompletionFuzzyFindRequestMutex)
   llvm::StringMap>
   CachedCompletionFuzzyFindRequestByFile;

diff  --git a/clang-tools-extra/clangd/Compiler.cpp 
b/clang-tools-extra/clangd/Compiler.cpp
index 3d5c7113f852..bcae67d82050 100644
--- a/clang-tools-extra/clangd/Compiler.cpp
+++ b/clang-tools-extra/clangd/Compiler.cpp
@@ -85,11 +85,6 @@ buildCompilerInvocation(const ParseInputs &Inputs, 
clang::DiagnosticConsumer &D,
   // Don't crash on `#pragma clang __debug parser_crash`
   CI->getPreprocessorOpts().DisablePragmaDebugCrash = true;
 
-  if (Inputs.Opts.BuildRecoveryAST)
-CI->getLangOpt

[llvm-branch-commits] [clang-tools-extra] 2ab5fd2 - [clangd] Retire some flags for uncontroversial, stable features.

[Sam McCall via llvm-branch-commits]

Author: Sam McCall
Date: 2021-01-20T11:47:12+01:00
New Revision: 2ab5fd2c8567ac89d7e7639563babdfc78dbcf78

URL: 
https://github.com/llvm/llvm-project/commit/2ab5fd2c8567ac89d7e7639563babdfc78dbcf78
DIFF: 
https://github.com/llvm/llvm-project/commit/2ab5fd2c8567ac89d7e7639563babdfc78dbcf78.diff

LOG: [clangd] Retire some flags for uncontroversial, stable features.

And mark a couple to be retired afther the next release branch.

Differential Revision: https://reviews.llvm.org/D94727

Added: 


Modified: 
clang-tools-extra/clangd/ClangdServer.cpp
clang-tools-extra/clangd/ClangdServer.h
clang-tools-extra/clangd/Compiler.h
clang-tools-extra/clangd/ParsedAST.cpp
clang-tools-extra/clangd/tool/ClangdMain.cpp
clang-tools-extra/clangd/unittests/TestTU.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/ClangdServer.cpp 
b/clang-tools-extra/clangd/ClangdServer.cpp
index 123d755f267e..32e08e688f44 100644
--- a/clang-tools-extra/clangd/ClangdServer.cpp
+++ b/clang-tools-extra/clangd/ClangdServer.cpp
@@ -146,7 +146,6 @@ ClangdServer::ClangdServer(const GlobalCompilationDatabase 
&CDB,
  Opts.CollectMainFileRefs)
  : nullptr),
   ClangTidyProvider(Opts.ClangTidyProvider),
-  SuggestMissingIncludes(Opts.SuggestMissingIncludes),
   WorkspaceRoot(Opts.WorkspaceRoot),
   // Pass a callback into `WorkScheduler` to extract symbols from a newly
   // parsed file and rebuild the file index synchronously each time an AST
@@ -201,7 +200,6 @@ void ClangdServer::addDocument(PathRef File, 
llvm::StringRef Contents,
llvm::StringRef Version,
WantDiagnostics WantDiags, bool ForceRebuild) {
   ParseOptions Opts;
-  Opts.SuggestMissingIncludes = SuggestMissingIncludes;
 
   // Compile command is set asynchronously during update, as it can be slow.
   ParseInputs Inputs;

diff  --git a/clang-tools-extra/clangd/ClangdServer.h 
b/clang-tools-extra/clangd/ClangdServer.h
index 832f8b04a11d..926de39b507a 100644
--- a/clang-tools-extra/clangd/ClangdServer.h
+++ b/clang-tools-extra/clangd/ClangdServer.h
@@ -136,8 +136,6 @@ class ClangdServer {
 /*RebuildRatio=*/1,
 };
 
-bool SuggestMissingIncludes = false;
-
 /// Clangd will execute compiler drivers matching one of these globs to
 /// fetch system include path.
 std::vector QueryDriverGlobs;
@@ -376,10 +374,6 @@ class ClangdServer {
   // When set, provides clang-tidy options for a specific file.
   TidyProviderRef ClangTidyProvider;
 
-  // If this is true, suggest include insertion fixes for diagnostic errors 
that
-  // can be caused by missing includes (e.g. member access in incomplete type).
-  bool SuggestMissingIncludes = false;
-
   // GUARDED_BY(CachedCompletionFuzzyFindRequestMutex)
   llvm::StringMap>
   CachedCompletionFuzzyFindRequestByFile;

diff  --git a/clang-tools-extra/clangd/Compiler.h 
b/clang-tools-extra/clangd/Compiler.h
index c46fb764d317..13fd4da33e3c 100644
--- a/clang-tools-extra/clangd/Compiler.h
+++ b/clang-tools-extra/clangd/Compiler.h
@@ -37,7 +37,7 @@ class IgnoreDiagnostics : public DiagnosticConsumer {
 
 // Options to run clang e.g. when parsing AST.
 struct ParseOptions {
-  bool SuggestMissingIncludes = false;
+  // (empty at present, formerly controlled recovery AST, include-fixer etc)
 };
 
 /// Information required to run clang, e.g. to parse AST or do code completion.

diff  --git a/clang-tools-extra/clangd/ParsedAST.cpp 
b/clang-tools-extra/clangd/ParsedAST.cpp
index 228db29b2be3..a8c4eea54540 100644
--- a/clang-tools-extra/clangd/ParsedAST.cpp
+++ b/clang-tools-extra/clangd/ParsedAST.cpp
@@ -351,8 +351,7 @@ ParsedAST::build(llvm::StringRef Filename, const 
ParseInputs &Inputs,
   // (e.g. incomplete type) and attach include insertion fixes to diagnostics.
   llvm::Optional FixIncludes;
   auto BuildDir = VFS->getCurrentWorkingDirectory();
-  if (Inputs.Opts.SuggestMissingIncludes && Inputs.Index &&
-  !BuildDir.getError()) {
+  if (Inputs.Index && !BuildDir.getError()) {
 auto Style = getFormatStyleForFile(Filename, Inputs.Contents, *Inputs.TFS);
 auto Inserter = std::make_shared(
 Filename, Inputs.Contents, Style, BuildDir.get(),

diff  --git a/clang-tools-extra/clangd/tool/ClangdMain.cpp 
b/clang-tools-extra/clangd/tool/ClangdMain.cpp
index 5cbf8aa0df90..fe69079bfe67 100644
--- a/clang-tools-extra/clangd/tool/ClangdMain.cpp
+++ b/clang-tools-extra/clangd/tool/ClangdMain.cpp
@@ -80,8 +80,21 @@ OptionCategory CompileCommands("clangd compilation flags 
options");
 OptionCategory Features("clangd feature options");
 OptionCategory Misc("clangd miscellaneous options");
 OptionCategory Protocol("clangd protocol and logging options");
+OptionCategory Retired("clangd flags no longer in use");
 const OptionCategory *ClangdCategories[] = {&Features, &Proto

[llvm-branch-commits] [llvm] a6a72df - [AMDGPU][GlobalISel] Avoid selecting S_PACK with constants

[Mirko Brkusanin via llvm-branch-commits]

Author: Mirko Brkusanin
Date: 2021-01-20T11:54:53+01:00
New Revision: a6a72dfdf2e132d64ea73ddbbc0d3431b6483724

URL: 
https://github.com/llvm/llvm-project/commit/a6a72dfdf2e132d64ea73ddbbc0d3431b6483724
DIFF: 
https://github.com/llvm/llvm-project/commit/a6a72dfdf2e132d64ea73ddbbc0d3431b6483724.diff

LOG: [AMDGPU][GlobalISel] Avoid selecting S_PACK with constants

If constants are hidden behind G_ANYEXT we can treat them same way as G_SEXT.
For that purpose we extend getConstantVRegValWithLookThrough with option
to handle G_ANYEXT same way as G_SEXT.

Differential Revision: https://reviews.llvm.org/D92219

Added: 


Modified: 
llvm/include/llvm/CodeGen/GlobalISel/Utils.h
llvm/lib/CodeGen/GlobalISel/Utils.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/GlobalISel/Utils.h 
b/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
index ed75cde6f316..68553ab5b1a8 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
@@ -146,10 +146,13 @@ struct ValueAndVReg {
 /// When \p LookThroughInstrs == false this function behaves like
 /// getConstantVRegVal.
 /// When \p HandleFConstants == false the function bails on G_FCONSTANTs.
+/// When \p LookThroughAnyExt == true the function treats G_ANYEXT same as
+/// G_SEXT.
 Optional
 getConstantVRegValWithLookThrough(Register VReg, const MachineRegisterInfo 
&MRI,
   bool LookThroughInstrs = true,
-  bool HandleFConstants = true);
+  bool HandleFConstants = true,
+  bool LookThroughAnyExt = false);
 const ConstantFP* getConstantFPVRegVal(Register VReg,
const MachineRegisterInfo &MRI);
 

diff  --git a/llvm/lib/CodeGen/GlobalISel/Utils.cpp 
b/llvm/lib/CodeGen/GlobalISel/Utils.cpp
index 868385c2deff..cd2483224489 100644
--- a/llvm/lib/CodeGen/GlobalISel/Utils.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/Utils.cpp
@@ -283,7 +283,7 @@ Optional llvm::getConstantVRegSExtVal(Register 
VReg,
 
 Optional llvm::getConstantVRegValWithLookThrough(
 Register VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs,
-bool HandleFConstant) {
+bool HandleFConstant, bool LookThroughAnyExt) {
   SmallVector, 4> SeenOpcodes;
   MachineInstr *MI;
   auto IsConstantOpcode = [HandleFConstant](unsigned Opcode) {
@@ -310,6 +310,10 @@ Optional 
llvm::getConstantVRegValWithLookThrough(
   while ((MI = MRI.getVRegDef(VReg)) && !IsConstantOpcode(MI->getOpcode()) &&
  LookThroughInstrs) {
 switch (MI->getOpcode()) {
+case TargetOpcode::G_ANYEXT:
+  if (!LookThroughAnyExt)
+return None;
+  LLVM_FALLTHROUGH;
 case TargetOpcode::G_TRUNC:
 case TargetOpcode::G_SEXT:
 case TargetOpcode::G_ZEXT:
@@ -343,6 +347,7 @@ Optional 
llvm::getConstantVRegValWithLookThrough(
 case TargetOpcode::G_TRUNC:
   Val = Val.trunc(OpcodeAndSize.second);
   break;
+case TargetOpcode::G_ANYEXT:
 case TargetOpcode::G_SEXT:
   Val = Val.sext(OpcodeAndSize.second);
   break;

diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index c6ae4a1a27eb..2fae3d69a700 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -597,9 +597,11 @@ bool AMDGPUInstructionSelector::selectG_BUILD_VECTOR_TRUNC(
   const DebugLoc &DL = MI.getDebugLoc();
   MachineBasicBlock *BB = MI.getParent();
 
-  auto ConstSrc1 = getConstantVRegValWithLookThrough(Src1, *MRI, true, true);
+  auto ConstSrc1 =
+  getConstantVRegValWithLookThrough(Src1, *MRI, true, true, true);
   if (ConstSrc1) {
-auto ConstSrc0 = getConstantVRegValWithLookThrough(Src0, *MRI, true, true);
+auto ConstSrc0 =
+getConstantVRegValWithLookThrough(Src0, *MRI, true, true, true);
 if (ConstSrc0) {
   const int64_t K0 = ConstSrc0->Value.getSExtValue();
   const int64_t K1 = ConstSrc1->Value.getSExtValue();

diff  --git 
a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir 
b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir
index 056ea79a9898..ccd6fd71b3da 100644
--- 
a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir
+++ 
b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir
@@ -579,10 +579,8 @@ body: |
   bb.0:
 
 ; GFX9-LABEL: name: 
test_build_vector_trunc_s_v2s16_anyext_constant_anyext_constant
-; GFX9: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 123
-; GFX9: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 456
-; G

[llvm-branch-commits] [llvm] c1bc798 - [Coroutine] Remain alignment information when merging frame variables

[Chuanqi Xu via llvm-branch-commits]

Author: Chuanqi Xu
Date: 2021-01-20T18:59:00+08:00
New Revision: c1bc7981babcae20247650a4b8adab9c0c97890a

URL: 
https://github.com/llvm/llvm-project/commit/c1bc7981babcae20247650a4b8adab9c0c97890a
DIFF: 
https://github.com/llvm/llvm-project/commit/c1bc7981babcae20247650a4b8adab9c0c97890a.diff

LOG: [Coroutine] Remain alignment information when merging frame variables

Summary: This is to address bug48712.
The solution in this patch is that when we want to merge two variable a
into the storage frame of variable b only if the alignment of a is
multiple of b.
There may be other strategies. But now I think they are hard to handle
and benefit little. Or we can implement them in the future.

Test-plan: check-llvm

Reviewers: jmorse, lxfind, junparser

Differential Revision: https://reviews.llvm.org/D94891

Added: 
llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll
llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-05.ll

Modified: 
llvm/lib/Transforms/Coroutines/CoroFrame.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Coroutines/CoroFrame.cpp 
b/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
index 26d4ea482ffb..e2642234ac9b 100644
--- a/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
+++ b/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
@@ -596,9 +596,21 @@ void FrameTypeBuilder::addFieldForAllocas(const Function 
&F,
 // NonOverlappedAllocaSet.
 for (auto &AllocaSet : NonOverlapedAllocas) {
   assert(!AllocaSet.empty() && "Processing Alloca Set is not empty.\n");
-  bool CouldMerge = none_of(AllocaSet, [&](auto Iter) {
+  bool NoInference = none_of(AllocaSet, [&](auto Iter) {
 return IsAllocaInferenre(Alloca, Iter);
   });
+  // If the alignment of A is multiple of the alignment of B, the address
+  // of A should satisfy the requirement for aligning for B.
+  //
+  // There may be other more fine-grained strategies to handle the 
alignment
+  // infomation during the merging process. But it seems hard to handle
+  // these strategies and benefit little.
+  bool Alignable = [&]() -> bool {
+auto *LargestAlloca = *AllocaSet.begin();
+return LargestAlloca->getAlign().value() % Alloca->getAlign().value() 
==
+   0;
+  }();
+  bool CouldMerge = NoInference && Alignable;
   if (!CouldMerge)
 continue;
   AllocaIndex[Alloca] = AllocaIndex[*AllocaSet.begin()];
@@ -1120,7 +1132,11 @@ static Instruction *insertSpills(const FrameDataInfo 
&FrameData,
 if (isa(Orig)) {
   // If the type of GEP is not equal to the type of AllocaInst, it implies
   // that the AllocaInst may be reused in the Frame slot of other
-  // AllocaInst. So we cast the GEP to the type of AllocaInst.
+  // AllocaInst. So We cast GEP to the AllocaInst here to re-use
+  // the Frame storage.
+  //
+  // Note: If we change the strategy dealing with alignment, we need to 
refine
+  // this casting.
   if (GEP->getResultElementType() != Orig->getType())
 return Builder.CreateBitCast(GEP, Orig->getType(),
  Orig->getName() + Twine(".cast"));

diff  --git a/llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll 
b/llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll
new file mode 100644
index ..88293dc33303
--- /dev/null
+++ b/llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll
@@ -0,0 +1,80 @@
+; Tests that variables of 
diff erent type with incompatible alignment in a Corotuine whose lifetime 
+; range is not overlapping each other should not re-use the same slot in 
Coroutine frame. 
+; RUN: opt < %s -coro-split -reuse-storage-in-coroutine-frame -S | FileCheck %s
+; RUN: opt < %s -passes=coro-split -reuse-storage-in-coroutine-frame -S | 
FileCheck %s
+%"struct.task::promise_type" = type { i8 }
+%struct.awaitable = type { i8 }
+%struct.big_structure = type { [500 x i8] }
+%struct.big_structure.2 = type { [300 x i8] }
+declare i8* @malloc(i64)
+declare void @consume(%struct.big_structure*)
+declare void @consume.2(%struct.big_structure.2*)
+define void @a(i1 zeroext %cond) "coroutine.presplit"="1" {
+entry:
+  %__promise = alloca %"struct.task::promise_type", align 1
+  %a = alloca %struct.big_structure, align 1
+  %ref.tmp7 = alloca %struct.awaitable, align 1
+  %b = alloca %struct.big_structure.2, align 32
+  %ref.tmp18 = alloca %struct.awaitable, align 1
+  %0 = getelementptr inbounds %"struct.task::promise_type", 
%"struct.task::promise_type"* %__promise, i64 0, i32 0
+  %1 = call token @llvm.coro.id(i32 16, i8* nonnull %0, i8* bitcast (void 
(i1)* @a to i8*), i8* null)
+  br label %init.ready
+init.ready:
+  %2 = call noalias nonnull i8* @llvm.coro.begin(token %1, i8* null)
+  call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %0)
+  br i1 %cond, label %if.then, label %if.else
+if.then:
+  %3 = getelementptr

[llvm-branch-commits] [mlir] cf50f4f - [mlir] Link mlir_runner_utils statically into cuda/rocm-runtime-wrappers.

[Christian Sigg via llvm-branch-commits]

Author: Christian Sigg
Date: 2021-01-20T12:10:16+01:00
New Revision: cf50f4f764566a78da8c0551f853118fe604d8d7

URL: 
https://github.com/llvm/llvm-project/commit/cf50f4f764566a78da8c0551f853118fe604d8d7
DIFF: 
https://github.com/llvm/llvm-project/commit/cf50f4f764566a78da8c0551f853118fe604d8d7.diff

LOG: [mlir] Link mlir_runner_utils statically into cuda/rocm-runtime-wrappers.

The runtime-wrappers depend on LLVMSupport, pulling in static initialization 
code (e.g. command line arguments). Dynamically loading multiple such libraries 
results in ODR violoations.

So far this has not been an issue, but in D94421, I would like to load both the 
async-runtime and the cuda-runtime-wrappers as part of a cuda-runner 
integration test. When doing this, code that asserts that an option category is 
only registered once fails (note that I've only experienced this in Google's 
bazel where the async-runtime depends on LLVMSupport, but a similar issue would 
happen in cmake if more than one runtime-wrapper starts to depend on 
LLVMSupport).

The underlying issue is that we have a mix of static and dynamic linking. If 
all dependencies were loaded as shared objects (i.e. if LLVMSupport was linked 
dynamically to the runtime wrappers), each dependency would only get loaded 
once. However, linking dependencies dynamically would require special attention 
to paths (one could dynamically load the dependencies first given explicit 
paths). The simpler approach seems to be to link all dependencies statically 
into a single shared object.

This change basically applies the same logic that we have in the 
c_runner_utils: we have a shared object target that can be loaded dynamically, 
and we have a static library target that can be linked to other runtime-wrapper 
shared object targets.

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D94399

Added: 


Modified: 
mlir/include/mlir/ExecutionEngine/CRunnerUtils.h
mlir/lib/ExecutionEngine/CMakeLists.txt
mlir/test/mlir-cuda-runner/all-reduce-and.mlir
mlir/test/mlir-cuda-runner/all-reduce-max.mlir
mlir/test/mlir-cuda-runner/all-reduce-min.mlir
mlir/test/mlir-cuda-runner/all-reduce-op.mlir
mlir/test/mlir-cuda-runner/all-reduce-or.mlir
mlir/test/mlir-cuda-runner/all-reduce-region.mlir
mlir/test/mlir-cuda-runner/all-reduce-xor.mlir
mlir/test/mlir-cuda-runner/gpu-to-cubin.mlir
mlir/test/mlir-cuda-runner/multiple-all-reduce.mlir
mlir/test/mlir-cuda-runner/shuffle.mlir
mlir/test/mlir-cuda-runner/two-modules.mlir
mlir/test/mlir-rocm-runner/gpu-to-hsaco.mlir
mlir/test/mlir-rocm-runner/two-modules.mlir
mlir/test/mlir-rocm-runner/vecadd.mlir
mlir/test/mlir-rocm-runner/vector-transferops.mlir
mlir/tools/mlir-cuda-runner/CMakeLists.txt
mlir/tools/mlir-rocm-runner/CMakeLists.txt

Removed: 




diff  --git a/mlir/include/mlir/ExecutionEngine/CRunnerUtils.h 
b/mlir/include/mlir/ExecutionEngine/CRunnerUtils.h
index 2d0608a8656b..272058d7b387 100644
--- a/mlir/include/mlir/ExecutionEngine/CRunnerUtils.h
+++ b/mlir/include/mlir/ExecutionEngine/CRunnerUtils.h
@@ -26,7 +26,7 @@
 #define MLIR_CRUNNERUTILS_EXPORT __declspec(dllimport)
 #endif // mlir_c_runner_utils_EXPORTS
 #endif // MLIR_CRUNNERUTILS_EXPORT
-#else
+#else  // _WIN32
 #define MLIR_CRUNNERUTILS_EXPORT
 #define MLIR_CRUNNERUTILS_DEFINE_FUNCTIONS
 #endif // _WIN32

diff  --git a/mlir/lib/ExecutionEngine/CMakeLists.txt 
b/mlir/lib/ExecutionEngine/CMakeLists.txt
index 7d86811fe4fd..f995ad0266d7 100644
--- a/mlir/lib/ExecutionEngine/CMakeLists.txt
+++ b/mlir/lib/ExecutionEngine/CMakeLists.txt
@@ -80,6 +80,7 @@ add_mlir_library(mlir_c_runner_utils
   EXCLUDE_FROM_LIBMLIR
   )
 set_property(TARGET mlir_c_runner_utils PROPERTY CXX_STANDARD 11)
+target_compile_definitions(mlir_c_runner_utils PRIVATE 
mlir_c_runner_utils_EXPORTS)
 
 add_mlir_library(mlir_c_runner_utils_static
   CRunnerUtils.cpp
@@ -88,7 +89,6 @@ add_mlir_library(mlir_c_runner_utils_static
   EXCLUDE_FROM_LIBMLIR
   )
 set_property(TARGET mlir_c_runner_utils_static PROPERTY CXX_STANDARD 11)
-target_compile_definitions(mlir_c_runner_utils PRIVATE 
mlir_c_runner_utils_EXPORTS)
 
 add_mlir_library(mlir_runner_utils
   SHARED
@@ -101,6 +101,15 @@ add_mlir_library(mlir_runner_utils
 )
 target_compile_definitions(mlir_runner_utils PRIVATE mlir_runner_utils_EXPORTS)
 
+add_mlir_library(mlir_runner_utils_static
+  RunnerUtils.cpp
+
+  EXCLUDE_FROM_LIBMLIR
+
+  LINK_LIBS PUBLIC
+  mlir_c_runner_utils_static
+)
+
 add_mlir_library(mlir_async_runtime
   SHARED
   AsyncRuntime.cpp
@@ -113,3 +122,13 @@ add_mlir_library(mlir_async_runtime
 )
 set_property(TARGET mlir_async_runtime PROPERTY CXX_VISIBILITY_PRESET hidden)
 target_compile_definitions(mlir_async_runtime PRIVATE 
mlir_async_runtime_EXPORTS)
+
+add_mlir_library(mlir_async_runtime_static
+  AsyncRuntime.cpp
+
+  EXCLUDE_FROM_LIBMLIR
+
+  LINK_LIBS PUBLIC
+ 

[llvm-branch-commits] [mlir] 43f34f5 - Added check if there are regions that do not implement the RegionBranchOpInterface.

[Julian Gross via llvm-branch-commits]

Author: Julian Gross
Date: 2021-01-20T12:15:28+01:00
New Revision: 43f34f58349ae178fd1c95d6a73c6858f35f2ea1

URL: 
https://github.com/llvm/llvm-project/commit/43f34f58349ae178fd1c95d6a73c6858f35f2ea1
DIFF: 
https://github.com/llvm/llvm-project/commit/43f34f58349ae178fd1c95d6a73c6858f35f2ea1.diff

LOG: Added check if there are regions that do not implement the 
RegionBranchOpInterface.

Add a check if regions do not implement the RegionBranchOpInterface. This is not
allowed in the current deallocation steps. Furthermore, we handle edge-cases,
where a single region is attached and the parent operation has no results.

This fixes: https://bugs.llvm.org/show_bug.cgi?id=48575

Differential Revision: https://reviews.llvm.org/D94586

Added: 


Modified: 
mlir/lib/Transforms/BufferDeallocation.cpp
mlir/test/Transforms/buffer-deallocation.mlir

Removed: 




diff  --git a/mlir/lib/Transforms/BufferDeallocation.cpp 
b/mlir/lib/Transforms/BufferDeallocation.cpp
index bdd8515bdc05..a4155695fdf7 100644
--- a/mlir/lib/Transforms/BufferDeallocation.cpp
+++ b/mlir/lib/Transforms/BufferDeallocation.cpp
@@ -76,6 +76,31 @@ static void walkReturnOperations(Region *region, const FuncT 
&func) {
 }
 }
 
+/// Checks if all operations in a given region have at least one attached 
region
+/// that implements the RegionBranchOpInterface. This is not required in edge
+/// cases, where we have a single attached region and the parent operation has
+/// no results.
+static bool validateSupportedControlFlow(Region ®ion) {
+  bool success = true;
+  region.walk([&success](Operation *operation) {
+auto regions = operation->getRegions();
+// Walk over all operations in a region and check if the operation has at
+// least one region and implements the RegionBranchOpInterface. If there
+// is an operation that does not fulfill this condition, we cannot apply
+// the deallocation steps. Furthermore, we accept cases, where we have a
+// region that returns no results, since, in that case, the intra-region
+// control flow does not affect the transformation.
+size_t size = regions.size();
+if (((size == 1 && !operation->getResults().empty()) || size > 1) &&
+!dyn_cast(operation)) {
+  operation->emitError("All operations with attached regions need to "
+   "implement the RegionBranchOpInterface.");
+  success = false;
+}
+  });
+  return success;
+}
+
 namespace {
 
 
//===--===//
@@ -506,7 +531,12 @@ struct BufferDeallocationPass : 
BufferDeallocationBase {
 if (backedges.size()) {
   getFunction().emitError(
   "Structured control-flow loops are supported only.");
-  return;
+  return signalPassFailure();
+}
+
+// Check that the control flow structures are supported.
+if (!validateSupportedControlFlow(getFunction().getRegion())) {
+  return signalPassFailure();
 }
 
 // Place all required temporary alloc, copy and dealloc nodes.

diff  --git a/mlir/test/Transforms/buffer-deallocation.mlir 
b/mlir/test/Transforms/buffer-deallocation.mlir
index f61d501dff9c..90b39b202fb0 100644
--- a/mlir/test/Transforms/buffer-deallocation.mlir
+++ b/mlir/test/Transforms/buffer-deallocation.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt -buffer-deallocation -split-input-file %s | FileCheck %s
+// RUN: mlir-opt -verify-diagnostics -buffer-deallocation -split-input-file %s 
| FileCheck %s
 
 // This file checks the behaviour of BufferDeallocation pass for moving and
 // inserting missing DeallocOps in their correct positions. Furthermore,
@@ -1094,7 +1094,7 @@ func @loop_nested_alloc(
 // The BufferDeallocation transformation should fail on this explicit
 // control-flow loop since they are not supported.
 
-// CHECK-LABEL: func @loop_dynalloc
+// expected-error@+1 {{Structured control-flow loops are supported only}}
 func @loop_dynalloc(
   %arg0 : i32,
   %arg1 : i32,
@@ -1121,15 +1121,13 @@ func @loop_dynalloc(
   return
 }
 
-// expected-error@+1 {{Structured control-flow loops are supported only}}
-
 // -
 
 // Test Case: explicit control-flow loop with a dynamically allocated buffer.
 // The BufferDeallocation transformation should fail on this explicit
 // control-flow loop since they are not supported.
 
-// CHECK-LABEL: func @do_loop_alloc
+// expected-error@+1 {{Structured control-flow loops are supported only}}
 func @do_loop_alloc(
   %arg0 : i32,
   %arg1 : i32,
@@ -1155,8 +1153,6 @@ func @do_loop_alloc(
   return
 }
 
-// expected-error@+1 {{Structured control-flow loops are supported only}}
-
 // -
 
 // CHECK-LABEL: func @assumingOp(
@@ -1193,3 +1189,20 @@ func @assumingOp(
 // CHECK-NEXT:shape.assuming_yield %[[RETURNING_ALLOC]]
 //  CHECK: test.copy(%[[ASSUMING_RESULT:.*]], %[[ARG2]])
 // CHECK-NEXT: dealloc %[[ASSUMING_RESULT]]
+
+// -
+
+/

[llvm-branch-commits] [lld] eff6e75 - [LLD][ELF] Correct test temporary file paths

[Jeremy Morse via llvm-branch-commits]

Author: Jeremy Morse
Date: 2021-01-20T11:46:11Z
New Revision: eff6e75c3f7c5471f0326526dc3f0b8b10f8a4df

URL: 
https://github.com/llvm/llvm-project/commit/eff6e75c3f7c5471f0326526dc3f0b8b10f8a4df
DIFF: 
https://github.com/llvm/llvm-project/commit/eff6e75c3f7c5471f0326526dc3f0b8b10f8a4df.diff

LOG: [LLD][ELF] Correct test temporary file paths

In 8031785f4a7ebd the temporary object being built was moved to %t/main.o,
but not all run lines were updated to reflect this. Observe the failure
on this buildbot:

  http://lab.llvm.org:8011/#/builders/5/builds/3646/steps/9/logs/stdio

It might pass locally for some people due to a stale %t.o hanging around
the build directory.

Added: 


Modified: 
lld/test/ELF/wrap-shlib-undefined.s

Removed: 




diff  --git a/lld/test/ELF/wrap-shlib-undefined.s 
b/lld/test/ELF/wrap-shlib-undefined.s
index f46ebe36b779..0c4a79171e27 100644
--- a/lld/test/ELF/wrap-shlib-undefined.s
+++ b/lld/test/ELF/wrap-shlib-undefined.s
@@ -31,7 +31,7 @@
 # CHECK2-NEXT: NOTYPE  GLOBAL DEFAULT6 foo
 
 ## __wrap_bar is undefined.
-# RUN: ld.lld -shared %t.o --wrap=bar -o %t3.so
+# RUN: ld.lld -shared %t/main.o --wrap=bar -o %t3.so
 # RUN: llvm-readelf -r --dyn-syms %t3.so | FileCheck %s --check-prefix=CHECK3
 # CHECK3:  R_X86_64_JUMP_SLOT  __wrap_bar + 0
 # CHECK3:  Symbol table '.dynsym' contains 4 entries:
@@ -41,7 +41,7 @@
 # CHECK3-NEXT: NOTYPE  GLOBAL DEFAULT6 foo
 
 ## __wrap_bar is defined in %t/wrap.so.
-# RUN: ld.lld -shared %t.o %t/wrap.so --wrap=bar -o %t4.so
+# RUN: ld.lld -shared %t/main.o %t/wrap.so --wrap=bar -o %t4.so
 # RUN: llvm-readelf -r --dyn-syms %t4.so | FileCheck %s --check-prefix=CHECK4
 # CHECK4:  R_X86_64_JUMP_SLOT {{.*}} __wrap_bar + 0
 # CHECK4:  Symbol table '.dynsym' contains 4 entries:
@@ -50,7 +50,7 @@
 # CHECK4-NEXT: NOTYPE  GLOBAL DEFAULT6 _start
 # CHECK4-NEXT: NOTYPE  GLOBAL DEFAULT6 foo
 
-# RUN: ld.lld %t.o %t/wrap.so --wrap bar -o %t1
+# RUN: ld.lld %t/main.o %t/wrap.so --wrap bar -o %t1
 # RUN: llvm-readelf --dyn-syms %t1 | FileCheck %s --check-prefix=DYNSYM
 # RUN: llvm-objdump -d %t1 | FileCheck %s --check-prefix=ASM
 



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[llvm-branch-commits] [llvm] eee2e88 - [LV] Add test cases with multiple exits which require versioning.

[Florian Hahn via llvm-branch-commits]

Author: Florian Hahn
Date: 2021-01-20T11:48:48Z
New Revision: eee2e8813f8113f23059a6a8757908c38e3099c5

URL: 
https://github.com/llvm/llvm-project/commit/eee2e8813f8113f23059a6a8757908c38e3099c5
DIFF: 
https://github.com/llvm/llvm-project/commit/eee2e8813f8113f23059a6a8757908c38e3099c5.diff

LOG: [LV] Add test cases with multiple exits which require versioning.

This adds some test coverage for
caafdf07bbccbe89219539e2b56043c2a98358f1, which relaxed an assertion
to only require a unique exit block.

Added: 
llvm/test/Transforms/LoopVectorize/multiple-exits-versioning.ll

Modified: 


Removed: 




diff  --git a/llvm/test/Transforms/LoopVectorize/multiple-exits-versioning.ll 
b/llvm/test/Transforms/LoopVectorize/multiple-exits-versioning.ll
new file mode 100644
index ..7a2f044d6b74
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/multiple-exits-versioning.ll
@@ -0,0 +1,67 @@
+; RUN: opt -loop-vectorize -force-vector-width=2 -S %s | FileCheck %s
+
+; Test cases to make sure LV & loop versioning can handle loops with
+; multiple exiting branches.
+
+; Multiple branches exiting the loop to a unique exit block. The loop should
+; be vectorized with versioning & noalias metadata should be added.
+define void @multiple_exits_unique_exit_block(i32* %A, i32* %B, i64 %N) {
+; CHECK-LABEL: @multiple_exits_unique_exit_block
+; CHECK:   vector.memcheck:
+; CHECK-LABEL: vector.body:
+; CHECK: %wide.load = load <2 x i32>, <2 x i32>* {{.*}}, align 4, 
!alias.scope
+; CHECK: store <2 x i32> %wide.load, <2 x i32>* {{.*}}, align 4, 
!alias.scope
+; CHECK: br
+;
+entry:
+  br label %loop.header
+
+loop.header:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %cond.0 = icmp eq i64 %iv, %N
+  br i1 %cond.0, label %exit, label %for.body
+
+for.body:
+  %A.gep = getelementptr inbounds i32, i32* %A, i64 %iv
+  %lv = load i32, i32* %A.gep, align 4
+  %B.gep = getelementptr inbounds i32, i32* %B, i64 %iv
+  store i32 %lv, i32* %B.gep, align 4
+  %iv.next = add nuw i64 %iv, 1
+  %cond.1 = icmp ult i64 %iv.next, 1000
+  br i1 %cond.1, label %loop.header, label %exit
+
+exit:
+  ret void
+}
+
+
+; Multiple branches exiting the loop to 
diff erent blocks. Currently this is not supported.
+define i32 @multiple_exits_multiple_exit_blocks(i32* %A, i32* %B, i64 %N) {
+; CHECK-LABEL: @multiple_exits_multiple_exit_blocks
+; CHECK-NEXT:entry:
+; CHECK:   br label %loop.header
+; CHECK-NOT:  <2 x i32>
+;
+entry:
+  br label %loop.header
+
+loop.header:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %cond.0 = icmp eq i64 %iv, %N
+  br i1 %cond.0, label %exit.0, label %for.body
+
+for.body:
+  %A.gep = getelementptr inbounds i32, i32* %A, i64 %iv
+  %lv = load i32, i32* %A.gep, align 4
+  %B.gep = getelementptr inbounds i32, i32* %B, i64 %iv
+  store i32 %lv, i32* %B.gep, align 4
+  %iv.next = add nuw i64 %iv, 1
+  %cond.1 = icmp ult i64 %iv.next, 1000
+  br i1 %cond.1, label %loop.header, label %exit.1
+
+exit.0:
+  ret i32 1
+
+exit.1:
+  ret i32 2
+}



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[llvm-branch-commits] [llvm] f07403e - [llvm-symbolizer][doc] Reorder --relativenames in options list

[James Henderson via llvm-branch-commits]

Author: James Henderson
Date: 2021-01-20T11:50:00Z
New Revision: f07403eb1a5f781b1bcc2b0c18ef7f632e1a0fdc

URL: 
https://github.com/llvm/llvm-project/commit/f07403eb1a5f781b1bcc2b0c18ef7f632e1a0fdc
DIFF: 
https://github.com/llvm/llvm-project/commit/f07403eb1a5f781b1bcc2b0c18ef7f632e1a0fdc.diff

LOG: [llvm-symbolizer][doc] Reorder --relativenames in options list

This puts it in alphabetical order, matching the rest of the list.

Reviewed by: MaskRay, saugustine

Differential Revision: https://reviews.llvm.org/D94481

Added: 


Modified: 
llvm/docs/CommandGuide/llvm-symbolizer.rst

Removed: 




diff  --git a/llvm/docs/CommandGuide/llvm-symbolizer.rst 
b/llvm/docs/CommandGuide/llvm-symbolizer.rst
index f2a8d8ef6801..40986eac8722 100644
--- a/llvm/docs/CommandGuide/llvm-symbolizer.rst
+++ b/llvm/docs/CommandGuide/llvm-symbolizer.rst
@@ -182,12 +182,6 @@ OPTIONS
 
   Print just the file's name without any directories, instead of the
   absolute path.
-
-.. option:: --relativenames
-
-  Print the file's path relative to the compilation directory, instead
-  of the absolute path. If the command-line to the compiler included
-  the full path, this will be the same as the default.
   
 .. _llvm-symbolizer-opt-C:
 
@@ -321,6 +315,12 @@ OPTIONS
 11 >:   return foz() + k;
 12  : }
 
+.. option:: --relativenames
+
+  Print the file's path relative to the compilation directory, instead
+  of the absolute path. If the command-line to the compiler included
+  the full path, this will be the same as the default.
+
 .. _llvm-symbolizer-opt-use-symbol-table:
 
 .. option:: --use-symbol-table



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[llvm-branch-commits] [clang-tools-extra] a1d4649 - [clangd] Fix division by zero when computing scores

[Kadir Cetinkaya via llvm-branch-commits]

Author: Kadir Cetinkaya
Date: 2021-01-20T12:50:25+01:00
New Revision: a1d4649a5b176bf826685cac5cc4416b6498bdf9

URL: 
https://github.com/llvm/llvm-project/commit/a1d4649a5b176bf826685cac5cc4416b6498bdf9
DIFF: 
https://github.com/llvm/llvm-project/commit/a1d4649a5b176bf826685cac5cc4416b6498bdf9.diff

LOG: [clangd] Fix division by zero when computing scores

NameMatch could be a float close to zero, in such cases we were
dividing by zero and moreover propogating a "NaN" to clients, which is invalid
per JSON.

This fixes the issue by only using Quality scores whenever the NameMatch is low,
as we do in CodeCompletion ranking.

Fixes https://github.com/clangd/clangd/issues/648.

Differential Revision: https://reviews.llvm.org/D94755

Added: 


Modified: 
clang-tools-extra/clangd/CodeComplete.cpp
clang-tools-extra/clangd/FindSymbols.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/CodeComplete.cpp 
b/clang-tools-extra/clangd/CodeComplete.cpp
index 9cc18ae789d5..976025b6353e 100644
--- a/clang-tools-extra/clangd/CodeComplete.cpp
+++ b/clang-tools-extra/clangd/CodeComplete.cpp
@@ -70,6 +70,7 @@
 #include "llvm/Support/ScopedPrinter.h"
 #include 
 #include 
+#include 
 
 // We log detailed candidate here if you run with -debug-only=codecomplete.
 #define DEBUG_TYPE "CodeComplete"
@@ -1655,9 +1656,10 @@ class CodeCompleteFlow {
   evaluateSymbolAndRelevance(Scores.Quality, Scores.Relevance);
   // NameMatch is in fact a multiplier on total score, so rescoring is
   // sound.
-  Scores.ExcludingName = Relevance.NameMatch
- ? Scores.Total / Relevance.NameMatch
- : Scores.Quality;
+  Scores.ExcludingName =
+  Relevance.NameMatch > std::numeric_limits::epsilon()
+  ? Scores.Total / Relevance.NameMatch
+  : Scores.Quality;
   return Scores;
 
 case RM::DecisionForest:

diff  --git a/clang-tools-extra/clangd/FindSymbols.cpp 
b/clang-tools-extra/clangd/FindSymbols.cpp
index 0a10e3efb05c..e75a74b4b05c 100644
--- a/clang-tools-extra/clangd/FindSymbols.cpp
+++ b/clang-tools-extra/clangd/FindSymbols.cpp
@@ -25,6 +25,7 @@
 #include "llvm/Support/FormatVariadic.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/ScopedPrinter.h"
+#include 
 #include 
 
 #define DEBUG_TYPE "FindSymbols"
@@ -146,8 +147,9 @@ getWorkspaceSymbols(llvm::StringRef Query, int Limit,
   return;
 }
 Relevance.merge(Sym);
-auto Score = evaluateSymbolAndRelevance(Quality.evaluateHeuristics(),
-Relevance.evaluateHeuristics());
+auto QualScore = Quality.evaluateHeuristics();
+auto RelScore = Relevance.evaluateHeuristics();
+auto Score = evaluateSymbolAndRelevance(QualScore, RelScore);
 dlog("FindSymbols: {0}{1} = {2}\n{3}{4}\n", Sym.Scope, Sym.Name, Score,
  Quality, Relevance);
 
@@ -159,7 +161,9 @@ getWorkspaceSymbols(llvm::StringRef Query, int Limit,
 Info.containerName = Scope.str();
 
 // Exposed score excludes fuzzy-match component, for client-side 
re-ranking.
-Info.score = Score / Relevance.NameMatch;
+Info.score = Relevance.NameMatch > std::numeric_limits::epsilon()
+ ? Score / Relevance.NameMatch
+ : QualScore;
 Top.push({Score, std::move(Info)});
   });
   for (auto &R : std::move(Top).items())



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[llvm-branch-commits] [llvm] f344c02 - [AArch64] Add missing "pauth" feature to the .arch_extension directive.

[Mark Murray via llvm-branch-commits]

Author: Mark Murray
Date: 2021-01-20T11:57:39Z
New Revision: f344c028dea34c1f1ec3b901d7a4c4d5d867384d

URL: 
https://github.com/llvm/llvm-project/commit/f344c028dea34c1f1ec3b901d7a4c4d5d867384d
DIFF: 
https://github.com/llvm/llvm-project/commit/f344c028dea34c1f1ec3b901d7a4c4d5d867384d.diff

LOG: [AArch64] Add missing "pauth" feature to the .arch_extension directive.

Differential Revision: https://reviews.llvm.org/D94970

Added: 
llvm/test/MC/AArch64/armv8.3a-pauth.s

Modified: 
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/test/MC/AArch64/directive-arch_extension.s

Removed: 




diff  --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 
b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 0916cf92640b..bcc5630b3ccd 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -2915,6 +2915,7 @@ static const struct Extension {
 {"sve2-bitperm", {AArch64::FeatureSVE2BitPerm}},
 {"ls64", {AArch64::FeatureLS64}},
 {"xs", {AArch64::FeatureXS}},
+{"pauth", {AArch64::FeaturePAuth}},
 // FIXME: Unsupported extensions
 {"pan", {}},
 {"lor", {}},

diff  --git a/llvm/test/MC/AArch64/armv8.3a-pauth.s 
b/llvm/test/MC/AArch64/armv8.3a-pauth.s
new file mode 100644
index ..153bf687fcc8
--- /dev/null
+++ b/llvm/test/MC/AArch64/armv8.3a-pauth.s
@@ -0,0 +1,6 @@
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+pauth   
< %s | FileCheck %s
+
+paciasp
+
+// CHECK: .text
+// CHECK: paciasp // encoding: [0x3f,0x23,0x03,0xd5]

diff  --git a/llvm/test/MC/AArch64/directive-arch_extension.s 
b/llvm/test/MC/AArch64/directive-arch_extension.s
index a44b14ddeea2..7041f613c4c8 100644
--- a/llvm/test/MC/AArch64/directive-arch_extension.s
+++ b/llvm/test/MC/AArch64/directive-arch_extension.s
@@ -71,3 +71,7 @@ ldapr x0, [x1]
 .arch_extension ls64
 ld64b x0, [x13]
 // CHECK: ld64b x0, [x13]
+
+.arch_extension pauth
+paciasp
+// CHECK: paciasp



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[llvm-branch-commits] [llvm] cab20f6 - [AArch64] Add missing "flagm" feature to the .arch_extension directive.

[Mark Murray via llvm-branch-commits]

Author: Mark Murray
Date: 2021-01-20T11:57:39Z
New Revision: cab20f61057760e3f9d7e12a9b25f3934ebd1ea4

URL: 
https://github.com/llvm/llvm-project/commit/cab20f61057760e3f9d7e12a9b25f3934ebd1ea4
DIFF: 
https://github.com/llvm/llvm-project/commit/cab20f61057760e3f9d7e12a9b25f3934ebd1ea4.diff

LOG: [AArch64] Add missing "flagm" feature to the .arch_extension directive.

Depends on D94970

Differential Revision: https://reviews.llvm.org/D94971

Added: 
llvm/test/MC/AArch64/armv8.4a-flagm.s

Modified: 
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/test/MC/AArch64/directive-arch_extension-negative.s
llvm/test/MC/AArch64/directive-arch_extension.s

Removed: 




diff  --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 
b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index bcc5630b3ccd..2df9a8050e66 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -2916,6 +2916,7 @@ static const struct Extension {
 {"ls64", {AArch64::FeatureLS64}},
 {"xs", {AArch64::FeatureXS}},
 {"pauth", {AArch64::FeaturePAuth}},
+{"flagm", {AArch64::FeatureFlagM}},
 // FIXME: Unsupported extensions
 {"pan", {}},
 {"lor", {}},

diff  --git a/llvm/test/MC/AArch64/armv8.4a-flagm.s 
b/llvm/test/MC/AArch64/armv8.4a-flagm.s
new file mode 100644
index ..2ed43b6cc874
--- /dev/null
+++ b/llvm/test/MC/AArch64/armv8.4a-flagm.s
@@ -0,0 +1,6 @@
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+flagm   
< %s | FileCheck %s
+
+cfinv
+
+// CHECK: .text
+cfinv // encoding: [0x1f,0x40,0x00,0xd5]

diff  --git a/llvm/test/MC/AArch64/directive-arch_extension-negative.s 
b/llvm/test/MC/AArch64/directive-arch_extension-negative.s
index 29920d442a8a..797a303e3043 100644
--- a/llvm/test/MC/AArch64/directive-arch_extension-negative.s
+++ b/llvm/test/MC/AArch64/directive-arch_extension-negative.s
@@ -1,5 +1,5 @@
 // RUN: not llvm-mc -triple aarch64 \
-// RUN: 
-mattr=+crc,+sm4,+sha3,+sha2,+aes,+fp,+neon,+ras,+lse,+predres,+ccdp,+mte,+tlb-rmi,+pan-rwv,+ccpp,+rcpc,+ls64
 \
+// RUN: 
-mattr=+crc,+sm4,+sha3,+sha2,+aes,+fp,+neon,+ras,+lse,+predres,+ccdp,+mte,+tlb-rmi,+pan-rwv,+ccpp,+rcpc,+ls64,+flagm
 \
 // RUN: -filetype asm -o - %s 2>&1 | FileCheck %s
 
 .arch_extension axp64
@@ -124,3 +124,10 @@ ld64b x0, [x13]
 ld64b x0, [x13]
 // CHECK: [[@LINE-1]]:1: error: instruction requires: ls64
 // CHECK-NEXT: ld64b x0, [x13]
+
+cfinv
+// CHECK-NOT: [[@LINE-1]]:1: error: instruction requires: flagm
+.arch_extension noflagm
+cfinv
+// CHECK: [[@LINE-1]]:1: error: instruction requires: flagm
+// CHECK-NEXT: cfinv

diff  --git a/llvm/test/MC/AArch64/directive-arch_extension.s 
b/llvm/test/MC/AArch64/directive-arch_extension.s
index 7041f613c4c8..8cf2acd509b1 100644
--- a/llvm/test/MC/AArch64/directive-arch_extension.s
+++ b/llvm/test/MC/AArch64/directive-arch_extension.s
@@ -75,3 +75,7 @@ ld64b x0, [x13]
 .arch_extension pauth
 paciasp
 // CHECK: paciasp
+
+.arch_extension flagm
+cfinv
+// CHECK: cfinv



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[llvm-branch-commits] [mlir] cba1ca9 - Fix cuda-runner tests.

[Christian Sigg via llvm-branch-commits]

Author: Christian Sigg
Date: 2021-01-20T13:14:27+01:00
New Revision: cba1ca9025899b1f6681ac824a7db60349d575f7

URL: 
https://github.com/llvm/llvm-project/commit/cba1ca9025899b1f6681ac824a7db60349d575f7
DIFF: 
https://github.com/llvm/llvm-project/commit/cba1ca9025899b1f6681ac824a7db60349d575f7.diff

LOG: Fix cuda-runner tests.

Added: 


Modified: 
mlir/test/mlir-cuda-runner/all-reduce-and.mlir
mlir/test/mlir-cuda-runner/all-reduce-max.mlir
mlir/test/mlir-cuda-runner/all-reduce-min.mlir
mlir/test/mlir-cuda-runner/all-reduce-op.mlir
mlir/test/mlir-cuda-runner/all-reduce-or.mlir
mlir/test/mlir-cuda-runner/all-reduce-region.mlir
mlir/test/mlir-cuda-runner/all-reduce-xor.mlir
mlir/test/mlir-cuda-runner/gpu-to-cubin.mlir
mlir/test/mlir-cuda-runner/multiple-all-reduce.mlir
mlir/test/mlir-cuda-runner/shuffle.mlir
mlir/test/mlir-cuda-runner/two-modules.mlir
mlir/test/mlir-rocm-runner/gpu-to-hsaco.mlir
mlir/test/mlir-rocm-runner/two-modules.mlir
mlir/test/mlir-rocm-runner/vecadd.mlir
mlir/test/mlir-rocm-runner/vector-transferops.mlir

Removed: 




diff  --git a/mlir/test/mlir-cuda-runner/all-reduce-and.mlir 
b/mlir/test/mlir-cuda-runner/all-reduce-and.mlir
index 205f4e7fca2d..8df20401cfba 100644
--- a/mlir/test/mlir-cuda-runner/all-reduce-and.mlir
+++ b/mlir/test/mlir-cuda-runner/all-reduce-and.mlir
@@ -1,5 +1,5 @@
 // RUN: mlir-cuda-runner %s \
-// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext
+// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext \
 // RUN:   --entry-point-result=void \
 // RUN: | FileCheck %s
 

diff  --git a/mlir/test/mlir-cuda-runner/all-reduce-max.mlir 
b/mlir/test/mlir-cuda-runner/all-reduce-max.mlir
index 32f4511a22bf..66a35e25988f 100644
--- a/mlir/test/mlir-cuda-runner/all-reduce-max.mlir
+++ b/mlir/test/mlir-cuda-runner/all-reduce-max.mlir
@@ -1,5 +1,5 @@
 // RUN: mlir-cuda-runner %s \
-// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext
+// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext \
 // RUN:   --entry-point-result=void \
 // RUN: | FileCheck %s
 

diff  --git a/mlir/test/mlir-cuda-runner/all-reduce-min.mlir 
b/mlir/test/mlir-cuda-runner/all-reduce-min.mlir
index 39c62b0628a2..7f7bf6921c85 100644
--- a/mlir/test/mlir-cuda-runner/all-reduce-min.mlir
+++ b/mlir/test/mlir-cuda-runner/all-reduce-min.mlir
@@ -1,5 +1,5 @@
 // RUN: mlir-cuda-runner %s \
-// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext
+// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext \
 // RUN:   --entry-point-result=void \
 // RUN: | FileCheck %s
 

diff  --git a/mlir/test/mlir-cuda-runner/all-reduce-op.mlir 
b/mlir/test/mlir-cuda-runner/all-reduce-op.mlir
index e20e386d9ffa..d4857e3e6ea6 100644
--- a/mlir/test/mlir-cuda-runner/all-reduce-op.mlir
+++ b/mlir/test/mlir-cuda-runner/all-reduce-op.mlir
@@ -1,5 +1,5 @@
 // RUN: mlir-cuda-runner %s \
-// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext
+// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext \
 // RUN:   --entry-point-result=void \
 // RUN: | FileCheck %s
 

diff  --git a/mlir/test/mlir-cuda-runner/all-reduce-or.mlir 
b/mlir/test/mlir-cuda-runner/all-reduce-or.mlir
index 175fda6e1f89..dfc015a65f1a 100644
--- a/mlir/test/mlir-cuda-runner/all-reduce-or.mlir
+++ b/mlir/test/mlir-cuda-runner/all-reduce-or.mlir
@@ -1,5 +1,5 @@
 // RUN: mlir-cuda-runner %s \
-// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext
+// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext \
 // RUN:   --entry-point-result=void \
 // RUN: | FileCheck %s
 

diff  --git a/mlir/test/mlir-cuda-runner/all-reduce-region.mlir 
b/mlir/test/mlir-cuda-runner/all-reduce-region.mlir
index dd70a5bc359e..988ed2a2320e 100644
--- a/mlir/test/mlir-cuda-runner/all-reduce-region.mlir
+++ b/mlir/test/mlir-cuda-runner/all-reduce-region.mlir
@@ -1,5 +1,5 @@
 // RUN: mlir-cuda-runner %s \
-// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext
+// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext \
 // RUN:   --entry-point-result=void \
 // RUN: | FileCheck %s
 

diff  --git a/mlir/test/mlir-cuda-runner/all-reduce-xor.mlir 
b/mlir/test/mlir-cuda-runner/all-reduce-xor.mlir
index cf0d409ed28f..917140ba52fc 100644
--- a/mlir/test/mlir-cuda-runner/all-reduce-xor.mlir
+++ b/mlir/test/mlir-cuda-runner/all-reduce-xor.mlir
@@ -1,5 +1,5 @@
 // RUN: mlir-cuda-runner %s \
-// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext
+// RUN:   
--shared-libs=%cuda_wrapper_library_dir/libcuda-runtime-wrappers%shlibext \
 // RUN:   --entry-point-result=void \
 // RUN: |

[llvm-branch-commits] [clang-tools-extra] 42830f8 - [clangd] Extend find-refs to include overrides.

[Haojian Wu via llvm-branch-commits]

Author: Haojian Wu
Date: 2021-01-20T13:23:20+01:00
New Revision: 42830f8bdc8f064fee648541f79f8e8d66072cce

URL: 
https://github.com/llvm/llvm-project/commit/42830f8bdc8f064fee648541f79f8e8d66072cce
DIFF: 
https://github.com/llvm/llvm-project/commit/42830f8bdc8f064fee648541f79f8e8d66072cce.diff

LOG: [clangd] Extend find-refs to include overrides.

find-references on `virtual void meth^od() = 0` will include override 
references.

Differential Revision: https://reviews.llvm.org/D94390

Added: 


Modified: 
clang-tools-extra/clangd/XRefs.cpp
clang-tools-extra/clangd/unittests/XRefsTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/XRefs.cpp 
b/clang-tools-extra/clangd/XRefs.cpp
index 8027e0564126..d4dc6212553f 100644
--- a/clang-tools-extra/clangd/XRefs.cpp
+++ b/clang-tools-extra/clangd/XRefs.cpp
@@ -879,11 +879,8 @@ class ReferenceFinder : public index::IndexDataConsumer {
   };
 
   ReferenceFinder(const ParsedAST &AST,
-  const std::vector &TargetDecls)
-  : AST(AST) {
-for (const NamedDecl *D : TargetDecls)
-  CanonicalTargets.insert(D->getCanonicalDecl());
-  }
+  const llvm::DenseSet &TargetIDs)
+  : AST(AST), TargetIDs(TargetIDs) {}
 
   std::vector take() && {
 llvm::sort(References, [](const Reference &L, const Reference &R) {
@@ -908,9 +905,9 @@ class ReferenceFinder : public index::IndexDataConsumer {
llvm::ArrayRef Relations,
SourceLocation Loc,
index::IndexDataConsumer::ASTNodeInfo ASTNode) override 
{
-assert(D->isCanonicalDecl() && "expect D to be a canonical declaration");
 const SourceManager &SM = AST.getSourceManager();
-if (!CanonicalTargets.count(D) || !isInsideMainFile(Loc, SM))
+if (!isInsideMainFile(Loc, SM) ||
+TargetIDs.find(getSymbolID(D)) == TargetIDs.end())
   return true;
 const auto &TB = AST.getTokens();
 Loc = SM.getFileLoc(Loc);
@@ -920,14 +917,14 @@ class ReferenceFinder : public index::IndexDataConsumer {
   }
 
 private:
-  llvm::SmallSet CanonicalTargets;
   std::vector References;
   const ParsedAST *
+  const llvm::DenseSet &TargetIDs;
 };
 
 std::vector
-findRefs(const std::vector &Decls, ParsedAST &AST) {
-  ReferenceFinder RefFinder(AST, Decls);
+findRefs(const llvm::DenseSet &IDs, ParsedAST &AST) {
+  ReferenceFinder RefFinder(AST, IDs);
   index::IndexingOptions IndexOpts;
   IndexOpts.SystemSymbolFilter =
   index::IndexingOptions::SystemSymbolFilterKind::All;
@@ -1217,7 +1214,11 @@ std::vector 
findDocumentHighlights(ParsedAST &AST,
   if (!Decls.empty()) {
 // FIXME: we may get multiple DocumentHighlights with the same location
 // and 
diff erent kinds, deduplicate them.
-for (const auto &Ref : findRefs({Decls.begin(), Decls.end()}, AST))
+llvm::DenseSet Targets;
+for (const NamedDecl *ND : Decls)
+  if (auto ID = getSymbolID(ND))
+Targets.insert(ID);
+for (const auto &Ref : findRefs(Targets, AST))
   Result.push_back(toHighlight(Ref, SM));
 return true;
   }
@@ -1295,13 +1296,14 @@ ReferencesResult findReferences(ParsedAST &AST, 
Position Pos, uint32_t Limit,
 llvm::consumeError(CurLoc.takeError());
 return {};
   }
-  llvm::Optional Macro;
-  if (const auto *IdentifierAtCursor =
-  syntax::spelledIdentifierTouching(*CurLoc, AST.getTokens())) {
-Macro = locateMacroAt(*IdentifierAtCursor, AST.getPreprocessor());
-  }
 
   RefsRequest Req;
+
+  const auto *IdentifierAtCursor =
+  syntax::spelledIdentifierTouching(*CurLoc, AST.getTokens());
+  llvm::Optional Macro;
+  if (IdentifierAtCursor)
+Macro = locateMacroAt(*IdentifierAtCursor, AST.getPreprocessor());
   if (Macro) {
 // Handle references to macro.
 if (auto MacroSID = getSymbolID(Macro->Name, Macro->Info, SM)) {
@@ -1325,9 +1327,35 @@ ReferencesResult findReferences(ParsedAST &AST, Position 
Pos, uint32_t Limit,
 DeclRelation::TemplatePattern | DeclRelation::Alias;
 std::vector Decls =
 getDeclAtPosition(AST, *CurLoc, Relations);
+llvm::DenseSet Targets;
+for (const NamedDecl *D : Decls)
+  if (auto ID = getSymbolID(D))
+Targets.insert(ID);
+
+llvm::DenseSet Overrides;
+if (Index) {
+  RelationsRequest FindOverrides;
+  FindOverrides.Predicate = RelationKind::OverriddenBy;
+  for (const NamedDecl *ND : Decls) {
+// Special case: virtual void meth^od() = 0 includes refs of overrides.
+if (const auto *CMD = llvm::dyn_cast(ND)) {
+  if (CMD->isPure())
+if (IdentifierAtCursor && SM.getSpellingLoc(CMD->getLocation()) ==
+  IdentifierAtCursor->location())
+  if (auto ID = getSymbolID(CMD))
+FindOverrides.Subjects.insert(ID);
+}
+  }
+

[llvm-branch-commits] [llvm] 985b9b7 - [PM] Avoid duplicates in the Used/Preserved/Required sets

[Bjorn Pettersson via llvm-branch-commits]

Author: Bjorn Pettersson
Date: 2021-01-20T13:55:18+01:00
New Revision: 985b9b7e421a16e8fcab7f038601a23a25cdfd5d

URL: 
https://github.com/llvm/llvm-project/commit/985b9b7e421a16e8fcab7f038601a23a25cdfd5d
DIFF: 
https://github.com/llvm/llvm-project/commit/985b9b7e421a16e8fcab7f038601a23a25cdfd5d.diff

LOG: [PM] Avoid duplicates in the Used/Preserved/Required sets

The pass analysis uses "sets" implemented using a SmallVector type
to keep track of Used, Preserved, Required and RequiredTransitive
passes. When having nested analyses we could end up with duplicates
in those sets, as there was no checks to see if a pass already
existed in the "set" before pushing to the vectors. This idea with
this patch is to avoid such duplicates by avoiding pushing elements
that already is contained when adding elements to those sets.

To align with the above PMDataManager::collectRequiredAndUsedAnalyses
is changed to skip adding both the Required and RequiredTransitive
passes to its result vectors (since RequiredTransitive always is
a subset of Required we ended up with duplicates when traversing
both sets).

Main goal with this is to avoid spending time verifying the same
analysis mulitple times in PMDataManager::verifyPreservedAnalysis
when iterating over the Preserved "set". It is assumed that removing
duplicates from a "set" shouldn't have any other negative impact
(I have not seen any problems so far). If this ends up causing
problems one could do some uniqueness filtering of the vector being
traversed in verifyPreservedAnalysis instead.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D94416

Added: 


Modified: 
llvm/include/llvm/PassAnalysisSupport.h
llvm/lib/IR/LegacyPassManager.cpp
llvm/lib/IR/Pass.cpp

Removed: 




diff  --git a/llvm/include/llvm/PassAnalysisSupport.h 
b/llvm/include/llvm/PassAnalysisSupport.h
index 4e28466c4968..4bed3cb55a90 100644
--- a/llvm/include/llvm/PassAnalysisSupport.h
+++ b/llvm/include/llvm/PassAnalysisSupport.h
@@ -17,11 +17,12 @@
 
 #if !defined(LLVM_PASS_H) || defined(LLVM_PASSANALYSISSUPPORT_H)
 #error "Do not include ; include  instead"
-#endif 
+#endif
 
 #ifndef LLVM_PASSANALYSISSUPPORT_H
 #define LLVM_PASSANALYSISSUPPORT_H
 
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallVector.h"
 #include 
 #include 
@@ -58,6 +59,11 @@ class AnalysisUsage {
   SmallVector Used;
   bool PreservesAll = false;
 
+  void pushUnique(VectorType &Set, AnalysisID ID) {
+if (!llvm::is_contained(Set, ID))
+  Set.push_back(ID);
+  }
+
 public:
   AnalysisUsage() = default;
 
@@ -80,17 +86,17 @@ class AnalysisUsage {
   ///@{
   /// Add the specified ID to the set of analyses preserved by this pass.
   AnalysisUsage &addPreservedID(const void *ID) {
-Preserved.push_back(ID);
+pushUnique(Preserved, ID);
 return *this;
   }
   AnalysisUsage &addPreservedID(char &ID) {
-Preserved.push_back(&ID);
+pushUnique(Preserved, &ID);
 return *this;
   }
   /// Add the specified Pass class to the set of analyses preserved by this 
pass.
   template
   AnalysisUsage &addPreserved() {
-Preserved.push_back(&PassClass::ID);
+pushUnique(Preserved, &PassClass::ID);
 return *this;
   }
   ///@}
@@ -99,17 +105,17 @@ class AnalysisUsage {
   /// Add the specified ID to the set of analyses used by this pass if they are
   /// available..
   AnalysisUsage &addUsedIfAvailableID(const void *ID) {
-Used.push_back(ID);
+pushUnique(Used, ID);
 return *this;
   }
   AnalysisUsage &addUsedIfAvailableID(char &ID) {
-Used.push_back(&ID);
+pushUnique(Used, &ID);
 return *this;
   }
   /// Add the specified Pass class to the set of analyses used by this pass.
   template
   AnalysisUsage &addUsedIfAvailable() {
-Used.push_back(&PassClass::ID);
+pushUnique(Used, &PassClass::ID);
 return *this;
   }
   ///@}

diff  --git a/llvm/lib/IR/LegacyPassManager.cpp 
b/llvm/lib/IR/LegacyPassManager.cpp
index f35c5048ae68..5575bc469a87 100644
--- a/llvm/lib/IR/LegacyPassManager.cpp
+++ b/llvm/lib/IR/LegacyPassManager.cpp
@@ -1110,12 +1110,6 @@ void PMDataManager::collectRequiredAndUsedAnalyses(
   UP.push_back(AnalysisPass);
 else
   RP_NotAvail.push_back(RequiredID);
-
-  for (const auto &RequiredID : AnUsage->getRequiredTransitiveSet())
-if (Pass *AnalysisPass = findAnalysisPass(RequiredID, true))
-  UP.push_back(AnalysisPass);
-else
-  RP_NotAvail.push_back(RequiredID);
 }
 
 // All Required analyses should be available to the pass as it runs!  Here

diff  --git a/llvm/lib/IR/Pass.cpp b/llvm/lib/IR/Pass.cpp
index 0750501a92c4..755ea57c63fd 100644
--- a/llvm/lib/IR/Pass.cpp
+++ b/llvm/lib/IR/Pass.cpp
@@ -259,22 +259,23 @@ void AnalysisUsage::setPreservesCFG() {
 AnalysisUsage &AnalysisUsage::addPreserved(StringRef Arg) {
   const PassInfo *PI = Pass::lookupPassInfo(Arg);
   // If the pass exists, preserve it. Otherw

[llvm-branch-commits] [llvm] 5d71837 - [SCEV] Add a test with wrong exit counts. (NFC)

[Mindong Chen via llvm-branch-commits]

Author: Mindong Chen
Date: 2021-01-20T20:58:34+08:00
New Revision: 5d718374a68fb68f3ec5ed3670b4dfa99dc42789

URL: 
https://github.com/llvm/llvm-project/commit/5d718374a68fb68f3ec5ed3670b4dfa99dc42789
DIFF: 
https://github.com/llvm/llvm-project/commit/5d718374a68fb68f3ec5ed3670b4dfa99dc42789.diff

LOG: [SCEV] Add a test with wrong exit counts. (NFC)

This patch pre-commits a test case with wrong exit count
analysis for D92367.

Reviewed by: mkazantsev

Differential Revision: https://reviews.llvm.org/D94657

Added: 
llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll

Modified: 


Removed: 




diff  --git a/llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll 
b/llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll
new file mode 100644
index ..411a8566d1b7
--- /dev/null
+++ b/llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll
@@ -0,0 +1,146 @@
+; NOTE: Assertions have been autogenerated by 
utils/update_analyze_test_checks.py
+; RUN: opt -analyze -scalar-evolution < %s | FileCheck %s
+
+@b = dso_local global i32 5, align 4
+@__const.f.g = private unnamed_addr constant [1 x [4 x i16]] [[4 x i16] [i16 
1, i16 0, i16 0, i16 0]], align 2
+@a = common dso_local global i32 0, align 4
+@c = common dso_local global i32 0, align 4
+@d = common dso_local global i32 0, align 4
+@e = common dso_local global i32 0, align 4
+
+; When inner.loop is taken as an exiting block of outer.loop, we cannot use the
+; addrec of %storemerge1921.3, which is {3, +, -1}, to calculate 
the
+; exit count because it doesn't belong to outer.loop.
+define dso_local i32 @f() {
+; CHECK-LABEL: 'f'
+; CHECK-NEXT:  Classifying expressions for: @f
+; CHECK-NEXT:%storemerge23 = phi i32 [ 3, %entry ], [ %dec16, %for.inc13.3 
]
+; CHECK-NEXT:--> {3,+,-1}<%outer.loop> U: [-2147483648,4) S: 
[-2147483648,4) Exits: 3 LoopDispositions: { %outer.loop: Computable, 
%for.cond6: Invariant, %inner.loop: Invariant }
+; CHECK-NEXT:%storemerge1921 = phi i32 [ 3, %outer.loop ], [ %dec, 
%for.end ]
+; CHECK-NEXT:--> {3,+,-1}<%for.cond6> U: [3,4) S: [3,4) Exits: 
<> LoopDispositions: { %for.cond6: Computable, %outer.loop: Variant }
+; CHECK-NEXT:%idxprom20 = zext i32 %storemerge1921 to i64
+; CHECK-NEXT:--> {3,+,4294967295}<%for.cond6> U: [3,4) S: [3,4) 
Exits: <> LoopDispositions: { %for.cond6: Computable, %outer.loop: 
Variant }
+; CHECK-NEXT:%arrayidx7 = getelementptr inbounds [1 x [4 x i16]], [1 x [4 
x i16]]* @__const.f.g, i64 0, i64 0, i64 %idxprom20
+; CHECK-NEXT:--> {(6 + @__const.f.g),+,8589934590}<%for.cond6> 
U: [6,-1) S: [-9223372036854775808,9223372036854775807) Exits: <> 
LoopDispositions: { %for.cond6: Computable, %outer.loop: Variant }
+; CHECK-NEXT:%i = load i16, i16* %arrayidx7, align 2
+; CHECK-NEXT:--> %i U: full-set S: full-set Exits: <> 
LoopDispositions: { %for.cond6: Variant, %outer.loop: Variant }
+; CHECK-NEXT:%storemerge1822.lcssa.ph = phi i32 [ 0, %for.cond6 ]
+; CHECK-NEXT:--> 0 U: [0,1) S: [0,1)
+; CHECK-NEXT:%storemerge1822.lcssa.ph32 = phi i32 [ 3, %inner.loop ]
+; CHECK-NEXT:--> 3 U: [3,4) S: [3,4)
+; CHECK-NEXT:%storemerge1822.lcssa = phi i32 [ %storemerge1822.lcssa.ph, 
%if.end.loopexit ], [ %storemerge1822.lcssa.ph32, %if.end.loopexit31 ]
+; CHECK-NEXT:--> %storemerge1822.lcssa U: [0,4) S: [0,4)
+; CHECK-NEXT:%i1 = load i32, i32* @e, align 4
+; CHECK-NEXT:--> %i1 U: full-set S: full-set
+; CHECK-NEXT:%i2 = load volatile i32, i32* @b, align 4
+; CHECK-NEXT:--> %i2 U: full-set S: full-set Exits: <> 
LoopDispositions: { %for.cond6: Variant, %outer.loop: Variant }
+; CHECK-NEXT:%dec = add nsw i32 %storemerge1921, -1
+; CHECK-NEXT:--> {2,+,-1}<%for.cond6> U: [2,3) S: [2,3) Exits: 
<> LoopDispositions: { %for.cond6: Computable, %outer.loop: Variant }
+; CHECK-NEXT:%inc.lcssa.lcssa = phi i32 [ 4, %for.inc13.3 ]
+; CHECK-NEXT:--> 4 U: [4,5) S: [4,5)
+; CHECK-NEXT:%retval.0 = phi i32 [ %i1, %if.end ], [ 0, %cleanup.loopexit ]
+; CHECK-NEXT:--> %retval.0 U: full-set S: full-set
+; CHECK-NEXT:%storemerge1921.3 = phi i32 [ 3, %for.end ], [ %dec.3, 
%for.end.3 ]
+; CHECK-NEXT:--> {3,+,-1}<%inner.loop> U: [3,4) S: [3,4) Exits: 
<> LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant }
+; CHECK-NEXT:%idxprom20.3 = zext i32 %storemerge1921.3 to i64
+; CHECK-NEXT:--> {3,+,4294967295}<%inner.loop> U: [3,4) S: [3,4) 
Exits: <> LoopDispositions: { %inner.loop: Computable, %outer.loop: 
Variant }
+; CHECK-NEXT:%arrayidx7.3 = getelementptr inbounds [1 x [4 x i16]], [1 x 
[4 x i16]]* @__const.f.g, i64 0, i64 0, i64 %idxprom20.3
+; CHECK-NEXT:--> {(6 + @__const.f.g),+,8589934590}<%inner.loop> 
U: [6,-1) S: [-9223372036854775808,9223372036854775807) Exits: <> 
LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant }
+; CHECK-NEXT:%i7 = load i16, i16* %arrayidx7.3, align

[llvm-branch-commits] [llvm] 21bfd06 - [AArch64] Add support for the GNU ILP32 ABI

[Amanieu d'Antras via llvm-branch-commits]

Author: Amanieu d'Antras
Date: 2021-01-20T13:34:47Z
New Revision: 21bfd068b32ece1c6fbc912208e7cd1782a8c3fc

URL: 
https://github.com/llvm/llvm-project/commit/21bfd068b32ece1c6fbc912208e7cd1782a8c3fc
DIFF: 
https://github.com/llvm/llvm-project/commit/21bfd068b32ece1c6fbc912208e7cd1782a8c3fc.diff

LOG: [AArch64] Add support for the GNU ILP32 ABI

Add the aarch64[_be]-*-gnu_ilp32 targets to support the GNU ILP32 ABI for 
AArch64.

The needed codegen changes were mostly already implemented in D61259, which 
added support for the watchOS ILP32 ABI. The main changes are:
- Wiring up the new target to enable ILP32 codegen and MC.
- ILP32 va_list support.
- ILP32 TLSDESC relocation support.

There was existing MC support for ELF ILP32 relocations from D25159 which could 
be enabled by passing "-target-abi ilp32" to llvm-mc. This was changed to check 
for "gnu_ilp32" in the target triple instead. This shouldn't cause any issues 
since the existing support was slightly broken: it was generating ELF64 objects 
instead of the ELF32 object files expected by the GNU ILP32 toolchain.

This target has been tested by running the full rustc testsuite on a big-endian 
ILP32 system based on the GCC ILP32 toolchain.

Reviewed By: kristof.beyls

Differential Revision: https://reviews.llvm.org/D94143

Added: 
llvm/test/CodeGen/AArch64/ilp32-tlsdesc.ll
llvm/test/CodeGen/AArch64/ilp32-va.ll

Modified: 
llvm/include/llvm/ADT/Triple.h
llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
llvm/lib/Support/Triple.cpp
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
llvm/test/MC/AArch64/adrp-relocation.s
llvm/test/MC/AArch64/arm32-elf-relocs.s
llvm/test/MC/AArch64/arm64-elf-reloc-condbr.s
llvm/test/MC/AArch64/arm64-ilp32.s
llvm/test/MC/AArch64/elf-reloc-ldrlit.s
llvm/test/MC/AArch64/elf-reloc-tstb.s
llvm/test/MC/AArch64/elf-reloc-uncondbrimm.s
llvm/test/MC/AArch64/ilp32-diagnostics.s

Removed: 




diff  --git a/llvm/include/llvm/ADT/Triple.h b/llvm/include/llvm/ADT/Triple.h
index f6f015577351..eed315c929ad 100644
--- a/llvm/include/llvm/ADT/Triple.h
+++ b/llvm/include/llvm/ADT/Triple.h
@@ -209,6 +209,7 @@ class Triple {
 GNUEABI,
 GNUEABIHF,
 GNUX32,
+GNUILP32,
 CODE16,
 EABI,
 EABIHF,
@@ -728,7 +729,10 @@ class Triple {
 assert(PointerWidth == 64 || PointerWidth == 32);
 if (!isAArch64())
   return false;
-return isArch64Bit() ? PointerWidth == 64 : PointerWidth == 32;
+return getArch() == Triple::aarch64_32 ||
+   getEnvironment() == Triple::GNUILP32
+   ? PointerWidth == 32
+   : PointerWidth == 64;
   }
 
   /// Tests whether the target is MIPS 32-bit (little and big endian).

diff  --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp 
b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
index 32e8393a88e5..4971838b08a0 100644
--- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
@@ -181,11 +181,20 @@ void TargetLoweringObjectFileELF::Initialize(MCContext 
&Ctx,
 // will be in memory. Most of these could end up >2GB away so even a signed
 // pc-relative 32-bit address is insufficient, theoretically.
 if (isPositionIndependent()) {
-  PersonalityEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |
-dwarf::DW_EH_PE_sdata8;
-  LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata8;
-  TTypeEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |
-dwarf::DW_EH_PE_sdata8;
+  // ILP32 uses sdata4 instead of sdata8
+  if (TgtM.getTargetTriple().getEnvironment() == Triple::GNUILP32) {
+PersonalityEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel 
|
+  dwarf::DW_EH_PE_sdata4;
+LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4;
+TTypeEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |
+dwarf::DW_EH_PE_sdata4;
+  } else {
+PersonalityEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel 
|
+  dwarf::DW_EH_PE_sdata8;
+LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata8;
+TTypeEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |
+dwarf::DW_EH_PE_sdata8;
+  }
 } else {
   PersonalityEncoding = dwarf::DW_EH_PE_absptr;
   LSDAEncoding = dwarf::DW_EH_PE_absptr;

diff  --git a/llvm

[llvm-branch-commits] [llvm] c056f82 - [TableGen] Improve algorithm for inheriting class template args and fields

[Paul C. Anagnostopoulos via llvm-branch-commits]

Author: Paul C. Anagnostopoulos
Date: 2021-01-20T09:31:43-05:00
New Revision: c056f824340ff0189f3ef7870b83e3730de401d1

URL: 
https://github.com/llvm/llvm-project/commit/c056f824340ff0189f3ef7870b83e3730de401d1
DIFF: 
https://github.com/llvm/llvm-project/commit/c056f824340ff0189f3ef7870b83e3730de401d1.diff

LOG: [TableGen] Improve algorithm for inheriting class template args and fields

Differential Revision: https://reviews.llvm.org/D94822

Added: 


Modified: 
llvm/include/llvm/TableGen/Record.h
llvm/lib/TableGen/Record.cpp
llvm/lib/TableGen/TGParser.cpp
llvm/test/TableGen/self-reference-typeerror.td

Removed: 




diff  --git a/llvm/include/llvm/TableGen/Record.h 
b/llvm/include/llvm/TableGen/Record.h
index 2853a471b67f..b615385d3a05 100644
--- a/llvm/include/llvm/TableGen/Record.h
+++ b/llvm/include/llvm/TableGen/Record.h
@@ -1996,6 +1996,12 @@ class MapResolver final : public Resolver {
 
   void set(Init *Key, Init *Value) { Map[Key] = {Value, false}; }
 
+  bool isComplete(Init *VarName) const {
+auto It = Map.find(VarName);
+assert(It != Map.end() && "key must be present in map");
+return It->second.V->isComplete();
+  }
+
   Init *resolve(Init *VarName) override;
 };
 

diff  --git a/llvm/lib/TableGen/Record.cpp b/llvm/lib/TableGen/Record.cpp
index 74786e040018..966599e29e82 100644
--- a/llvm/lib/TableGen/Record.cpp
+++ b/llvm/lib/TableGen/Record.cpp
@@ -2316,7 +2316,7 @@ void Record::resolveReferences(Resolver &R, const 
RecordVal *SkipVal) {
   Type =
   (Twine("of type '") + VRT->getType()->getAsString() + "' 
").str();
 PrintFatalError(getLoc(), Twine("Invalid value ") + Type +
-  "is found when setting '" +
+  "found when setting field '" +
   Value.getNameInitAsString() +
   "' of type '" +
   Value.getType()->getAsString() +

diff  --git a/llvm/lib/TableGen/TGParser.cpp b/llvm/lib/TableGen/TGParser.cpp
index 24949f0b2b4d..63b304164d42 100644
--- a/llvm/lib/TableGen/TGParser.cpp
+++ b/llvm/lib/TableGen/TGParser.cpp
@@ -229,38 +229,33 @@ bool TGParser::SetValue(Record *CurRec, SMLoc Loc, Init 
*ValName,
 /// args as SubClass's template arguments.
 bool TGParser::AddSubClass(Record *CurRec, SubClassReference &SubClass) {
   Record *SC = SubClass.Rec;
-  // Add all of the values in the subclass into the current class.
-  for (const RecordVal &Val : SC->getValues())
-if (AddValue(CurRec, SubClass.RefRange.Start, Val))
-  return true;
-
-  ArrayRef TArgs = SC->getTemplateArgs();
-
-  // Ensure that an appropriate number of template arguments are specified.
-  if (TArgs.size() < SubClass.TemplateArgs.size())
-return Error(SubClass.RefRange.Start,
- "More template args specified than expected");
-
-  // Loop over all of the template arguments, setting them to the specified
-  // value or leaving them as the default if necessary.
   MapResolver R(CurRec);
 
-  for (unsigned i = 0, e = TArgs.size(); i != e; ++i) {
-if (i < SubClass.TemplateArgs.size()) {
-  // If a value is specified for this template arg, set it now.
-  if (SetValue(CurRec, SubClass.RefRange.Start, TArgs[i],
-   None, SubClass.TemplateArgs[i]))
+  // Loop over all the subclass record's fields. Add template arguments
+  // to the resolver map. Add regular fields to the new record.
+  for (const RecordVal &Field : SC->getValues()) {
+if (Field.isTemplateArg()) {
+  R.set(Field.getNameInit(), Field.getValue());
+} else {
+  if (AddValue(CurRec, SubClass.RefRange.Start, Field))
 return true;
-} else if (!CurRec->getValue(TArgs[i])->getValue()->isComplete()) {
-  return Error(SubClass.RefRange.Start,
-   "Value not specified for template argument #" +
-   Twine(i) + " (" + TArgs[i]->getAsUnquotedString() +
-   ") of subclass '" + SC->getNameInitAsString() + "'!");
 }
+  }
 
-R.set(TArgs[i], CurRec->getValue(TArgs[i])->getValue());
-
-CurRec->removeValue(TArgs[i]);
+  ArrayRef TArgs = SC->getTemplateArgs();
+  assert(SubClass.TemplateArgs.size() <= TArgs.size() &&
+ "Too many template arguments allowed");
+
+  // Loop over the template argument names. If a value was specified,
+  // reset the map value. If not and there was no default, complain.
+  for (unsigned I = 0, E = TArgs.size(); I != E; ++I) {
+if (I < SubClass.TemplateArgs.size())
+  R.set(TArgs[I], SubClass.TemplateArgs[I]);
+else if (!R.isComplete(TArgs[I]))
+  return Error(SubClass.RefRange.Start,
+   "Value not specified for template argument #" +
+   Twine(I) + " (" + TArgs[I]->getAsUnquotedString() +
+   ") of parent class '" + SC-

[llvm-branch-commits] [llvm] 19d0284 - [X86][AVX] Fold extract_subvector(VSRLI/VSHLI(x, 32)) -> VSRLI/VSHLI(extract_subvector(x), 32)

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-20T14:34:54Z
New Revision: 19d02842ee56089b9208875ce4582e113e08fb6d

URL: 
https://github.com/llvm/llvm-project/commit/19d02842ee56089b9208875ce4582e113e08fb6d
DIFF: 
https://github.com/llvm/llvm-project/commit/19d02842ee56089b9208875ce4582e113e08fb6d.diff

LOG: [X86][AVX] Fold extract_subvector(VSRLI/VSHLI(x,32)) -> 
VSRLI/VSHLI(extract_subvector(x),32)

As discussed on D56387, if we're shifting to extract the upper/lower half of a 
vXi64 vector then we're actually better off performing this at the subvector 
level as its very likely to fold into something.

combineConcatVectorOps can perform this in reverse if necessary.

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/combine-sra.ll
llvm/test/CodeGen/X86/pmul.ll
llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 0ee671710219..0b52b2021c73 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -49799,8 +49799,8 @@ static SDValue combineExtractSubvector(SDNode *N, 
SelectionDAG &DAG,
 
   // If we're extracting the lowest subvector and we're the only user,
   // we may be able to perform this with a smaller vector width.
+  unsigned InOpcode = InVec.getOpcode();
   if (IdxVal == 0 && InVec.hasOneUse()) {
-unsigned InOpcode = InVec.getOpcode();
 if (VT == MVT::v2f64 && InVecVT == MVT::v4f64) {
   // v2f64 CVTDQ2PD(v4i32).
   if (InOpcode == ISD::SINT_TO_FP &&
@@ -49853,6 +49853,17 @@ static SDValue combineExtractSubvector(SDNode *N, 
SelectionDAG &DAG,
 }
   }
 
+  // Always split vXi64 logical shifts where we're extracting the upper 32-bits
+  // as this is very likely to fold into a shuffle/truncation.
+  if ((InOpcode == X86ISD::VSHLI || InOpcode == X86ISD::VSRLI) &&
+  InVecVT.getScalarSizeInBits() == 64 &&
+  InVec.getConstantOperandAPInt(1) == 32) {
+SDLoc DL(N);
+SDValue Ext =
+extractSubVector(InVec.getOperand(0), IdxVal, DAG, DL, SizeInBits);
+return DAG.getNode(InOpcode, DL, VT, Ext, InVec.getOperand(1));
+  }
+
   return SDValue();
 }
 

diff  --git a/llvm/test/CodeGen/X86/combine-sra.ll 
b/llvm/test/CodeGen/X86/combine-sra.ll
index 28a73cdb6a41..453a61b8565e 100644
--- a/llvm/test/CodeGen/X86/combine-sra.ll
+++ b/llvm/test/CodeGen/X86/combine-sra.ll
@@ -207,9 +207,8 @@ define <4 x i32> @combine_vec_ashr_trunc_lshr(<4 x i64> %x) 
{
 ;
 ; AVX2-SLOW-LABEL: combine_vec_ashr_trunc_lshr:
 ; AVX2-SLOW:   # %bb.0:
-; AVX2-SLOW-NEXT:vpsrlq $32, %ymm0, %ymm0
-; AVX2-SLOW-NEXT:vextracti128 $1, %ymm0, %xmm1
-; AVX2-SLOW-NEXT:vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
+; AVX2-SLOW-NEXT:vextractf128 $1, %ymm0, %xmm1
+; AVX2-SLOW-NEXT:vshufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
 ; AVX2-SLOW-NEXT:vpsravd {{.*}}(%rip), %xmm0, %xmm0
 ; AVX2-SLOW-NEXT:vzeroupper
 ; AVX2-SLOW-NEXT:retq

diff  --git a/llvm/test/CodeGen/X86/pmul.ll b/llvm/test/CodeGen/X86/pmul.ll
index db6009f273d2..56476eea323e 100644
--- a/llvm/test/CodeGen/X86/pmul.ll
+++ b/llvm/test/CodeGen/X86/pmul.ll
@@ -1150,9 +1150,8 @@ define <4 x i32> @mul_v4i64_zero_lower(<4 x i32> %val1, 
<4 x i64> %val2) {
 ; AVX-NEXT:vpmovzxdq {{.*#+}} ymm0 = 
xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
 ; AVX-NEXT:vpsrlq $32, %ymm1, %ymm1
 ; AVX-NEXT:vpmuludq %ymm1, %ymm0, %ymm0
-; AVX-NEXT:vpsllq $32, %ymm0, %ymm0
 ; AVX-NEXT:vextracti128 $1, %ymm0, %xmm1
-; AVX-NEXT:vshufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
+; AVX-NEXT:vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
 ; AVX-NEXT:vzeroupper
 ; AVX-NEXT:retq
 entry:

diff  --git a/llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll 
b/llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
index a274baefc1ef..f0cb46e63d8f 100644
--- a/llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
@@ -834,19 +834,20 @@ define <4 x double> @uitofp_v4i64_v4f64(<4 x i64> %x) #0 {
 ;
 ; AVX2-64-LABEL: uitofp_v4i64_v4f64:
 ; AVX2-64:   # %bb.0:
-; AVX2-64-NEXT:vpsrlq $32, %ymm0, %ymm1
-; AVX2-64-NEXT:vextracti128 $1, %ymm1, %xmm2
+; AVX2-64-NEXT:vextracti128 $1, %ymm0, %xmm1
+; AVX2-64-NEXT:vpsrlq $32, %xmm1, %xmm1
+; AVX2-64-NEXT:vpextrq $1, %xmm1, %rax
+; AVX2-64-NEXT:vcvtsi2sd %rax, %xmm2, %xmm2
+; AVX2-64-NEXT:vmovq %xmm1, %rax
+; AVX2-64-NEXT:vcvtsi2sd %rax, %xmm3, %xmm1
+; AVX2-64-NEXT:vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]
+; AVX2-64-NEXT:vpsrlq $32, %xmm0, %xmm2
 ; AVX2-64-NEXT:vpextrq $1, %xmm2, %rax
 ; AVX2-64-NEXT:vcvtsi2sd %rax, %xmm3, %xmm3
 ; AVX2-64-NEXT:vmovq %xmm2, %rax
 ; AVX2-64-NEXT:vcvtsi2sd %rax, %xmm4, %xmm2
 ; AVX2-64-NEXT:vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; AVX2-64-NEXT:vpextrq $1, %xmm1, 

[llvm-branch-commits] [llvm] 4f5f29d - Revert "[TableGen] Improve algorithm for inheriting class template args and fields"

[Paul C. Anagnostopoulos via llvm-branch-commits]

Author: Paul C. Anagnostopoulos
Date: 2021-01-20T09:47:13-05:00
New Revision: 4f5f29d40974b9ba6e89179dda738c1eb9794370

URL: 
https://github.com/llvm/llvm-project/commit/4f5f29d40974b9ba6e89179dda738c1eb9794370
DIFF: 
https://github.com/llvm/llvm-project/commit/4f5f29d40974b9ba6e89179dda738c1eb9794370.diff

LOG: Revert "[TableGen] Improve algorithm for inheriting class template args 
and fields"

This reverts commit c056f824340ff0189f3ef7870b83e3730de401d1.

That commit causes build failures.

Added: 


Modified: 
llvm/include/llvm/TableGen/Record.h
llvm/lib/TableGen/Record.cpp
llvm/lib/TableGen/TGParser.cpp
llvm/test/TableGen/self-reference-typeerror.td

Removed: 




diff  --git a/llvm/include/llvm/TableGen/Record.h 
b/llvm/include/llvm/TableGen/Record.h
index b615385d3a05..2853a471b67f 100644
--- a/llvm/include/llvm/TableGen/Record.h
+++ b/llvm/include/llvm/TableGen/Record.h
@@ -1996,12 +1996,6 @@ class MapResolver final : public Resolver {
 
   void set(Init *Key, Init *Value) { Map[Key] = {Value, false}; }
 
-  bool isComplete(Init *VarName) const {
-auto It = Map.find(VarName);
-assert(It != Map.end() && "key must be present in map");
-return It->second.V->isComplete();
-  }
-
   Init *resolve(Init *VarName) override;
 };
 

diff  --git a/llvm/lib/TableGen/Record.cpp b/llvm/lib/TableGen/Record.cpp
index 966599e29e82..74786e040018 100644
--- a/llvm/lib/TableGen/Record.cpp
+++ b/llvm/lib/TableGen/Record.cpp
@@ -2316,7 +2316,7 @@ void Record::resolveReferences(Resolver &R, const 
RecordVal *SkipVal) {
   Type =
   (Twine("of type '") + VRT->getType()->getAsString() + "' 
").str();
 PrintFatalError(getLoc(), Twine("Invalid value ") + Type +
-  "found when setting field '" +
+  "is found when setting '" +
   Value.getNameInitAsString() +
   "' of type '" +
   Value.getType()->getAsString() +

diff  --git a/llvm/lib/TableGen/TGParser.cpp b/llvm/lib/TableGen/TGParser.cpp
index 63b304164d42..24949f0b2b4d 100644
--- a/llvm/lib/TableGen/TGParser.cpp
+++ b/llvm/lib/TableGen/TGParser.cpp
@@ -229,33 +229,38 @@ bool TGParser::SetValue(Record *CurRec, SMLoc Loc, Init 
*ValName,
 /// args as SubClass's template arguments.
 bool TGParser::AddSubClass(Record *CurRec, SubClassReference &SubClass) {
   Record *SC = SubClass.Rec;
+  // Add all of the values in the subclass into the current class.
+  for (const RecordVal &Val : SC->getValues())
+if (AddValue(CurRec, SubClass.RefRange.Start, Val))
+  return true;
+
+  ArrayRef TArgs = SC->getTemplateArgs();
+
+  // Ensure that an appropriate number of template arguments are specified.
+  if (TArgs.size() < SubClass.TemplateArgs.size())
+return Error(SubClass.RefRange.Start,
+ "More template args specified than expected");
+
+  // Loop over all of the template arguments, setting them to the specified
+  // value or leaving them as the default if necessary.
   MapResolver R(CurRec);
 
-  // Loop over all the subclass record's fields. Add template arguments
-  // to the resolver map. Add regular fields to the new record.
-  for (const RecordVal &Field : SC->getValues()) {
-if (Field.isTemplateArg()) {
-  R.set(Field.getNameInit(), Field.getValue());
-} else {
-  if (AddValue(CurRec, SubClass.RefRange.Start, Field))
+  for (unsigned i = 0, e = TArgs.size(); i != e; ++i) {
+if (i < SubClass.TemplateArgs.size()) {
+  // If a value is specified for this template arg, set it now.
+  if (SetValue(CurRec, SubClass.RefRange.Start, TArgs[i],
+   None, SubClass.TemplateArgs[i]))
 return true;
-}
-  }
-
-  ArrayRef TArgs = SC->getTemplateArgs();
-  assert(SubClass.TemplateArgs.size() <= TArgs.size() &&
- "Too many template arguments allowed");
-
-  // Loop over the template argument names. If a value was specified,
-  // reset the map value. If not and there was no default, complain.
-  for (unsigned I = 0, E = TArgs.size(); I != E; ++I) {
-if (I < SubClass.TemplateArgs.size())
-  R.set(TArgs[I], SubClass.TemplateArgs[I]);
-else if (!R.isComplete(TArgs[I]))
+} else if (!CurRec->getValue(TArgs[i])->getValue()->isComplete()) {
   return Error(SubClass.RefRange.Start,
"Value not specified for template argument #" +
-   Twine(I) + " (" + TArgs[I]->getAsUnquotedString() +
-   ") of parent class '" + SC->getNameInitAsString() + 
"'");
+   Twine(i) + " (" + TArgs[i]->getAsUnquotedString() +
+   ") of subclass '" + SC->getNameInitAsString() + "'!");
+}
+
+R.set(TArgs[i], CurRec->getValue(TArgs[i])->getValue());
+
+CurRec->removeValue(TArgs[i]);
   }
 
   Init *Nam

[llvm-branch-commits] [llvm] cad4275 - [DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-20T15:39:58Z
New Revision: cad4275d697c601761e0819863f487def73c67f8

URL: 
https://github.com/llvm/llvm-project/commit/cad4275d697c601761e0819863f487def73c67f8
DIFF: 
https://github.com/llvm/llvm-project/commit/cad4275d697c601761e0819863f487def73c67f8.diff

LOG: [DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE

Add DemandedElts support inside the TRUNCATE analysis.

Differential Revision: https://reviews.llvm.org/D56387

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/aarch64-smull.ll
llvm/test/CodeGen/AArch64/lowerMUL-newload.ll
llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
llvm/test/CodeGen/ARM/lowerMUL-newload.ll
llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
llvm/test/CodeGen/Thumb2/mve-vmulh.ll
llvm/test/CodeGen/X86/combine-sra.ll
llvm/test/CodeGen/X86/known-signbits-vector.ll
llvm/test/CodeGen/X86/min-legal-vector-width.ll
llvm/test/CodeGen/X86/vector-trunc.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index f7c6a77b9a03..680662536161 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -11952,8 +11952,7 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
   }
 
   // Simplify the operands using demanded-bits information.
-  if (!VT.isVector() &&
-  SimplifyDemandedBits(SDValue(N, 0)))
+  if (SimplifyDemandedBits(SDValue(N, 0)))
 return SDValue(N, 0);
 
   // (trunc adde(X, Y, Carry)) -> (adde trunc(X), trunc(Y), Carry)

diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp 
b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index b19033e3e427..5613db8f724d 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1986,7 +1986,8 @@ bool TargetLowering::SimplifyDemandedBits(
 // zero/one bits live out.
 unsigned OperandBitWidth = Src.getScalarValueSizeInBits();
 APInt TruncMask = DemandedBits.zext(OperandBitWidth);
-if (SimplifyDemandedBits(Src, TruncMask, Known, TLO, Depth + 1))
+if (SimplifyDemandedBits(Src, TruncMask, DemandedElts, Known, TLO,
+ Depth + 1))
   return true;
 Known = Known.trunc(BitWidth);
 
@@ -2009,9 +2010,9 @@ bool TargetLowering::SimplifyDemandedBits(
   // undesirable.
   break;
 
-SDValue ShAmt = Src.getOperand(1);
-auto *ShAmtC = dyn_cast(ShAmt);
-if (!ShAmtC || ShAmtC->getAPIntValue().uge(BitWidth))
+const APInt *ShAmtC =
+TLO.DAG.getValidShiftAmountConstant(Src, DemandedElts);
+if (!ShAmtC)
   break;
 uint64_t ShVal = ShAmtC->getZExtValue();
 
@@ -2023,6 +2024,7 @@ bool TargetLowering::SimplifyDemandedBits(
 if (!(HighBits & DemandedBits)) {
   // None of the shifted in bits are needed.  Add a truncate of the
   // shift input, then shift it.
+  SDValue ShAmt = Src.getOperand(1);
   if (TLO.LegalTypes())
 ShAmt = TLO.DAG.getConstant(ShVal, dl, getShiftAmountTy(VT, DL));
   SDValue NewTrunc =

diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp 
b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index c7bcd4de046c..6dd081dc3cb7 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -3399,6 +3399,7 @@ static SDValue skipExtensionForVectorMULL(SDNode *N, 
SelectionDAG &DAG) {
 
 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) {
   return N->getOpcode() == ISD::SIGN_EXTEND ||
+ N->getOpcode() == ISD::ANY_EXTEND ||
  isExtendedBUILD_VECTOR(N, DAG, true);
 }
 

diff  --git a/llvm/test/CodeGen/AArch64/aarch64-smull.ll 
b/llvm/test/CodeGen/AArch64/aarch64-smull.ll
index 0a692192ec8b..0c232a4bf5a8 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-smull.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-smull.ll
@@ -96,7 +96,7 @@ define <8 x i16> @amull_v8i8_v8i16(<8 x i8>* %A, <8 x i8>* 
%B) nounwind {
 ; CHECK:   // %bb.0:
 ; CHECK-NEXT:ldr d0, [x0]
 ; CHECK-NEXT:ldr d1, [x1]
-; CHECK-NEXT:umull v0.8h, v0.8b, v1.8b
+; CHECK-NEXT:smull v0.8h, v0.8b, v1.8b
 ; CHECK-NEXT:bic v0.8h, #255, lsl #8
 ; CHECK-NEXT:ret
   %tmp1 = load <8 x i8>, <8 x i8>* %A
@@ -113,7 +113,7 @@ define <4 x i32> @amull_v4i16_v4i32(<4 x i16>* %A, <4 x 
i16>* %B) nounwind {
 ; CHECK:   // %bb.0:
 ; CHECK-NEXT:ldr d0, [x0]
 ; CHECK-NEXT:ldr d1, [x1]
-; CHECK-NEXT:umull v0.4s, v0.4h, v1.4h
+; CHECK-NEXT:smull v0.4s, v0.4h, v1.4h
 ; CHECK-NEXT:movi v1.2d, #0x00
 ; CHECK-NEXT:and v0.16b, v0.16b, v1.16b
 ; CHECK-NEXT:re

[llvm-branch-commits] [clang] 8000c77 - Make it possible to store a ASTNodeKind in VariantValue

[Stephen Kelly via llvm-branch-commits]

Author: Stephen Kelly
Date: 2021-01-20T15:44:45Z
New Revision: 8000c778532bfe1cc74191e41e19272e54477ed0

URL: 
https://github.com/llvm/llvm-project/commit/8000c778532bfe1cc74191e41e19272e54477ed0
DIFF: 
https://github.com/llvm/llvm-project/commit/8000c778532bfe1cc74191e41e19272e54477ed0.diff

LOG: Make it possible to store a ASTNodeKind in VariantValue

Differential Revision: https://reviews.llvm.org/D94878

Added: 


Modified: 
clang/include/clang/ASTMatchers/Dynamic/VariantValue.h
clang/lib/ASTMatchers/Dynamic/VariantValue.cpp
clang/unittests/ASTMatchers/Dynamic/VariantValueTest.cpp

Removed: 




diff  --git a/clang/include/clang/ASTMatchers/Dynamic/VariantValue.h 
b/clang/include/clang/ASTMatchers/Dynamic/VariantValue.h
index 140b41dffc40..fa033f49bc90 100644
--- a/clang/include/clang/ASTMatchers/Dynamic/VariantValue.h
+++ b/clang/include/clang/ASTMatchers/Dynamic/VariantValue.h
@@ -251,6 +251,7 @@ class VariantValue {
   VariantValue(double Double);
   VariantValue(unsigned Unsigned);
   VariantValue(StringRef String);
+  VariantValue(ASTNodeKind NodeKind);
   VariantValue(const VariantMatcher &Matchers);
 
   /// Constructs an \c unsigned value (disambiguation from bool).
@@ -280,6 +281,10 @@ class VariantValue {
   const std::string &getString() const;
   void setString(StringRef String);
 
+  bool isNodeKind() const;
+  const ASTNodeKind &getNodeKind() const;
+  void setNodeKind(ASTNodeKind NodeKind);
+
   /// Matcher value functions.
   bool isMatcher() const;
   const VariantMatcher &getMatcher() const;
@@ -316,7 +321,8 @@ class VariantValue {
 VT_Double,
 VT_Unsigned,
 VT_String,
-VT_Matcher
+VT_Matcher,
+VT_NodeKind
   };
 
   /// All supported value types.
@@ -326,6 +332,7 @@ class VariantValue {
 bool Boolean;
 std::string *String;
 VariantMatcher *Matcher;
+ASTNodeKind *NodeKind;
   };
 
   ValueType Type;

diff  --git a/clang/lib/ASTMatchers/Dynamic/VariantValue.cpp 
b/clang/lib/ASTMatchers/Dynamic/VariantValue.cpp
index f31dda82a932..d1ecb1e00b91 100644
--- a/clang/lib/ASTMatchers/Dynamic/VariantValue.cpp
+++ b/clang/lib/ASTMatchers/Dynamic/VariantValue.cpp
@@ -268,6 +268,10 @@ VariantValue::VariantValue(StringRef String) : 
Type(VT_Nothing) {
   setString(String);
 }
 
+VariantValue::VariantValue(ASTNodeKind NodeKind) : Type(VT_Nothing) {
+  setNodeKind(NodeKind);
+}
+
 VariantValue::VariantValue(const VariantMatcher &Matcher) : Type(VT_Nothing) {
   setMatcher(Matcher);
 }
@@ -290,6 +294,9 @@ VariantValue &VariantValue::operator=(const VariantValue 
&Other) {
   case VT_String:
 setString(Other.getString());
 break;
+  case VT_NodeKind:
+setNodeKind(Other.getNodeKind());
+break;
   case VT_Matcher:
 setMatcher(Other.getMatcher());
 break;
@@ -308,6 +315,9 @@ void VariantValue::reset() {
   case VT_Matcher:
 delete Value.Matcher;
 break;
+  case VT_NodeKind:
+delete Value.NodeKind;
+break;
   // Cases that do nothing.
   case VT_Boolean:
   case VT_Double:
@@ -378,6 +388,19 @@ void VariantValue::setString(StringRef NewValue) {
   Value.String = new std::string(NewValue);
 }
 
+bool VariantValue::isNodeKind() const { return Type == VT_NodeKind; }
+
+const ASTNodeKind &VariantValue::getNodeKind() const {
+  assert(isNodeKind());
+  return *Value.NodeKind;
+}
+
+void VariantValue::setNodeKind(ASTNodeKind NewValue) {
+  reset();
+  Type = VT_NodeKind;
+  Value.NodeKind = new ASTNodeKind(NewValue);
+}
+
 bool VariantValue::isMatcher() const {
   return Type == VT_Matcher;
 }
@@ -449,6 +472,8 @@ std::string VariantValue::getTypeAsString() const {
   case VT_Boolean: return "Boolean";
   case VT_Double: return "Double";
   case VT_Unsigned: return "Unsigned";
+  case VT_NodeKind:
+return getNodeKind().asStringRef().str();
   case VT_Nothing: return "Nothing";
   }
   llvm_unreachable("Invalid Type");

diff  --git a/clang/unittests/ASTMatchers/Dynamic/VariantValueTest.cpp 
b/clang/unittests/ASTMatchers/Dynamic/VariantValueTest.cpp
index c08d7fc3ff74..c62a6b385e28 100644
--- a/clang/unittests/ASTMatchers/Dynamic/VariantValueTest.cpp
+++ b/clang/unittests/ASTMatchers/Dynamic/VariantValueTest.cpp
@@ -184,6 +184,25 @@ TEST(VariantValueTest, Matcher) {
   .getTypedMatcher()));
 }
 
+TEST(VariantValueTest, NodeKind) {
+  VariantValue Value = ASTNodeKind::getFromNodeKind();
+  EXPECT_TRUE(Value.isNodeKind());
+  
EXPECT_TRUE(Value.getNodeKind().isSame(ASTNodeKind::getFromNodeKind()));
+
+  Value = ASTNodeKind::getFromNodeKind();
+  EXPECT_TRUE(Value.isNodeKind());
+  EXPECT_TRUE(Value.getNodeKind().isSame(
+  ASTNodeKind::getFromNodeKind()));
+
+  Value.setNodeKind(ASTNodeKind::getFromNodeKind());
+  EXPECT_TRUE(Value.isNodeKind());
+  EXPECT_TRUE(
+  Value.getNodeKind().isSame(ASTNodeKind::getFromNodeKind()));
+
+  Value = 42;
+  EXPECT_TRUE(!Value.isNodeKind());
+}
+
 } // end anonymous namespace

[llvm-branch-commits] [libcxx] 537d90d - [libc++] Split re.alg tests into locale-dependent and independent tests

[Alex Richardson via llvm-branch-commits]

Author: Alex Richardson
Date: 2021-01-20T15:48:50Z
New Revision: 537d90db827d1df0fef400653eefd857834ca0ba

URL: 
https://github.com/llvm/llvm-project/commit/537d90db827d1df0fef400653eefd857834ca0ba
DIFF: 
https://github.com/llvm/llvm-project/commit/537d90db827d1df0fef400653eefd857834ca0ba.diff

LOG: [libc++] Split re.alg tests into locale-dependent and independent tests

Currently all these tests are XFAILED on Linux even though the problem
only seems to be with the few checks that look at collation. To retain
test coverage this splits the locale-dependent tests into a separate
.pass.cpp that is XFAILed as before.
This commit also XFAILs the locale-dependent tests on FreeBSD since the
[=M=] and [.ch.] behaviour for cs_CZ also doesn't seem to match the
behaviour that is expected by these tests.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D94969

Added: 
libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp

Modified: 
libcxx/test/std/re/re.alg/re.alg.match/awk.pass.cpp
libcxx/test/std/re/re.alg/re.alg.match/basic.pass.cpp
libcxx/test/std/re/re.alg/re.alg.match/ecma.pass.cpp
libcxx/test/std/re/re.alg/re.alg.match/extended.pass.cpp
libcxx/test/std/re/re.alg/re.alg.search/awk.pass.cpp
libcxx/test/std/re/re.alg/re.alg.search/basic.pass.cpp
libcxx/test/std/re/re.alg/re.alg.search/ecma.pass.cpp
libcxx/test/std/re/re.alg/re.alg.search/extended.pass.cpp
libcxx/utils/libcxx/test/features.py

Removed: 




diff  --git a/libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp 
b/libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
new file mode 100644
index ..a93a2694464b
--- /dev/null
+++ b/libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
@@ -0,0 +1,116 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+// 
+
+// template 
+//   bool regex_match(BidirectionalIterator first, BidirectionalIterator last,
+//match_results& m,
+//const basic_regex& e,
+//regex_constants::match_flag_type flags
+//= 
regex_constants::match_default);
+
+// TODO: investigation needed
+// TODO(netbsd): incomplete support for locales
+// XFAIL: linux-gnu, netbsd, freebsd
+// REQUIRES: locale.cs_CZ.ISO8859-2
+
+#include 
+#include 
+#include "test_macros.h"
+#include "test_iterators.h"
+
+#include "platform_support.h" // locale name macros
+
+int main(int, char**)
+{
+std::locale::global(std::locale(LOCALE_cs_CZ_ISO8859_2));
+{
+std::cmatch m;
+const char s[] = "m";
+assert(std::regex_match(s, m,
+  std::regex("[a[=M=]z]", std::regex_constants::awk)));
+assert(m.size() == 1);
+assert(!m.prefix().matched);
+assert(m.prefix().first == s);
+assert(m.prefix().second == m[0].first);
+assert(!m.suffix().matched);
+assert(m.suffix().first == m[0].second);
+assert(m.suffix().second == m[0].second);
+assert((size_t)m.length(0) == std::char_traits::length(s));
+assert(m.position(0) == 0);
+assert(m.str(0) == s);
+}
+{
+std::cmatch m;
+const char s[] = "Ch";
+assert(std::regex_match(s, m, std::regex("[a[.ch.]z]",
+   std::regex_constants::awk | std::regex_constants::icase)));
+assert(m.size() == 1);
+assert(!m.prefix().matched);
+assert(m.prefix().first == s);
+assert(m.prefix().second == m[0].first);
+assert(!m.suffix().matched);
+assert(m.suffix().first == m[0].second);
+assert(m.suffix().second == m[0].second);
+assert((size_t)m.length(0) == std::char_traits::length(s));
+assert(m.position(0) == 0);
+assert(m.str(0) == s);
+}
+std::locale::global(std::locale("C"));
+{
+std::cmatch m;
+const char s[] = "m";
+assert(!std::regex_match(s, m, std::regex("[a[=M=]z]",
+ std::regex_constants::awk)));
+assert(m.size() == 0);
+}
+std::loca

[llvm-branch-commits] [openmp] e069662 - [libomptarget][devicertl] Wrap source in declare target pragmas

[Jon Chesterfield via llvm-branch-commits]

Author: Jon Chesterfield
Date: 2021-01-20T15:50:41Z
New Revision: e069662deb1fa167b3e5fdce4c9949e663df8082

URL: 
https://github.com/llvm/llvm-project/commit/e069662deb1fa167b3e5fdce4c9949e663df8082
DIFF: 
https://github.com/llvm/llvm-project/commit/e069662deb1fa167b3e5fdce4c9949e663df8082.diff

LOG: [libomptarget][devicertl] Wrap source in declare target pragmas

[libomptarget][devicertl] Wrap source in declare target pragmas

Factored out of D93135 / D94745. C++ and cuda ignore unknown pragmas
so this is a NFC for the current implementation language. Removes noise
from patches for building deviceRTL as openmp.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D95048

Added: 


Modified: 
openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_locks.hip
openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_smid.hip
openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
openmp/libomptarget/deviceRTLs/common/src/cancel.cu
openmp/libomptarget/deviceRTLs/common/src/critical.cu
openmp/libomptarget/deviceRTLs/common/src/data_sharing.cu
openmp/libomptarget/deviceRTLs/common/src/libcall.cu
openmp/libomptarget/deviceRTLs/common/src/loop.cu
openmp/libomptarget/deviceRTLs/common/src/omp_data.cu
openmp/libomptarget/deviceRTLs/common/src/omptarget.cu
openmp/libomptarget/deviceRTLs/common/src/parallel.cu
openmp/libomptarget/deviceRTLs/common/src/reduction.cu
openmp/libomptarget/deviceRTLs/common/src/support.cu
openmp/libomptarget/deviceRTLs/common/src/sync.cu
openmp/libomptarget/deviceRTLs/common/src/task.cu
openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu

Removed: 




diff  --git a/openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_locks.hip 
b/openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_locks.hip
index 4163a14f50bf..f537fb28318c 100644
--- a/openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_locks.hip
+++ b/openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_locks.hip
@@ -14,6 +14,7 @@
 // a SIMD => wavefront mapping once that is implemented.
 //
 
//===--===//
+#pragma omp declare target
 
 #include "common/debug.h"
 
@@ -26,3 +27,5 @@ DEVICE void __kmpc_impl_destroy_lock(omp_lock_t *) { warn(); }
 DEVICE void __kmpc_impl_set_lock(omp_lock_t *) { warn(); }
 DEVICE void __kmpc_impl_unset_lock(omp_lock_t *) { warn(); }
 DEVICE int __kmpc_impl_test_lock(omp_lock_t *lock) { warn(); }
+
+#pragma omp end declare target

diff  --git a/openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_smid.hip 
b/openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_smid.hip
index 74d0d167137f..c85045570de2 100644
--- a/openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_smid.hip
+++ b/openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_smid.hip
@@ -5,6 +5,7 @@
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 
//===--===//
+#pragma omp declare target
 
 #include "target_impl.h"
 
@@ -59,3 +60,5 @@ DEVICE uint32_t __kmpc_impl_smid() {
   ENCODE_HWREG(HW_ID_SE_ID_SIZE, HW_ID_SE_ID_OFFSET, HW_ID));
   return (se_id << HW_ID_CU_ID_SIZE) + cu_id;
 }
+
+#pragma omp end declare target

diff  --git a/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip 
b/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
index 3e70beb85d5b..7388a29215cc 100644
--- a/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
+++ b/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
@@ -9,6 +9,7 @@
 // Definitions of target specific functions
 //
 
//===--===//
+#pragma omp declare target
 
 #include "target_impl.h"
 
@@ -151,3 +152,5 @@ EXTERN uint32_t __kmpc_amdgcn_gpu_num_threads() {
 // Stub implementations
 DEVICE void *__kmpc_impl_malloc(size_t) { return nullptr; }
 DEVICE void __kmpc_impl_free(void *) {}
+
+#pragma omp end declare target

diff  --git a/openmp/libomptarget/deviceRTLs/common/src/cancel.cu 
b/openmp/libomptarget/deviceRTLs/common/src/cancel.cu
index 9540f5647699..0e5cd2b60554 100644
--- a/openmp/libomptarget/deviceRTLs/common/src/cancel.cu
+++ b/openmp/libomptarget/deviceRTLs/common/src/cancel.cu
@@ -9,6 +9,7 @@
 // Interface to be used in the implementation of OpenMP cancel.
 //
 
//===--===//
+#pragma omp declare target
 
 #include "interface.h"
 #include "common/debug.h"
@@ -26,3 +27,5 @@ EXTERN int32_t __kmpc_cancel(kmp_Ident *loc, int32_t 
global_tid,
   // disabled
   return 0;
 }
+
+#pragma omp end declare target

diff  --git a/openmp/libomptarget/deviceRTLs/common/src/critical.cu 
b/openmp/libomptarget/deviceRTLs/common/src/critical.cu
index ee4b056ddad9..3fd89c50aa46 100644
--- a/openmp/libomptarget/deviceRTLs/common/src/critical.cu
+++ b/openmp/libomptarget/deviceRTLs/

[llvm-branch-commits] [clang] e377c8e - Implement dynamic mapAnyOf in terms of ASTNodeKinds

[Stephen Kelly via llvm-branch-commits]

Author: Stephen Kelly
Date: 2021-01-20T15:53:05Z
New Revision: e377c8eeb4aa2eb239a651f1fe12c27fc77deda3

URL: 
https://github.com/llvm/llvm-project/commit/e377c8eeb4aa2eb239a651f1fe12c27fc77deda3
DIFF: 
https://github.com/llvm/llvm-project/commit/e377c8eeb4aa2eb239a651f1fe12c27fc77deda3.diff

LOG: Implement dynamic mapAnyOf in terms of ASTNodeKinds

This reduces template bloat, but more importantly, makes it possible to
construct one from clang-query without template types.

Differential Revision: https://reviews.llvm.org/D94879

Added: 


Modified: 
clang/lib/ASTMatchers/Dynamic/Marshallers.h

Removed: 




diff  --git a/clang/lib/ASTMatchers/Dynamic/Marshallers.h 
b/clang/lib/ASTMatchers/Dynamic/Marshallers.h
index 23e26dcd9db6..690b52162e2b 100644
--- a/clang/lib/ASTMatchers/Dynamic/Marshallers.h
+++ b/clang/lib/ASTMatchers/Dynamic/Marshallers.h
@@ -925,32 +925,50 @@ class VariadicOperatorMatcherDescriptor : public 
MatcherDescriptor {
   const StringRef MatcherName;
 };
 
-template 
 class MapAnyOfMatcherDescriptor : public MatcherDescriptor {
-  std::vector Funcs;
+  ASTNodeKind CladeNodeKind;
+  std::vector NodeKinds;
 
 public:
-  MapAnyOfMatcherDescriptor(StringRef MatcherName)
-  : Funcs{DynCastAllOfMatcherDescriptor(
-ast_matchers::internal::VariadicDynCastAllOfMatcher{},
-MatcherName)...} {}
+  MapAnyOfMatcherDescriptor(ASTNodeKind CladeNodeKind,
+std::vector NodeKinds)
+  : CladeNodeKind(CladeNodeKind), NodeKinds(NodeKinds) {}
 
   VariantMatcher create(SourceRange NameRange, ArrayRef Args,
 Diagnostics *Error) const override {
-std::vector InnerArgs;
 
-for (auto const &F : Funcs) {
-  InnerArgs.push_back(F.create(NameRange, Args, Error));
-  if (!Error->errors().empty())
-return {};
+std::vector NodeArgs;
+
+for (auto NK : NodeKinds) {
+  std::vector InnerArgs;
+
+  for (const auto &Arg : Args) {
+if (!Arg.Value.isMatcher())
+  return {};
+const VariantMatcher &VM = Arg.Value.getMatcher();
+if (VM.hasTypedMatcher(NK)) {
+  auto DM = VM.getTypedMatcher(NK);
+  InnerArgs.push_back(DM);
+}
+  }
+
+  if (InnerArgs.empty()) {
+NodeArgs.push_back(
+DynTypedMatcher::trueMatcher(NK).dynCastTo(CladeNodeKind));
+  } else {
+NodeArgs.push_back(
+DynTypedMatcher::constructVariadic(
+ast_matchers::internal::DynTypedMatcher::VO_AllOf, NK,
+InnerArgs)
+.dynCastTo(CladeNodeKind));
+  }
 }
-return VariantMatcher::SingleMatcher(
-ast_matchers::internal::BindableMatcher(
-VariantMatcher::VariadicOperatorMatcher(
-ast_matchers::internal::DynTypedMatcher::VO_AnyOf,
-std::move(InnerArgs))
-.getTypedMatcher()));
+
+auto Result = DynTypedMatcher::constructVariadic(
+ast_matchers::internal::DynTypedMatcher::VO_AnyOf, CladeNodeKind,
+NodeArgs);
+Result.setAllowBind(true);
+return VariantMatcher::SingleMatcher(Result);
   }
 
   bool isVariadic() const override { return true; }
@@ -963,9 +981,11 @@ class MapAnyOfMatcherDescriptor : public MatcherDescriptor 
{
 
   bool isConvertibleTo(ASTNodeKind Kind, unsigned *Specificity,
ASTNodeKind *LeastDerivedKind) const override {
-return llvm::all_of(Funcs, [=](const auto &F) {
-  return F.isConvertibleTo(Kind, Specificity, LeastDerivedKind);
-});
+if (Specificity)
+  *Specificity = 1;
+if (LeastDerivedKind)
+  *LeastDerivedKind = CladeNodeKind;
+return true;
   }
 };
 
@@ -1077,8 +1097,9 @@ template 
 std::unique_ptr makeMatcherAutoMarshall(
 ast_matchers::internal::MapAnyOfMatcherImpl,
 StringRef MatcherName) {
-  return std::make_unique>(
-  MatcherName);
+  return std::make_unique(
+  ASTNodeKind::getFromNodeKind(),
+  std::vector{ASTNodeKind::getFromNodeKind()...});
 }
 
 } // namespace internal



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[llvm-branch-commits] [llvm] 40cd262 - Loop peeling: check that latch is conditional branch

[Joseph Tremoulet via llvm-branch-commits]

Author: Joseph Tremoulet
Date: 2021-01-20T11:01:16-05:00
New Revision: 40cd262c4339c8cbd67bf5c96c4a052ae02a8660

URL: 
https://github.com/llvm/llvm-project/commit/40cd262c4339c8cbd67bf5c96c4a052ae02a8660
DIFF: 
https://github.com/llvm/llvm-project/commit/40cd262c4339c8cbd67bf5c96c4a052ae02a8660.diff

LOG: Loop peeling: check that latch is conditional branch

Loop peeling assumes that the loop's latch is a conditional branch.  Add
a check to canPeel that explicitly checks for this, and testcases that
otherwise fail an assertion when trying to peel a loop whose back-edge
is a switch case or the non-unwind edge of an invoke.

Reviewed By: skatkov, fhahn

Differential Revision: https://reviews.llvm.org/D94995

Added: 


Modified: 
llvm/lib/Transforms/Utils/LoopPeel.cpp
llvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/LoopPeel.cpp 
b/llvm/lib/Transforms/Utils/LoopPeel.cpp
index 27a61a207868..cb5fee7d28e6 100644
--- a/llvm/lib/Transforms/Utils/LoopPeel.cpp
+++ b/llvm/lib/Transforms/Utils/LoopPeel.cpp
@@ -115,7 +115,12 @@ bool llvm::canPeel(Loop *L) {
   // This can be an indication of two 
diff erent things:
   // 1) The loop is not rotated.
   // 2) The loop contains irreducible control flow that involves the latch.
-  if (L->getLoopLatch() != L->getExitingBlock())
+  const BasicBlock *Latch = L->getLoopLatch();
+  if (Latch != L->getExitingBlock())
+return false;
+
+  // Peeling is only supported if the latch is a branch.
+  if (!isa(Latch->getTerminator()))
 return false;
 
   return true;

diff  --git a/llvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll 
b/llvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll
index f0fbf3d6d49b..fa7e13397e25 100644
--- a/llvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll
+++ b/llvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll
@@ -1140,5 +1140,69 @@ for.end:
   ret void
 }
 
+; Invoke is not a conditional branch that we can optimize,
+; so this shouldn't be peeled at all.  This is a reproducer
+; for a bug where evaluating the loop would fail an assertion.
+define void @test17() personality i8* undef{
+; CHECK-LABEL: @test17(
+; CHECK-NEXT:  body:
+; CHECK-NEXT:br label [[LOOP:%.*]]
+; CHECK:   loop:
+; CHECK-NEXT:[[CONST:%.*]] = phi i64 [ -33, [[LOOP]] ], [ -20, 
[[BODY:%.*]] ]
+; CHECK-NEXT:invoke void @f1()
+; CHECK-NEXT:to label [[LOOP]] unwind label [[EH_UNW_LOOPEXIT:%.*]]
+; CHECK:   eh.Unw.loopexit:
+; CHECK-NEXT:[[LPAD_LOOPEXIT:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT:catch i8* null
+; CHECK-NEXT:ret void
+;
+body:
+  br label %loop
+
+loop:
+  %const = phi i64 [ -33, %loop ], [ -20, %body ]
+  invoke void @f1()
+  to label %loop unwind label %eh.Unw.loopexit
+
+eh.Unw.loopexit:
+  %lpad.loopexit = landingpad { i8*, i32 }
+  catch i8* null
+  ret void
+}
+
+; Testcase reduced from PR48812.  We expect no peeling
+; because the latch terminator is a switch.
+define void @test18(i32* %p) {
+; CHECK-LABEL: @test18(
+; CHECK-NEXT:  init:
+; CHECK-NEXT:br label [[LOOP:%.*]]
+; CHECK:   loop:
+; CHECK-NEXT:[[CONST:%.*]] = phi i32 [ 40, [[INIT:%.*]] ], [ 0, 
[[LATCH:%.*]] ]
+; CHECK-NEXT:br label [[LATCH]]
+; CHECK:   latch:
+; CHECK-NEXT:[[CONTROL:%.*]] = load volatile i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT:switch i32 [[CONTROL]], label [[EXIT:%.*]] [
+; CHECK-NEXT:i32 2, label [[LOOP]]
+; CHECK-NEXT:]
+; CHECK:   exit:
+; CHECK-NEXT:ret void
+;
+init:
+  br label %loop
+
+loop:
+  %const = phi i32 [ 40, %init ], [ 0, %latch ]
+  br label %latch
+
+latch:
+  %control = load volatile i32, i32* %p
+  switch i32 %control, label %exit [
+  i32 2, label %loop
+  ]
+
+exit:
+  ret void
+}
+
 declare void @init()
 declare void @sink()



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[llvm-branch-commits] [llvm] 6c1bc0d - [docs] Fix overly specific link to uploading patches on Phabricator

[Louis Dionne via llvm-branch-commits]

Author: Louis Dionne
Date: 2021-01-20T11:14:18-05:00
New Revision: 6c1bc0d24ceacfe736de4fd29a21b91125125a1f

URL: 
https://github.com/llvm/llvm-project/commit/6c1bc0d24ceacfe736de4fd29a21b91125125a1f
DIFF: 
https://github.com/llvm/llvm-project/commit/6c1bc0d24ceacfe736de4fd29a21b91125125a1f.diff

LOG: [docs] Fix overly specific link to uploading patches on Phabricator

The documentation for contributing to LLVM currently links to the section
explaining how to submit a Phabricator review using the web interface.
I believe it would be better to link to the general page for using
Phabricator instead, which explains how to sign up with Phabricator,
and also how to submit patches using either the web interface or the
command-line.

I think this is worth changing because what currently *appears* to be our
preferred way of submitting a patch (through the web interface) isn't
actually what we prefer. Indeed, patches submitted from the command-line
have more meta-data available (such as which repository the patch targets),
and also can't suffer from missing context.

Differential Revision: https://reviews.llvm.org/D94929

Added: 


Modified: 
llvm/docs/Contributing.rst

Removed: 




diff  --git a/llvm/docs/Contributing.rst b/llvm/docs/Contributing.rst
index 45d4d7a27fa7..e7fcbf36beef 100644
--- a/llvm/docs/Contributing.rst
+++ b/llvm/docs/Contributing.rst
@@ -90,7 +90,7 @@ in order to update the last commit with all pending changes.
 
 To get a patch accepted, it has to be reviewed by the LLVM community. This can
 be done using `LLVM's Phabricator`_ or the llvm-commits mailing list.
-Please  follow :ref:`Phabricator#requesting-a-review-via-the-web-interface 
`
+Please  follow :ref:`Phabricator#phabricator-reviews `
 to request a review using Phabricator.
 
 To make sure the right people see your patch, please select suitable reviewers



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[llvm-branch-commits] [llvm] 8590d24 - [SLP] move reduction createOp functions; NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2021-01-20T11:14:48-05:00
New Revision: 8590d245434dd4205c89f0a05b4c22feccb7421c

URL: 
https://github.com/llvm/llvm-project/commit/8590d245434dd4205c89f0a05b4c22feccb7421c
DIFF: 
https://github.com/llvm/llvm-project/commit/8590d245434dd4205c89f0a05b4c22feccb7421c.diff

LOG: [SLP] move reduction createOp functions; NFC

We were able to remove almost all of the state from
OperationData, so these don't make sense as members
of that class - just pass the RecurKind in as a param.

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 24885e4d8257..3d657b0b898c 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -6397,7 +6397,7 @@ namespace {
 class HorizontalReduction {
   using ReductionOpsType = SmallVector;
   using ReductionOpsListType = SmallVector;
-  ReductionOpsListType  ReductionOps;
+  ReductionOpsListType ReductionOps;
   SmallVector ReducedVals;
   // Use map vector to make stable output.
   MapVector ExtraArgs;
@@ -6412,47 +6412,6 @@ class HorizontalReduction {
 /// Checks if the reduction operation can be vectorized.
 bool isVectorizable() const { return Kind != RecurKind::None; }
 
-/// Creates reduction operation with the current opcode.
-Value *createOp(IRBuilder<> &Builder, Value *LHS, Value *RHS,
-const Twine &Name) const {
-  assert(isVectorizable() && "Unhandled reduction operation.");
-  unsigned RdxOpcode = RecurrenceDescriptor::getOpcode(Kind);
-  switch (Kind) {
-  case RecurKind::Add:
-  case RecurKind::Mul:
-  case RecurKind::Or:
-  case RecurKind::And:
-  case RecurKind::Xor:
-  case RecurKind::FAdd:
-  case RecurKind::FMul:
-return Builder.CreateBinOp((Instruction::BinaryOps)RdxOpcode, LHS, RHS,
-   Name);
-  case RecurKind::FMax:
-return Builder.CreateBinaryIntrinsic(Intrinsic::maxnum, LHS, RHS);
-  case RecurKind::FMin:
-return Builder.CreateBinaryIntrinsic(Intrinsic::minnum, LHS, RHS);
-
-  case RecurKind::SMax: {
-Value *Cmp = Builder.CreateICmpSGT(LHS, RHS, Name);
-return Builder.CreateSelect(Cmp, LHS, RHS, Name);
-  }
-  case RecurKind::SMin: {
-Value *Cmp = Builder.CreateICmpSLT(LHS, RHS, Name);
-return Builder.CreateSelect(Cmp, LHS, RHS, Name);
-  }
-  case RecurKind::UMax: {
-Value *Cmp = Builder.CreateICmpUGT(LHS, RHS, Name);
-return Builder.CreateSelect(Cmp, LHS, RHS, Name);
-  }
-  case RecurKind::UMin: {
-Value *Cmp = Builder.CreateICmpULT(LHS, RHS, Name);
-return Builder.CreateSelect(Cmp, LHS, RHS, Name);
-  }
-  default:
-llvm_unreachable("Unknown reduction operation.");
-  }
-}
-
   public:
 explicit OperationData() = default;
 
@@ -6580,40 +6539,6 @@ class HorizontalReduction {
 return nullptr;
   return I->getOperand(getFirstOperandIndex() + 1);
 }
-
-/// Creates reduction operation with the current opcode with the IR flags
-/// from \p ReductionOps.
-Value *createOp(IRBuilder<> &Builder, Value *LHS, Value *RHS,
-const Twine &Name,
-const ReductionOpsListType &ReductionOps) const {
-  assert(isVectorizable() &&
- "Expected add|fadd or min/max reduction operation.");
-  Value *Op = createOp(Builder, LHS, RHS, Name);
-  if (RecurrenceDescriptor::isIntMinMaxRecurrenceKind(Kind)) {
-if (auto *Sel = dyn_cast(Op))
-  propagateIRFlags(Sel->getCondition(), ReductionOps[0]);
-propagateIRFlags(Op, ReductionOps[1]);
-return Op;
-  }
-  propagateIRFlags(Op, ReductionOps[0]);
-  return Op;
-}
-/// Creates reduction operation with the current opcode with the IR flags
-/// from \p I.
-Value *createOp(IRBuilder<> &Builder, Value *LHS, Value *RHS,
-const Twine &Name, Instruction *I) const {
-  assert(isVectorizable() &&
- "Expected add|fadd or min/max reduction operation.");
-  Value *Op = createOp(Builder, LHS, RHS, Name);
-  if (RecurrenceDescriptor::isIntMinMaxRecurrenceKind(Kind)) {
-if (auto *Sel = dyn_cast(Op)) {
-  propagateIRFlags(Sel->getCondition(),
-   cast(I)->getCondition());
-}
-  }
-  propagateIRFlags(Op, I);
-  return Op;
-}
   };
 
   WeakTrackingVH ReductionRoot;
@@ -6642,6 +6567,76 @@ class HorizontalReduction {
 }
   }
 
+  /// Creates reduction operation with the current opcode.
+  static Value *createOp(IRBuilder<> &Builder, RecurKind Kind, Value *LHS,
+ Value *RHS, const Twine &Name) {
+u

[llvm-branch-commits] [llvm] 1c54112 - [SLP] refactor more reduction functions; NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2021-01-20T11:14:48-05:00
New Revision: 1c54112a5762ebab2c14a90c55f27d00bfced7f8

URL: 
https://github.com/llvm/llvm-project/commit/1c54112a5762ebab2c14a90c55f27d00bfced7f8
DIFF: 
https://github.com/llvm/llvm-project/commit/1c54112a5762ebab2c14a90c55f27d00bfced7f8.diff

LOG: [SLP] refactor more reduction functions; NFC

We were able to remove almost all of the state from
OperationData, so these don't make sense as members
of that class - just pass the RecurKind in as a param.

More streamlining is possible, but I'm trying to avoid
logic/typo bugs while fixing this. Eventually, we should
not need the `OperationData` class.

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 3d657b0b898c..3192d7959f70 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -6427,76 +6427,6 @@ class HorizontalReduction {
   return IsLeafValue || Kind != RecurKind::None;
 }
 
-/// Return true if this operation is a cmp+select idiom.
-bool isCmpSel() const {
-  assert(Kind != RecurKind::None && "Expected reduction operation.");
-  return RecurrenceDescriptor::isIntMinMaxRecurrenceKind(Kind);
-}
-
-/// Get the index of the first operand.
-unsigned getFirstOperandIndex() const {
-  assert(!!*this && "The opcode is not set.");
-  // We allow calling this before 'Kind' is set, so handle that specially.
-  if (Kind == RecurKind::None)
-return 0;
-  return isCmpSel() ? 1 : 0;
-}
-
-/// Total number of operands in the reduction operation.
-unsigned getNumberOfOperands() const {
-  assert(Kind != RecurKind::None && !!*this &&
- "Expected reduction operation.");
-  return isCmpSel() ? 3 : 2;
-}
-
-/// Checks if the instruction is in basic block \p BB.
-/// For a min/max reduction check that both compare and select are in \p 
BB.
-bool hasSameParent(Instruction *I, BasicBlock *BB, bool IsRedOp) const {
-  assert(Kind != RecurKind::None && !!*this &&
- "Expected reduction operation.");
-  if (IsRedOp && isCmpSel()) {
-auto *Cmp = cast(cast(I)->getCondition());
-return I->getParent() == BB && Cmp && Cmp->getParent() == BB;
-  }
-  return I->getParent() == BB;
-}
-
-/// Expected number of uses for reduction operations/reduced values.
-bool hasRequiredNumberOfUses(Instruction *I, bool IsReductionOp) const {
-  assert(Kind != RecurKind::None && !!*this &&
- "Expected reduction operation.");
-  // SelectInst must be used twice while the condition op must have single
-  // use only.
-  if (isCmpSel())
-return I->hasNUses(2) &&
-   (!IsReductionOp ||
-cast(I)->getCondition()->hasOneUse());
-
-  // Arithmetic reduction operation must be used once only.
-  return I->hasOneUse();
-}
-
-/// Initializes the list of reduction operations.
-void initReductionOps(ReductionOpsListType &ReductionOps) {
-  assert(Kind != RecurKind::None && !!*this &&
- "Expected reduction operation.");
-  if (isCmpSel())
-ReductionOps.assign(2, ReductionOpsType());
-  else
-ReductionOps.assign(1, ReductionOpsType());
-}
-
-/// Add all reduction operations for the reduction instruction \p I.
-void addReductionOps(Instruction *I, ReductionOpsListType &ReductionOps) {
-  assert(Kind != RecurKind::None && "Expected reduction operation.");
-  if (isCmpSel()) {
-ReductionOps[0].emplace_back(cast(I)->getCondition());
-ReductionOps[1].emplace_back(I);
-  } else {
-ReductionOps[0].emplace_back(I);
-  }
-}
-
 /// Checks if instruction is associative and can be vectorized.
 bool isAssociative(Instruction *I) const {
   assert(Kind != RecurKind::None && "Expected reduction operation.");
@@ -6529,16 +6459,6 @@ class HorizontalReduction {
 
 /// Get kind of reduction data.
 RecurKind getKind() const { return Kind; }
-Value *getLHS(Instruction *I) const {
-  if (Kind == RecurKind::None)
-return nullptr;
-  return I->getOperand(getFirstOperandIndex());
-}
-Value *getRHS(Instruction *I) const {
-  if (Kind == RecurKind::None)
-return nullptr;
-  return I->getOperand(getFirstOperandIndex() + 1);
-}
   };
 
   WeakTrackingVH ReductionRoot;
@@ -6559,7 +6479,7 @@ class HorizontalReduction {
   // Do not perform analysis of remaining operands of ParentStackElem.first
   // instruction, this whole instruction is an extra argument.
   OperationData OpData = getOperationData(ParentStackElem.first);
-  ParentStackElem.second = OpData.getNumberOfOperand

[llvm-branch-commits] [llvm] c09be0d - [SLP] reduce reduction code for checking vectorizable ops; NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2021-01-20T11:14:48-05:00
New Revision: c09be0d2a0f930a128c946329b42eef45d53062a

URL: 
https://github.com/llvm/llvm-project/commit/c09be0d2a0f930a128c946329b42eef45d53062a
DIFF: 
https://github.com/llvm/llvm-project/commit/c09be0d2a0f930a128c946329b42eef45d53062a.diff

LOG: [SLP] reduce reduction code for checking vectorizable ops; NFC

This is another step towards removing `OperationData` and
fixing FMF matching/propagation bugs when forming reductions.

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 3192d7959f70..2597f88ab88d 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -6409,9 +6409,6 @@ class HorizontalReduction {
 RecurKind Kind = RecurKind::None;
 bool IsLeafValue = false;
 
-/// Checks if the reduction operation can be vectorized.
-bool isVectorizable() const { return Kind != RecurKind::None; }
-
   public:
 explicit OperationData() = default;
 
@@ -6427,29 +6424,6 @@ class HorizontalReduction {
   return IsLeafValue || Kind != RecurKind::None;
 }
 
-/// Checks if instruction is associative and can be vectorized.
-bool isAssociative(Instruction *I) const {
-  assert(Kind != RecurKind::None && "Expected reduction operation.");
-  if (RecurrenceDescriptor::isIntMinMaxRecurrenceKind(Kind))
-return true;
-
-  if (Kind == RecurKind::FMax || Kind == RecurKind::FMin) {
-// FP min/max are associative except for NaN and -0.0. We do not
-// have to rule out -0.0 here because the intrinsic semantics do not
-// specify a fixed result for it.
-// TODO: This is artificially restricted to fast because the code that
-//   creates reductions assumes/produces fast ops.
-return I->getFastMathFlags().isFast();
-  }
-
-  return I->isAssociative();
-}
-
-/// Checks if the reduction operation can be vectorized.
-bool isVectorizable(Instruction *I) const {
-  return isVectorizable() && isAssociative(I);
-}
-
 /// Checks if two operation data are both a reduction op or both a reduced
 /// value.
 bool operator==(const OperationData &OD) const {
@@ -6466,6 +6440,25 @@ class HorizontalReduction {
   /// The operation data of the reduction operation.
   OperationData RdxTreeInst;
 
+  /// Checks if instruction is associative and can be vectorized.
+  static bool isVectorizable(RecurKind Kind, Instruction *I) {
+if (Kind == RecurKind::None)
+  return false;
+if (RecurrenceDescriptor::isIntMinMaxRecurrenceKind(Kind))
+  return true;
+
+if (Kind == RecurKind::FMax || Kind == RecurKind::FMin) {
+  // FP min/max are associative except for NaN and -0.0. We do not
+  // have to rule out -0.0 here because the intrinsic semantics do not
+  // specify a fixed result for it.
+  // TODO: This is artificially restricted to fast because the code that
+  //   creates reductions assumes/produces fast ops.
+  return I->getFastMathFlags().isFast();
+}
+
+return I->isAssociative();
+  }
+
   /// Checks if the ParentStackElem.first should be marked as a reduction
   /// operation with an extra argument or as extra argument itself.
   void markExtraArg(std::pair &ParentStackElem,
@@ -6694,8 +6687,7 @@ class HorizontalReduction {
   }
 
   /// Initializes the list of reduction operations.
-  static void initReductionOps(RecurKind Kind,
-   ReductionOpsListType &ReductionOps) {
+  void initReductionOps(RecurKind Kind) {
 if (isCmpSel(Kind))
   ReductionOps.assign(2, ReductionOpsType());
 else
@@ -6703,8 +6695,7 @@ class HorizontalReduction {
   }
 
   /// Add all reduction operations for the reduction instruction \p I.
-  static void addReductionOps(RecurKind Kind, Instruction *I,
-  ReductionOpsListType &ReductionOps) {
+  void addReductionOps(RecurKind Kind, Instruction *I) {
 assert(Kind != RecurKind::None && "Expected reduction operation.");
 if (isCmpSel(Kind)) {
   ReductionOps[0].emplace_back(cast(I)->getCondition());
@@ -6750,7 +6741,7 @@ class HorizontalReduction {
   }
 }
 
-if (!RdxTreeInst.isVectorizable(B))
+if (!isVectorizable(RdxTreeInst.getKind(), B))
   return false;
 
 // Analyze "regular" integer/FP types for reductions - no target-specific
@@ -6772,7 +6763,7 @@ class HorizontalReduction {
 SmallVector, 32> Stack;
 Stack.push_back(
 std::make_pair(B, getFirstOperandIndex(RdxTreeInst.getKind(;
-initReductionOps(RdxTreeInst.getKind(), ReductionOps);
+initReductionOps(RdxTreeInst.getKind());
 while (!Stack.empty()) {
   Instruction *TreeN = Stack.back()

[llvm-branch-commits] [llvm] c540ce9 - [AMDGPU] pin lit test divergent-unswitch.ll to the old pass manager

[Sameer Sahasrabuddhe via llvm-branch-commits]

Author: Sameer Sahasrabuddhe
Date: 2021-01-20T22:02:09+05:30
New Revision: c540ce9900ff99566b4951186e2f070b3b36cdbe

URL: 
https://github.com/llvm/llvm-project/commit/c540ce9900ff99566b4951186e2f070b3b36cdbe
DIFF: 
https://github.com/llvm/llvm-project/commit/c540ce9900ff99566b4951186e2f070b3b36cdbe.diff

LOG: [AMDGPU] pin lit test divergent-unswitch.ll to the old pass manager

The loop-unswitch transform should not be performed on a loop whose
condition is divergent. For this to happen correctly, divergence
analysis must be available. The existing divergence analysis has not
been ported to the new pass manager yet. As a result, loop unswitching
on the new pass manager is currently unsafe on targets that care about
divergence.

This test is temporarily disabled to unblock work on the new pass
manager. The issue is now tracked in bug 48819.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D95051

Added: 


Modified: 
llvm/test/Transforms/LoopUnswitch/AMDGPU/divergent-unswitch.ll

Removed: 




diff  --git a/llvm/test/Transforms/LoopUnswitch/AMDGPU/divergent-unswitch.ll 
b/llvm/test/Transforms/LoopUnswitch/AMDGPU/divergent-unswitch.ll
index 1f106bd894a8..873a7653973d 100644
--- a/llvm/test/Transforms/LoopUnswitch/AMDGPU/divergent-unswitch.ll
+++ b/llvm/test/Transforms/LoopUnswitch/AMDGPU/divergent-unswitch.ll
@@ -1,4 +1,7 @@
-; RUN: opt -mtriple=amdgcn-- -O3 -S %s | FileCheck %s
+; RUN: opt -mtriple=amdgcn-- -O3 -S -enable-new-pm=0 %s | FileCheck %s
+
+; This fails with the new pass manager:
+; https://bugs.llvm.org/show_bug.cgi?id=48819
 
 ; Check that loop unswitch happened and condition hoisted out of the loop.
 ; Condition is uniform so all targets should perform unswitching.



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[llvm-branch-commits] [openmp] fd70f70 - [OpenMP][NVPTX] Replaced CUDA builtin vars with LLVM intrinsics

[Shilei Tian via llvm-branch-commits]

Author: Shilei Tian
Date: 2021-01-20T12:02:06-05:00
New Revision: fd70f70d1e02752f411fcf923fddda31cce376ae

URL: 
https://github.com/llvm/llvm-project/commit/fd70f70d1e02752f411fcf923fddda31cce376ae
DIFF: 
https://github.com/llvm/llvm-project/commit/fd70f70d1e02752f411fcf923fddda31cce376ae.diff

LOG: [OpenMP][NVPTX] Replaced CUDA builtin vars with LLVM intrinsics

Replaced CUDA builtin vars with LLVM intrinsics such that we don't need
definitions of those intrinsics.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D95013

Added: 


Modified: 
openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu

Removed: 




diff  --git a/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu 
b/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
index 8052b92a7dee..b5ef549ece57 100644
--- a/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
+++ b/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
@@ -115,10 +115,12 @@ DEVICE void __kmpc_impl_threadfence_block() { 
__threadfence_block(); }
 DEVICE void __kmpc_impl_threadfence_system() { __threadfence_system(); }
 
 // Calls to the NVPTX layer (assuming 1D layout)
-DEVICE int GetThreadIdInBlock() { return threadIdx.x; }
-DEVICE int GetBlockIdInKernel() { return blockIdx.x; }
-DEVICE int GetNumberOfBlocksInKernel() { return gridDim.x; }
-DEVICE int GetNumberOfThreadsInBlock() { return blockDim.x; }
+DEVICE int GetThreadIdInBlock() { return __nvvm_read_ptx_sreg_tid_x(); }
+DEVICE int GetBlockIdInKernel() { return __nvvm_read_ptx_sreg_ctaid_x(); }
+DEVICE int GetNumberOfBlocksInKernel() {
+  return __nvvm_read_ptx_sreg_nctaid_x();
+}
+DEVICE int GetNumberOfThreadsInBlock() { return __nvvm_read_ptx_sreg_ntid_x(); 
}
 DEVICE unsigned GetWarpId() { return GetThreadIdInBlock() / WARPSIZE; }
 DEVICE unsigned GetLaneId() { return GetThreadIdInBlock() & (WARPSIZE - 1); }
 



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[llvm-branch-commits] [mlir] 7dd1988 - [mlir][Affine] Add support for multi-store producer fusion

[Diego Caballero via llvm-branch-commits]

Author: Diego Caballero
Date: 2021-01-20T19:03:07+02:00
New Revision: 7dd198852b4db52ae22242dfeda4eccda83aa8b2

URL: 
https://github.com/llvm/llvm-project/commit/7dd198852b4db52ae22242dfeda4eccda83aa8b2
DIFF: 
https://github.com/llvm/llvm-project/commit/7dd198852b4db52ae22242dfeda4eccda83aa8b2.diff

LOG: [mlir][Affine] Add support for multi-store producer fusion

This patch adds support for producer-consumer fusion scenarios with
multiple producer stores to the AffineLoopFusion pass. The patch
introduces some changes to the producer-consumer algorithm, including:

* For a given consumer loop, producer-consumer fusion iterates over its
producer candidates until a fixed point is reached.

* Producer candidates are gathered beforehand for each iteration of the
consumer loop and visited in reverse program order (not strictly guaranteed)
to maximize the number of loops fused per iteration.

In general, these changes were needed to simplify the multi-store producer
support and remove some of the workarounds that were introduced in the past
to support more fusion cases under the single-store producer limitation.

This patch also preserves the existing functionality of AffineLoopFusion with
one minor change in behavior. Producer-consumer fusion didn't fuse scenarios
with escaping memrefs and multiple outgoing edges (from a single store).
Multi-store producer scenarios will usually (always?) have multiple outgoing
edges so we couldn't fuse any with escaping memrefs, which would greatly limit
the applicability of this new feature. Therefore, the patch enables fusion for
these scenarios. Please, see modified tests for specific details.

Reviewed By: andydavis1, bondhugula

Differential Revision: https://reviews.llvm.org/D92876

Added: 


Modified: 
mlir/include/mlir/Analysis/AffineStructures.h
mlir/include/mlir/Analysis/Utils.h
mlir/include/mlir/Transforms/LoopFusionUtils.h
mlir/include/mlir/Transforms/Passes.td
mlir/lib/Analysis/AffineStructures.cpp
mlir/lib/Analysis/Utils.cpp
mlir/lib/Transforms/LoopFusion.cpp
mlir/lib/Transforms/Utils/LoopFusionUtils.cpp
mlir/test/Transforms/loop-fusion.mlir

Removed: 




diff  --git a/mlir/include/mlir/Analysis/AffineStructures.h 
b/mlir/include/mlir/Analysis/AffineStructures.h
index fa80db7d4b63..893d4ea4ff46 100644
--- a/mlir/include/mlir/Analysis/AffineStructures.h
+++ b/mlir/include/mlir/Analysis/AffineStructures.h
@@ -234,6 +234,21 @@ class FlatAffineConstraints {
   //  TODO: add support for non-unit strides.
   LogicalResult addAffineForOpDomain(AffineForOp forOp);
 
+  /// Adds constraints (lower and upper bounds) for each loop in the loop nest
+  /// described by the bound maps 'lbMaps' and 'ubMaps' of a computation slice.
+  /// Every pair ('lbMaps[i]', 'ubMaps[i]') describes the bounds of a loop in
+  /// the nest, sorted outer-to-inner. 'operands' contains the bound operands
+  /// for a single bound map. All the bound maps will use the same bound
+  /// operands. Note that some loops described by a computation slice might not
+  /// exist yet in the IR so the Value attached to those dimension identifiers
+  /// might be empty. For that reason, this method doesn't perform Value
+  /// look-ups to retrieve the dimension identifier positions. Instead, it
+  /// assumes the position of the dim identifiers in the constraint system is
+  /// the same as the position of the loop in the loop nest.
+  LogicalResult addDomainFromSliceMaps(ArrayRef lbMaps,
+   ArrayRef ubMaps,
+   ArrayRef operands);
+
   /// Adds constraints imposed by the `affine.if` operation. These constraints
   /// are collected from the IntegerSet attached to the given `affine.if`
   /// instance argument (`ifOp`). It is asserted that:

diff  --git a/mlir/include/mlir/Analysis/Utils.h 
b/mlir/include/mlir/Analysis/Utils.h
index 30b6272181f5..ee6f8095f25e 100644
--- a/mlir/include/mlir/Analysis/Utils.h
+++ b/mlir/include/mlir/Analysis/Utils.h
@@ -83,10 +83,25 @@ struct ComputationSliceState {
   // Clears all bounds and operands in slice state.
   void clearBounds();
 
-  /// Return true if the computation slice is empty.
+  /// Returns true if the computation slice is empty.
   bool isEmpty() const { return ivs.empty(); }
 
+  /// Returns true if the computation slice encloses all the iterations of the
+  /// sliced loop nest. Returns false if it does not. Returns llvm::None if it
+  /// cannot determine if the slice is maximal or not.
+  // TODO: Cache 'isMaximal' so that we don't recompute it when the slice
+  // information hasn't changed.
+  Optional isMaximal() const;
+
   void dump() const;
+
+private:
+  /// Fast check to determine if the computation slice is maximal. Returns true
+  /// if each slice dimension maps to an existing dst dimension and both the 
src
+  /// and the dst loops for those dimens

[llvm-branch-commits] [llvm] b11b6ab - [RISCV] Add way to mark CompressPats that should only be used for compressing.

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-20T09:20:15-08:00
New Revision: b11b6ab3e09464e88e57b69ff4a8fc8e1c00cc5b

URL: 
https://github.com/llvm/llvm-project/commit/b11b6ab3e09464e88e57b69ff4a8fc8e1c00cc5b
DIFF: 
https://github.com/llvm/llvm-project/commit/b11b6ab3e09464e88e57b69ff4a8fc8e1c00cc5b.diff

LOG: [RISCV] Add way to mark CompressPats that should only be used for 
compressing.

There can be muliple patterns that map to the same compressed
instruction. Reversing those leads to multiple ways to uncompress
an instruction, but its not easily controllable which one will
be chosen by the tablegen backend.

This patch adds a flag to mark patterns that should only be used
for compressing. This allows us to leave one canonical pattern
for uncompressing.

The obvious benefit of this is getting c.mv to uncompress to
the addi patern that is aliased to the mv pseudoinstruction. For
the add/and/or/xor/li patterns it just removes some unreachable
code from the generated code.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D94894

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVInstrInfoC.td
llvm/test/MC/RISCV/compress-rv32i.s
llvm/test/MC/RISCV/option-rvc.s
llvm/test/TableGen/AsmPredicateCombiningRISCV.td
llvm/utils/TableGen/RISCVCompressInstEmitter.cpp

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
index 672dd3fcbbc3..30df455c1927 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
@@ -749,6 +749,7 @@ class CompressPat {
   dag Input  = input;
   dag Output= output;
   list Predicates = [];
+  bit isCompressOnly = false;
 }
 
 // Patterns are defined in the same order the compressed instructions appear
@@ -834,25 +835,30 @@ def : CompressPat<(SUB GPRC:$rs1, GPRC:$rs1, GPRC:$rs2),
   (C_SUB GPRC:$rs1, GPRC:$rs2)>;
 def : CompressPat<(XOR GPRC:$rs1, GPRC:$rs1, GPRC:$rs2),
   (C_XOR GPRC:$rs1, GPRC:$rs2)>;
+let isCompressOnly = true in
 def : CompressPat<(XOR GPRC:$rs1, GPRC:$rs2, GPRC:$rs1),
   (C_XOR GPRC:$rs1, GPRC:$rs2)>;
 def : CompressPat<(OR GPRC:$rs1, GPRC:$rs1, GPRC:$rs2),
   (C_OR GPRC:$rs1, GPRC:$rs2)>;
+let isCompressOnly = true in
 def : CompressPat<(OR GPRC:$rs1, GPRC:$rs2, GPRC:$rs1),
   (C_OR GPRC:$rs1, GPRC:$rs2)>;
 def : CompressPat<(AND GPRC:$rs1, GPRC:$rs1, GPRC:$rs2),
   (C_AND GPRC:$rs1, GPRC:$rs2)>;
+let isCompressOnly = true in
 def : CompressPat<(AND GPRC:$rs1, GPRC:$rs2, GPRC:$rs1),
   (C_AND GPRC:$rs1, GPRC:$rs2)>;
 } //  Predicates = [HasStdExtC]
 
 let Predicates = [HasStdExtC, IsRV64] in {
+let isCompressOnly = true in
 def : CompressPat<(ADDIW GPRNoX0:$rd, X0, simm6:$imm),
   (C_LI GPRNoX0:$rd, simm6:$imm)>;
 def : CompressPat<(SUBW GPRC:$rs1, GPRC:$rs1, GPRC:$rs2),
   (C_SUBW GPRC:$rs1, GPRC:$rs2)>;
 def : CompressPat<(ADDW GPRC:$rs1, GPRC:$rs1, GPRC:$rs2),
(C_ADDW GPRC:$rs1, GPRC:$rs2)>;
+let isCompressOnly = true in
 def : CompressPat<(ADDW GPRC:$rs1, GPRC:$rs2, GPRC:$rs1),
(C_ADDW GPRC:$rs1, GPRC:$rs2)>;
 } // Predicates = [HasStdExtC, IsRV64]
@@ -895,10 +901,12 @@ def : CompressPat<(LD GPRNoX0:$rd, SP:$rs1, 
uimm9_lsb000:$imm),
 let Predicates = [HasStdExtC] in {
 def : CompressPat<(JALR X0, GPRNoX0:$rs1, 0),
   (C_JR GPRNoX0:$rs1)>;
+let isCompressOnly = true in {
 def : CompressPat<(ADD GPRNoX0:$rs1, X0, GPRNoX0:$rs2),
   (C_MV GPRNoX0:$rs1, GPRNoX0:$rs2)>;
 def : CompressPat<(ADD GPRNoX0:$rs1, GPRNoX0:$rs2, X0),
   (C_MV GPRNoX0:$rs1, GPRNoX0:$rs2)>;
+}
 def : CompressPat<(ADDI GPRNoX0:$rs1, GPRNoX0:$rs2, 0),
   (C_MV GPRNoX0:$rs1, GPRNoX0:$rs2)>;
 def : CompressPat<(EBREAK), (C_EBREAK)>;
@@ -907,6 +915,7 @@ def : CompressPat<(JALR X1, GPRNoX0:$rs1, 0),
   (C_JALR GPRNoX0:$rs1)>;
 def : CompressPat<(ADD GPRNoX0:$rs1, GPRNoX0:$rs1, GPRNoX0:$rs2),
   (C_ADD GPRNoX0:$rs1, GPRNoX0:$rs2)>;
+let isCompressOnly = true in
 def : CompressPat<(ADD GPRNoX0:$rs1, GPRNoX0:$rs2, GPRNoX0:$rs1),
   (C_ADD GPRNoX0:$rs1, GPRNoX0:$rs2)>;
 } // Predicates = [HasStdExtC]

diff  --git a/llvm/test/MC/RISCV/compress-rv32i.s 
b/llvm/test/MC/RISCV/compress-rv32i.s
index c6cd92954428..443c660655b1 100644
--- a/llvm/test/MC/RISCV/compress-rv32i.s
+++ b/llvm/test/MC/RISCV/compress-rv32i.s
@@ -21,7 +21,7 @@
 # RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-INST,CHECK-INSTOBJ64 %s
 
 # CHECK-BYTES: 2e 85
-# CHECK-ALIAS: add a0, zero, a1
+# CHECK-ALIAS: mv a0, a1
 # CHECK-INST: c.mv a0, a1
 # CHECK: # encoding:  [0x2e,0x85]
 addi a0, a1, 0
@@ -183,13 +183,13 @@ lw ra, 252(sp)
 jalr zero, 0(ra)
 
 # CHECK-BYTES: 92 80
-# CHECK-ALIAS: add ra, zero, tp
+# CHECK-ALIAS: m

[llvm-branch-commits] [mlir] cad16e4 - Avoid unused variable warning in opt mode

[Jacques Pienaar via llvm-branch-commits]

Author: Jacques Pienaar
Date: 2021-01-20T09:45:22-08:00
New Revision: cad16e4a9267f08229c59e473db6dedd730a5d93

URL: 
https://github.com/llvm/llvm-project/commit/cad16e4a9267f08229c59e473db6dedd730a5d93
DIFF: 
https://github.com/llvm/llvm-project/commit/cad16e4a9267f08229c59e473db6dedd730a5d93.diff

LOG: Avoid unused variable warning in opt mode

Added: 


Modified: 
mlir/lib/Transforms/LoopFusion.cpp

Removed: 




diff  --git a/mlir/lib/Transforms/LoopFusion.cpp 
b/mlir/lib/Transforms/LoopFusion.cpp
index 2bee9cb33405..6c56368ca6e1 100644
--- a/mlir/lib/Transforms/LoopFusion.cpp
+++ b/mlir/lib/Transforms/LoopFusion.cpp
@@ -763,9 +763,11 @@ bool MemRefDependenceGraph::init(FuncOp f) {
 }
   }
 
+#ifndef NDEBUG
   for (auto &idAndNode : nodes)
 LLVM_DEBUG(llvm::dbgs() << "Create node " << idAndNode.first << " for:\n"
 << *(idAndNode.second.op) << "\n");
+#endif
 
   // Add dependence edges between nodes which produce SSA values and their
   // users.



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[llvm-branch-commits] [mlir] 4c1eaf2 - [mlir] fix the rocm runtime wrapper to account for cuda / rocm api differences

[Tobias Gysi via llvm-branch-commits]

Author: Tobias Gysi
Date: 2021-01-20T18:48:32+01:00
New Revision: 4c1eaf26ae70b9f0e441b0f613871d697c4c9a7d

URL: 
https://github.com/llvm/llvm-project/commit/4c1eaf26ae70b9f0e441b0f613871d697c4c9a7d
DIFF: 
https://github.com/llvm/llvm-project/commit/4c1eaf26ae70b9f0e441b0f613871d697c4c9a7d.diff

LOG: [mlir] fix the rocm runtime wrapper to account for cuda / rocm api 
differences

The patch adapts the rocm runtime wrapper due to subtle differences between the 
cuda and the rocm/hip runtime api.

Reviewed By: csigg

Differential Revision: https://reviews.llvm.org/D95027

Added: 


Modified: 
mlir/tools/mlir-rocm-runner/rocm-runtime-wrappers.cpp

Removed: 




diff  --git a/mlir/tools/mlir-rocm-runner/rocm-runtime-wrappers.cpp 
b/mlir/tools/mlir-rocm-runner/rocm-runtime-wrappers.cpp
index 4f62f204f4a8..028e2e3b55d1 100644
--- a/mlir/tools/mlir-rocm-runner/rocm-runtime-wrappers.cpp
+++ b/mlir/tools/mlir-rocm-runner/rocm-runtime-wrappers.cpp
@@ -36,7 +36,7 @@ static auto InitializeCtx = [] {
   HIP_REPORT_IF_ERROR(hipInit(/*flags=*/0));
   hipDevice_t device;
   HIP_REPORT_IF_ERROR(hipDeviceGet(&device, /*ordinal=*/0));
-  hipContext_t context;
+  hipCtx_t context;
   HIP_REPORT_IF_ERROR(hipCtxCreate(&context, /*flags=*/0, device));
   return 0;
 }();
@@ -110,17 +110,18 @@ extern "C" void mgpuEventRecord(hipEvent_t event, 
hipStream_t stream) {
 
 extern "C" void *mgpuMemAlloc(uint64_t sizeBytes, hipStream_t /*stream*/) {
   void *ptr;
-  HIP_REPORT_IF_ERROR(hipMemAlloc(&ptr, sizeBytes));
+  HIP_REPORT_IF_ERROR(hipMalloc(&ptr, sizeBytes));
   return ptr;
 }
 
 extern "C" void mgpuMemFree(void *ptr, hipStream_t /*stream*/) {
-  HIP_REPORT_IF_ERROR(hipMemFree(ptr));
+  HIP_REPORT_IF_ERROR(hipFree(ptr));
 }
 
 extern "C" void mgpuMemcpy(void *dst, void *src, uint64_t sizeBytes,
hipStream_t stream) {
-  HIP_REPORT_IF_ERROR(hipMemcpyAsync(dst, src, sizeBytes, stream));
+  HIP_REPORT_IF_ERROR(
+  hipMemcpyAsync(dst, src, sizeBytes, hipMemcpyDefault, stream));
 }
 
 /// Helper functions for writing mlir example code



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[llvm-branch-commits] [lldb] 7169d3a - [lldb/Commands] Refactor ProcessLaunchCommandOptions to use TableGen (NFC)

[Med Ismail Bennani via llvm-branch-commits]

Author: Med Ismail Bennani
Date: 2021-01-20T18:53:06+01:00
New Revision: 7169d3a315f4cdc19c4ab6b8f20c6f91b46ba9b8

URL: 
https://github.com/llvm/llvm-project/commit/7169d3a315f4cdc19c4ab6b8f20c6f91b46ba9b8
DIFF: 
https://github.com/llvm/llvm-project/commit/7169d3a315f4cdc19c4ab6b8f20c6f91b46ba9b8.diff

LOG: [lldb/Commands] Refactor ProcessLaunchCommandOptions to use TableGen (NFC)

This patch refactors the current implementation of
`ProcessLaunchCommandOptions` to be generated by TableGen.

The patch also renames the class to `CommandOptionsProcessLaunch` to
align better with the rest of the codebase style and moves it to
separate files.

Differential Review: https://reviews.llvm.org/D95059

Signed-off-by: Med Ismail Bennani 

Added: 
lldb/source/Commands/CommandOptionsProcessLaunch.cpp
lldb/source/Commands/CommandOptionsProcessLaunch.h

Modified: 
lldb/include/lldb/Target/Process.h
lldb/source/Commands/CMakeLists.txt
lldb/source/Commands/CommandObjectPlatform.cpp
lldb/source/Commands/CommandObjectProcess.cpp
lldb/source/Commands/Options.td
lldb/source/Target/Process.cpp

Removed: 




diff  --git a/lldb/include/lldb/Target/Process.h 
b/lldb/include/lldb/Target/Process.h
index 6f30787f7e5b..5ca5dd28fd8f 100644
--- a/lldb/include/lldb/Target/Process.h
+++ b/lldb/include/lldb/Target/Process.h
@@ -30,7 +30,6 @@
 #include "lldb/Host/HostThread.h"
 #include "lldb/Host/ProcessLaunchInfo.h"
 #include "lldb/Host/ProcessRunLock.h"
-#include "lldb/Interpreter/Options.h"
 #include "lldb/Symbol/ObjectFile.h"
 #include "lldb/Target/ExecutionContextScope.h"
 #include "lldb/Target/InstrumentationRuntime.h"
@@ -210,32 +209,6 @@ class ProcessAttachInfo : public ProcessInstanceInfo {
 // call SBProcess::Stop() to cancel attach)
 };
 
-class ProcessLaunchCommandOptions : public Options {
-public:
-  ProcessLaunchCommandOptions() : Options() {
-// Keep default values of all options in one place: OptionParsingStarting
-// ()
-OptionParsingStarting(nullptr);
-  }
-
-  ~ProcessLaunchCommandOptions() override = default;
-
-  Status SetOptionValue(uint32_t option_idx, llvm::StringRef option_arg,
-ExecutionContext *execution_context) override;
-
-  void OptionParsingStarting(ExecutionContext *execution_context) override {
-launch_info.Clear();
-disable_aslr = eLazyBoolCalculate;
-  }
-
-  llvm::ArrayRef GetDefinitions() override;
-
-  // Instance variables to hold the values for command options.
-
-  ProcessLaunchInfo launch_info;
-  lldb_private::LazyBool disable_aslr;
-};
-
 // This class tracks the Modification state of the process.  Things that can
 // currently modify the program are running the program (which will up the
 // StopID) and writing memory (which will up the MemoryID.)

diff  --git a/lldb/source/Commands/CMakeLists.txt 
b/lldb/source/Commands/CMakeLists.txt
index 4f10516c2f69..988ff894ea67 100644
--- a/lldb/source/Commands/CMakeLists.txt
+++ b/lldb/source/Commands/CMakeLists.txt
@@ -37,6 +37,7 @@ add_lldb_library(lldbCommands
   CommandObjectVersion.cpp
   CommandObjectWatchpoint.cpp
   CommandObjectWatchpointCommand.cpp
+  CommandOptionsProcessLaunch.cpp
 
   LINK_LIBS
 lldbBase

diff  --git a/lldb/source/Commands/CommandObjectPlatform.cpp 
b/lldb/source/Commands/CommandObjectPlatform.cpp
index 3a5af9f91cf1..f306da3c8543 100644
--- a/lldb/source/Commands/CommandObjectPlatform.cpp
+++ b/lldb/source/Commands/CommandObjectPlatform.cpp
@@ -7,6 +7,7 @@
 
//===--===//
 
 #include "CommandObjectPlatform.h"
+#include "CommandOptionsProcessLaunch.h"
 #include "lldb/Core/Debugger.h"
 #include "lldb/Core/Module.h"
 #include "lldb/Core/PluginManager.h"
@@ -1083,7 +1084,7 @@ class CommandObjectPlatformProcessLaunch : public 
CommandObjectParsed {
 return result.Succeeded();
   }
 
-  ProcessLaunchCommandOptions m_options;
+  CommandOptionsProcessLaunch m_options;
 };
 
 // "platform process list"

diff  --git a/lldb/source/Commands/CommandObjectProcess.cpp 
b/lldb/source/Commands/CommandObjectProcess.cpp
index 1eef2800ce16..35835f638557 100644
--- a/lldb/source/Commands/CommandObjectProcess.cpp
+++ b/lldb/source/Commands/CommandObjectProcess.cpp
@@ -7,6 +7,7 @@
 
//===--===//
 
 #include "CommandObjectProcess.h"
+#include "CommandOptionsProcessLaunch.h"
 #include "lldb/Breakpoint/Breakpoint.h"
 #include "lldb/Breakpoint/BreakpointLocation.h"
 #include "lldb/Breakpoint/BreakpointSite.h"
@@ -251,7 +252,7 @@ class CommandObjectProcessLaunch : public 
CommandObjectProcessLaunchOrAttach {
 return result.Succeeded();
   }
 
-  ProcessLaunchCommandOptions m_options;
+  CommandOptionsProcessLaunch m_options;
 };
 
 #define LLDB_OPTIONS_process_attach

diff  --git a/lldb/source/Commands/CommandOptionsProcessLaunch.c

[llvm-branch-commits] [llvm] 719b563 - [PowerPC][Power10] Exploit splat instruction xxsplti32dx in Power10

[Albion Fung via llvm-branch-commits]

Author: Albion Fung
Date: 2021-01-20T12:55:52-05:00
New Revision: 719b563ecf6851136e4c1e6a5ff6c407522dd024

URL: 
https://github.com/llvm/llvm-project/commit/719b563ecf6851136e4c1e6a5ff6c407522dd024
DIFF: 
https://github.com/llvm/llvm-project/commit/719b563ecf6851136e4c1e6a5ff6c407522dd024.diff

LOG: [PowerPC][Power10] Exploit splat instruction xxsplti32dx in Power10

Exploits the instruction xxsplti32dx.

It can be used to materialize any 64 bit scalar/vector splat by using two 
instances, one for the upper 32 bits and the other for the lower 32 bits. It 
should not materialize the cases which can be materialized by using the 
instruction xxspltidp.

Differential Revision: https://https://reviews.llvm.org/D90173

Added: 


Modified: 
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCInstrPrefix.td
llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
llvm/test/CodeGen/PowerPC/p10-splatImm32.ll

Removed: 




diff  --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index d6dd70fb1a0c..b37ac7d72dc2 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -8604,14 +8604,41 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
 
   // If it is a splat of a double, check if we can shrink it to a 32 bit
   // non-denormal float which when converted back to double gives us the same
-  // double. This is to exploit the XXSPLTIDP instruction.
-  if (BVNIsConstantSplat && Subtarget.hasPrefixInstrs() &&
-  (SplatBitSize == 64) && (Op->getValueType(0) == MVT::v2f64) &&
-  convertToNonDenormSingle(APSplatBits)) {
-SDValue SplatNode = DAG.getNode(
-PPCISD::XXSPLTI_SP_TO_DP, dl, MVT::v2f64,
-DAG.getTargetConstant(APSplatBits.getZExtValue(), dl, MVT::i32));
-return DAG.getBitcast(Op.getValueType(), SplatNode);
+  // double. This is to exploit the XXSPLTIDP instruction.+  // If we lose 
precision, we use XXSPLTI32DX.
+  if (BVNIsConstantSplat && (SplatBitSize == 64) &&
+  Subtarget.hasPrefixInstrs()) {
+if (convertToNonDenormSingle(APSplatBits) &&
+(Op->getValueType(0) == MVT::v2f64)) {
+  SDValue SplatNode = DAG.getNode(
+  PPCISD::XXSPLTI_SP_TO_DP, dl, MVT::v2f64,
+  DAG.getTargetConstant(APSplatBits.getZExtValue(), dl, MVT::i32));
+  return DAG.getBitcast(Op.getValueType(), SplatNode);
+} else { // We may lose precision, so we have to use XXSPLTI32DX.
+
+  uint32_t Hi =
+  (uint32_t)((APSplatBits.getZExtValue() & 0xLL) >> 
32);
+  uint32_t Lo =
+  (uint32_t)(APSplatBits.getZExtValue() & 0x);
+  SDValue SplatNode = DAG.getUNDEF(MVT::v2i64);
+
+  if (!Hi || !Lo)
+// If either load is 0, then we should generate XXLXOR to set to 0.
+SplatNode = DAG.getTargetConstant(0, dl, MVT::v2i64);
+
+  if (Hi)
+SplatNode = DAG.getNode(
+PPCISD::XXSPLTI32DX, dl, MVT::v2i64, SplatNode,
+DAG.getTargetConstant(0, dl, MVT::i32),
+DAG.getTargetConstant(Hi, dl, MVT::i32));
+
+  if (Lo)
+SplatNode =
+DAG.getNode(PPCISD::XXSPLTI32DX, dl, MVT::v2i64, SplatNode,
+DAG.getTargetConstant(1, dl, MVT::i32),
+DAG.getTargetConstant(Lo, dl, MVT::i32));
+
+  return DAG.getBitcast(Op.getValueType(), SplatNode);
+}
   }
 
   if (!BVNIsConstantSplat || SplatBitSize > 32) {

diff  --git a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td 
b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
index b6e9562dd0f6..b9eb3b3b7d37 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
@@ -2533,6 +2533,9 @@ let Predicates = [IsISA3_1] in {
 
   def : Pat<(v1i128 (rotl v1i128:$vA, v1i128:$vB)),
 (v1i128 (VRLQ v1i128:$vA, v1i128:$vB))>;
+
+  def : Pat <(v2i64 (PPCxxsplti32dx v2i64:$XT, i32:$XI, i32:$IMM32)),
+ (v2i64 (XXSPLTI32DX v2i64:$XT, i32:$XI, i32:$IMM32))>;
 }
 
 let Predicates = [IsISA3_1, HasVSX] in {

diff  --git a/llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll 
b/llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
index 0cb8fafe7a3c..0836c4cb7bbe 100644
--- a/llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
+++ b/llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
@@ -1,114 +1,216 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s
+; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s 
--check-prefixes=CHECK-LE
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
 ; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \
-; RUN: --check-prefix=CHECK-NOPCREL
+

[llvm-branch-commits] [mlir] cc4244d - [MLIR][Standard] Add log1p operation to std

[Frederik Gossen via llvm-branch-commits]

Author: Frederik Gossen
Date: 2021-01-20T18:56:20+01:00
New Revision: cc4244d55f98b03603cf54eb4abac7e128e3c99a

URL: 
https://github.com/llvm/llvm-project/commit/cc4244d55f98b03603cf54eb4abac7e128e3c99a
DIFF: 
https://github.com/llvm/llvm-project/commit/cc4244d55f98b03603cf54eb4abac7e128e3c99a.diff

LOG: [MLIR][Standard] Add log1p operation to std

Differential Revision: https://reviews.llvm.org/D95041

Added: 


Modified: 
mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
mlir/test/IR/core-ops.mlir

Removed: 




diff  --git a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td 
b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
index 8db6129dbb88..770e68f6da83 100644
--- a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
+++ b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
@@ -1942,10 +1942,39 @@ def LogOp : FloatUnaryOp<"log"> {
   let summary = "base-e logarithm of the specified value";
 }
 
+//===--===//
+// Log10Op
+//===--===//
+
 def Log10Op : FloatUnaryOp<"log10"> {
   let summary = "base-10 logarithm of the specified value";
 }
 
+//===--===//
+// Log1pOp
+//===--===//
+
+def Log1pOp : FloatUnaryOp<"log1p"> {
+  let summary = "Computes the natural logarithm of one plus the given value";
+
+  let description = [{
+Computes the base-e logarithm of one plus the given value. It takes one
+operand and returns one result of the same type.
+
+log1p(x) := log(1 + x)
+
+Example:
+
+```mlir
+%y = log1p %x : f64
+```
+  }];
+}
+
+//===--===//
+// Log2Op
+//===--===//
+
 def Log2Op : FloatUnaryOp<"log2"> {
   let summary = "base-2 logarithm of the specified value";
 }

diff  --git a/mlir/test/IR/core-ops.mlir b/mlir/test/IR/core-ops.mlir
index 0e86050870ff..b5266fb2e580 100644
--- a/mlir/test/IR/core-ops.mlir
+++ b/mlir/test/IR/core-ops.mlir
@@ -596,6 +596,9 @@ func @standard_instrs(tensor<4x4x?xf32>, f32, i32, index, 
i64, f16) {
   // CHECK: %{{[0-9]+}} = ceildivi_signed %cst_4, %cst_4 : tensor<42xi32>
   %174 = ceildivi_signed %tci32, %tci32 : tensor<42 x i32>
 
+  // CHECK: %{{[0-9]+}} = log1p %arg1 : f32
+  %175 = log1p %f : f32
+
   return
 }
 



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[llvm-branch-commits] [llvm] 36e62b1 - [AArch64] Fix -Wunused-but-set-variable in GCC -DLLVM_ENABLE_ASSERTIONS=off build

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2021-01-20T10:14:11-08:00
New Revision: 36e62b1ff7e7aa883f8ea2f236e9c04df6976b59

URL: 
https://github.com/llvm/llvm-project/commit/36e62b1ff7e7aa883f8ea2f236e9c04df6976b59
DIFF: 
https://github.com/llvm/llvm-project/commit/36e62b1ff7e7aa883f8ea2f236e9c04df6976b59.diff

LOG: [AArch64] Fix -Wunused-but-set-variable in GCC 
-DLLVM_ENABLE_ASSERTIONS=off build

Added: 


Modified: 
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp

Removed: 




diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp 
b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 0021456a596d..9619bb43ae9c 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -865,6 +865,7 @@ static bool selectCopy(MachineInstr &I, const 
TargetInstrInfo &TII,
 #ifndef NDEBUG
 ValidCopy = KnownValid || isValidCopy(I, DstRegBank, MRI, TRI, RBI);
 assert(ValidCopy && "Invalid copy.");
+(void)KnownValid;
 #endif
 return ValidCopy;
   };



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[llvm-branch-commits] [llvm] b8b5e87 - [X86][AVX] Handle vperm2x128 shuffling of a subvector splat.

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-20T18:16:33Z
New Revision: b8b5e87e6b8102d77e4e6beccf4e0f0237acc897

URL: 
https://github.com/llvm/llvm-project/commit/b8b5e87e6b8102d77e4e6beccf4e0f0237acc897
DIFF: 
https://github.com/llvm/llvm-project/commit/b8b5e87e6b8102d77e4e6beccf4e0f0237acc897.diff

LOG: [X86][AVX] Handle vperm2x128 shuffling of a subvector splat.

We already handle "vperm2x128 (ins ?, X, C1), (ins ?, X, C1), 0x31" for 
shuffling of the upper subvectors, but we weren't dealing with the case when we 
were splatting the upper subvector from a single source.

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/avx-vperm2x128.ll
llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 0b52b2021c73..852078a299b9 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -37324,6 +37324,14 @@ static SDValue combineTargetShuffle(SDValue N, 
SelectionDAG &DAG,
 SDValue Ins1 = peekThroughBitcasts(N.getOperand(1));
 unsigned Imm = N.getConstantOperandVal(2);
 
+// Handle subvector splat by tweaking values to match binary concat.
+// vperm2x128 (ins ?, X, C1), undef, 0x11 ->
+// vperm2x128 (ins ?, X, C1), (ins ?, X, C1), 0x31 -> concat X, X
+if (Imm == 0x11 && Ins1.isUndef()) {
+  Imm = 0x31;
+  Ins1 = Ins0;
+}
+
 if (!(Imm == 0x31 &&
   Ins0.getOpcode() == ISD::INSERT_SUBVECTOR &&
   Ins1.getOpcode() == ISD::INSERT_SUBVECTOR &&

diff  --git a/llvm/test/CodeGen/X86/avx-vperm2x128.ll 
b/llvm/test/CodeGen/X86/avx-vperm2x128.ll
index a519f55aaafe..bfab2f186bf5 100644
--- a/llvm/test/CodeGen/X86/avx-vperm2x128.ll
+++ b/llvm/test/CodeGen/X86/avx-vperm2x128.ll
@@ -130,7 +130,6 @@ define <32 x i8> @shuffle_v32i8_2323_domain(<32 x i8> %a, 
<32 x i8> %b) nounwind
 ; AVX1-NEXT:vpcmpeqd %xmm1, %xmm1, %xmm1
 ; AVX1-NEXT:vpsubb %xmm1, %xmm0, %xmm0
 ; AVX1-NEXT:vinsertf128 $1, %xmm0, %ymm0, %ymm0
-; AVX1-NEXT:vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
 ; AVX1-NEXT:retq
 ;
 ; AVX2-LABEL: shuffle_v32i8_2323_domain:

diff  --git a/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll 
b/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
index f1af4faf67e2..5f2a3cd72b71 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
@@ -3098,14 +3098,13 @@ entry:
 define <8 x i32> @add_v8i32_02468ACE_13579BDF(<8 x i32> %a, <8 x i32> %b) {
 ; AVX1-LABEL: add_v8i32_02468ACE_13579BDF:
 ; AVX1:   # %bb.0: # %entry
-; AVX1-NEXT:vphaddd %xmm1, %xmm0, %xmm2
+; AVX1-NEXT:vextractf128 $1, %ymm1, %xmm2
+; AVX1-NEXT:vextractf128 $1, %ymm0, %xmm3
+; AVX1-NEXT:vphaddd %xmm2, %xmm3, %xmm2
 ; AVX1-NEXT:vinsertf128 $1, %xmm2, %ymm2, %ymm2
-; AVX1-NEXT:vextractf128 $1, %ymm1, %xmm1
-; AVX1-NEXT:vextractf128 $1, %ymm0, %xmm0
 ; AVX1-NEXT:vphaddd %xmm1, %xmm0, %xmm0
 ; AVX1-NEXT:vinsertf128 $1, %xmm0, %ymm0, %ymm0
-; AVX1-NEXT:vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
-; AVX1-NEXT:vshufpd {{.*#+}} ymm0 = ymm2[0],ymm0[0],ymm2[3],ymm0[3]
+; AVX1-NEXT:vshufpd {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[3],ymm2[3]
 ; AVX1-NEXT:retq
 ;
 ; AVX2OR512VL-LABEL: add_v8i32_02468ACE_13579BDF:
@@ -3123,14 +3122,13 @@ entry:
 define <8 x i32> @add_v8i32_8ACE0246_9BDF1357(<8 x i32> %a, <8 x i32> %b) {
 ; AVX1-LABEL: add_v8i32_8ACE0246_9BDF1357:
 ; AVX1:   # %bb.0: # %entry
-; AVX1-NEXT:vphaddd %xmm1, %xmm0, %xmm2
+; AVX1-NEXT:vextractf128 $1, %ymm1, %xmm2
+; AVX1-NEXT:vextractf128 $1, %ymm0, %xmm3
+; AVX1-NEXT:vphaddd %xmm2, %xmm3, %xmm2
 ; AVX1-NEXT:vinsertf128 $1, %xmm2, %ymm2, %ymm2
-; AVX1-NEXT:vextractf128 $1, %ymm1, %xmm1
-; AVX1-NEXT:vextractf128 $1, %ymm0, %xmm0
 ; AVX1-NEXT:vphaddd %xmm1, %xmm0, %xmm0
 ; AVX1-NEXT:vinsertf128 $1, %xmm0, %ymm0, %ymm0
-; AVX1-NEXT:vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
-; AVX1-NEXT:vshufpd {{.*#+}} ymm0 = ymm2[1],ymm0[1],ymm2[2],ymm0[2]
+; AVX1-NEXT:vshufpd {{.*#+}} ymm0 = ymm0[1],ymm2[1],ymm0[2],ymm2[2]
 ; AVX1-NEXT:retq
 ;
 ; AVX2OR512VL-LABEL: add_v8i32_8ACE0246_9BDF1357:



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[llvm-branch-commits] [llvm] 9d792fe - [RISCV] Remove unnecessary APInt copy. NFC

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-20T10:33:09-08:00
New Revision: 9d792fef577843b213aa11954820512942dc31c7

URL: 
https://github.com/llvm/llvm-project/commit/9d792fef577843b213aa11954820512942dc31c7
DIFF: 
https://github.com/llvm/llvm-project/commit/9d792fef577843b213aa11954820512942dc31c7.diff

LOG: [RISCV] Remove unnecessary APInt copy. NFC

getAPIntValue returns a const APInt& so keep it as a reference.

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp 
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index a84d3a4dd006..abbdfd54e897 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -2009,7 +2009,7 @@ bool RISCVTargetLowering::isDesirableToCommuteWithShift(
 auto *C1 = dyn_cast(N0->getOperand(1));
 auto *C2 = dyn_cast(N->getOperand(1));
 if (C1 && C2) {
-  APInt C1Int = C1->getAPIntValue();
+  const APInt &C1Int = C1->getAPIntValue();
   APInt ShiftedC1Int = C1Int << C2->getAPIntValue();
 
   // We can materialise `c1 << c2` into an add immediate, so it's "free",



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[llvm-branch-commits] [llvm] 16d6e85 - [BuildLibcalls] Mark some libcalls with inaccessiblememonly and inaccessiblemem_or_argmemonly

[Dávid Bolvanský via llvm-branch-commits]

Author: Dávid Bolvanský
Date: 2021-01-20T19:45:23+01:00
New Revision: 16d6e8527189298c75bf5690c771e8ab6dc3628d

URL: 
https://github.com/llvm/llvm-project/commit/16d6e8527189298c75bf5690c771e8ab6dc3628d
DIFF: 
https://github.com/llvm/llvm-project/commit/16d6e8527189298c75bf5690c771e8ab6dc3628d.diff

LOG: [BuildLibcalls] Mark some libcalls with inaccessiblememonly and 
inaccessiblemem_or_argmemonly

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94850

Added: 


Modified: 
llvm/lib/Transforms/Utils/BuildLibCalls.cpp
llvm/test/Transforms/InferFunctionAttrs/annotate.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/BuildLibCalls.cpp 
b/llvm/lib/Transforms/Utils/BuildLibCalls.cpp
index d2ffb99274e3..857c3d915e8c 100644
--- a/llvm/lib/Transforms/Utils/BuildLibCalls.cpp
+++ b/llvm/lib/Transforms/Utils/BuildLibCalls.cpp
@@ -31,8 +31,12 @@ using namespace llvm;
 //- Infer Attributes 
-//
 
 STATISTIC(NumReadNone, "Number of functions inferred as readnone");
+STATISTIC(NumInaccessibleMemOnly,
+  "Number of functions inferred as inaccessiblememonly");
 STATISTIC(NumReadOnly, "Number of functions inferred as readonly");
 STATISTIC(NumArgMemOnly, "Number of functions inferred as argmemonly");
+STATISTIC(NumInaccessibleMemOrArgMemOnly,
+  "Number of functions inferred as inaccessiblemem_or_argmemonly");
 STATISTIC(NumNoUnwind, "Number of functions inferred as nounwind");
 STATISTIC(NumNoCapture, "Number of arguments inferred as nocapture");
 STATISTIC(NumWriteOnlyArg, "Number of arguments inferred as writeonly");
@@ -52,6 +56,14 @@ static bool setDoesNotAccessMemory(Function &F) {
   return true;
 }
 
+static bool setOnlyAccessesInaccessibleMemory(Function &F) {
+  if (F.onlyAccessesInaccessibleMemory())
+return false;
+  F.setOnlyAccessesInaccessibleMemory();
+  ++NumInaccessibleMemOnly;
+  return true;
+}
+
 static bool setOnlyReadsMemory(Function &F) {
   if (F.onlyReadsMemory())
 return false;
@@ -68,6 +80,14 @@ static bool setOnlyAccessesArgMemory(Function &F) {
   return true;
 }
 
+static bool setOnlyAccessesInaccessibleMemOrArgMem(Function &F) {
+  if (F.onlyAccessesInaccessibleMemOrArgMem())
+return false;
+  F.setOnlyAccessesInaccessibleMemOrArgMem();
+  ++NumInaccessibleMemOrArgMemOnly;
+  return true;
+}
+
 static bool setDoesNotThrow(Function &F) {
   if (F.doesNotThrow())
 return false;
@@ -315,6 +335,7 @@ bool llvm::inferLibFuncAttributes(Function &F, const 
TargetLibraryInfo &TLI) {
 return Changed;
   case LibFunc_strdup:
   case LibFunc_strndup:
+Changed |= setOnlyAccessesInaccessibleMemOrArgMem(F);
 Changed |= setDoesNotThrow(F);
 Changed |= setRetDoesNotAlias(F);
 Changed |= setWillReturn(F);
@@ -370,6 +391,7 @@ bool llvm::inferLibFuncAttributes(Function &F, const 
TargetLibraryInfo &TLI) {
 Changed |= setOnlyReadsMemory(F, 0);
 return Changed;
   case LibFunc_malloc:
+Changed |= setOnlyAccessesInaccessibleMemory(F);
 Changed |= setRetNoUndef(F);
 Changed |= setDoesNotThrow(F);
 Changed |= setRetDoesNotAlias(F);
@@ -432,6 +454,9 @@ bool llvm::inferLibFuncAttributes(Function &F, const 
TargetLibraryInfo &TLI) {
 Changed |= setDoesNotThrow(F);
 return Changed;
   case LibFunc_memalign:
+Changed |= setOnlyAccessesInaccessibleMemory(F);
+Changed |= setRetNoUndef(F);
+Changed |= setDoesNotThrow(F);
 Changed |= setRetDoesNotAlias(F);
 Changed |= setWillReturn(F);
 return Changed;
@@ -448,6 +473,7 @@ bool llvm::inferLibFuncAttributes(Function &F, const 
TargetLibraryInfo &TLI) {
 Changed |= setDoesNotCapture(F, 0);
 return Changed;
   case LibFunc_realloc:
+Changed |= setOnlyAccessesInaccessibleMemOrArgMem(F);
 Changed |= setRetNoUndef(F);
 Changed |= setDoesNotThrow(F);
 Changed |= setRetDoesNotAlias(F);
@@ -498,6 +524,7 @@ bool llvm::inferLibFuncAttributes(Function &F, const 
TargetLibraryInfo &TLI) {
 Changed |= setOnlyReadsMemory(F, 1);
 return Changed;
   case LibFunc_aligned_alloc:
+Changed |= setOnlyAccessesInaccessibleMemory(F);
 Changed |= setRetNoUndef(F);
 Changed |= setDoesNotThrow(F);
 Changed |= setRetDoesNotAlias(F);
@@ -528,6 +555,7 @@ bool llvm::inferLibFuncAttributes(Function &F, const 
TargetLibraryInfo &TLI) {
 Changed |= setOnlyWritesMemory(F, 0);
 return Changed;
   case LibFunc_calloc:
+Changed |= setOnlyAccessesInaccessibleMemory(F);
 Changed |= setRetNoUndef(F);
 Changed |= setDoesNotThrow(F);
 Changed |= setRetDoesNotAlias(F);
@@ -584,6 +612,7 @@ bool llvm::inferLibFuncAttributes(Function &F, const 
TargetLibraryInfo &TLI) {
 Changed |= setDoesNotCapture(F, 0);
 return Changed;
   case LibFunc_free:
+Changed |= setOnlyAccessesInaccessibleMemOrArgMem(F);
 Changed |= setArgsNoUndef(F);
 Changed |= setDo

[llvm-branch-commits] [lld] 69e0bc7 - [COFF] Use range for on relocations, NFC

[Reid Kleckner via llvm-branch-commits]

Author: Reid Kleckner
Date: 2021-01-20T11:01:33-08:00
New Revision: 69e0bc77a5d74a5f0e57ad3e7a22ce4fba210b85

URL: 
https://github.com/llvm/llvm-project/commit/69e0bc77a5d74a5f0e57ad3e7a22ce4fba210b85
DIFF: 
https://github.com/llvm/llvm-project/commit/69e0bc77a5d74a5f0e57ad3e7a22ce4fba210b85.diff

LOG: [COFF] Use range for on relocations, NFC

Added: 


Modified: 
lld/COFF/Chunks.cpp

Removed: 




diff  --git a/lld/COFF/Chunks.cpp b/lld/COFF/Chunks.cpp
index e04ceed505c2..9d60bc746c96 100644
--- a/lld/COFF/Chunks.cpp
+++ b/lld/COFF/Chunks.cpp
@@ -357,9 +357,7 @@ void SectionChunk::writeTo(uint8_t *buf) const {
 
   // Apply relocations.
   size_t inputSize = getSize();
-  for (size_t i = 0, e = relocsSize; i < e; i++) {
-const coff_relocation &rel = relocsData[i];
-
+  for (const coff_relocation &rel : getRelocs()) {
 // Check for an invalid relocation offset. This check isn't perfect, 
because
 // we don't have the relocation size, which is only known after checking 
the
 // machine and relocation type. As a result, a relocation may overwrite the
@@ -451,8 +449,7 @@ static uint8_t getBaserelType(const coff_relocation &rel) {
 // fixed by the loader if load-time relocation is needed.
 // Only called when base relocation is enabled.
 void SectionChunk::getBaserels(std::vector *res) {
-  for (size_t i = 0, e = relocsSize; i < e; i++) {
-const coff_relocation &rel = relocsData[i];
+  for (const coff_relocation &rel : getRelocs()) {
 uint8_t ty = getBaserelType(rel);
 if (ty == IMAGE_REL_BASED_ABSOLUTE)
   continue;



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[llvm-branch-commits] [clang] b270fd5 - Revert "[clang] Change builtin object size when subobject is invalid"

[George Burgess IV via llvm-branch-commits]

Author: George Burgess IV
Date: 2021-01-20T11:03:34-08:00
New Revision: b270fd59f0a86fe737853abc43e76b9d29a67eea

URL: 
https://github.com/llvm/llvm-project/commit/b270fd59f0a86fe737853abc43e76b9d29a67eea
DIFF: 
https://github.com/llvm/llvm-project/commit/b270fd59f0a86fe737853abc43e76b9d29a67eea.diff

LOG: Revert "[clang] Change builtin object size when subobject is invalid"

This reverts commit 275f30df8ad6de75e1f29e4b33eaeb67686caf0d.

As noted on the code review (https://reviews.llvm.org/D92892), this
change causes us to reject valid code in a few cases. Reverting so we
have more time to figure out what the right fix{es are, is} here.

Added: 


Modified: 
clang/lib/AST/ExprConstant.cpp
clang/test/CodeGen/object-size.c

Removed: 




diff  --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp
index b153e22259f79..56181bbe11668 100644
--- a/clang/lib/AST/ExprConstant.cpp
+++ b/clang/lib/AST/ExprConstant.cpp
@@ -11408,9 +11408,9 @@ static bool tryEvaluateBuiltinObjectSize(const Expr *E, 
unsigned Type,
   return false;
   }
 
-  // If we point outside of the object, there are no accessible bytes.
-  if (LVal.getLValueOffset().isNegative() ||
-  ((Type & 1) && !LVal.Designator.isValidSubobject())) {
+  // If we point to before the start of the object, there are no accessible
+  // bytes.
+  if (LVal.getLValueOffset().isNegative()) {
 Size = 0;
 return true;
   }

diff  --git a/clang/test/CodeGen/object-size.c 
b/clang/test/CodeGen/object-size.c
index dbf2861384546..ff54b11a0f042 100644
--- a/clang/test/CodeGen/object-size.c
+++ b/clang/test/CodeGen/object-size.c
@@ -310,7 +310,7 @@ void test24() {
 void test25() {
   // CHECK: call i64 @llvm.objectsize.i64.p0i8(i8* {{.*}}, i1 false, i1 true, 
i1
   gi = OBJECT_SIZE_BUILTIN((void*)0x1000, 0);
-  // CHECK: store i32 0
+  // CHECK: call i64 @llvm.objectsize.i64.p0i8(i8* {{.*}}, i1 false, i1 true, 
i1
   gi = OBJECT_SIZE_BUILTIN((void*)0x1000, 1);
   // CHECK: call i64 @llvm.objectsize.i64.p0i8(i8* {{.*}}, i1 true, i1 true, i1
   gi = OBJECT_SIZE_BUILTIN((void*)0x1000, 2);
@@ -321,7 +321,7 @@ void test25() {
 
   // CHECK: call i64 @llvm.objectsize.i64.p0i8(i8* {{.*}}, i1 false, i1 true, 
i1
   gi = OBJECT_SIZE_BUILTIN((void*)0 + 0x1000, 0);
-  // CHECK: store i32 0
+  // CHECK: call i64 @llvm.objectsize.i64.p0i8(i8* {{.*}}, i1 false, i1 true, 
i1
   gi = OBJECT_SIZE_BUILTIN((void*)0 + 0x1000, 1);
   // CHECK: call i64 @llvm.objectsize.i64.p0i8(i8* {{.*}}, i1 true, i1 true, i1
   gi = OBJECT_SIZE_BUILTIN((void*)0 + 0x1000, 2);
@@ -337,7 +337,7 @@ void test26() {
 
   // CHECK: store i32 316
   gi = OBJECT_SIZE_BUILTIN(&t[1].v[11], 0);
-  // CHECK: store i32 0
+  // CHECK: store i32 312
   gi = OBJECT_SIZE_BUILTIN(&t[1].v[12], 1);
   // CHECK: store i32 308
   gi = OBJECT_SIZE_BUILTIN(&t[1].v[13], 2);
@@ -433,7 +433,7 @@ void test29(struct DynStructVar *dv, struct DynStruct0 *d0,
 
   // CHECK: call i64 @llvm.objectsize.i64.p0i8(i8* %{{.*}}, i1 false, i1 true, 
i1
   gi = OBJECT_SIZE_BUILTIN(d0->snd, 0);
-  // CHECK: store i32 0
+  // CHECK: call i64 @llvm.objectsize.i64.p0i8(i8* %{{.*}}, i1 false, i1 true, 
i1
   gi = OBJECT_SIZE_BUILTIN(d0->snd, 1);
   // CHECK: call i64 @llvm.objectsize.i64.p0i8(i8* %{{.*}}, i1 true, i1 true, 
i1
   gi = OBJECT_SIZE_BUILTIN(d0->snd, 2);
@@ -518,7 +518,7 @@ void test31() {
   // CHECK: call i64 @llvm.objectsize.i64.p0i8(i8* %{{.*}}, i1 false, i1 true, 
i1
   gi = OBJECT_SIZE_BUILTIN(&ds1[9].snd[0], 1);
 
-  // CHECK: store i32 0
+  // CHECK: call i64 @llvm.objectsize.i64.p0i8(i8* %{{.*}}, i1 false, i1 true, 
i1
   gi = OBJECT_SIZE_BUILTIN(&ds0[9].snd[0], 1);
 
   // CHECK: call i64 @llvm.objectsize.i64.p0i8(i8* %{{.*}}, i1 false, i1 true, 
i1



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[llvm-branch-commits] [llvm] e8aec76 - [NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor

[Mircea Trofin via llvm-branch-commits]

Author: Mircea Trofin
Date: 2021-01-20T11:07:36-08:00
New Revision: e8aec763a57e211420dfceb2a8dc6b88574924f3

URL: 
https://github.com/llvm/llvm-project/commit/e8aec763a57e211420dfceb2a8dc6b88574924f3
DIFF: 
https://github.com/llvm/llvm-project/commit/e8aec763a57e211420dfceb2a8dc6b88574924f3.diff

LOG: [NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor

When using 2 InlinePass instances in the same CGSCC - one for other
mandatory inlinings, the other for the heuristic-driven ones - the order
in which the ImportedFunctionStats would be output-ed would depend on
the destruction order of the inline passes, which is not deterministic.

This patch moves the ImportedFunctionStats responsibility to the
InlineAdvisor to address this problem.

Differential Revision: https://reviews.llvm.org/D94982

Added: 


Modified: 
llvm/include/llvm/Analysis/InlineAdvisor.h
llvm/include/llvm/Analysis/MLInlineAdvisor.h
llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
llvm/include/llvm/Transforms/IPO/Inliner.h
llvm/include/llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h
llvm/lib/Analysis/InlineAdvisor.cpp
llvm/lib/Analysis/MLInlineAdvisor.cpp
llvm/lib/Analysis/ReplayInlineAdvisor.cpp
llvm/lib/Transforms/IPO/Inliner.cpp
llvm/lib/Transforms/IPO/SampleProfile.cpp
llvm/lib/Transforms/Utils/ImportedFunctionsInliningStatistics.cpp
llvm/test/Transforms/Inline/inline_stats.ll

Removed: 




diff  --git a/llvm/include/llvm/Analysis/InlineAdvisor.h 
b/llvm/include/llvm/Analysis/InlineAdvisor.h
index 295e677126d66..5946db3103f00 100644
--- a/llvm/include/llvm/Analysis/InlineAdvisor.h
+++ b/llvm/include/llvm/Analysis/InlineAdvisor.h
@@ -12,6 +12,7 @@
 #include "llvm/Analysis/InlineCost.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/IR/PassManager.h"
+#include "llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h"
 #include 
 #include 
 
@@ -65,10 +66,7 @@ class InlineAdvice {
   /// behavior by implementing the corresponding record*Impl.
   ///
   /// Call after inlining succeeded, and did not result in deleting the callee.
-  void recordInlining() {
-markRecorded();
-recordInliningImpl();
-  }
+  void recordInlining();
 
   /// Call after inlining succeeded, and resulted in deleting the callee.
   void recordInliningWithCalleeDeleted();
@@ -114,6 +112,7 @@ class InlineAdvice {
 assert(!Recorded && "Recording should happen exactly once");
 Recorded = true;
   }
+  void recordInlineStatsIfNeeded();
 
   bool Recorded = false;
 };
@@ -141,7 +140,7 @@ class DefaultInlineAdvice : public InlineAdvice {
 class InlineAdvisor {
 public:
   InlineAdvisor(InlineAdvisor &&) = delete;
-  virtual ~InlineAdvisor() { freeDeletedFunctions(); }
+  virtual ~InlineAdvisor();
 
   /// Get an InlineAdvice containing a recommendation on whether to
   /// inline or not. \p CB is assumed to be a direct call. \p FAM is assumed to
@@ -163,12 +162,14 @@ class InlineAdvisor {
   virtual void onPassExit() {}
 
 protected:
-  InlineAdvisor(FunctionAnalysisManager &FAM) : FAM(FAM) {}
+  InlineAdvisor(Module &M, FunctionAnalysisManager &FAM);
   virtual std::unique_ptr getAdviceImpl(CallBase &CB) = 0;
   virtual std::unique_ptr getMandatoryAdvice(CallBase &CB,
bool Advice);
 
+  Module &M;
   FunctionAnalysisManager &FAM;
+  std::unique_ptr ImportedFunctionsStats;
 
   /// We may want to defer deleting functions to after the inlining for a whole
   /// module has finished. This allows us to reliably use function pointers as
@@ -202,8 +203,9 @@ class InlineAdvisor {
 /// reusable as-is for inliner pass test scenarios, as well as for regular use.
 class DefaultInlineAdvisor : public InlineAdvisor {
 public:
-  DefaultInlineAdvisor(FunctionAnalysisManager &FAM, InlineParams Params)
-  : InlineAdvisor(FAM), Params(Params) {}
+  DefaultInlineAdvisor(Module &M, FunctionAnalysisManager &FAM,
+   InlineParams Params)
+  : InlineAdvisor(M, FAM), Params(Params) {}
 
 private:
   std::unique_ptr getAdviceImpl(CallBase &CB) override;

diff  --git a/llvm/include/llvm/Analysis/MLInlineAdvisor.h 
b/llvm/include/llvm/Analysis/MLInlineAdvisor.h
index 1afccf84ee482..54edbb823263b 100644
--- a/llvm/include/llvm/Analysis/MLInlineAdvisor.h
+++ b/llvm/include/llvm/Analysis/MLInlineAdvisor.h
@@ -50,7 +50,6 @@ class MLInlineAdvisor : public InlineAdvisor {
   virtual std::unique_ptr
   getAdviceFromModel(CallBase &CB, OptimizationRemarkEmitter &ORE);
 
-  Module &M;
   std::unique_ptr ModelRunner;
 
 private:

diff  --git a/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h 
b/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
index 7e2b0957436d1..9ef572f7ab87e 100644
--- a/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
+++ b/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
@@ -24,8 +24,9 @@ class OptimizationRemarkEmit

[llvm-branch-commits] [llvm] a512260 - Revert "[DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE"

[Hans Wennborg via llvm-branch-commits]

Author: Hans Wennborg
Date: 2021-01-20T20:06:55+01:00
New Revision: a51226057fc30510ac86b32a36a9769ddbf4c318

URL: 
https://github.com/llvm/llvm-project/commit/a51226057fc30510ac86b32a36a9769ddbf4c318
DIFF: 
https://github.com/llvm/llvm-project/commit/a51226057fc30510ac86b32a36a9769ddbf4c318.diff

LOG: Revert "[DAGCombiner] Enable SimplifyDemandedBits vector support for 
TRUNCATE"

It caused "Vector shift amounts must be in the same as their first arg"
asserts in Chromium builds. See the code review for repro instructions.

> Add DemandedElts support inside the TRUNCATE analysis.
>
> Differential Revision: https://reviews.llvm.org/D56387

This reverts commit cad4275d697c601761e0819863f487def73c67f8.

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/aarch64-smull.ll
llvm/test/CodeGen/AArch64/lowerMUL-newload.ll
llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
llvm/test/CodeGen/ARM/lowerMUL-newload.ll
llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
llvm/test/CodeGen/Thumb2/mve-vmulh.ll
llvm/test/CodeGen/X86/combine-sra.ll
llvm/test/CodeGen/X86/known-signbits-vector.ll
llvm/test/CodeGen/X86/min-legal-vector-width.ll
llvm/test/CodeGen/X86/vector-trunc.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 6806625361610..f7c6a77b9a03b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -11952,7 +11952,8 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
   }
 
   // Simplify the operands using demanded-bits information.
-  if (SimplifyDemandedBits(SDValue(N, 0)))
+  if (!VT.isVector() &&
+  SimplifyDemandedBits(SDValue(N, 0)))
 return SDValue(N, 0);
 
   // (trunc adde(X, Y, Carry)) -> (adde trunc(X), trunc(Y), Carry)

diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp 
b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 5613db8f724d9..b19033e3e4278 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1986,8 +1986,7 @@ bool TargetLowering::SimplifyDemandedBits(
 // zero/one bits live out.
 unsigned OperandBitWidth = Src.getScalarValueSizeInBits();
 APInt TruncMask = DemandedBits.zext(OperandBitWidth);
-if (SimplifyDemandedBits(Src, TruncMask, DemandedElts, Known, TLO,
- Depth + 1))
+if (SimplifyDemandedBits(Src, TruncMask, Known, TLO, Depth + 1))
   return true;
 Known = Known.trunc(BitWidth);
 
@@ -2010,9 +2009,9 @@ bool TargetLowering::SimplifyDemandedBits(
   // undesirable.
   break;
 
-const APInt *ShAmtC =
-TLO.DAG.getValidShiftAmountConstant(Src, DemandedElts);
-if (!ShAmtC)
+SDValue ShAmt = Src.getOperand(1);
+auto *ShAmtC = dyn_cast(ShAmt);
+if (!ShAmtC || ShAmtC->getAPIntValue().uge(BitWidth))
   break;
 uint64_t ShVal = ShAmtC->getZExtValue();
 
@@ -2024,7 +2023,6 @@ bool TargetLowering::SimplifyDemandedBits(
 if (!(HighBits & DemandedBits)) {
   // None of the shifted in bits are needed.  Add a truncate of the
   // shift input, then shift it.
-  SDValue ShAmt = Src.getOperand(1);
   if (TLO.LegalTypes())
 ShAmt = TLO.DAG.getConstant(ShVal, dl, getShiftAmountTy(VT, DL));
   SDValue NewTrunc =

diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp 
b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 6dd081dc3cb7c..c7bcd4de046c5 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -3399,7 +3399,6 @@ static SDValue skipExtensionForVectorMULL(SDNode *N, 
SelectionDAG &DAG) {
 
 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) {
   return N->getOpcode() == ISD::SIGN_EXTEND ||
- N->getOpcode() == ISD::ANY_EXTEND ||
  isExtendedBUILD_VECTOR(N, DAG, true);
 }
 

diff  --git a/llvm/test/CodeGen/AArch64/aarch64-smull.ll 
b/llvm/test/CodeGen/AArch64/aarch64-smull.ll
index 0c232a4bf5a88..0a692192ec8bc 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-smull.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-smull.ll
@@ -96,7 +96,7 @@ define <8 x i16> @amull_v8i8_v8i16(<8 x i8>* %A, <8 x i8>* 
%B) nounwind {
 ; CHECK:   // %bb.0:
 ; CHECK-NEXT:ldr d0, [x0]
 ; CHECK-NEXT:ldr d1, [x1]
-; CHECK-NEXT:smull v0.8h, v0.8b, v1.8b
+; CHECK-NEXT:umull v0.8h, v0.8b, v1.8b
 ; CHECK-NEXT:bic v0.8h, #255, lsl #8
 ; CHECK-NEXT:ret
   %tmp1 = load <8 x i8>, <8 x i8>* %A
@@ -113,7 +113,7 @@ define <4 x i32> @amull_v4i16_v4i32(<4 x i16>* %A, <4 x 
i16>* %B) nounwind {
 ; CHECK:   // %bb.0:
 ; CHECK-NEXT:ldr d0, [

[llvm-branch-commits] [flang] ff3b51b - [flang] Fix ASSOCIATE statement name resolution

[peter klausler via llvm-branch-commits]

Author: peter klausler
Date: 2021-01-20T11:18:27-08:00
New Revision: ff3b51b0549343b6ef7d718e036116d5b502458c

URL: 
https://github.com/llvm/llvm-project/commit/ff3b51b0549343b6ef7d718e036116d5b502458c
DIFF: 
https://github.com/llvm/llvm-project/commit/ff3b51b0549343b6ef7d718e036116d5b502458c.diff

LOG: [flang] Fix ASSOCIATE statement name resolution

F18 Clause 19.4p9 says:

  The associate names of an ASSOCIATE construct have the scope of the
  block.

Clause 11.3.1p1 says the ASSOCIATE statement is not itself in the block:

  R1102 associate-construct is:  associate-stmt block end-associate-stmt

Associate statement associations are currently fully processed from left
to right, incorrectly interposing associating entities earlier in the
list on same-named entities in the host scope.

1  program p
2logical :: a = .false.
3real :: b = 9.73
4associate (b => a, a => b)
5  print*, a, b
6end associate
7print*, a, b
8  end

Associating names 'a' and 'b' at line 4 in this code are now both
aliased to logical host entity 'a' at line 2.  This happens because the
reference to 'b' in the second association incorrectly resolves 'b' to
the entity in line 4 (already associated to 'a' at line 2), rather than
the 'b' at line 3.  With bridge code to process these associations,
f18 output is:

 F F
 F 9.73

It should be:

 9.73 F
 F 9.73

To fix this, names in right-hand side selector variables/expressions
must all be resolved before any left-hand side entities are resolved.
This is done by maintaining a stack of lists of associations, rather
than a stack of associations.  Each ASSOCIATE statement's list of
assocations is then visited once for right-hand side processing, and
once for left-hand side processing.

Note that other construct associations do not have this problem.
SELECT RANK and SELECT TYPE each have a single assocation, not a list.
Constraint C1113 prohibits the right-hand side of a CHANGE TEAM
association from referencing any left-hand side entity.

Differential Revision: https://reviews.llvm.org/D95010

Added: 
flang/test/Semantics/resolve100.f90

Modified: 
flang/lib/Semantics/resolve-names.cpp

Removed: 




diff  --git a/flang/lib/Semantics/resolve-names.cpp 
b/flang/lib/Semantics/resolve-names.cpp
index 5d9ee35b79b3..3bc9a85cbf41 100644
--- a/flang/lib/Semantics/resolve-names.cpp
+++ b/flang/lib/Semantics/resolve-names.cpp
@@ -1010,9 +1010,9 @@ class ConstructVisitor : public virtual 
DeclarationVisitor {
   bool Pre(const parser::BlockStmt &);
   bool Pre(const parser::EndBlockStmt &);
   void Post(const parser::Selector &);
-  bool Pre(const parser::AssociateStmt &);
+  void Post(const parser::AssociateStmt &);
   void Post(const parser::EndAssociateStmt &);
-  void Post(const parser::Association &);
+  bool Pre(const parser::Association &);
   void Post(const parser::SelectTypeStmt &);
   void Post(const parser::SelectRankStmt &);
   bool Pre(const parser::SelectTypeConstruct &);
@@ -1081,6 +1081,7 @@ class ConstructVisitor : public virtual 
DeclarationVisitor {
 Selector selector;
   };
   std::vector associationStack_;
+  Association *currentAssociation_{nullptr};
 
   template  bool CheckDef(const T &t) {
 return CheckDef(std::get>(t));
@@ -1098,9 +1099,10 @@ class ConstructVisitor : public virtual 
DeclarationVisitor {
   void SetAttrsFromAssociation(Symbol &);
   Selector ResolveSelector(const parser::Selector &);
   void ResolveIndexName(const parser::ConcurrentControl &control);
+  void SetCurrentAssociation(std::size_t n);
   Association &GetCurrentAssociation();
   void PushAssociation();
-  void PopAssociation();
+  void PopAssociation(std::size_t count = 1);
 };
 
 // Create scopes for OpenACC constructs
@@ -5153,29 +5155,33 @@ void ConstructVisitor::Post(const parser::Selector &x) {
   GetCurrentAssociation().selector = ResolveSelector(x);
 }
 
-bool ConstructVisitor::Pre(const parser::AssociateStmt &x) {
+void ConstructVisitor::Post(const parser::AssociateStmt &x) {
   CheckDef(x.t);
   PushScope(Scope::Kind::Block, nullptr);
-  PushAssociation();
-  return true;
+  const auto assocCount{std::get>(x.t).size()};
+  for (auto nthLastAssoc{assocCount}; nthLastAssoc > 0; --nthLastAssoc) {
+SetCurrentAssociation(nthLastAssoc);
+if (auto *symbol{MakeAssocEntity()}) {
+  if (ExtractCoarrayRef(GetCurrentAssociation().selector.expr)) { // C1103
+Say("Selector must not be a coindexed object"_err_en_US);
+  }
+  SetTypeFromAssociation(*symbol);
+  SetAttrsFromAssociation(*symbol);
+}
+  }
+  PopAssociation(assocCount);
 }
+
 void ConstructVisitor::Post(const parser::EndAssociateStmt &x) {
-  PopAssociation();
   PopScope();
   CheckRef(x.v);
 }
 
-void ConstructVisitor::Post(const parser::Association &x) {
+bool ConstructVisitor::Pre(const parser::Association &x) {
+  PushAssociation();
   const auto &name{st

[llvm-branch-commits] [llvm] d97f776 - Revert "[NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor"

[Mircea Trofin via llvm-branch-commits]

Author: Mircea Trofin
Date: 2021-01-20T11:19:34-08:00
New Revision: d97f776be5f8cd3cd446fe73827cd355f6bab4e1

URL: 
https://github.com/llvm/llvm-project/commit/d97f776be5f8cd3cd446fe73827cd355f6bab4e1
DIFF: 
https://github.com/llvm/llvm-project/commit/d97f776be5f8cd3cd446fe73827cd355f6bab4e1.diff

LOG: Revert "[NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor"

This reverts commit e8aec763a57e211420dfceb2a8dc6b88574924f3.

Added: 


Modified: 
llvm/include/llvm/Analysis/InlineAdvisor.h
llvm/include/llvm/Analysis/MLInlineAdvisor.h
llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
llvm/include/llvm/Transforms/IPO/Inliner.h
llvm/include/llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h
llvm/lib/Analysis/InlineAdvisor.cpp
llvm/lib/Analysis/MLInlineAdvisor.cpp
llvm/lib/Analysis/ReplayInlineAdvisor.cpp
llvm/lib/Transforms/IPO/Inliner.cpp
llvm/lib/Transforms/IPO/SampleProfile.cpp
llvm/lib/Transforms/Utils/ImportedFunctionsInliningStatistics.cpp
llvm/test/Transforms/Inline/inline_stats.ll

Removed: 




diff  --git a/llvm/include/llvm/Analysis/InlineAdvisor.h 
b/llvm/include/llvm/Analysis/InlineAdvisor.h
index 5946db3103f0..295e677126d6 100644
--- a/llvm/include/llvm/Analysis/InlineAdvisor.h
+++ b/llvm/include/llvm/Analysis/InlineAdvisor.h
@@ -12,7 +12,6 @@
 #include "llvm/Analysis/InlineCost.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/IR/PassManager.h"
-#include "llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h"
 #include 
 #include 
 
@@ -66,7 +65,10 @@ class InlineAdvice {
   /// behavior by implementing the corresponding record*Impl.
   ///
   /// Call after inlining succeeded, and did not result in deleting the callee.
-  void recordInlining();
+  void recordInlining() {
+markRecorded();
+recordInliningImpl();
+  }
 
   /// Call after inlining succeeded, and resulted in deleting the callee.
   void recordInliningWithCalleeDeleted();
@@ -112,7 +114,6 @@ class InlineAdvice {
 assert(!Recorded && "Recording should happen exactly once");
 Recorded = true;
   }
-  void recordInlineStatsIfNeeded();
 
   bool Recorded = false;
 };
@@ -140,7 +141,7 @@ class DefaultInlineAdvice : public InlineAdvice {
 class InlineAdvisor {
 public:
   InlineAdvisor(InlineAdvisor &&) = delete;
-  virtual ~InlineAdvisor();
+  virtual ~InlineAdvisor() { freeDeletedFunctions(); }
 
   /// Get an InlineAdvice containing a recommendation on whether to
   /// inline or not. \p CB is assumed to be a direct call. \p FAM is assumed to
@@ -162,14 +163,12 @@ class InlineAdvisor {
   virtual void onPassExit() {}
 
 protected:
-  InlineAdvisor(Module &M, FunctionAnalysisManager &FAM);
+  InlineAdvisor(FunctionAnalysisManager &FAM) : FAM(FAM) {}
   virtual std::unique_ptr getAdviceImpl(CallBase &CB) = 0;
   virtual std::unique_ptr getMandatoryAdvice(CallBase &CB,
bool Advice);
 
-  Module &M;
   FunctionAnalysisManager &FAM;
-  std::unique_ptr ImportedFunctionsStats;
 
   /// We may want to defer deleting functions to after the inlining for a whole
   /// module has finished. This allows us to reliably use function pointers as
@@ -203,9 +202,8 @@ class InlineAdvisor {
 /// reusable as-is for inliner pass test scenarios, as well as for regular use.
 class DefaultInlineAdvisor : public InlineAdvisor {
 public:
-  DefaultInlineAdvisor(Module &M, FunctionAnalysisManager &FAM,
-   InlineParams Params)
-  : InlineAdvisor(M, FAM), Params(Params) {}
+  DefaultInlineAdvisor(FunctionAnalysisManager &FAM, InlineParams Params)
+  : InlineAdvisor(FAM), Params(Params) {}
 
 private:
   std::unique_ptr getAdviceImpl(CallBase &CB) override;

diff  --git a/llvm/include/llvm/Analysis/MLInlineAdvisor.h 
b/llvm/include/llvm/Analysis/MLInlineAdvisor.h
index 54edbb823263..1afccf84ee48 100644
--- a/llvm/include/llvm/Analysis/MLInlineAdvisor.h
+++ b/llvm/include/llvm/Analysis/MLInlineAdvisor.h
@@ -50,6 +50,7 @@ class MLInlineAdvisor : public InlineAdvisor {
   virtual std::unique_ptr
   getAdviceFromModel(CallBase &CB, OptimizationRemarkEmitter &ORE);
 
+  Module &M;
   std::unique_ptr ModelRunner;
 
 private:

diff  --git a/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h 
b/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
index 9ef572f7ab87..7e2b0957436d 100644
--- a/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
+++ b/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
@@ -24,9 +24,8 @@ class OptimizationRemarkEmitter;
 /// previous build to guide current inlining. This is useful for inliner 
tuning.
 class ReplayInlineAdvisor : public InlineAdvisor {
 public:
-  ReplayInlineAdvisor(Module &M, FunctionAnalysisManager &FAM,
-  LLVMContext &Context, StringRef RemarksFile,
-  bool EmitRemarks);
+  ReplayInlineAdvisor(FunctionAnalysisManager &FAM, LLV

[llvm-branch-commits] [lld] b3e73dc - [lld-macho][easy] Create group for LLD-specific CLI flags

[Jez Ng via llvm-branch-commits]

Author: Jez Ng
Date: 2021-01-20T14:21:31-05:00
New Revision: b3e73dc5af6b4d1438ea401a7ab60bfe298a53c6

URL: 
https://github.com/llvm/llvm-project/commit/b3e73dc5af6b4d1438ea401a7ab60bfe298a53c6
DIFF: 
https://github.com/llvm/llvm-project/commit/b3e73dc5af6b4d1438ea401a7ab60bfe298a53c6.diff

LOG: [lld-macho][easy] Create group for LLD-specific CLI flags

Reviewed By: #lld-macho, compnerd

Differential Revision: https://reviews.llvm.org/D94545

Added: 


Modified: 
lld/MachO/Options.td

Removed: 




diff  --git a/lld/MachO/Options.td b/lld/MachO/Options.td
index 2ea4c53e0166..af497884eb9e 100644
--- a/lld/MachO/Options.td
+++ b/lld/MachO/Options.td
@@ -3,23 +3,32 @@ include "llvm/Option/OptParser.td"
 // Flags that lld/MachO understands but ld64 doesn't. These take
 // '--' instead of '-' and use dashes instead of underscores, so
 // they don't collide with the ld64 compat options.
+def grp_lld : OptionGroup<"kind">, HelpText<"LLD-SPECIFIC">;
 
-def help : Flag<["-", "--"], "help">;
+def help : Flag<["-", "--"], "help">,
+Group;
 def help_hidden : Flag<["--"], "help-hidden">,
-  HelpText<"Display help for hidden options">;
+HelpText<"Display help for hidden options">,
+Group;
 def color_diagnostics: Flag<["--"], "color-diagnostics">,
-  HelpText<"Alias for --color-diagnostics=always">;
+HelpText<"Alias for --color-diagnostics=always">,
+Group;
 def no_color_diagnostics: Flag<["--"], "no-color-diagnostics">,
-  HelpText<"Alias for --color-diagnostics=never">;
+HelpText<"Alias for --color-diagnostics=never">,
+Group;
 def color_diagnostics_eq: Joined<["--"], "color-diagnostics=">,
-  HelpText<"Use colors in diagnostics (default: auto)">,
-  MetaVarName<"[auto,always,never]">;
-def reproduce: Separate<["--"], "reproduce">;
+HelpText<"Use colors in diagnostics (default: auto)">,
+MetaVarName<"[auto,always,never]">,
+Group;
+def reproduce: Separate<["--"], "reproduce">,
+Group;
 def reproduce_eq: Joined<["--"], "reproduce=">,
 Alias(reproduce)>,
-HelpText<"Write tar file containing inputs and command to reproduce link">;
+HelpText<"Write tar file containing inputs and command to reproduce link">,
+Group;
 def version: Flag<["--"], "version">,
-HelpText<"Display the version number and exit">;
+HelpText<"Display the version number and exit">,
+Group;
 
 
 // This is a complete Options.td compiled from Apple's ld(1) manpage



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[llvm-branch-commits] [llvm] 697f4e4 - [lld-macho] Run ObjCContractPass during LTO

[Jez Ng via llvm-branch-commits]

Author: Jez Ng
Date: 2021-01-20T14:21:32-05:00
New Revision: 697f4e429b900d2d3d8a03713c7d6cd562a5bd35

URL: 
https://github.com/llvm/llvm-project/commit/697f4e429b900d2d3d8a03713c7d6cd562a5bd35
DIFF: 
https://github.com/llvm/llvm-project/commit/697f4e429b900d2d3d8a03713c7d6cd562a5bd35.diff

LOG: [lld-macho] Run ObjCContractPass during LTO

Run the ObjCARCContractPass during LTO. The legacy LTO backend (under
LTO/ThinLTOCodeGenerator.cpp) already does this; this diff just adds that
behavior to the new LTO backend. Without that pass, the objc.clang.arc.use
intrinsic will get passed to the instruction selector, which doesn't know how to
handle it.

In order to test both the new and old pass managers, I've also added support for
the `--[no-]lto-legacy-pass-manager` flags.

P.S. Not sure if the ordering of the pass within the pipeline matters...

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D94547

Added: 
lld/test/MachO/objc-arc-contract.ll

Modified: 
lld/MachO/Config.h
lld/MachO/Driver.cpp
lld/MachO/LTO.cpp
lld/MachO/Options.td
llvm/include/llvm/LTO/Config.h
llvm/lib/LTO/LTOBackend.cpp

Removed: 




diff  --git a/lld/MachO/Config.h b/lld/MachO/Config.h
index 4f27ec2db45f..f6e1f134d974 100644
--- a/lld/MachO/Config.h
+++ b/lld/MachO/Config.h
@@ -47,6 +47,7 @@ struct Configuration {
   bool implicitDylibs = false;
   bool isPic = false;
   bool headerPadMaxInstallNames = false;
+  bool ltoNewPassManager = LLVM_ENABLE_NEW_PASS_MANAGER;
   bool printEachFile = false;
   bool printWhyLoad = false;
   bool searchDylibsFirst = false;

diff  --git a/lld/MachO/Driver.cpp b/lld/MachO/Driver.cpp
index 857c9991a8e6..1b337f38f7ba 100644
--- a/lld/MachO/Driver.cpp
+++ b/lld/MachO/Driver.cpp
@@ -733,6 +733,9 @@ bool macho::link(ArrayRef argsArr, bool 
canExitEarly,
   config->printWhyLoad = args.hasArg(OPT_why_load);
   config->outputType = getOutputType(args);
   config->ltoObjPath = args.getLastArgValue(OPT_object_path_lto);
+  config->ltoNewPassManager =
+  args.hasFlag(OPT_no_lto_legacy_pass_manager, OPT_lto_legacy_pass_manager,
+   LLVM_ENABLE_NEW_PASS_MANAGER);
   config->runtimePaths = args::getStrings(args, OPT_rpath);
   config->allLoad = args.hasArg(OPT_all_load);
   config->forceLoadObjC = args.hasArg(OPT_ObjC);

diff  --git a/lld/MachO/LTO.cpp b/lld/MachO/LTO.cpp
index 7554693f15e4..f48bc24df3d7 100644
--- a/lld/MachO/LTO.cpp
+++ b/lld/MachO/LTO.cpp
@@ -18,6 +18,7 @@
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/Transforms/ObjCARC.h"
 
 using namespace lld;
 using namespace lld::macho;
@@ -30,6 +31,10 @@ static lto::Config createConfig() {
   c.CodeModel = getCodeModelFromCMModel();
   c.CPU = getCPUStr();
   c.MAttrs = getMAttrs();
+  c.UseNewPM = config->ltoNewPassManager;
+  c.PreCodeGenPassesHook = [](legacy::PassManager &pm) {
+pm.add(createObjCARCContractPass());
+  };
   return c;
 }
 

diff  --git a/lld/MachO/Options.td b/lld/MachO/Options.td
index af497884eb9e..89473acebdb2 100644
--- a/lld/MachO/Options.td
+++ b/lld/MachO/Options.td
@@ -29,6 +29,12 @@ def reproduce_eq: Joined<["--"], "reproduce=">,
 def version: Flag<["--"], "version">,
 HelpText<"Display the version number and exit">,
 Group;
+def lto_legacy_pass_manager: Flag<["--"], "lto-legacy-pass-manager">,
+HelpText<"Use the legacy pass manager in LLVM">,
+Group;
+def no_lto_legacy_pass_manager : Flag<["--"], "no-lto-legacy-pass-manager">,
+HelpText<"Use the new pass manager in LLVM">,
+Group;
 
 
 // This is a complete Options.td compiled from Apple's ld(1) manpage

diff  --git a/lld/test/MachO/objc-arc-contract.ll 
b/lld/test/MachO/objc-arc-contract.ll
new file mode 100644
index ..66f30dc60c49
--- /dev/null
+++ b/lld/test/MachO/objc-arc-contract.ll
@@ -0,0 +1,30 @@
+; REQUIRES: x86
+
+;; Verify that we run the ObjCARCContractPass during LTO. Without that, the
+;; objc.clang.arc.use intrinsic will get passed to the instruction selector,
+;; which doesn't know how to handle it.
+
+; RUN: llvm-as %s -o %t.o
+; RUN: %lld -dylib -lSystem %t.o -o %t --lto-legacy-pass-manager
+; RUN: llvm-objdump -d %t | FileCheck %s
+; RUN: %lld -dylib -lSystem %t.o -o %t --no-lto-legacy-pass-manager
+; RUN: llvm-objdump -d %t | FileCheck %s
+
+; RUN: opt -module-summary %s -o %t.o
+; RUN: %lld -dylib -lSystem %t.o -o %t --lto-legacy-pass-manager
+; RUN: llvm-objdump -d %t | FileCheck %s
+; RUN: %lld -dylib -lSystem %t.o -o %t --no-lto-legacy-pass-manager
+; RUN: llvm-objdump -d %t | FileCheck %s
+
+; CHECK:  <_foo>:
+; CHECK-NEXT: retq
+
+target triple = "x86_64-apple-darwin"
+target datalayout = 
"e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @foo(i8* %a, i8* %b) {
+  call void (...) @llvm.objc.clang.arc.use(i8* %a, i8* %b) nounwind
+  ret void
+}

[llvm-branch-commits] [mlir] f5d8eb0 - [mlir][Linalg] NFC - getAssumedNonShapedOperands now returns OperandRange

[Nicolas Vasilache via llvm-branch-commits]

Author: Nicolas Vasilache
Date: 2021-01-20T19:23:26Z
New Revision: f5d8eb085af97c6d873edf3ca16d85b8a97c67e6

URL: 
https://github.com/llvm/llvm-project/commit/f5d8eb085af97c6d873edf3ca16d85b8a97c67e6
DIFF: 
https://github.com/llvm/llvm-project/commit/f5d8eb085af97c6d873edf3ca16d85b8a97c67e6.diff

LOG: [mlir][Linalg] NFC - getAssumedNonShapedOperands now returns OperandRange

Also adds a isInput interface method.

Added: 


Modified: 
mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td

Removed: 




diff  --git 
a/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td 
b/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
index 85133604cda0..b8009a818aa0 100644
--- a/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
+++ b/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
@@ -609,6 +609,22 @@ def LinalgStructuredInterface : OpInterface<"LinalgOp"> {
 return payloadUsesValueFromOpOperand(&getOutputOpOperands()[index]);
   }]
 >,
+InterfaceMethod<
+  /*desc=*/[{
+Return true if `opOperand` is an input tensor.
+  }],
+  /*retTy=*/"bool",
+  /*methodName=*/"isInputTensor",
+  /*args=*/(ins "OpOperand *":$opOperand),
+  /*methodBody=*/"",
+  /*defaultImplementation=*/[{
+if (!opOperand->get().getType().template isa())
+  return false;
+if (opOperand->getOperandNumber() < $_op.getNumInputs())
+  return true;
+return false;
+  }]
+>,
 InterfaceMethod<
   /*desc=*/[{
 Return true if `opOperand` is an init tensor. This is true when it is
@@ -1063,18 +1079,13 @@ def LinalgStructuredInterface : OpInterface<"LinalgOp"> 
{
 /// init_tensors operands. Asserts that these operands are value types to
 /// allow transformations like tiling to just use the values when cloning
 /// `linalgOp`.
-SmallVector getAssumedNonShapedOperands() {
-  unsigned numShapedOperands = getNumShapedOperands();
-  unsigned nExtraOperands =
-getOperation()->getNumOperands() - numShapedOperands;
-  SmallVector res;
-  res.reserve(nExtraOperands);
-  for (unsigned i = 0; i < nExtraOperands; ++i) {
-res.push_back(getOperation()->getOperand(numShapedOperands + i));
-assert((res.back().getType().isSignlessIntOrIndexOrFloat()
-|| res.back().getType().template isa()) &&
-   "expected scalar or vector type");
-  }
+Operation::operand_range getAssumedNonShapedOperands() {
+  Operation::operand_range res{
+getOperation()->getOperands().begin() + getNumShapedOperands(),
+getOperation()->getOperands().end()};
+  for (Type t : TypeRange{res})
+assert((t.isSignlessIntOrIndexOrFloat() || t.template 
isa())
+   &&"expected scalar or vector type");
   return res;
 }
 



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[llvm-branch-commits] [clang] 11802ec - [WebAssembly] Prototype new f64x2 conversions

[Thomas Lively via llvm-branch-commits]

Author: Thomas Lively
Date: 2021-01-20T11:28:06-08:00
New Revision: 11802eced5d67394c1dcb5acfaef38b0038c6d90

URL: 
https://github.com/llvm/llvm-project/commit/11802eced5d67394c1dcb5acfaef38b0038c6d90
DIFF: 
https://github.com/llvm/llvm-project/commit/11802eced5d67394c1dcb5acfaef38b0038c6d90.diff

LOG: [WebAssembly] Prototype new f64x2 conversions

As proposed in https://github.com/WebAssembly/simd/pull/383.

Differential Revision: https://reviews.llvm.org/D95012

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 080c6b5c3a40..bb7d6d379e58 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -206,6 +206,13 @@ TARGET_BUILTIN(__builtin_wasm_widen_high_s_i32x4_i64x2, 
"V2LLiV4i", "nc", "simd1
 TARGET_BUILTIN(__builtin_wasm_widen_low_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_widen_high_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
 
+TARGET_BUILTIN(__builtin_wasm_convert_low_s_i32x4_f64x2, "V2dV4i", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_convert_low_u_i32x4_f64x2, "V2dV4Ui", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4, "V4iV2d", 
"nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_trunc_saturate_zero_u_f64x2_i32x4, "V4UiV2d", 
"nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_demote_zero_f64x2_f32x4, "V4fV2d", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_promote_low_f32x4_f64x2, "V2dV4f", "nc", 
"simd128")
+
 TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "n", "simd128")
 

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 25ebb67c2ab6..113541bd5024 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17220,6 +17220,46 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo);
 return Builder.CreateCall(Callee, Vec);
   }
+  case WebAssembly::BI__builtin_wasm_convert_low_s_i32x4_f64x2:
+  case WebAssembly::BI__builtin_wasm_convert_low_u_i32x4_f64x2: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_convert_low_s_i32x4_f64x2:
+  IntNo = Intrinsic::wasm_convert_low_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_convert_low_u_i32x4_f64x2:
+  IntNo = Intrinsic::wasm_convert_low_unsigned;
+  break;
+}
+Function *Callee = CGM.getIntrinsic(IntNo);
+return Builder.CreateCall(Callee, Vec);
+  }
+  case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4:
+  case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_u_f64x2_i32x4: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4:
+  IntNo = Intrinsic::wasm_trunc_saturate_zero_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_u_f64x2_i32x4:
+  IntNo = Intrinsic::wasm_trunc_saturate_zero_unsigned;
+  break;
+}
+Function *Callee = CGM.getIntrinsic(IntNo);
+return Builder.CreateCall(Callee, Vec);
+  }
+  case WebAssembly::BI__builtin_wasm_demote_zero_f64x2_f32x4: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_demote_zero);
+return Builder.CreateCall(Callee, Vec);
+  }
+  case WebAssembly::BI__builtin_wasm_promote_low_f32x4_f64x2: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_promote_low);
+return Builder.CreateCall(Callee, Vec);
+  }
   case WebAssembly::BI__builtin_wasm_load32_zero: {
 Value *Ptr = EmitScalarExpr(E->getArg(0));
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load32_zero);

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index d8b61f5d285e..61fc76cd1873 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -976,6 +976,42 @@ u64x2 widen_high_u_i32x4_i64x2(u32x4 x) {
   // WEBASSEMBLY: ret
 }
 
+f64x2 convert_low_s_i32x4_f64x2(i32x4 x) {
+  return __builtin_wasm_convert_low_s_i32x4_f64x2(x);
+  // WEBASSEMBLY: call <2 x double> @llvm.wasm.convert.low.signed(<4 x i32> %x)
+  // WEBASSEMBLY: ret
+}
+
+f64x2 convert_low_u_i32x4_f64x2(u32x4 x) {
+  return __

[llvm-branch-commits] [clang] 8776e3f - [EXTINT][OMP] Fix _ExtInt type checking in device code

[Erich Keane via llvm-branch-commits]

Author: Erich Keane
Date: 2021-01-20T11:35:52-08:00
New Revision: 8776e3f289c19ee2e85c593792806e6503408d59

URL: 
https://github.com/llvm/llvm-project/commit/8776e3f289c19ee2e85c593792806e6503408d59
DIFF: 
https://github.com/llvm/llvm-project/commit/8776e3f289c19ee2e85c593792806e6503408d59.diff

LOG: [EXTINT][OMP] Fix _ExtInt type checking in device code

_ExtInt gets stuck in the device-type-checking for __int128 if it is
between 65 and 128 bits inclusive.  Anything larger or smaller was
permitted despite this, so this is simply enabling 65-128 bit _ExtInts.
_ExtInt is supported on all our current ABIs, but we stil use the
hasExtIntType in the target info to differentiate here so that it can be
disabled.

Added: 


Modified: 
clang/include/clang/Basic/DiagnosticSemaKinds.td
clang/lib/Sema/Sema.cpp
clang/test/OpenMP/nvptx_unsupported_type_messages.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index e93657898f58..758b2ed3e90b 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -10468,8 +10468,9 @@ def err_omp_invariant_or_linear_dependency : Error<
   "expected loop invariant expression or ' * %0 + ' 
kind of expression">;
 def err_omp_wrong_dependency_iterator_type : Error<
   "expected an integer or a pointer type of the outer loop counter '%0' for 
non-rectangular nests">;
-def err_device_unsupported_type : Error <
-  "%0 requires %1 bit size %2 type support, but device '%3' does not support 
it">;
+def err_device_unsupported_type
+: Error<"%0 requires %select{|%2 bit size}1 %3 type support, but device "
+"'%4' does not support it">;
 def err_omp_lambda_capture_in_declare_target_not_to : Error<
   "variable captured in declare target region must appear in a to clause">;
 def err_omp_device_type_mismatch : Error<

diff  --git a/clang/lib/Sema/Sema.cpp b/clang/lib/Sema/Sema.cpp
index cca82fb3bf48..23dba75f03c6 100644
--- a/clang/lib/Sema/Sema.cpp
+++ b/clang/lib/Sema/Sema.cpp
@@ -1795,6 +1795,15 @@ void Sema::checkDeviceDecl(const ValueDecl *D, 
SourceLocation Loc) {
 if (Ty->isDependentType())
   return;
 
+if (Ty->isExtIntType()) {
+  if (!Context.getTargetInfo().hasExtIntType()) {
+targetDiag(Loc, diag::err_device_unsupported_type)
+<< D << false /*show bit size*/ << 0 /*bitsize*/
+<< Ty << Context.getTargetInfo().getTriple().str();
+  }
+  return;
+}
+
 if ((Ty->isFloat16Type() && !Context.getTargetInfo().hasFloat16Type()) ||
 ((Ty->isFloat128Type() ||
   (Ty->isRealFloatingType() && Context.getTypeSize(Ty) == 128)) &&
@@ -1802,7 +1811,8 @@ void Sema::checkDeviceDecl(const ValueDecl *D, 
SourceLocation Loc) {
 (Ty->isIntegerType() && Context.getTypeSize(Ty) == 128 &&
  !Context.getTargetInfo().hasInt128Type())) {
   targetDiag(Loc, diag::err_device_unsupported_type)
-  << D << static_cast(Context.getTypeSize(Ty)) << Ty
+  << D << true /*show bit size*/
+  << static_cast(Context.getTypeSize(Ty)) << Ty
   << Context.getTargetInfo().getTriple().str();
   targetDiag(D->getLocation(), diag::note_defined_here) << D;
 }

diff  --git a/clang/test/OpenMP/nvptx_unsupported_type_messages.cpp 
b/clang/test/OpenMP/nvptx_unsupported_type_messages.cpp
index e56105adeb83..814a4756c01b 100644
--- a/clang/test/OpenMP/nvptx_unsupported_type_messages.cpp
+++ b/clang/test/OpenMP/nvptx_unsupported_type_messages.cpp
@@ -131,3 +131,7 @@ struct B {
   enum { value = bool(Sp::value) || bool(Tp::value) };
   typedef typename A_type::type type;
 };
+
+void bar(_ExtInt(66) a) {
+  auto b = a;
+}



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[llvm-branch-commits] [flang] b564b12 - [flang][driver] Refactor one unit-test case to use fixtures (nfc)

[Andrzej Warzynski via llvm-branch-commits]

Author: Andrzej Warzynski
Date: 2021-01-20T19:36:38Z
New Revision: b564b12bc665c5b9d7148422e4a65871dd31b912

URL: 
https://github.com/llvm/llvm-project/commit/b564b12bc665c5b9d7148422e4a65871dd31b912
DIFF: 
https://github.com/llvm/llvm-project/commit/b564b12bc665c5b9d7148422e4a65871dd31b912.diff

LOG: [flang][driver] Refactor one unit-test case to use fixtures (nfc)

Move the unit test from InputOutputTest.cpp to FrontendActionTest.cpp
and re-implement it in terms of the FrontendActionTest fixture. This is
just a small code clean-up and a continuation of:
  * https://reviews.llvm.org/D93544

Moving forward, we should try be implementing all unit-test cases for
Flang's frontend actions in terms of FrontendActionTest.

Reviewed By: sameeranjoshi

Differential Revision: https://reviews.llvm.org/D94922

Added: 


Modified: 
flang/unittests/Frontend/CMakeLists.txt
flang/unittests/Frontend/CompilerInstanceTest.cpp
flang/unittests/Frontend/FrontendActionTest.cpp

Removed: 
flang/unittests/Frontend/InputOutputTest.cpp



diff  --git a/flang/unittests/Frontend/CMakeLists.txt 
b/flang/unittests/Frontend/CMakeLists.txt
index fb8160bb023c..7b507b326621 100644
--- a/flang/unittests/Frontend/CMakeLists.txt
+++ b/flang/unittests/Frontend/CMakeLists.txt
@@ -1,6 +1,5 @@
 add_flang_unittest(FlangFrontendTests
   CompilerInstanceTest.cpp
-  InputOutputTest.cpp
   FrontendActionTest.cpp
 )
 

diff  --git a/flang/unittests/Frontend/CompilerInstanceTest.cpp 
b/flang/unittests/Frontend/CompilerInstanceTest.cpp
index df4bbb557c4d..b56473ea44e3 100644
--- a/flang/unittests/Frontend/CompilerInstanceTest.cpp
+++ b/flang/unittests/Frontend/CompilerInstanceTest.cpp
@@ -9,7 +9,7 @@
 #include "flang/Frontend/CompilerInstance.h"
 #include "flang/Frontend/TextDiagnosticPrinter.h"
 #include "clang/Basic/DiagnosticOptions.h"
-#include "llvm/Support//FileSystem.h"
+#include "llvm/Support/FileSystem.h"
 
 #include "gtest/gtest.h"
 

diff  --git a/flang/unittests/Frontend/FrontendActionTest.cpp 
b/flang/unittests/Frontend/FrontendActionTest.cpp
index 2e8bacddaf58..fba46690171d 100644
--- a/flang/unittests/Frontend/FrontendActionTest.cpp
+++ b/flang/unittests/Frontend/FrontendActionTest.cpp
@@ -6,7 +6,6 @@
 //
 
//===--===//
 
-#include "gtest/gtest.h"
 #include "flang/Frontend/CompilerInstance.h"
 #include "flang/Frontend/CompilerInvocation.h"
 #include "flang/Frontend/FrontendOptions.h"
@@ -14,6 +13,8 @@
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/raw_ostream.h"
 
+#include "gtest/gtest.h"
+
 using namespace Fortran::frontend;
 
 namespace {
@@ -79,6 +80,31 @@ class FrontendActionTest : public ::testing::Test {
   }
 };
 
+TEST_F(FrontendActionTest, TestInputOutput) {
+  // Populate the input file with the pre-defined input and flush it.
+  *(inputFileOs_) << "End Program arithmetic";
+  inputFileOs_.reset();
+
+  // Set-up the action kind.
+  compInst_.invocation().frontendOpts().programAction_ = InputOutputTest;
+
+  // Set-up the output stream. Using output buffer wrapped as an output
+  // stream, as opposed to an actual file (or a file descriptor).
+  llvm::SmallVector outputFileBuffer;
+  std::unique_ptr outputFileStream(
+  new llvm::raw_svector_ostream(outputFileBuffer));
+  compInst_.set_outputStream(std::move(outputFileStream));
+
+  // Execute the action.
+  bool success = ExecuteCompilerInvocation(&compInst_);
+
+  // Validate the expected output.
+  EXPECT_TRUE(success);
+  EXPECT_TRUE(!outputFileBuffer.empty());
+  EXPECT_TRUE(llvm::StringRef(outputFileBuffer.data())
+  .startswith("End Program arithmetic"));
+}
+
 TEST_F(FrontendActionTest, PrintPreprocessedInput) {
   // Populate the input file with the pre-defined input and flush it.
   *(inputFileOs_) << "#ifdef NEW\n"

diff  --git a/flang/unittests/Frontend/InputOutputTest.cpp 
b/flang/unittests/Frontend/InputOutputTest.cpp
deleted file mode 100644
index 882182fb1db3..
--- a/flang/unittests/Frontend/InputOutputTest.cpp
+++ /dev/null
@@ -1,76 +0,0 @@
-//===- unittests/Frontend/OutputStreamTest.cpp --- FrontendAction tests --===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-
-#include "gtest/gtest.h"
-#include "flang/Frontend/CompilerInstance.h"
-#include "flang/Frontend/CompilerInvocation.h"
-#include "flang/Frontend/FrontendOptions.h"
-#include "flang/FrontendTool/Utils.h"
-#include "llvm/Support/FileSystem.h"
-#include "llvm/Support/raw_ostream.h"
-
-using namespace Fortran::frontend;
-
-namespace {
-
-TEST(FrontendAction, TestInputOutputTestAction) {
-  std::string inputFile = "io-file-test.f";
-  std::error_c

[llvm-branch-commits] [llvm] ca4ed1e - [PredicateInfo] Generalize processing of conditions

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-20T20:40:41+01:00
New Revision: ca4ed1e7aeebe21dc3952f84b408805ab17ad63f

URL: 
https://github.com/llvm/llvm-project/commit/ca4ed1e7aeebe21dc3952f84b408805ab17ad63f
DIFF: 
https://github.com/llvm/llvm-project/commit/ca4ed1e7aeebe21dc3952f84b408805ab17ad63f.diff

LOG: [PredicateInfo] Generalize processing of conditions

Branch/assume conditions in PredicateInfo are currently handled in
a rather ad-hoc manner, with some arbitrary limitations. For example,
an `and` of two `icmp`s will be handled, but an `and` of an `icmp`
and some other condition will not. That also includes the case where
more than two conditions and and'ed together.

This patch makes the handling more general by looking through and/ors
up to a limit and considering all kinds of conditions (though operands
will only be taken for cmps of course).

Differential Revision: https://reviews.llvm.org/D94447

Added: 


Modified: 
llvm/lib/Transforms/Utils/PredicateInfo.cpp
llvm/test/Transforms/NewGVN/assume-equal.ll
llvm/test/Transforms/SCCP/conditions-ranges.ll
llvm/test/Transforms/Util/PredicateInfo/condprop.ll
llvm/test/Transforms/Util/PredicateInfo/testandor.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/PredicateInfo.cpp 
b/llvm/lib/Transforms/Utils/PredicateInfo.cpp
index d9bd77e999da..9b6f7d32054f 100644
--- a/llvm/lib/Transforms/Utils/PredicateInfo.cpp
+++ b/llvm/lib/Transforms/Utils/PredicateInfo.cpp
@@ -53,6 +53,10 @@ static cl::opt VerifyPredicateInfo(
 DEBUG_COUNTER(RenameCounter, "predicateinfo-rename",
   "Controls which variables are renamed with predicateinfo");
 
+// Maximum number of conditions considered for renaming for each branch/assume.
+// This limits renaming of deep and/or chains.
+static const unsigned MaxCondsPerBranch = 8;
+
 namespace {
 // Given a predicate info that is a type of branching terminator, get the
 // branching block.
@@ -367,6 +371,13 @@ void PredicateInfoBuilder::convertUsesToDFSOrdered(
   }
 }
 
+bool shouldRename(Value *V) {
+  // Only want real values, not constants.  Additionally, operands with one use
+  // are only being used in the comparison, which means they will not be useful
+  // for us to consider for predicateinfo.
+  return (isa(V) || isa(V)) && !V->hasOneUse();
+}
+
 // Collect relevant operations from Comparison that we may want to insert 
copies
 // for.
 void collectCmpOps(CmpInst *Comparison, SmallVectorImpl &CmpOperands) 
{
@@ -374,15 +385,9 @@ void collectCmpOps(CmpInst *Comparison, 
SmallVectorImpl &CmpOperands) {
   auto *Op1 = Comparison->getOperand(1);
   if (Op0 == Op1)
 return;
-  CmpOperands.push_back(Comparison);
-  // Only want real values, not constants.  Additionally, operands with one use
-  // are only being used in the comparison, which means they will not be useful
-  // for us to consider for predicateinfo.
-  //
-  if ((isa(Op0) || isa(Op0)) && !Op0->hasOneUse())
-CmpOperands.push_back(Op0);
-  if ((isa(Op1) || isa(Op1)) && !Op1->hasOneUse())
-CmpOperands.push_back(Op1);
+
+  CmpOperands.push_back(Op0);
+  CmpOperands.push_back(Op1);
 }
 
 // Add Op, PB to the list of value infos for Op, and mark Op to be renamed.
@@ -400,38 +405,32 @@ void 
PredicateInfoBuilder::addInfoFor(SmallVectorImpl &OpsToRename,
 void PredicateInfoBuilder::processAssume(
 IntrinsicInst *II, BasicBlock *AssumeBB,
 SmallVectorImpl &OpsToRename) {
-  // See if we have a comparison we support
-  SmallVector CmpOperands;
-  SmallVector ConditionsToProcess;
-  CmpInst::Predicate Pred;
-  Value *Operand = II->getOperand(0);
-  if (m_c_And(m_Cmp(Pred, m_Value(), m_Value()),
-  m_Cmp(Pred, m_Value(), m_Value()))
-  .match(II->getOperand(0))) {
-
ConditionsToProcess.push_back(cast(Operand)->getOperand(0));
-
ConditionsToProcess.push_back(cast(Operand)->getOperand(1));
-ConditionsToProcess.push_back(Operand);
-  } else if (isa(Operand)) {
-
-ConditionsToProcess.push_back(Operand);
-  }
-  for (auto Cond : ConditionsToProcess) {
-if (auto *Cmp = dyn_cast(Cond)) {
-  collectCmpOps(Cmp, CmpOperands);
-  // Now add our copy infos for our operands
-  for (auto *Op : CmpOperands) {
-auto *PA = new PredicateAssume(Op, II, Cmp);
-addInfoFor(OpsToRename, Op, PA);
+  SmallVector Worklist;
+  SmallPtrSet Visited;
+  Worklist.push_back(II->getOperand(0));
+  while (!Worklist.empty()) {
+Value *Cond = Worklist.pop_back_val();
+if (!Visited.insert(Cond).second)
+  continue;
+if (Visited.size() > MaxCondsPerBranch)
+  break;
+
+Value *Op0, *Op1;
+if (match(Cond, m_And(m_Value(Op0), m_Value(Op1 {
+  Worklist.push_back(Op1);
+  Worklist.push_back(Op0);
+}
+
+SmallVector Values;
+Values.push_back(Cond);
+if (auto *Cmp = dyn_cast(Cond))
+  collectCmpOps(Cmp, Values);
+
+for (Value *V : Values) {
+  if (s

[llvm-branch-commits] [openmp] ea616f9 - [libomptarget][devicertl][nfc] Remove some cuda intrinsics, simplify

[Jon Chesterfield via llvm-branch-commits]

Author: Jon Chesterfield
Date: 2021-01-20T19:45:05Z
New Revision: ea616f9026dc6bd9c67ebe2d3226ac91122a7945

URL: 
https://github.com/llvm/llvm-project/commit/ea616f9026dc6bd9c67ebe2d3226ac91122a7945
DIFF: 
https://github.com/llvm/llvm-project/commit/ea616f9026dc6bd9c67ebe2d3226ac91122a7945.diff

LOG: [libomptarget][devicertl][nfc] Remove some cuda intrinsics, simplify

[libomptarget][devicertl][nfc] Remove some cuda intrinsics, simplify

Replace __popc, __ffs with clang intrinsics. Move kmpc_impl_min to only file
that uses it and replace template with explictly typed.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95060

Added: 


Modified: 
openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
openmp/libomptarget/deviceRTLs/common/src/reduction.cu
openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h

Removed: 




diff  --git a/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h 
b/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
index d25ea8559c05..b1e9a1a9403a 100644
--- a/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
+++ b/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
@@ -65,6 +65,10 @@ enum DATA_SHARING_SIZES {
   DS_Max_Warp_Number = 16,
 };
 
+enum : __kmpc_impl_lanemask_t {
+  __kmpc_impl_all_lanes = ~(__kmpc_impl_lanemask_t)0
+};
+
 INLINE void __kmpc_impl_unpack(uint64_t val, uint32_t &lo, uint32_t &hi) {
   lo = (uint32_t)(val & UINT64_C(0x));
   hi = (uint32_t)((val & UINT64_C(0x)) >> 32);
@@ -74,28 +78,15 @@ INLINE uint64_t __kmpc_impl_pack(uint32_t lo, uint32_t hi) {
   return (((uint64_t)hi) << 32) | (uint64_t)lo;
 }
 
-enum : __kmpc_impl_lanemask_t {
-  __kmpc_impl_all_lanes = ~(__kmpc_impl_lanemask_t)0
-};
-
 DEVICE __kmpc_impl_lanemask_t __kmpc_impl_lanemask_lt();
-
 DEVICE __kmpc_impl_lanemask_t __kmpc_impl_lanemask_gt();
-
 DEVICE uint32_t __kmpc_impl_smid();
-
 DEVICE double __kmpc_impl_get_wtick();
-
 DEVICE double __kmpc_impl_get_wtime();
 
 INLINE uint64_t __kmpc_impl_ffs(uint64_t x) { return __builtin_ffsl(x); }
-
 INLINE uint64_t __kmpc_impl_popc(uint64_t x) { return __builtin_popcountl(x); }
 
-template  INLINE T __kmpc_impl_min(T x, T y) {
-  return x < y ? x : y;
-}
-
 DEVICE __kmpc_impl_lanemask_t __kmpc_impl_activemask();
 
 DEVICE int32_t __kmpc_impl_shfl_sync(__kmpc_impl_lanemask_t, int32_t Var,

diff  --git a/openmp/libomptarget/deviceRTLs/common/src/reduction.cu 
b/openmp/libomptarget/deviceRTLs/common/src/reduction.cu
index 92b34d77bd8a..3a3c44503f34 100644
--- a/openmp/libomptarget/deviceRTLs/common/src/reduction.cu
+++ b/openmp/libomptarget/deviceRTLs/common/src/reduction.cu
@@ -184,6 +184,8 @@ INLINE static uint32_t roundToWarpsize(uint32_t s) {
   return (s & ~(unsigned)(WARPSIZE - 1));
 }
 
+INLINE static uint32_t kmpcMin(uint32_t x, uint32_t y) { return x < y ? x : y; 
}
+
 DEVICE static volatile uint32_t IterCnt = 0;
 DEVICE static volatile uint32_t Cnt = 0;
 EXTERN int32_t __kmpc_nvptx_teams_reduce_nowait_v2(
@@ -261,14 +263,14 @@ EXTERN int32_t __kmpc_nvptx_teams_reduce_nowait_v2(
   // by returning 1 in the thread holding the reduction result.
 
   // Check if this is the very last team.
-  unsigned NumRecs = __kmpc_impl_min(NumTeams, uint32_t(num_of_records));
+  unsigned NumRecs = kmpcMin(NumTeams, uint32_t(num_of_records));
   if (ChunkTeamCount == NumTeams - Bound - 1) {
 //
 // Last team processing.
 //
 if (ThreadId >= NumRecs)
   return 0;
-NumThreads = roundToWarpsize(__kmpc_impl_min(NumThreads, NumRecs));
+NumThreads = roundToWarpsize(kmpcMin(NumThreads, NumRecs));
 if (ThreadId >= NumThreads)
   return 0;
 
@@ -283,7 +285,7 @@ EXTERN int32_t __kmpc_nvptx_teams_reduce_nowait_v2(
 
   // When we have more than [warpsize] number of threads
   // a block reduction is performed here.
-  uint32_t ActiveThreads = __kmpc_impl_min(NumRecs, NumThreads);
+  uint32_t ActiveThreads = kmpcMin(NumRecs, NumThreads);
   if (ActiveThreads > WARPSIZE) {
 uint32_t WarpsNeeded = (ActiveThreads + WARPSIZE - 1) / WARPSIZE;
 // Gather all the reduced values from each warp

diff  --git a/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h 
b/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h
index 8382cd6aaf47..ab9fd1697f14 100644
--- a/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h
+++ b/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h
@@ -93,13 +93,8 @@ DEVICE uint32_t __kmpc_impl_smid();
 DEVICE double __kmpc_impl_get_wtick();
 DEVICE double __kmpc_impl_get_wtime();
 
-INLINE uint32_t __kmpc_impl_ffs(uint32_t x) { return __ffs(x); }
-
-INLINE uint32_t __kmpc_impl_popc(uint32_t x) { return __popc(x); }
-
-template  INLINE T __kmpc_impl_min(T x, T y) {
-  return min(x, y);
-}
+INLINE uint32_t __kmpc_impl_ffs(uint32_t x) { return __builtin_ffs(x); }
+INLINE uint32_t __kmpc_impl_popc(ui

[llvm-branch-commits] [lld] 9e708ac - [COFF] Fix relocation offsets in pdb-file-statics test input

[Reid Kleckner via llvm-branch-commits]

Author: Reid Kleckner
Date: 2021-01-20T11:45:30-08:00
New Revision: 9e708ac6b9929e9baa2017ff62f2353e6621a105

URL: 
https://github.com/llvm/llvm-project/commit/9e708ac6b9929e9baa2017ff62f2353e6621a105
DIFF: 
https://github.com/llvm/llvm-project/commit/9e708ac6b9929e9baa2017ff62f2353e6621a105.diff

LOG: [COFF] Fix relocation offsets in pdb-file-statics test input

The relocation offsets were incorrect. I fixed them with llvm-readobj
-codeview -codeview-subsection-bytes, which has a helpful printout of
the relocations that apply to a given symbol record with their offsets.
With this, I was able to update the relocation offsets in the yaml to
fix the line table and the S_DEFRANGE_REGISTER records.

There is still some remaining inconsistency in yaml2obj and obj2yaml
when round tripping MSVC objects, but that isn't a blocker for relanding
D94267.

Added: 


Modified: 
lld/test/COFF/Inputs/pdb-file-statics-a.yaml

Removed: 




diff  --git a/lld/test/COFF/Inputs/pdb-file-statics-a.yaml 
b/lld/test/COFF/Inputs/pdb-file-statics-a.yaml
index 27e2ee160724..8ece65403460 100644
--- a/lld/test/COFF/Inputs/pdb-file-statics-a.yaml
+++ b/lld/test/COFF/Inputs/pdb-file-statics-a.yaml
@@ -1591,16 +1591,16 @@ sections:
   - VirtualAddress:  154
 SymbolName:  main
 Type:IMAGE_REL_AMD64_SECTION
-  - VirtualAddress:  229
+  - VirtualAddress:  222
 SymbolName:  main
 Type:IMAGE_REL_AMD64_SECREL
-  - VirtualAddress:  233
+  - VirtualAddress:  226
 SymbolName:  main
 Type:IMAGE_REL_AMD64_SECTION
-  - VirtualAddress:  336
+  - VirtualAddress:  328
 SymbolName:  main
 Type:IMAGE_REL_AMD64_SECREL
-  - VirtualAddress:  340
+  - VirtualAddress:  332
 SymbolName:  main
 Type:IMAGE_REL_AMD64_SECTION
   - Name:.xdata



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[llvm-branch-commits] [lldb] 599fdfc - Revert "[lldb] Re-enable TestPlatformProcessConnect on macos"

[Pavel Labath via llvm-branch-commits]

Author: Pavel Labath
Date: 2021-01-20T20:49:03+01:00
New Revision: 599fdfc5db8f44582ee9bd05544769268ec9b4a3

URL: 
https://github.com/llvm/llvm-project/commit/599fdfc5db8f44582ee9bd05544769268ec9b4a3
DIFF: 
https://github.com/llvm/llvm-project/commit/599fdfc5db8f44582ee9bd05544769268ec9b4a3.diff

LOG: Revert "[lldb] Re-enable TestPlatformProcessConnect on macos"

This reverts commit 079e664661770a78e30c0d27a12d50047f1b1ea8. It needs
more work.

Added: 


Modified: 
lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py

lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py

Removed: 




diff  --git 
a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py 
b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
index d16549420a14..07136108b2a4 100644
--- 
a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
+++ 
b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
@@ -72,6 +72,9 @@ def get_lldb_server_exe():
 A path to the lldb-server exe if it is found to exist; otherwise,
 returns None.
 """
+if "LLDB_DEBUGSERVER_PATH" in os.environ:
+return os.environ["LLDB_DEBUGSERVER_PATH"]
+
 return _get_debug_monitor_from_lldb(
 lldbtest_config.lldbExec, "lldb-server")
 

diff  --git 
a/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
 
b/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
index 3607c49c9c97..8ddab260b494 100644
--- 
a/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
+++ 
b/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
@@ -11,6 +11,7 @@ class 
TestPlatformProcessConnect(gdbremote_testcase.GdbRemoteTestCaseBase):
 @skipIfRemote
 @expectedFailureAll(hostoslist=["windows"], triple='.*-android')
 @skipIfWindows # lldb-server does not terminate correctly
+@skipIfDarwin # lldb-server not found correctly
 def test_platform_process_connect(self):
 self.build()
 



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[llvm-branch-commits] [openmp] fbc1dcb - [libomptarget][devicertl][nfc] Simplify target_atomic abstraction

[Jon Chesterfield via llvm-branch-commits]

Author: Jon Chesterfield
Date: 2021-01-20T19:50:50Z
New Revision: fbc1dcb946553a3dc923a63288d9275eea86f918

URL: 
https://github.com/llvm/llvm-project/commit/fbc1dcb946553a3dc923a63288d9275eea86f918
DIFF: 
https://github.com/llvm/llvm-project/commit/fbc1dcb946553a3dc923a63288d9275eea86f918.diff

LOG: [libomptarget][devicertl][nfc] Simplify target_atomic abstraction

[libomptarget][devicertl][nfc] Simplify target_atomic abstraction

Atomic functions were implemented as a shim around cuda's atomics, with
amdgcn implementing those symbols as a shim around gcc style intrinsics.

This patch folds target_atomic.h into target_impl.h and folds amdgcn.

Further work is likely to be useful here, either changing to openmp's atomic
interface or instantiating the templates on the few used types in order to
move them into a cuda/c++ implementation file. This change is mostly to
group the remaining uses of the cuda api under nvptx' target_impl abstraction.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95062

Added: 


Modified: 
openmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt
openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
openmp/libomptarget/deviceRTLs/common/omptargeti.h
openmp/libomptarget/deviceRTLs/common/src/libcall.cu
openmp/libomptarget/deviceRTLs/common/src/loop.cu
openmp/libomptarget/deviceRTLs/common/src/reduction.cu
openmp/libomptarget/deviceRTLs/common/state-queuei.h
openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h

Removed: 
openmp/libomptarget/deviceRTLs/amdgcn/src/hip_atomics.h
openmp/libomptarget/deviceRTLs/common/target_atomic.h



diff  --git a/openmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt 
b/openmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt
index 8bb395f1126f..8d9abe5d0bbd 100644
--- a/openmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt
+++ b/openmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt
@@ -73,14 +73,12 @@ set(cuda_sources
 
 set(h_files
   ${CMAKE_CURRENT_SOURCE_DIR}/src/amdgcn_interface.h
-  ${CMAKE_CURRENT_SOURCE_DIR}/src/hip_atomics.h
   ${CMAKE_CURRENT_SOURCE_DIR}/src/target_impl.h
   ${devicertl_base_directory}/common/debug.h
   ${devicertl_base_directory}/common/device_environment.h
   ${devicertl_base_directory}/common/omptarget.h
   ${devicertl_base_directory}/common/omptargeti.h
   ${devicertl_base_directory}/common/state-queue.h
-  ${devicertl_base_directory}/common/target_atomic.h
   ${devicertl_base_directory}/common/state-queuei.h
   ${devicertl_base_directory}/common/support.h)
 

diff  --git a/openmp/libomptarget/deviceRTLs/amdgcn/src/hip_atomics.h 
b/openmp/libomptarget/deviceRTLs/amdgcn/src/hip_atomics.h
deleted file mode 100644
index 04e80b945070..
--- a/openmp/libomptarget/deviceRTLs/amdgcn/src/hip_atomics.h
+++ /dev/null
@@ -1,41 +0,0 @@
-//=== hip_atomics.h - Declarations of hip atomic functions  C++ 
-*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-
-#ifndef OMPTARGET_AMDGCN_HIP_ATOMICS_H
-#define OMPTARGET_AMDGCN_HIP_ATOMICS_H
-
-#include "target_impl.h"
-
-namespace {
-
-template  DEVICE T atomicAdd(T *address, T val) {
-  return __atomic_fetch_add(address, val, __ATOMIC_SEQ_CST);
-}
-
-template  DEVICE T atomicMax(T *address, T val) {
-  return __atomic_fetch_max(address, val, __ATOMIC_SEQ_CST);
-}
-
-template  DEVICE T atomicExch(T *address, T val) {
-  T r;
-  __atomic_exchange(address, &val, &r, __ATOMIC_SEQ_CST);
-  return r;
-}
-
-template  DEVICE T atomicCAS(T *address, T compare, T val) {
-  (void)__atomic_compare_exchange(address, &compare, &val, false,
-  __ATOMIC_SEQ_CST, __ATOMIC_RELAXED);
-  return compare;
-}
-
-INLINE uint32_t atomicInc(uint32_t *address, uint32_t max) {
-  return __builtin_amdgcn_atomic_inc32(address, max, __ATOMIC_SEQ_CST, "");
-}
-
-} // namespace
-#endif

diff  --git a/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h 
b/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
index b1e9a1a9403a..6e8a651bd886 100644
--- a/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
+++ b/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
@@ -29,8 +29,6 @@
 #define SHARED __attribute__((shared))
 #define ALIGN(N) __attribute__((aligned(N)))
 
-#include "hip_atomics.h"
-
 

 // Kernel options
 

@@ -127,6 +125,31 @@ DEVICE int GetNumberOfThreadsInBlock();
 DEVICE unsigned GetWarpId();
 DEVICE unsigned GetLaneId();
 
+// Atomics
+temp

[llvm-branch-commits] [llvm] e406de7 - [PredicateInfo][SCCP][NewGVN] Add tests for logical and/or (NFC)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-20T20:53:55+01:00
New Revision: e406de77c6f33a6d3bf0b432bad1217b37605c15

URL: 
https://github.com/llvm/llvm-project/commit/e406de77c6f33a6d3bf0b432bad1217b37605c15
DIFF: 
https://github.com/llvm/llvm-project/commit/e406de77c6f33a6d3bf0b432bad1217b37605c15.diff

LOG: [PredicateInfo][SCCP][NewGVN] Add tests for logical and/or (NFC)

Duplicate some existing and/or tests using logical form.

Added: 


Modified: 
llvm/test/Transforms/NewGVN/condprop.ll
llvm/test/Transforms/SCCP/conditions-ranges.ll
llvm/test/Transforms/Util/PredicateInfo/testandor.ll

Removed: 




diff  --git a/llvm/test/Transforms/NewGVN/condprop.ll 
b/llvm/test/Transforms/NewGVN/condprop.ll
index faef4b171e28..8c77f7fe0fa0 100644
--- a/llvm/test/Transforms/NewGVN/condprop.ll
+++ b/llvm/test/Transforms/NewGVN/condprop.ll
@@ -5,8 +5,8 @@
 declare void @foo(i1)
 declare void @bar(i32)
 
-define void @test3(i32 %x, i32 %y) {
-; CHECK-LABEL: @test3(
+define void @test_and(i32 %x, i32 %y) {
+; CHECK-LABEL: @test_and(
 ; CHECK-NEXT:[[XZ:%.*]] = icmp eq i32 [[X:%.*]], 0
 ; CHECK-NEXT:[[YZ:%.*]] = icmp eq i32 [[Y:%.*]], 0
 ; CHECK-NEXT:[[Z:%.*]] = and i1 [[XZ]], [[YZ]]
@@ -35,6 +35,100 @@ nope:
   call void @foo(i1 %z)
   ret void
 }
+
+define void @test_and_logical(i32 %x, i32 %y) {
+; CHECK-LABEL: @test_and_logical(
+; CHECK-NEXT:[[XZ:%.*]] = icmp eq i32 [[X:%.*]], 0
+; CHECK-NEXT:[[YZ:%.*]] = icmp eq i32 [[Y:%.*]], 0
+; CHECK-NEXT:[[Z:%.*]] = select i1 [[XZ]], i1 [[YZ]], i1 false
+; CHECK-NEXT:br i1 [[Z]], label [[BOTH_ZERO:%.*]], label [[NOPE:%.*]]
+; CHECK:   both_zero:
+; CHECK-NEXT:call void @foo(i1 [[XZ]])
+; CHECK-NEXT:call void @foo(i1 [[YZ]])
+; CHECK-NEXT:call void @bar(i32 [[X]])
+; CHECK-NEXT:call void @bar(i32 [[Y]])
+; CHECK-NEXT:ret void
+; CHECK:   nope:
+; CHECK-NEXT:call void @foo(i1 false)
+; CHECK-NEXT:ret void
+;
+  %xz = icmp eq i32 %x, 0
+  %yz = icmp eq i32 %y, 0
+  %z = select i1 %xz, i1 %yz, i1 false
+  br i1 %z, label %both_zero, label %nope
+both_zero:
+  call void @foo(i1 %xz)
+  call void @foo(i1 %yz)
+  call void @bar(i32 %x)
+  call void @bar(i32 %y)
+  ret void
+nope:
+  call void @foo(i1 %z)
+  ret void
+}
+
+define void @test_or(i32 %x, i32 %y) {
+; CHECK-LABEL: @test_or(
+; CHECK-NEXT:[[XZ:%.*]] = icmp ne i32 [[X:%.*]], 0
+; CHECK-NEXT:[[YZ:%.*]] = icmp ne i32 [[Y:%.*]], 0
+; CHECK-NEXT:[[Z:%.*]] = or i1 [[XZ]], [[YZ]]
+; CHECK-NEXT:br i1 [[Z]], label [[NOPE:%.*]], label [[BOTH_ZERO:%.*]]
+; CHECK:   both_zero:
+; CHECK-NEXT:call void @foo(i1 false)
+; CHECK-NEXT:call void @foo(i1 false)
+; CHECK-NEXT:call void @bar(i32 0)
+; CHECK-NEXT:call void @bar(i32 0)
+; CHECK-NEXT:ret void
+; CHECK:   nope:
+; CHECK-NEXT:call void @foo(i1 true)
+; CHECK-NEXT:ret void
+;
+  %xz = icmp ne i32 %x, 0
+  %yz = icmp ne i32 %y, 0
+  %z = or i1 %xz, %yz
+  br i1 %z, label %nope, label %both_zero
+both_zero:
+  call void @foo(i1 %xz)
+  call void @foo(i1 %yz)
+  call void @bar(i32 %x)
+  call void @bar(i32 %y)
+  ret void
+nope:
+  call void @foo(i1 %z)
+  ret void
+}
+
+define void @test_or_logical(i32 %x, i32 %y) {
+; CHECK-LABEL: @test_or_logical(
+; CHECK-NEXT:[[XZ:%.*]] = icmp ne i32 [[X:%.*]], 0
+; CHECK-NEXT:[[YZ:%.*]] = icmp ne i32 [[Y:%.*]], 0
+; CHECK-NEXT:[[Z:%.*]] = select i1 [[XZ]], i1 true, i1 [[YZ]]
+; CHECK-NEXT:br i1 [[Z]], label [[NOPE:%.*]], label [[BOTH_ZERO:%.*]]
+; CHECK:   both_zero:
+; CHECK-NEXT:call void @foo(i1 [[XZ]])
+; CHECK-NEXT:call void @foo(i1 [[YZ]])
+; CHECK-NEXT:call void @bar(i32 [[X]])
+; CHECK-NEXT:call void @bar(i32 [[Y]])
+; CHECK-NEXT:ret void
+; CHECK:   nope:
+; CHECK-NEXT:call void @foo(i1 true)
+; CHECK-NEXT:ret void
+;
+  %xz = icmp ne i32 %x, 0
+  %yz = icmp ne i32 %y, 0
+  %z = select i1 %xz, i1 true, i1 %yz
+  br i1 %z, label %nope, label %both_zero
+both_zero:
+  call void @foo(i1 %xz)
+  call void @foo(i1 %yz)
+  call void @bar(i32 %x)
+  call void @bar(i32 %y)
+  ret void
+nope:
+  call void @foo(i1 %z)
+  ret void
+}
+
 define void @test4(i1 %b, i32 %x) {
 ; CHECK-LABEL: @test4(
 ; CHECK-NEXT:br i1 [[B:%.*]], label [[SW:%.*]], label [[CASE3:%.*]]

diff  --git a/llvm/test/Transforms/SCCP/conditions-ranges.ll 
b/llvm/test/Transforms/SCCP/conditions-ranges.ll
index 2317242e5e6c..0a43070de5c9 100644
--- a/llvm/test/Transforms/SCCP/conditions-ranges.ll
+++ b/llvm/test/Transforms/SCCP/conditions-ranges.ll
@@ -886,6 +886,91 @@ false:
   ret void
 }
 
+define void @f16_conditions_and_logical(i32 %a, i32 %b) {
+; CHECK-LABEL: @f16_conditions_and_logical(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[LT:%.*]] = icmp ult i32 [[A:%.*]], 100
+; CHECK-NEXT:[[GT:%.*]] = icmp ugt i32 [[A]], 20
+; CHECK-NEXT:[[BC:%.*]] = select i1 [[LT]], i1 [[GT]], i1 false
+; CHECK-NEXT:br i1 [[B

[llvm-branch-commits] [mlir] c075572 - [mlir][Linalg] NFC - Expose getSmallestBoundingIndex as an utility function

[Nicolas Vasilache via llvm-branch-commits]

Author: Nicolas Vasilache
Date: 2021-01-20T19:53:09Z
New Revision: c075572646a9bd71ac675e20f3d75101ae7dd090

URL: 
https://github.com/llvm/llvm-project/commit/c075572646a9bd71ac675e20f3d75101ae7dd090
DIFF: 
https://github.com/llvm/llvm-project/commit/c075572646a9bd71ac675e20f3d75101ae7dd090.diff

LOG: [mlir][Linalg] NFC - Expose getSmallestBoundingIndex as an utility function

Added: 


Modified: 
mlir/include/mlir/Dialect/Linalg/Utils/Utils.h
mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
mlir/lib/Dialect/Linalg/Utils/Utils.cpp

Removed: 




diff  --git a/mlir/include/mlir/Dialect/Linalg/Utils/Utils.h 
b/mlir/include/mlir/Dialect/Linalg/Utils/Utils.h
index f194209f1910..1a7dc939435e 100644
--- a/mlir/include/mlir/Dialect/Linalg/Utils/Utils.h
+++ b/mlir/include/mlir/Dialect/Linalg/Utils/Utils.h
@@ -142,6 +142,12 @@ void applyPermutationToVector(SmallVector &inVec,
   inVec = auxVec;
 }
 
+/// If `size` comes from an AffineMinOp and one of the values of AffineMinOp
+/// is a constant then return a new value set to the smallest such constant.
+/// If `size` comes from a ConstantOp, return the constant.
+/// Otherwise return nullptr.
+IntegerAttr getSmallestBoundingIndex(Value size);
+
 /// Scheme used to distribute loops to processors.
 enum class DistributionMethod {
   /// Cyclic distribution where no assumption is made about the dynamic

diff  --git a/mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp 
b/mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
index 329cc88bd2ae..4d314c32657a 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
@@ -44,27 +44,6 @@ using folded_std_view = FoldedValueBuilder;
 
 #define DEBUG_TYPE "linalg-promotion"
 
-/// If `size` comes from an AffineMinOp and one of the values of AffineMinOp
-/// is a constant then return a new value set to the smallest such constant.
-/// Otherwise return size.
-static Value extractSmallestConstantBoundingSize(OpBuilder &b, Location loc,
- Value size) {
-  Optional boundingConst = {};
-  if (auto affineMinOp = size.getDefiningOp()) {
-for (auto e : affineMinOp.getAffineMap().getResults())
-  if (auto cst = e.dyn_cast())
-boundingConst = boundingConst
-? std::min(boundingConst.getValue(), 
cst.getValue())
-: cst.getValue();
-  } else if (auto constIndexOp = size.getDefiningOp()) {
-if (constIndexOp.getType().isa())
-  boundingConst = constIndexOp.value().cast().getInt();
-  }
-  return boundingConst && *boundingConst >= 0
- ? b.create(loc, *boundingConst)
- : size;
-}
-
 /// Alloc a new buffer of `size`. If `dynamicBuffers` is true allocate exactly
 /// the size needed, otherwise try to allocate a static bounding box.
 static Value allocBuffer(const LinalgPromotionOptions &options,
@@ -242,7 +221,9 @@ Optional 
mlir::linalg::promoteSubviewAsNewBuffer(
 auto rangeValue = en.value();
 // Try to extract a tight constant.
 LLVM_DEBUG(llvm::dbgs() << "Extract tightest: " << rangeValue.size << 
"\n");
-Value size = extractSmallestConstantBoundingSize(b, loc, rangeValue.size);
+IntegerAttr sizeAttr = getSmallestBoundingIndex(rangeValue.size);
+Value size =
+(!sizeAttr) ? rangeValue.size : b.create(loc, sizeAttr);
 LLVM_DEBUG(llvm::dbgs() << "Extracted tightest: " << size << "\n");
 fullSizes.push_back(size);
 partialSizes.push_back(folded_std_dim(folder, subView, en.index()));

diff  --git a/mlir/lib/Dialect/Linalg/Utils/Utils.cpp 
b/mlir/lib/Dialect/Linalg/Utils/Utils.cpp
index 81bfbc6ecf52..32b32be066cb 100644
--- a/mlir/lib/Dialect/Linalg/Utils/Utils.cpp
+++ b/mlir/lib/Dialect/Linalg/Utils/Utils.cpp
@@ -115,6 +115,31 @@ Optional> 
getStaticLoopRanges(LinalgOp linalgOp) {
   return invertedMap.compose(viewSizes);
 }
 
+/// If `size` comes from an AffineMinOp and one of the values of AffineMinOp
+/// is a constant then return a new value set to the smallest such constant.
+/// Otherwise returngetSmallestBoundingIndex nullptr.
+IntegerAttr getSmallestBoundingIndex(Value size) {
+  Optional boundingConst = {};
+  if (auto affineMinOp = size.getDefiningOp()) {
+for (auto e : affineMinOp.getAffineMap().getResults())
+  if (auto cst = e.dyn_cast())
+boundingConst = boundingConst
+? std::min(boundingConst.getValue(), 
cst.getValue())
+: cst.getValue();
+  } else if (auto constIndexOp = size.getDefiningOp()) {
+if (constIndexOp.getType().isa())
+  boundingConst = constIndexOp.value().cast().getInt();
+  } else if (auto affineApplyOp = size.getDefiningOp()) {
+if (auto cExpr = affineApplyOp.getAffineMap()
+ .getResult(0)
+ .dyn_cast())
+  boundingConst = cExpr.getValue();

[llvm-branch-commits] [llvm] 1a9bd5b - Reland "[PDB] Defer relocating .debug$S until commit time and parallelize it"

[Reid Kleckner via llvm-branch-commits]

Author: Reid Kleckner
Date: 2021-01-20T11:53:43-08:00
New Revision: 1a9bd5b81328adf0dd5a8b4f3ad5949463e66da3

URL: 
https://github.com/llvm/llvm-project/commit/1a9bd5b81328adf0dd5a8b4f3ad5949463e66da3
DIFF: 
https://github.com/llvm/llvm-project/commit/1a9bd5b81328adf0dd5a8b4f3ad5949463e66da3.diff

LOG: Reland "[PDB] Defer relocating .debug$S until commit time and parallelize 
it"

This reverts commit 5b7aef6eb4b2930971029b984cb2360f7682e5a5 and relands
6529d7c5a45b1b9588e512013b02f891d71bc134.

The ASan error was debugged and determined to be the fault of an invalid
object file input in our test suite, which was fixed by my last change.
LLD's project policy is that it assumes input objects are valid, so I
have added a comment about this assumption to the relocation bounds
check.

Added: 


Modified: 
lld/COFF/Chunks.cpp
lld/COFF/Chunks.h
lld/COFF/PDB.cpp
llvm/include/llvm/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.h
llvm/lib/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.cpp
llvm/lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp

Removed: 




diff  --git a/lld/COFF/Chunks.cpp b/lld/COFF/Chunks.cpp
index 9d60bc746c96..14d0a5ad716c 100644
--- a/lld/COFF/Chunks.cpp
+++ b/lld/COFF/Chunks.cpp
@@ -367,47 +367,89 @@ void SectionChunk::writeTo(uint8_t *buf) const {
   continue;
 }
 
-uint8_t *off = buf + rel.VirtualAddress;
+applyRelocation(buf + rel.VirtualAddress, rel);
+  }
+}
 
-auto *sym =
-dyn_cast_or_null(file->getSymbol(rel.SymbolTableIndex));
+void SectionChunk::applyRelocation(uint8_t *off,
+   const coff_relocation &rel) const {
+  auto *sym = dyn_cast_or_null(file->getSymbol(rel.SymbolTableIndex));
 
-// Get the output section of the symbol for this relocation.  The output
-// section is needed to compute SECREL and SECTION relocations used in 
debug
-// info.
-Chunk *c = sym ? sym->getChunk() : nullptr;
-OutputSection *os = c ? c->getOutputSection() : nullptr;
-
-// Skip the relocation if it refers to a discarded section, and diagnose it
-// as an error if appropriate. If a symbol was discarded early, it may be
-// null. If it was discarded late, the output section will be null, unless
-// it was an absolute or synthetic symbol.
-if (!sym ||
-(!os && !isa(sym) && !isa(sym))) {
-  maybeReportRelocationToDiscarded(this, sym, rel);
-  continue;
-}
+  // Get the output section of the symbol for this relocation.  The output
+  // section is needed to compute SECREL and SECTION relocations used in debug
+  // info.
+  Chunk *c = sym ? sym->getChunk() : nullptr;
+  OutputSection *os = c ? c->getOutputSection() : nullptr;
 
-uint64_t s = sym->getRVA();
+  // Skip the relocation if it refers to a discarded section, and diagnose it
+  // as an error if appropriate. If a symbol was discarded early, it may be
+  // null. If it was discarded late, the output section will be null, unless
+  // it was an absolute or synthetic symbol.
+  if (!sym ||
+  (!os && !isa(sym) && !isa(sym))) {
+maybeReportRelocationToDiscarded(this, sym, rel);
+return;
+  }
 
-// Compute the RVA of the relocation for relative relocations.
-uint64_t p = rva + rel.VirtualAddress;
-switch (config->machine) {
-case AMD64:
-  applyRelX64(off, rel.Type, os, s, p);
-  break;
-case I386:
-  applyRelX86(off, rel.Type, os, s, p);
-  break;
-case ARMNT:
-  applyRelARM(off, rel.Type, os, s, p);
-  break;
-case ARM64:
-  applyRelARM64(off, rel.Type, os, s, p);
+  uint64_t s = sym->getRVA();
+
+  // Compute the RVA of the relocation for relative relocations.
+  uint64_t p = rva + rel.VirtualAddress;
+  switch (config->machine) {
+  case AMD64:
+applyRelX64(off, rel.Type, os, s, p);
+break;
+  case I386:
+applyRelX86(off, rel.Type, os, s, p);
+break;
+  case ARMNT:
+applyRelARM(off, rel.Type, os, s, p);
+break;
+  case ARM64:
+applyRelARM64(off, rel.Type, os, s, p);
+break;
+  default:
+llvm_unreachable("unknown machine type");
+  }
+}
+
+// Defend against unsorted relocations. This may be overly conservative.
+void SectionChunk::sortRelocations() {
+  auto cmpByVa = [](const coff_relocation &l, const coff_relocation &r) {
+return l.VirtualAddress < r.VirtualAddress;
+  };
+  if (llvm::is_sorted(getRelocs(), cmpByVa))
+return;
+  warn("some relocations in " + file->getName() + " are not sorted");
+  MutableArrayRef newRelocs(
+  bAlloc.Allocate(relocsSize), relocsSize);
+  memcpy(newRelocs.data(), relocsData, relocsSize * sizeof(coff_relocation));
+  llvm::sort(newRelocs, cmpByVa);
+  setRelocs(newRelocs);
+}
+
+// Similar to writeTo, but suitable for relocating a subsection of the overall
+// section.
+void SectionChunk::writeAndRelocateSubsection(ArrayRef sec,
+   

[llvm-branch-commits] [lldb] 8fc9b6c - [lldb/Commands] Align process launch --plugin with process attach (NFC)

[Med Ismail Bennani via llvm-branch-commits]

Author: Med Ismail Bennani
Date: 2021-01-20T21:01:23+01:00
New Revision: 8fc9b6c2c560fc5945ce2115de345efb1617d59d

URL: 
https://github.com/llvm/llvm-project/commit/8fc9b6c2c560fc5945ce2115de345efb1617d59d
DIFF: 
https://github.com/llvm/llvm-project/commit/8fc9b6c2c560fc5945ce2115de345efb1617d59d.diff

LOG: [lldb/Commands] Align process launch --plugin with process attach (NFC)

Following `7169d3a315f4cdc19c4ab6b8f20c6f91b46ba9b8`, this patch updates
the short option for the plugin command option to (`-p` to `-P`) to
align with the `process attach` command options.

The long option remains the same since there are already the same for both
commands.

Signed-off-by: Med Ismail Bennani 

Added: 


Modified: 
lldb/source/Commands/CommandOptionsProcessLaunch.cpp

Removed: 




diff  --git a/lldb/source/Commands/CommandOptionsProcessLaunch.cpp 
b/lldb/source/Commands/CommandOptionsProcessLaunch.cpp
index e94a89469ca9..4445457ca852 100644
--- a/lldb/source/Commands/CommandOptionsProcessLaunch.cpp
+++ b/lldb/source/Commands/CommandOptionsProcessLaunch.cpp
@@ -61,7 +61,7 @@ Status CommandOptionsProcessLaunch::SetOptionValue(
 break;
   }
 
-  case 'p': // Process plug-in name
+  case 'P': // Process plug-in name
 launch_info.SetProcessPluginName(option_arg);
 break;
 



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[llvm-branch-commits] [llvm] 1c6d1e5 - [PredicateInfo] Handle logical and/or

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-20T21:03:07+01:00
New Revision: 1c6d1e57c15b59114a05b20e667517872510aaa9

URL: 
https://github.com/llvm/llvm-project/commit/1c6d1e57c15b59114a05b20e667517872510aaa9
DIFF: 
https://github.com/llvm/llvm-project/commit/1c6d1e57c15b59114a05b20e667517872510aaa9.diff

LOG: [PredicateInfo] Handle logical and/or

Teach PredicateInfo to handle logical and/or the same way as
bitwise and/or. This allows handling logical and/or inside IPSCCP
and NewGVN.

Added: 


Modified: 
llvm/lib/Transforms/Utils/PredicateInfo.cpp
llvm/test/Transforms/NewGVN/condprop.ll
llvm/test/Transforms/SCCP/conditions-ranges.ll
llvm/test/Transforms/Util/PredicateInfo/testandor.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/PredicateInfo.cpp 
b/llvm/lib/Transforms/Utils/PredicateInfo.cpp
index 9b6f7d32054f..3312a6f9459b 100644
--- a/llvm/lib/Transforms/Utils/PredicateInfo.cpp
+++ b/llvm/lib/Transforms/Utils/PredicateInfo.cpp
@@ -416,7 +416,7 @@ void PredicateInfoBuilder::processAssume(
   break;
 
 Value *Op0, *Op1;
-if (match(Cond, m_And(m_Value(Op0), m_Value(Op1 {
+if (match(Cond, m_LogicalAnd(m_Value(Op0), m_Value(Op1 {
   Worklist.push_back(Op1);
   Worklist.push_back(Op0);
 }
@@ -461,8 +461,8 @@ void PredicateInfoBuilder::processBranch(
 break;
 
   Value *Op0, *Op1;
-  if (TakenEdge ? match(Cond, m_And(m_Value(Op0), m_Value(Op1)))
-: match(Cond, m_Or(m_Value(Op0), m_Value(Op1 {
+  if (TakenEdge ? match(Cond, m_LogicalAnd(m_Value(Op0), m_Value(Op1)))
+: match(Cond, m_LogicalOr(m_Value(Op0), m_Value(Op1 {
 Worklist.push_back(Op1);
 Worklist.push_back(Op0);
   }

diff  --git a/llvm/test/Transforms/NewGVN/condprop.ll 
b/llvm/test/Transforms/NewGVN/condprop.ll
index 8c77f7fe0fa0..8f1225cadb59 100644
--- a/llvm/test/Transforms/NewGVN/condprop.ll
+++ b/llvm/test/Transforms/NewGVN/condprop.ll
@@ -43,10 +43,10 @@ define void @test_and_logical(i32 %x, i32 %y) {
 ; CHECK-NEXT:[[Z:%.*]] = select i1 [[XZ]], i1 [[YZ]], i1 false
 ; CHECK-NEXT:br i1 [[Z]], label [[BOTH_ZERO:%.*]], label [[NOPE:%.*]]
 ; CHECK:   both_zero:
-; CHECK-NEXT:call void @foo(i1 [[XZ]])
-; CHECK-NEXT:call void @foo(i1 [[YZ]])
-; CHECK-NEXT:call void @bar(i32 [[X]])
-; CHECK-NEXT:call void @bar(i32 [[Y]])
+; CHECK-NEXT:call void @foo(i1 true)
+; CHECK-NEXT:call void @foo(i1 true)
+; CHECK-NEXT:call void @bar(i32 0)
+; CHECK-NEXT:call void @bar(i32 0)
 ; CHECK-NEXT:ret void
 ; CHECK:   nope:
 ; CHECK-NEXT:call void @foo(i1 false)
@@ -105,10 +105,10 @@ define void @test_or_logical(i32 %x, i32 %y) {
 ; CHECK-NEXT:[[Z:%.*]] = select i1 [[XZ]], i1 true, i1 [[YZ]]
 ; CHECK-NEXT:br i1 [[Z]], label [[NOPE:%.*]], label [[BOTH_ZERO:%.*]]
 ; CHECK:   both_zero:
-; CHECK-NEXT:call void @foo(i1 [[XZ]])
-; CHECK-NEXT:call void @foo(i1 [[YZ]])
-; CHECK-NEXT:call void @bar(i32 [[X]])
-; CHECK-NEXT:call void @bar(i32 [[Y]])
+; CHECK-NEXT:call void @foo(i1 false)
+; CHECK-NEXT:call void @foo(i1 false)
+; CHECK-NEXT:call void @bar(i32 0)
+; CHECK-NEXT:call void @bar(i32 0)
 ; CHECK-NEXT:ret void
 ; CHECK:   nope:
 ; CHECK-NEXT:call void @foo(i1 true)

diff  --git a/llvm/test/Transforms/SCCP/conditions-ranges.ll 
b/llvm/test/Transforms/SCCP/conditions-ranges.ll
index 0a43070de5c9..cf0e6177432e 100644
--- a/llvm/test/Transforms/SCCP/conditions-ranges.ll
+++ b/llvm/test/Transforms/SCCP/conditions-ranges.ll
@@ -894,16 +894,11 @@ define void @f16_conditions_and_logical(i32 %a, i32 %b) {
 ; CHECK-NEXT:[[BC:%.*]] = select i1 [[LT]], i1 [[GT]], i1 false
 ; CHECK-NEXT:br i1 [[BC]], label [[TRUE:%.*]], label [[FALSE:%.*]]
 ; CHECK:   true:
-; CHECK-NEXT:[[F_1:%.*]] = icmp eq i32 [[A]], 0
-; CHECK-NEXT:call void @use(i1 [[F_1]])
-; CHECK-NEXT:[[F_2:%.*]] = icmp eq i32 [[A]], 20
-; CHECK-NEXT:call void @use(i1 [[F_2]])
-; CHECK-NEXT:[[F_3:%.*]] = icmp ugt i32 [[A]], 100
-; CHECK-NEXT:call void @use(i1 [[F_3]])
-; CHECK-NEXT:[[T_1:%.*]] = icmp ult i32 [[A]], 100
-; CHECK-NEXT:call void @use(i1 [[T_1]])
-; CHECK-NEXT:[[T_2:%.*]] = icmp ne i32 [[A]], 20
-; CHECK-NEXT:call void @use(i1 [[T_2]])
+; CHECK-NEXT:call void @use(i1 false)
+; CHECK-NEXT:call void @use(i1 false)
+; CHECK-NEXT:call void @use(i1 false)
+; CHECK-NEXT:call void @use(i1 true)
+; CHECK-NEXT:call void @use(i1 true)
 ; CHECK-NEXT:[[C_1:%.*]] = icmp eq i32 [[A]], 21
 ; CHECK-NEXT:call void @use(i1 [[C_1]])
 ; CHECK-NEXT:[[C_2:%.*]] = icmp ugt i32 [[A]], 21
@@ -1059,16 +1054,11 @@ define void @f17_conditions_or_logical(i32 %a, i32 %b) {
 ; CHECK-NEXT:[[BC:%.*]] = select i1 [[LT]], i1 true, i1 [[GT]]
 ; CHECK-NEXT:br i1 [[BC]], label [[TRUE:%.*]], label [[FALSE:%.*]]
 ; CHECK:   

[llvm-branch-commits] [mlir] 866cb26 - [mlir] Fix SubTensorInsertOp semantics

[Nicolas Vasilache via llvm-branch-commits]

Author: Nicolas Vasilache
Date: 2021-01-20T20:16:01Z
New Revision: 866cb26039043581d5ab8b30d5a999a7c273f361

URL: 
https://github.com/llvm/llvm-project/commit/866cb26039043581d5ab8b30d5a999a7c273f361
DIFF: 
https://github.com/llvm/llvm-project/commit/866cb26039043581d5ab8b30d5a999a7c273f361.diff

LOG: [mlir] Fix SubTensorInsertOp semantics

Like SubView, SubTensor/SubTensorInsertOp are allowed to have 
rank-reducing/expanding semantics. In the case of SubTensorInsertOp , the rank 
of offsets/sizes/strides should be the rank of the destination tensor.

Also, add a builder flavor for SubTensorOp to return a rank-reduced tensor.

Differential Revision: https://reviews.llvm.org/D95076

Added: 


Modified: 
mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
mlir/lib/Dialect/StandardOps/IR/Ops.cpp
mlir/test/IR/core-ops.mlir

Removed: 




diff  --git a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td 
b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
index 770e68f6da835..6dbb24a4358f8 100644
--- a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
+++ b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
@@ -3244,6 +3244,17 @@ def SubTensorOp : BaseOpWithOffsetSizesAndStrides<
 // Build a SubTensorOp with all dynamic entries.
 OpBuilderDAG<(ins "Value":$source, "ValueRange":$offsets,
   "ValueRange":$sizes, "ValueRange":$strides,
+  CArg<"ArrayRef", "{}">:$attrs)>,
+// Build a SubTensorOp with mixed static and dynamic entries
+// and custom result type.
+OpBuilderDAG<(ins "RankedTensorType":$resultType, "Value":$source,
+  "ArrayRef":$staticOffsets, "ArrayRef":$staticSizes,
+  "ArrayRef":$staticStrides, "ValueRange":$offsets,
+  "ValueRange":$sizes, "ValueRange":$strides,
+  CArg<"ArrayRef", "{}">:$attrs)>,
+// Build a SubTensorOp with all dynamic entries and custom result type.
+OpBuilderDAG<(ins "RankedTensorType":$resultType, "Value":$source,
+  "ValueRange":$offsets, "ValueRange":$sizes, "ValueRange":$strides,
   CArg<"ArrayRef", "{}">:$attrs)>
   ];
 
@@ -3349,7 +3360,7 @@ def SubTensorInsertOp : BaseOpWithOffsetSizesAndStrides<
   return source().getType().cast();
 }
 
-/// The result of a subtensor is always a tensor.
+/// The result of a subtensor_insert is always a tensor.
 RankedTensorType getType() {
   return getResult().getType().cast();
 }
@@ -3357,7 +3368,7 @@ def SubTensorInsertOp : BaseOpWithOffsetSizesAndStrides<
 /// Return the expected rank of each of the`static_offsets`, `static_sizes`
 /// and `static_strides` attributes.
 std::array getArrayAttrRanks() {
-  unsigned rank = getSourceType().getRank();
+  unsigned rank = getType().getRank();
   return {rank, rank, rank};
 }
 

diff  --git a/mlir/lib/Dialect/StandardOps/IR/Ops.cpp 
b/mlir/lib/Dialect/StandardOps/IR/Ops.cpp
index 1718ab14d5d12..428006e20d9f9 100644
--- a/mlir/lib/Dialect/StandardOps/IR/Ops.cpp
+++ b/mlir/lib/Dialect/StandardOps/IR/Ops.cpp
@@ -2892,12 +2892,11 @@ void mlir::SubViewOp::build(OpBuilder &b, 
OperationState &result,
 ArrayRef attrs) {
   auto sourceMemRefType = source.getType().cast();
   unsigned rank = sourceMemRefType.getRank();
-  SmallVector staticOffsetsVector;
-  staticOffsetsVector.assign(rank, ShapedType::kDynamicStrideOrOffset);
-  SmallVector staticSizesVector;
-  staticSizesVector.assign(rank, ShapedType::kDynamicSize);
-  SmallVector staticStridesVector;
-  staticStridesVector.assign(rank, ShapedType::kDynamicStrideOrOffset);
+  SmallVector staticOffsetsVector(
+  rank, ShapedType::kDynamicStrideOrOffset);
+  SmallVector staticSizesVector(rank, ShapedType::kDynamicSize);
+  SmallVector staticStridesVector(
+  rank, ShapedType::kDynamicStrideOrOffset);
   build(b, result, resultType, source, staticOffsetsVector, staticSizesVector,
 staticStridesVector, offsets, sizes, strides, attrs);
 }
@@ -3444,6 +3443,38 @@ void mlir::SubTensorOp::build(OpBuilder &b, 
OperationState &result,
 staticStridesVector, offsets, sizes, strides, attrs);
 }
 
+/// Build a SubTensorOp as above but with custom result type.
+void mlir::SubTensorOp::build(OpBuilder &b, OperationState &result,
+  RankedTensorType resultType, Value source,
+  ArrayRef staticOffsets,
+  ArrayRef staticSizes,
+  ArrayRef staticStrides,
+  ValueRange offsets, ValueRange sizes,
+  ValueRange strides,
+  ArrayRef attrs) {
+  build(b, result, resultType, source, offsets, sizes, strides,
+b.getI64ArrayAttr(staticOffsets), b.getI64ArrayAttr(staticSizes),
+b.getI64ArrayAttr(staticStrides));
+  result.addAttributes(attrs);
+}
+
+/// Build a SubTensorOp as above but with custom result type.
+void ml

[llvm-branch-commits] [mlir] b1e1bba - [mlir] Add ComplexDialect to SCF->GPU pass.

[Alexander Belyaev via llvm-branch-commits]

Author: Alexander Belyaev
Date: 2021-01-20T21:18:09+01:00
New Revision: b1e1bbae0e30c89251940efb0780eee6a1b79ecd

URL: 
https://github.com/llvm/llvm-project/commit/b1e1bbae0e30c89251940efb0780eee6a1b79ecd
DIFF: 
https://github.com/llvm/llvm-project/commit/b1e1bbae0e30c89251940efb0780eee6a1b79ecd.diff

LOG: [mlir] Add ComplexDialect to SCF->GPU pass.

Added: 


Modified: 
mlir/lib/Conversion/SCFToGPU/CMakeLists.txt
mlir/lib/Conversion/SCFToGPU/SCFToGPUPass.cpp

Removed: 




diff  --git a/mlir/lib/Conversion/SCFToGPU/CMakeLists.txt 
b/mlir/lib/Conversion/SCFToGPU/CMakeLists.txt
index 10fed819ca35..f3de289c28cc 100644
--- a/mlir/lib/Conversion/SCFToGPU/CMakeLists.txt
+++ b/mlir/lib/Conversion/SCFToGPU/CMakeLists.txt
@@ -11,6 +11,7 @@ add_mlir_conversion_library(MLIRSCFToGPU
   LINK_LIBS PUBLIC
   MLIRAffine
   MLIRAffineToStandard
+  MLIRComplex
   MLIRGPU
   MLIRIR
   MLIRLinalg

diff  --git a/mlir/lib/Conversion/SCFToGPU/SCFToGPUPass.cpp 
b/mlir/lib/Conversion/SCFToGPU/SCFToGPUPass.cpp
index 2941b400babe..66fbacf69d5b 100644
--- a/mlir/lib/Conversion/SCFToGPU/SCFToGPUPass.cpp
+++ b/mlir/lib/Conversion/SCFToGPU/SCFToGPUPass.cpp
@@ -10,6 +10,7 @@
 #include "../PassDetail.h"
 #include "mlir/Conversion/SCFToGPU/SCFToGPU.h"
 #include "mlir/Dialect/Affine/IR/AffineOps.h"
+#include "mlir/Dialect/Complex/IR/Complex.h"
 #include "mlir/Dialect/GPU/GPUDialect.h"
 #include "mlir/Dialect/SCF/SCF.h"
 #include "mlir/Dialect/StandardOps/IR/Ops.h"
@@ -49,10 +50,9 @@ struct ParallelLoopToGpuPass
 OwningRewritePatternList patterns;
 populateParallelLoopToGPUPatterns(patterns, &getContext());
 ConversionTarget target(getContext());
-target.addLegalDialect();
-target.addLegalDialect();
-target.addLegalDialect();
-target.addLegalDialect();
+target.addLegalDialect();
 configureParallelLoopToGPULegality(target);
 if (failed(applyPartialConversion(getOperation(), target,
   std::move(patterns



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[llvm-branch-commits] [mlir] 8dd58a5 - [mlir][Linalg] NFC - Fully compose map and operands when creating AffineMin in tiling.

[Nicolas Vasilache via llvm-branch-commits]

Author: Nicolas Vasilache
Date: 2021-01-20T20:36:18Z
New Revision: 8dd58a509cc8b93a211c9b07b12e1548dc187fc3

URL: 
https://github.com/llvm/llvm-project/commit/8dd58a509cc8b93a211c9b07b12e1548dc187fc3
DIFF: 
https://github.com/llvm/llvm-project/commit/8dd58a509cc8b93a211c9b07b12e1548dc187fc3.diff

LOG: [mlir][Linalg] NFC - Fully compose map and operands when creating 
AffineMin in tiling.

This may simplify the composition of patterns but is otherwise NFC.

Added: 


Modified: 
mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp

Removed: 




diff  --git a/mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp 
b/mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
index eb8c9bb6a6fc..62a5d325ddcf 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
@@ -34,7 +34,6 @@ using namespace mlir::edsc::intrinsics;
 using namespace mlir::linalg;
 using namespace mlir::scf;
 
-using folded_affine_min = FoldedValueBuilder;
 
 #define DEBUG_TYPE "linalg-tiling"
 
@@ -292,8 +291,9 @@ makeTiledShapes(OpBuilder &b, Location loc, LinalgOp 
linalgOp,
  getAffineDimExpr(/*position=*/2, b.getContext())},
 b.getContext());
 auto d = std_dim(shapedOp, r);
-size =
-affine_min(b.getIndexType(), minMap, ValueRange{size, d, offset});
+SmallVector operands{size, d, offset};
+fullyComposeAffineMapAndOperands(&minMap, &operands);
+size = affine_min(b.getIndexType(), minMap, operands);
   }
 
   sizes.push_back(size);



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[llvm-branch-commits] [flang] 0996b59 - [flang] Infrastructure improvements in utility routines

[peter klausler via llvm-branch-commits]

Author: peter klausler
Date: 2021-01-20T12:40:25-08:00
New Revision: 0996b590aaafe2de8378fd45a5094c13a4de3360

URL: 
https://github.com/llvm/llvm-project/commit/0996b590aaafe2de8378fd45a5094c13a4de3360
DIFF: 
https://github.com/llvm/llvm-project/commit/0996b590aaafe2de8378fd45a5094c13a4de3360.diff

LOG: [flang] Infrastructure improvements in utility routines

* IsArrayElement() needs another option to control whether it
  should ignore trailing component references.
* Add IsObjectPointer().
* Add const Scope& variants of IsFunction() and IsProcedure().
* Make TypeAndShape::Characterize() work with procedure bindings.
* Handle CHARACTER length in MeasureSizeInBytes().
* Fine-tune FindExternallyVisibleObject()'s handling of dummy arguments
  to conform with Fortran 2018: only INTENT(IN) and dummy pointers
  in pure functions signify; update two tests accordingly.

Also: resolve some stylistic inconsistencies and add a missing
"const" in the expression traversal template framework.

Differential Revision: https://reviews.llvm.org/D95011

Added: 


Modified: 
flang/include/flang/Evaluate/call.h
flang/include/flang/Evaluate/tools.h
flang/include/flang/Evaluate/traverse.h
flang/lib/Evaluate/characteristics.cpp
flang/lib/Evaluate/tools.cpp
flang/lib/Semantics/tools.cpp
flang/test/Semantics/structconst03.f90
flang/test/Semantics/structconst04.f90

Removed: 




diff  --git a/flang/include/flang/Evaluate/call.h 
b/flang/include/flang/Evaluate/call.h
index 0e78839b2ccc..e74e82d86f87 100644
--- a/flang/include/flang/Evaluate/call.h
+++ b/flang/include/flang/Evaluate/call.h
@@ -111,12 +111,18 @@ class ActualArgument {
   llvm::raw_ostream &AsFortran(llvm::raw_ostream &) const;
 
   std::optional keyword() const { return keyword_; }
-  void set_keyword(parser::CharBlock x) { keyword_ = x; }
+  ActualArgument &set_keyword(parser::CharBlock x) {
+keyword_ = x;
+return *this;
+  }
   bool isAlternateReturn() const {
 return std::holds_alternative(u_);
   }
   bool isPassedObject() const { return isPassedObject_; }
-  void set_isPassedObject(bool yes = true) { isPassedObject_ = yes; }
+  ActualArgument &set_isPassedObject(bool yes = true) {
+isPassedObject_ = yes;
+return *this;
+  }
 
   bool Matches(const characteristics::DummyArgument &) const;
   common::Intent dummyIntent() const { return dummyIntent_; }

diff  --git a/flang/include/flang/Evaluate/tools.h 
b/flang/include/flang/Evaluate/tools.h
index 3fe3dc1843ec..351dc8715cdd 100644
--- a/flang/include/flang/Evaluate/tools.h
+++ b/flang/include/flang/Evaluate/tools.h
@@ -235,11 +235,14 @@ std::optional ExtractSubstringBase(const 
Substring &);
 
 // Predicate: is an expression is an array element reference?
 template 
-bool IsArrayElement(const Expr &expr, bool intoSubstring = false) {
+bool IsArrayElement(const Expr &expr, bool intoSubstring = true,
+bool skipComponents = false) {
   if (auto dataRef{ExtractDataRef(expr, intoSubstring)}) {
 const DataRef *ref{&*dataRef};
-while (const Component * component{std::get_if(&ref->u)}) {
-  ref = &component->base();
+if (skipComponents) {
+  while (const Component * component{std::get_if(&ref->u)}) {
+ref = &component->base();
+  }
 }
 if (const auto *coarrayRef{std::get_if(&ref->u)}) {
   return !coarrayRef->subscript().empty();
@@ -789,6 +792,7 @@ bool IsProcedure(const Expr &);
 bool IsFunction(const Expr &);
 bool IsProcedurePointer(const Expr &);
 bool IsNullPointer(const Expr &);
+bool IsObjectPointer(const Expr &, FoldingContext &);
 
 // Extracts the chain of symbols from a designator, which has perhaps been
 // wrapped in an Expr<>, removing all of the (co)subscripts.  The
@@ -913,12 +917,13 @@ class Scope;
 // These functions are used in Evaluate so they are defined here rather than in
 // Semantics to avoid a link-time dependency on Semantics.
 // All of these apply GetUltimate() or ResolveAssociations() to their 
arguments.
-
 bool IsVariableName(const Symbol &);
 bool IsPureProcedure(const Symbol &);
 bool IsPureProcedure(const Scope &);
 bool IsFunction(const Symbol &);
+bool IsFunction(const Scope &);
 bool IsProcedure(const Symbol &);
+bool IsProcedure(const Scope &);
 bool IsProcedurePointer(const Symbol &);
 bool IsSaved(const Symbol &); // saved implicitly or explicitly
 bool IsDummy(const Symbol &);

diff  --git a/flang/include/flang/Evaluate/traverse.h 
b/flang/include/flang/Evaluate/traverse.h
index 9238e58a1fb3..c9455910aa41 100644
--- a/flang/include/flang/Evaluate/traverse.h
+++ b/flang/include/flang/Evaluate/traverse.h
@@ -50,7 +50,7 @@ template  class Traverse {
   Result operator()(const common::Indirection &x) const {
 return visitor_(x.value());
   }
-  template  Result operator()(SymbolRef x) const {
+  template  Result operator()(const SymbolRef x) const {
 return visitor_(*x);
   }
   template  Re

[llvm-branch-commits] [clang] a3d7cee - [CodeView] Emit function types in -gline-tables-only.

[Amy Huang via llvm-branch-commits]

Author: Amy Huang
Date: 2021-01-20T12:47:35-08:00
New Revision: a3d7cee7f9bdfbe3e88e4de39a76c3d3e2690fdb

URL: 
https://github.com/llvm/llvm-project/commit/a3d7cee7f9bdfbe3e88e4de39a76c3d3e2690fdb
DIFF: 
https://github.com/llvm/llvm-project/commit/a3d7cee7f9bdfbe3e88e4de39a76c3d3e2690fdb.diff

LOG: [CodeView] Emit function types in -gline-tables-only.

This change adds function types to further differentiate between
FUNC_IDs in -gline-tables-only.

Size increase of object files in clang are
Before: 917990 kb
After:  999312 kb

Bug: https://bugs.llvm.org/show_bug.cgi?id=48432

Differential Revision: https://reviews.llvm.org/D95001

Added: 


Modified: 
clang/lib/CodeGen/CGDebugInfo.cpp
clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/CGDebugInfo.cpp 
b/clang/lib/CodeGen/CGDebugInfo.cpp
index 00606d3ae507..02dfb14ae615 100644
--- a/clang/lib/CodeGen/CGDebugInfo.cpp
+++ b/clang/lib/CodeGen/CGDebugInfo.cpp
@@ -2317,6 +2317,9 @@ static bool 
shouldOmitDefinition(codegenoptions::DebugInfoKind DebugKind,
 if (ES->hasExternalDefinitions(RD) == ExternalASTSource::EK_Always)
   return true;
 
+  // Only emit forward declarations in line tables only to keep debug info size
+  // small. This only applies to CodeView, since we don't emit types in DWARF
+  // line tables only.
   if (DebugKind == codegenoptions::DebugLineTablesOnly)
 return true;
 
@@ -3726,7 +3729,10 @@ llvm::DISubprogram 
*CGDebugInfo::getObjCMethodDeclaration(
 llvm::DISubroutineType *CGDebugInfo::getOrCreateFunctionType(const Decl *D,
  QualType FnType,
  llvm::DIFile *F) {
-  if (!D || DebugKind <= codegenoptions::DebugLineTablesOnly)
+  // In CodeView, we emit the function types in line tables only because the
+  // only way to distinguish between functions is by display name and type.
+  if (!D || (DebugKind <= codegenoptions::DebugLineTablesOnly &&
+ !CGM.getCodeGenOpts().EmitCodeView))
 // Create fake but valid subroutine type. Otherwise -verify would fail, and
 // subprogram DIE will miss DW_AT_decl_file and DW_AT_decl_line fields.
 return DBuilder.createSubroutineType(DBuilder.getOrCreateTypeArray(None));

diff  --git a/clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp 
b/clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp
index 25f801737f74..27ac682c10f5 100644
--- a/clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp
+++ b/clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp
@@ -5,7 +5,6 @@
 
 namespace NS {
 struct C {
-public:
   void m() {}
 };
 void f() {}
@@ -14,17 +13,18 @@ void f() {}
 NS::C c;
 
 void test() {
-  // CHECK: ![[EMPTY:[0-9]+]] = !{}
   // CHECK: !DISubprogram(name: "f", scope: ![[NS:[0-9]+]],
   // CHECK-SAME:  type: ![[F:[0-9]+]]
   // CHECK: ![[NS]] = !DINamespace(name: "NS", scope: null)
-  // CHECK: ![[F]] = !DISubroutineType(types: ![[EMPTY]])
+  // CHECK: ![[F]] = !DISubroutineType(types: ![[FTYPE:[0-9]+]])
+  // CHECK: ![[FTYPE]] = !{null}
   NS::f();
 
-  // CHECK: !DISubprogram(name: "m", scope: ![[C:[0-9]+]],
-  // CHECK-SAME:  type: ![[F]]
+  // CHECK: ![[M:[0-9]+]] = distinct !DISubprogram(name: "m", scope: 
![[C:[0-9]+]],
+  // CHECK-SAME:   type: ![[MTYPE:[0-9]+]]
   // CHECK: ![[C]] = !DICompositeType(tag: DW_TAG_structure_type, name: "C",
   // CHECK-SAME:  flags: DIFlagFwdDecl
   // CHECK-NOT: identifier
+  // CHECK: ![[MTYPE]] = !DISubroutineType(types: !{{.*}})
   c.m();
 }



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[llvm-branch-commits] [openmp] 33a5d21 - [OpenMP][NVPTX] Added forward declaration to pave the way for building deviceRTLs with OpenMP

[Shilei Tian via llvm-branch-commits]

Author: Shilei Tian
Date: 2021-01-20T15:56:02-05:00
New Revision: 33a5d212c6198af2bd902bb8e4cfd0f0bec0114f

URL: 
https://github.com/llvm/llvm-project/commit/33a5d212c6198af2bd902bb8e4cfd0f0bec0114f
DIFF: 
https://github.com/llvm/llvm-project/commit/33a5d212c6198af2bd902bb8e4cfd0f0bec0114f.diff

LOG: [OpenMP][NVPTX] Added forward declaration to pave the way for building 
deviceRTLs with OpenMP

Once we switch to build deviceRTLs with OpenMP, primitives and CUDA
intrinsics cannot be used directly anymore because `__device__` is not 
recognized
by OpenMP compiler. To avoid involving all CUDA internal headers we had in 
`clang`,
we forward declared these functions. Eventually they will be transformed into
right LLVM instrinsics.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D95058

Added: 


Modified: 
openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu

Removed: 




diff  --git a/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu 
b/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
index ffc7498e662e..75945e3cd8c4 100644
--- a/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
+++ b/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
@@ -16,6 +16,23 @@
 
 #include 
 
+// Forward declaration of CUDA primitives which will be evetually transformed
+// into LLVM intrinsics.
+extern "C" {
+unsigned int __activemask();
+unsigned int __ballot(unsigned);
+// The default argument here is based on NVIDIA's website
+// https://developer.nvidia.com/blog/using-cuda-warp-level-primitives/
+int __shfl_sync(unsigned mask, int val, int src_line, int width = WARPSIZE);
+int __shfl(int val, int src_line, int width = WARPSIZE);
+int __shfl_down(int var, unsigned detla, int width);
+int __shfl_down_sync(unsigned mask, int var, unsigned detla, int width);
+void __syncwarp(int mask);
+void __threadfence();
+void __threadfence_block();
+void __threadfence_system();
+}
+
 DEVICE void __kmpc_impl_unpack(uint64_t val, uint32_t &lo, uint32_t &hi) {
   asm volatile("mov.b64 {%0,%1}, %2;" : "=r"(lo), "=r"(hi) : "l"(val));
 }



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[llvm-branch-commits] [flang] bebbe64 - [flang] Fix creation of deferred shape arrays by POINTER statement

[Peter Steinfeld via llvm-branch-commits]

Author: Peter Steinfeld
Date: 2021-01-20T13:08:11-08:00
New Revision: bebbe64075abf9d9887a8e1ee39c1ecefe970954

URL: 
https://github.com/llvm/llvm-project/commit/bebbe64075abf9d9887a8e1ee39c1ecefe970954
DIFF: 
https://github.com/llvm/llvm-project/commit/bebbe64075abf9d9887a8e1ee39c1ecefe970954.diff

LOG: [flang] Fix creation of deferred shape arrays by POINTER statement

It's possible to  declare deferred shape array using the POINTER
statement, for example:

  POINTER :: var(:)

When analyzing POINTER declarations, we were not capturing the array
specification information, if present.  I fixed this by changing the
"Post" function for "parser::PointerDecl" to check to see if the
declaration contained a "DeferredShapeSpecList".  In such cases, I
analyzed the shape and used to information to declare an "ObjectEntity"
that contains the shape information rather than an "UnknownEntity".

I also added a couple of small tests that fail to compile without these
changes.

Differential Revision: https://reviews.llvm.org/D95080

Added: 


Modified: 
flang/lib/Semantics/resolve-names-utils.cpp
flang/lib/Semantics/resolve-names-utils.h
flang/lib/Semantics/resolve-names.cpp
flang/test/Semantics/allocate12.f90

Removed: 




diff  --git a/flang/lib/Semantics/resolve-names-utils.cpp 
b/flang/lib/Semantics/resolve-names-utils.cpp
index 83bff78f426a..61cfba046022 100644
--- a/flang/lib/Semantics/resolve-names-utils.cpp
+++ b/flang/lib/Semantics/resolve-names-utils.cpp
@@ -219,6 +219,7 @@ class ArraySpecAnalyzer {
 public:
   ArraySpecAnalyzer(SemanticsContext &context) : context_{context} {}
   ArraySpec Analyze(const parser::ArraySpec &);
+  ArraySpec AnalyzeDeferredShapeSpecList(const parser::DeferredShapeSpecList 
&);
   ArraySpec Analyze(const parser::ComponentArraySpec &);
   ArraySpec Analyze(const parser::CoarraySpec &);
 
@@ -252,6 +253,11 @@ ArraySpec AnalyzeArraySpec(
 SemanticsContext &context, const parser::ComponentArraySpec &arraySpec) {
   return ArraySpecAnalyzer{context}.Analyze(arraySpec);
 }
+ArraySpec AnalyzeDeferredShapeSpecList(SemanticsContext &context,
+const parser::DeferredShapeSpecList &deferredShapeSpecs) {
+  return ArraySpecAnalyzer{context}.AnalyzeDeferredShapeSpecList(
+  deferredShapeSpecs);
+}
 ArraySpec AnalyzeCoarraySpec(
 SemanticsContext &context, const parser::CoarraySpec &coarraySpec) {
   return ArraySpecAnalyzer{context}.Analyze(coarraySpec);
@@ -275,6 +281,12 @@ ArraySpec ArraySpecAnalyzer::Analyze(const 
parser::ArraySpec &x) {
   CHECK(!arraySpec_.empty());
   return arraySpec_;
 }
+ArraySpec ArraySpecAnalyzer::AnalyzeDeferredShapeSpecList(
+const parser::DeferredShapeSpecList &x) {
+  Analyze(x);
+  CHECK(!arraySpec_.empty());
+  return arraySpec_;
+}
 ArraySpec ArraySpecAnalyzer::Analyze(const parser::CoarraySpec &x) {
   std::visit(
   common::visitors{

diff  --git a/flang/lib/Semantics/resolve-names-utils.h 
b/flang/lib/Semantics/resolve-names-utils.h
index 89011ff3b956..ce1673e681b4 100644
--- a/flang/lib/Semantics/resolve-names-utils.h
+++ b/flang/lib/Semantics/resolve-names-utils.h
@@ -100,6 +100,8 @@ class GenericSpecInfo {
 ArraySpec AnalyzeArraySpec(SemanticsContext &, const parser::ArraySpec &);
 ArraySpec AnalyzeArraySpec(
 SemanticsContext &, const parser::ComponentArraySpec &);
+ArraySpec AnalyzeDeferredShapeSpecList(
+SemanticsContext &, const parser::DeferredShapeSpecList &);
 ArraySpec AnalyzeCoarraySpec(
 SemanticsContext &context, const parser::CoarraySpec &);
 

diff  --git a/flang/lib/Semantics/resolve-names.cpp 
b/flang/lib/Semantics/resolve-names.cpp
index 3bc9a85cbf41..d76abbf68a08 100644
--- a/flang/lib/Semantics/resolve-names.cpp
+++ b/flang/lib/Semantics/resolve-names.cpp
@@ -429,6 +429,7 @@ class ArraySpecVisitor : public virtual BaseVisitor {
 
 protected:
   const ArraySpec &arraySpec();
+  void set_arraySpec(const ArraySpec arraySpec) { arraySpec_ = arraySpec; }
   const ArraySpec &coarraySpec();
   void BeginArraySpec();
   void EndArraySpec();
@@ -3250,8 +3251,18 @@ void DeclarationVisitor::Post(const parser::EntityDecl 
&x) {
 
 void DeclarationVisitor::Post(const parser::PointerDecl &x) {
   const auto &name{std::get(x.t)};
-  Symbol &symbol{DeclareUnknownEntity(name, Attrs{Attr::POINTER})};
-  symbol.ReplaceName(name.source);
+  if (const auto &deferredShapeSpecs{
+  std::get>(x.t)}) {
+CHECK(arraySpec().empty());
+BeginArraySpec();
+set_arraySpec(AnalyzeDeferredShapeSpecList(context(), 
*deferredShapeSpecs));
+Symbol &symbol{DeclareObjectEntity(name, Attrs{Attr::POINTER})};
+symbol.ReplaceName(name.source);
+EndArraySpec();
+  } else {
+Symbol &symbol{DeclareUnknownEntity(name, Attrs{Attr::POINTER})};
+symbol.ReplaceName(name.source);
+  }
 }
 
 bool DeclarationVisitor::Pre(const parser::BindEntity &x) {

diff  --git a/flang/test/Semantics/allocate12.f90 
b/flang/t

[llvm-branch-commits] [llvm] 95ce32c - [NFC] Move ImportedFunctionsInliningStatistics to Analysis

[Mircea Trofin via llvm-branch-commits]

Author: Mircea Trofin
Date: 2021-01-20T13:18:03-08:00
New Revision: 95ce32c7878d92a9058c052ebe7b35f97f23569e

URL: 
https://github.com/llvm/llvm-project/commit/95ce32c7878d92a9058c052ebe7b35f97f23569e
DIFF: 
https://github.com/llvm/llvm-project/commit/95ce32c7878d92a9058c052ebe7b35f97f23569e.diff

LOG: [NFC] Move ImportedFunctionsInliningStatistics to Analysis

This is related to D94982. We want to call these APIs from the Analysis
component, so we can't leave them under Transforms.

Differential Revision: https://reviews.llvm.org/D95079

Added: 
llvm/include/llvm/Analysis/Utils/ImportedFunctionsInliningStatistics.h
llvm/lib/Analysis/ImportedFunctionsInliningStatistics.cpp

Modified: 
llvm/include/llvm/Transforms/IPO/Inliner.h
llvm/lib/Analysis/CMakeLists.txt
llvm/lib/Transforms/IPO/Inliner.cpp
llvm/lib/Transforms/Utils/CMakeLists.txt

Removed: 
llvm/include/llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h
llvm/lib/Transforms/Utils/ImportedFunctionsInliningStatistics.cpp



diff  --git 
a/llvm/include/llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h 
b/llvm/include/llvm/Analysis/Utils/ImportedFunctionsInliningStatistics.h
similarity index 100%
rename from 
llvm/include/llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h
rename to llvm/include/llvm/Analysis/Utils/ImportedFunctionsInliningStatistics.h

diff  --git a/llvm/include/llvm/Transforms/IPO/Inliner.h 
b/llvm/include/llvm/Transforms/IPO/Inliner.h
index b6e793a8a380c..3cac11bce0c55 100644
--- a/llvm/include/llvm/Transforms/IPO/Inliner.h
+++ b/llvm/include/llvm/Transforms/IPO/Inliner.h
@@ -14,8 +14,8 @@
 #include "llvm/Analysis/InlineAdvisor.h"
 #include "llvm/Analysis/InlineCost.h"
 #include "llvm/Analysis/LazyCallGraph.h"
+#include "llvm/Analysis/Utils/ImportedFunctionsInliningStatistics.h"
 #include "llvm/IR/PassManager.h"
-#include "llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h"
 #include 
 
 namespace llvm {

diff  --git a/llvm/lib/Analysis/CMakeLists.txt 
b/llvm/lib/Analysis/CMakeLists.txt
index b89b6b3c4c647..f31cf349b09aa 100644
--- a/llvm/lib/Analysis/CMakeLists.txt
+++ b/llvm/lib/Analysis/CMakeLists.txt
@@ -58,6 +58,7 @@ add_llvm_component_library(LLVMAnalysis
   IRSimilarityIdentifier.cpp
   IVDescriptors.cpp
   IVUsers.cpp
+  ImportedFunctionsInliningStatistics.cpp
   IndirectCallPromotionAnalysis.cpp
   InlineCost.cpp
   InlineAdvisor.cpp

diff  --git a/llvm/lib/Transforms/Utils/ImportedFunctionsInliningStatistics.cpp 
b/llvm/lib/Analysis/ImportedFunctionsInliningStatistics.cpp
similarity index 98%
rename from llvm/lib/Transforms/Utils/ImportedFunctionsInliningStatistics.cpp
rename to llvm/lib/Analysis/ImportedFunctionsInliningStatistics.cpp
index ea93f99d69e34..6e14a63806c09 100644
--- a/llvm/lib/Transforms/Utils/ImportedFunctionsInliningStatistics.cpp
+++ b/llvm/lib/Analysis/ImportedFunctionsInliningStatistics.cpp
@@ -9,7 +9,7 @@
 // ThinLTO.
 
//===--===//
 
-#include "llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h"
+#include "llvm/Analysis/Utils/ImportedFunctionsInliningStatistics.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/IR/Function.h"
 #include "llvm/IR/Module.h"
@@ -186,7 +186,7 @@ ImportedFunctionsInliningStatistics::SortedNodesTy
 ImportedFunctionsInliningStatistics::getSortedNodes() {
   SortedNodesTy SortedNodes;
   SortedNodes.reserve(NodesMap.size());
-  for (const NodesMapTy::value_type& Node : NodesMap)
+  for (const NodesMapTy::value_type &Node : NodesMap)
 SortedNodes.push_back(&Node);
 
   llvm::sort(SortedNodes, [&](const SortedNodesTy::value_type &Lhs,

diff  --git a/llvm/lib/Transforms/IPO/Inliner.cpp 
b/llvm/lib/Transforms/IPO/Inliner.cpp
index 8be4e93e09dab..3877c0ecb9749 100644
--- a/llvm/lib/Transforms/IPO/Inliner.cpp
+++ b/llvm/lib/Transforms/IPO/Inliner.cpp
@@ -36,6 +36,7 @@
 #include "llvm/Analysis/ProfileSummaryInfo.h"
 #include "llvm/Analysis/TargetLibraryInfo.h"
 #include "llvm/Analysis/TargetTransformInfo.h"
+#include "llvm/Analysis/Utils/ImportedFunctionsInliningStatistics.h"
 #include "llvm/IR/Attributes.h"
 #include "llvm/IR/BasicBlock.h"
 #include "llvm/IR/DataLayout.h"
@@ -59,7 +60,6 @@
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Transforms/Utils/CallPromotionUtils.h"
 #include "llvm/Transforms/Utils/Cloning.h"
-#include "llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h"
 #include "llvm/Transforms/Utils/Local.h"
 #include "llvm/Transforms/Utils/ModuleUtils.h"
 #include 

diff  --git a/llvm/lib/Transforms/Utils/CMakeLists.txt 
b/llvm/lib/Transforms/Utils/CMakeLists.txt
index a68ba40c2bd55..b3bdc192a877f 100644
--- a/llvm/lib/Transforms/Utils/CMakeLists.txt
+++ b/llvm/lib/Transforms/Utils/CMakeLists.txt
@@ -28,7 +28,6 @@ add_llvm_component_library(LLVMTransformUtils
   GlobalStatus.cpp
   GuardUtils.cpp
   InlineFunction.cpp
-  ImportedF

[llvm-branch-commits] [llvm] 36b05d2 - [gn build] Port 95ce32c7878d

[LLVM GN Syncbot via llvm-branch-commits]

Author: LLVM GN Syncbot
Date: 2021-01-20T21:18:20Z
New Revision: 36b05d2e9f553eab37c8646a4db3bdadb4279d38

URL: 
https://github.com/llvm/llvm-project/commit/36b05d2e9f553eab37c8646a4db3bdadb4279d38
DIFF: 
https://github.com/llvm/llvm-project/commit/36b05d2e9f553eab37c8646a4db3bdadb4279d38.diff

LOG: [gn build] Port 95ce32c7878d

Added: 


Modified: 
llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn

Removed: 




diff  --git a/llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn 
b/llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
index 3711c0c1803b..acb83890e4c8 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
@@ -56,6 +56,7 @@ static_library("Analysis") {
 "IRSimilarityIdentifier.cpp",
 "IVDescriptors.cpp",
 "IVUsers.cpp",
+"ImportedFunctionsInliningStatistics.cpp",
 "IndirectCallPromotionAnalysis.cpp",
 "InlineAdvisor.cpp",
 "InlineCost.cpp",

diff  --git a/llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn 
b/llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
index ccb05f0ec472..efdded38c7c2 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
@@ -34,7 +34,6 @@ static_library("Utils") {
 "FunctionImportUtils.cpp",
 "GlobalStatus.cpp",
 "GuardUtils.cpp",
-"ImportedFunctionsInliningStatistics.cpp",
 "InjectTLIMappings.cpp",
 "InlineFunction.cpp",
 "InstructionNamer.cpp",



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[llvm-branch-commits] [mlir] a2223b0 - [mlir:async] Fix data races in AsyncRuntime

[Eugene Zhulenev via llvm-branch-commits]

Author: Eugene Zhulenev
Date: 2021-01-20T13:23:39-08:00
New Revision: a2223b09b10a4cc87b5e9c4a36ab9401c46610f6

URL: 
https://github.com/llvm/llvm-project/commit/a2223b09b10a4cc87b5e9c4a36ab9401c46610f6
DIFF: 
https://github.com/llvm/llvm-project/commit/a2223b09b10a4cc87b5e9c4a36ab9401c46610f6.diff

LOG: [mlir:async] Fix data races in AsyncRuntime

Resumed coroutine potentially can deallocate the token/value/group and destroy 
the mutex before the std::unique_ptr destructor.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D95037

Added: 


Modified: 
mlir/lib/ExecutionEngine/AsyncRuntime.cpp

Removed: 




diff  --git a/mlir/lib/ExecutionEngine/AsyncRuntime.cpp 
b/mlir/lib/ExecutionEngine/AsyncRuntime.cpp
index a20bd6d1e996..e38ebf92cd84 100644
--- a/mlir/lib/ExecutionEngine/AsyncRuntime.cpp
+++ b/mlir/lib/ExecutionEngine/AsyncRuntime.cpp
@@ -136,13 +136,14 @@ struct AsyncToken : public RefCounted {
   // asynchronously executed task. If the caller immediately will drop its
   // reference we must ensure that the token will be alive until the
   // asynchronous operation is completed.
-  AsyncToken(AsyncRuntime *runtime) : RefCounted(runtime, /*count=*/2) {}
+  AsyncToken(AsyncRuntime *runtime)
+  : RefCounted(runtime, /*count=*/2), ready(false) {}
 
-  // Internal state below guarded by a mutex.
+  std::atomic ready;
+
+  // Pending awaiters are guarded by a mutex.
   std::mutex mu;
   std::condition_variable cv;
-
-  bool ready = false;
   std::vector> awaiters;
 };
 
@@ -152,17 +153,17 @@ struct AsyncToken : public RefCounted {
 struct AsyncValue : public RefCounted {
   // AsyncValue similar to an AsyncToken created with a reference count of 2.
   AsyncValue(AsyncRuntime *runtime, int32_t size)
-  : RefCounted(runtime, /*count=*/2), storage(size) {}
-
-  // Internal state below guarded by a mutex.
-  std::mutex mu;
-  std::condition_variable cv;
+  : RefCounted(runtime, /*count=*/2), ready(false), storage(size) {}
 
-  bool ready = false;
-  std::vector> awaiters;
+  std::atomic ready;
 
   // Use vector of bytes to store async value payload.
   std::vector storage;
+
+  // Pending awaiters are guarded by a mutex.
+  std::mutex mu;
+  std::condition_variable cv;
+  std::vector> awaiters;
 };
 
 // Async group provides a mechanism to group together multiple async tokens or
@@ -175,10 +176,9 @@ struct AsyncGroup : public RefCounted {
   std::atomic pendingTokens;
   std::atomic rank;
 
-  // Internal state below guarded by a mutex.
+  // Pending awaiters are guarded by a mutex.
   std::mutex mu;
   std::condition_variable cv;
-
   std::vector> awaiters;
 };
 
@@ -291,13 +291,13 @@ extern "C" void mlirAsyncRuntimeEmplaceValue(AsyncValue 
*value) {
 extern "C" void mlirAsyncRuntimeAwaitToken(AsyncToken *token) {
   std::unique_lock lock(token->mu);
   if (!token->ready)
-token->cv.wait(lock, [token] { return token->ready; });
+token->cv.wait(lock, [token] { return token->ready.load(); });
 }
 
 extern "C" void mlirAsyncRuntimeAwaitValue(AsyncValue *value) {
   std::unique_lock lock(value->mu);
   if (!value->ready)
-value->cv.wait(lock, [value] { return value->ready; });
+value->cv.wait(lock, [value] { return value->ready.load(); });
 }
 
 extern "C" void mlirAsyncRuntimeAwaitAllInGroup(AsyncGroup *group) {
@@ -319,34 +319,37 @@ extern "C" void mlirAsyncRuntimeExecute(CoroHandle 
handle, CoroResume resume) {
 extern "C" void mlirAsyncRuntimeAwaitTokenAndExecute(AsyncToken *token,
  CoroHandle handle,
  CoroResume resume) {
-  std::unique_lock lock(token->mu);
   auto execute = [handle, resume]() { (*resume)(handle); };
-  if (token->ready)
+  if (token->ready) {
 execute();
-  else
+  } else {
+std::unique_lock lock(token->mu);
 token->awaiters.push_back([execute]() { execute(); });
+  }
 }
 
 extern "C" void mlirAsyncRuntimeAwaitValueAndExecute(AsyncValue *value,
  CoroHandle handle,
  CoroResume resume) {
-  std::unique_lock lock(value->mu);
   auto execute = [handle, resume]() { (*resume)(handle); };
-  if (value->ready)
+  if (value->ready) {
 execute();
-  else
+  } else {
+std::unique_lock lock(value->mu);
 value->awaiters.push_back([execute]() { execute(); });
+  }
 }
 
 extern "C" void mlirAsyncRuntimeAwaitAllInGroupAndExecute(AsyncGroup *group,
   CoroHandle handle,
   CoroResume resume) {
-  std::unique_lock lock(group->mu);
   auto execute = [handle, resume]() { (*resume)(handle); };
-  if (group->pendingTokens == 0)
+  if (group->pendingTokens == 0) {
 execute();
-  else
+  } else {
+std::unique_lock loc

[llvm-branch-commits] [llvm] ccec2cf - Reland "[NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor"

[Mircea Trofin via llvm-branch-commits]

Author: Mircea Trofin
Date: 2021-01-20T13:33:43-08:00
New Revision: ccec2cf1d9d7e991ef5a2ff2b02d466ebe6cd7a5

URL: 
https://github.com/llvm/llvm-project/commit/ccec2cf1d9d7e991ef5a2ff2b02d466ebe6cd7a5
DIFF: 
https://github.com/llvm/llvm-project/commit/ccec2cf1d9d7e991ef5a2ff2b02d466ebe6cd7a5.diff

LOG: Reland "[NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor"

This reverts commit d97f776be5f8cd3cd446fe73827cd355f6bab4e1.

The original problem was due to build failures in shared lib builds. D95079
moved ImportedFunctionsInliningStatistics under Analysis, unblocking
this.

Added: 


Modified: 
llvm/include/llvm/Analysis/InlineAdvisor.h
llvm/include/llvm/Analysis/MLInlineAdvisor.h
llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
llvm/include/llvm/Analysis/Utils/ImportedFunctionsInliningStatistics.h
llvm/include/llvm/Transforms/IPO/Inliner.h
llvm/lib/Analysis/ImportedFunctionsInliningStatistics.cpp
llvm/lib/Analysis/InlineAdvisor.cpp
llvm/lib/Analysis/MLInlineAdvisor.cpp
llvm/lib/Analysis/ReplayInlineAdvisor.cpp
llvm/lib/Transforms/IPO/Inliner.cpp
llvm/lib/Transforms/IPO/SampleProfile.cpp
llvm/test/Transforms/Inline/inline_stats.ll

Removed: 




diff  --git a/llvm/include/llvm/Analysis/InlineAdvisor.h 
b/llvm/include/llvm/Analysis/InlineAdvisor.h
index 295e677126d6..bd046d89aa8d 100644
--- a/llvm/include/llvm/Analysis/InlineAdvisor.h
+++ b/llvm/include/llvm/Analysis/InlineAdvisor.h
@@ -12,6 +12,7 @@
 #include "llvm/Analysis/InlineCost.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/IR/PassManager.h"
+#include "llvm/Analysis/Utils/ImportedFunctionsInliningStatistics.h"
 #include 
 #include 
 
@@ -65,10 +66,7 @@ class InlineAdvice {
   /// behavior by implementing the corresponding record*Impl.
   ///
   /// Call after inlining succeeded, and did not result in deleting the callee.
-  void recordInlining() {
-markRecorded();
-recordInliningImpl();
-  }
+  void recordInlining();
 
   /// Call after inlining succeeded, and resulted in deleting the callee.
   void recordInliningWithCalleeDeleted();
@@ -114,6 +112,7 @@ class InlineAdvice {
 assert(!Recorded && "Recording should happen exactly once");
 Recorded = true;
   }
+  void recordInlineStatsIfNeeded();
 
   bool Recorded = false;
 };
@@ -141,7 +140,7 @@ class DefaultInlineAdvice : public InlineAdvice {
 class InlineAdvisor {
 public:
   InlineAdvisor(InlineAdvisor &&) = delete;
-  virtual ~InlineAdvisor() { freeDeletedFunctions(); }
+  virtual ~InlineAdvisor();
 
   /// Get an InlineAdvice containing a recommendation on whether to
   /// inline or not. \p CB is assumed to be a direct call. \p FAM is assumed to
@@ -163,12 +162,14 @@ class InlineAdvisor {
   virtual void onPassExit() {}
 
 protected:
-  InlineAdvisor(FunctionAnalysisManager &FAM) : FAM(FAM) {}
+  InlineAdvisor(Module &M, FunctionAnalysisManager &FAM);
   virtual std::unique_ptr getAdviceImpl(CallBase &CB) = 0;
   virtual std::unique_ptr getMandatoryAdvice(CallBase &CB,
bool Advice);
 
+  Module &M;
   FunctionAnalysisManager &FAM;
+  std::unique_ptr ImportedFunctionsStats;
 
   /// We may want to defer deleting functions to after the inlining for a whole
   /// module has finished. This allows us to reliably use function pointers as
@@ -202,8 +203,9 @@ class InlineAdvisor {
 /// reusable as-is for inliner pass test scenarios, as well as for regular use.
 class DefaultInlineAdvisor : public InlineAdvisor {
 public:
-  DefaultInlineAdvisor(FunctionAnalysisManager &FAM, InlineParams Params)
-  : InlineAdvisor(FAM), Params(Params) {}
+  DefaultInlineAdvisor(Module &M, FunctionAnalysisManager &FAM,
+   InlineParams Params)
+  : InlineAdvisor(M, FAM), Params(Params) {}
 
 private:
   std::unique_ptr getAdviceImpl(CallBase &CB) override;

diff  --git a/llvm/include/llvm/Analysis/MLInlineAdvisor.h 
b/llvm/include/llvm/Analysis/MLInlineAdvisor.h
index 1afccf84ee48..54edbb823263 100644
--- a/llvm/include/llvm/Analysis/MLInlineAdvisor.h
+++ b/llvm/include/llvm/Analysis/MLInlineAdvisor.h
@@ -50,7 +50,6 @@ class MLInlineAdvisor : public InlineAdvisor {
   virtual std::unique_ptr
   getAdviceFromModel(CallBase &CB, OptimizationRemarkEmitter &ORE);
 
-  Module &M;
   std::unique_ptr ModelRunner;
 
 private:

diff  --git a/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h 
b/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
index 7e2b0957436d..9ef572f7ab87 100644
--- a/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
+++ b/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
@@ -24,8 +24,9 @@ class OptimizationRemarkEmitter;
 /// previous build to guide current inlining. This is useful for inliner 
tuning.
 class ReplayInlineAdvisor : public InlineAdvisor {
 public:
-  ReplayInlineAdvisor(FunctionAnalysisManager &FAM, LLVMContext &Context,
-  

[llvm-branch-commits] [clang] 7b5d7c7 - [hip] Fix `` compilation on Windows with VS2019.

[Michael Liao via llvm-branch-commits]

Author: Michael Liao
Date: 2021-01-20T16:43:44-05:00
New Revision: 7b5d7c7b0a2479de007ad18b947459b71667

URL: 
https://github.com/llvm/llvm-project/commit/7b5d7c7b0a2479de007ad18b947459b71667
DIFF: 
https://github.com/llvm/llvm-project/commit/7b5d7c7b0a2479de007ad18b947459b71667.diff

LOG: [hip] Fix `` compilation on Windows with VS2019.

Differential Revision: https://reviews.llvm.org/D95075

Added: 


Modified: 
clang/lib/Headers/__clang_hip_cmath.h

Removed: 




diff  --git a/clang/lib/Headers/__clang_hip_cmath.h 
b/clang/lib/Headers/__clang_hip_cmath.h
index 128d64e271b8..cd22a2df954b 100644
--- a/clang/lib/Headers/__clang_hip_cmath.h
+++ b/clang/lib/Headers/__clang_hip_cmath.h
@@ -626,6 +626,13 @@ _GLIBCXX_END_NAMESPACE_VERSION
 
 // Define device-side math functions from  on MSVC.
 #if defined(_MSC_VER)
+
+// Before VS2019, `` is also included in `` and other headers.
+// But, from VS2019, it's only included in ``. Need to include
+// `` here to ensure C functions declared there won't be markded as
+// `__host__` and `__device__` through `` wrapper.
+#include 
+
 #if defined(__cplusplus)
 extern "C" {
 #endif // defined(__cplusplus)



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[llvm-branch-commits] [llvm] 079967c - [NFC][AMDGPU] Document target ID syntax for code object V2 to V3

[Tony Tye via llvm-branch-commits]

Author: Tony Tye
Date: 2021-01-20T21:48:52Z
New Revision: 079967cdf9e48c9fc000f480eaa7b11710d85529

URL: 
https://github.com/llvm/llvm-project/commit/079967cdf9e48c9fc000f480eaa7b11710d85529
DIFF: 
https://github.com/llvm/llvm-project/commit/079967cdf9e48c9fc000f480eaa7b11710d85529.diff

LOG: [NFC][AMDGPU] Document target ID syntax for code object V2 to V3

Differential Revision: https://reviews.llvm.org/D95018

Added: 


Modified: 
llvm/docs/AMDGPUUsage.rst

Removed: 




diff  --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index f661684d9b74..e862ed1ca3ba 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -524,13 +524,35 @@ description. The AMDGPU target specific information is:
 **target-feature**
   Is a target feature name specified in :ref:`amdgpu-target-features-table` 
that
   is supported by the processor. The target features supported by each 
processor
-  is specified in :ref:`amdgpu-processor-table`. Those that can be specifeid in
+  is specified in :ref:`amdgpu-processor-table`. Those that can be specified in
   a target ID are marked as being controlled by ``-mcpu`` and
   ``--offload-arch``. Each target feature must appear at most once in a target
   ID. The non-canonical form target ID allows the target features to be
   specified in any order. The canonical form target ID requires the target
   features to be specified in alphabetic order.
 
+.. _amdgpu-target-id-v2-v3:
+
+Code Object V2 to V3 Target ID
+~~
+
+The target ID syntax for code object V2 to V3 is the same as defined in `Clang
+Offload Bundler `_ except
+when used in the :ref:`amdgpu-assembler-directive-amdgcn-target` assembler
+directive and the bundle entry ID. In those cases it has the following BNF
+syntax:
+
+.. code::
+
+   ::==  ( "+"  )*
+
+Where a target feature is omitted if *Off* and present if *On* or *Any*.
+
+.. note::
+
+  The code object V2 to V3 cannot represent *Any* and treats it the same as
+  *On*.
+
 .. _amdgpu-embedding-bundled-objects:
 
 Embedding Bundled Code Objects
@@ -540,6 +562,11 @@ AMDGPU supports the HIP and OpenMP languages that perform 
code object embedding
 as described in `Clang Offload Bundler
 `_.
 
+.. note::
+
+  The target ID syntax used for code object V2 to V3 for a bundle entry ID
+  
diff ers from that used elsewhere. See :ref:`amdgpu-target-id-v2-v3`.
+
 .. _amdgpu-address-spaces:
 
 Address Spaces
@@ -9196,6 +9223,8 @@ architecture processors, and are not OS-specific. 
Directives which begin with
 ``amdhsa`` OS is specified. See :ref:`amdgpu-target-triples` and
 :ref:`amdgpu-processors`.
 
+.. _amdgpu-assembler-directive-amdgcn-target:
+
 .amdgcn_target  "-" 
 ++
 
@@ -9205,6 +9234,11 @@ command-line options such as ``-triple``, ``-mcpu``, and
 ``--offload-arch=``. A non-canonical target ID is allowed. See
 :ref:`amdgpu-target-triples` and :ref:`amdgpu-target-id`.
 
+.. note::
+
+  The target ID syntax used for code object V2 to V3 for this directive 
diff ers
+  from that used elsewhere. See :ref:`amdgpu-target-id-v2-v3`.
+
 .amdhsa_kernel 
 +
 



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[llvm-branch-commits] [mlir] 555a395 - [mlir] NFC - Fix unused variable in non-debug mode

[Nicolas Vasilache via llvm-branch-commits]

Author: Nicolas Vasilache
Date: 2021-01-20T22:20:38Z
New Revision: 555a395f2ccd531159538668fa36c7dc63ecff60

URL: 
https://github.com/llvm/llvm-project/commit/555a395f2ccd531159538668fa36c7dc63ecff60
DIFF: 
https://github.com/llvm/llvm-project/commit/555a395f2ccd531159538668fa36c7dc63ecff60.diff

LOG: [mlir] NFC - Fix unused variable in non-debug mode

Added: 


Modified: 
mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td

Removed: 




diff  --git 
a/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td 
b/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
index b8009a818aa0..7f3839a02b2f 100644
--- a/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
+++ b/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
@@ -1083,9 +1083,11 @@ def LinalgStructuredInterface : OpInterface<"LinalgOp"> {
   Operation::operand_range res{
 getOperation()->getOperands().begin() + getNumShapedOperands(),
 getOperation()->getOperands().end()};
-  for (Type t : TypeRange{res})
+  for (Type t : TypeRange{res}) {
+(void)t;
 assert((t.isSignlessIntOrIndexOrFloat() || t.template 
isa())
&&"expected scalar or vector type");
+  }
   return res;
 }
 



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[llvm-branch-commits] [lldb] 6afdf13 - Makefile.rules: Avoid redundant .d generation (make restart) and inline archive rule to the only test

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2021-01-20T14:22:33-08:00
New Revision: 6afdf13ae4ccf00296065960a0b311c87e6f8dd5

URL: 
https://github.com/llvm/llvm-project/commit/6afdf13ae4ccf00296065960a0b311c87e6f8dd5
DIFF: 
https://github.com/llvm/llvm-project/commit/6afdf13ae4ccf00296065960a0b311c87e6f8dd5.diff

LOG: Makefile.rules: Avoid redundant .d generation (make restart) and inline 
archive rule to the only test

Take an example when `CXX_SOURCES` is main.cpp.

main.d is an included file. make will rebuild main.d, re-executes itself [1] to 
read
in the new main.d file, then rebuild main.o, finally link main.o into a.out.
main.cpp is parsed twice in this process.

This patch merges .d generation into .o generation [2], writes explicit rules
for .c/.m and deletes suffix rules for %.m and %.o. Since a target can be
satisfied by either of .c/.cpp/.m/.mm, we use multiple pattern rules. The
rule with the prerequisite (with VPATH considered) satisfied is used [3].

Since suffix rules are disabled, the implicit rule for archive member targets is
no long available [4]. Rewrite, simplify the archive rule and inline it into the
only test `test/API/functionalities/archives/Makefile`.

[1]: https://www.gnu.org/software/make/manual/html_node/Remaking-Makefiles.html
[2]: http://make.mad-scientist.net/papers/advanced-auto-dependency-generation/
[3]: https://www.gnu.org/software/make/manual/html_node/Pattern-Match.html
[4]: https://www.gnu.org/software/make/manual/html_node/Archive-Update.html

ObjC/ObjCXX tests only run on macOS. I don't have testing environment.  Hope
someone can do it for me.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D94890

Added: 


Modified: 
lldb/packages/Python/lldbsuite/test/make/Makefile.rules
lldb/test/API/functionalities/archives/Makefile

Removed: 




diff  --git a/lldb/packages/Python/lldbsuite/test/make/Makefile.rules 
b/lldb/packages/Python/lldbsuite/test/make/Makefile.rules
index d715f1ca24e4..374dd6865d88 100644
--- a/lldb/packages/Python/lldbsuite/test/make/Makefile.rules
+++ b/lldb/packages/Python/lldbsuite/test/make/Makefile.rules
@@ -26,15 +26,13 @@
 # SPLIT_DEBUG_SYMBOLS := YES
 # CROSS_COMPILE :=
 # USE_PRIVATE_MODULE_CACHE := YES
-#
-# And test/functionalities/archives/Makefile:
-# MAKE_DSYM := NO
-# ARCHIVE_NAME := libfoo.a
-# ARCHIVE_C_SOURCES := a.c b.c
 
 # Uncomment line below for debugging shell commands
 # SHELL = /bin/sh -x
 
+# Suppress built-in suffix rules. We explicitly define rules for %.o.
+.SUFFIXES:
+
 SRCDIR := $(shell dirname $(firstword $(MAKEFILE_LIST)))
 BUILDDIR := $(shell pwd)
 MAKEFILE_RULES := $(lastword $(MAKEFILE_LIST))
@@ -477,42 +475,6 @@ ifneq "$(strip $(OBJCXX_SOURCES))" ""
endif
 endif
 
-#--
-# Check if we have any C source files for archive
-#--
-ifneq "$(strip $(ARCHIVE_C_SOURCES))" ""
-   ARCHIVE_OBJECTS +=$(strip $(ARCHIVE_C_SOURCES:.c=.o))
-endif
-
-#--
-# Check if we have any C++ source files for archive
-#--
-ifneq "$(strip $(ARCHIVE_CXX_SOURCES))" ""
-   ARCHIVE_OBJECTS +=$(strip $(ARCHIVE_CXX_SOURCES:.cpp=.o))
-   CXX = $(call cxx_compiler,$(CC))
-   LD = $(call cxx_linker,$(CC))
-endif
-
-#--
-# Check if we have any ObjC source files for archive
-#--
-ifneq "$(strip $(ARCHIVE_OBJC_SOURCES))" ""
-   ARCHIVE_OBJECTS +=$(strip $(ARCHIVE_OBJC_SOURCES:.m=.o))
-   LDFLAGS +=-lobjc
-endif
-
-#--
-# Check if we have any ObjC++ source files for archive
-#--
-ifneq "$(strip $(ARCHIVE_OBJCXX_SOURCES))" ""
-   ARCHIVE_OBJECTS +=$(strip $(ARCHIVE_OBJCXX_SOURCES:.mm=.o))
-   CXX = $(call cxx_compiler,$(CC))
-   LD = $(call cxx_linker,$(CC))
-   ifeq "$(findstring lobjc,$(LDFLAGS))" ""
-   LDFLAGS +=-lobjc
-   endif
-endif
-
 ifeq ($(findstring clang, $(CXX)), clang)
CXXFLAGS += --driver-mode=g++
 endif
@@ -534,8 +496,8 @@ endif
 #--
 ifneq "$(DYLIB_NAME)" ""
 ifeq "$(DYLIB_ONLY)" ""
-$(EXE) : $(OBJECTS) $(ARCHIVE_NAME) $(DYLIB_FILENAME)
-   $(LD) $(OBJECTS) $(ARCHIVE_NAME) -L. -l$(DYLIB_NAME) $(LDFLAGS) -o 
"$(EXE)"
+$(EXE) : $(OBJECTS) $(DYLIB_FILENAME)
+   $(LD) $(OBJECTS) -L. -l$(DYLIB_NAME) $(LDFLAGS) -o "$(EXE)"
 ifneq "$(CODESIGN)" ""
$(CODESIGN) -s - "$(EXE)"
 endif
@@ -543,8 +505,8 @@ else
 EXE = $(DYLIB_FILENAME)
 endif
 else
-$(EXE) : $(

[llvm-branch-commits] [llvm] 045d84f - D94954: Fixes Snapdragon Kryo CPU core detection

[David Green via llvm-branch-commits]

Author: Ryan Houdek
Date: 2021-01-20T22:23:43Z
New Revision: 045d84f4e6d7d6bbccaa6d965669a068fc329809

URL: 
https://github.com/llvm/llvm-project/commit/045d84f4e6d7d6bbccaa6d965669a068fc329809
DIFF: 
https://github.com/llvm/llvm-project/commit/045d84f4e6d7d6bbccaa6d965669a068fc329809.diff

LOG: D94954: Fixes Snapdragon Kryo CPU core detection

All of these families were claiming to be a73 based, which was causing
-mcpu/mtune=native to never use the newer features available to these
cores.

Goes through each and bumps the individual cores to their respective Big
counterparts. Since this code path doesn't support big.little detection,
there was already a precedent set with the Qualcomm line to choose the
big cores only.

Adds a comment on each line for the product's name that the part number
refers to. Confirmed on-device and through Linux header naming
convections.

Additionally newer SoCs mix CPU implementer parts from multiple
implementers. Both 0x41 (ARM) and 0x51 (Qualcomm) in the Snapdragon case

This was causing a desync in information where the scan at the start to
find the implementer would mismatch the part scan later on.
Now scan for both implementer and part at the start so these stay in
sync.

Differential Revision: https://reviews.llvm.org/D94954

Added: 


Modified: 
llvm/lib/Support/Host.cpp
llvm/unittests/Support/Host.cpp

Removed: 




diff  --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
index ea561abb28878..a1bd3cc12f1d1 100644
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -161,11 +161,14 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef 
ProcCpuinfoContent) {
   // Look for the CPU implementer line.
   StringRef Implementer;
   StringRef Hardware;
+  StringRef Part;
   for (unsigned I = 0, E = Lines.size(); I != E; ++I) {
 if (Lines[I].startswith("CPU implementer"))
   Implementer = Lines[I].substr(15).ltrim("\t :");
 if (Lines[I].startswith("Hardware"))
   Hardware = Lines[I].substr(8).ltrim("\t :");
+if (Lines[I].startswith("CPU part"))
+  Part = Lines[I].substr(8).ltrim("\t :");
   }
 
   if (Implementer == "0x41") { // ARM Ltd.
@@ -175,111 +178,89 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef 
ProcCpuinfoContent) {
   return "cortex-a53";
 
 
-// Look for the CPU part line.
-for (unsigned I = 0, E = Lines.size(); I != E; ++I)
-  if (Lines[I].startswith("CPU part"))
-// The CPU part is a 3 digit hexadecimal number with a 0x prefix. The
-// values correspond to the "Part number" in the CP15/c0 register. The
-// contents are specified in the various processor manuals.
-// This corresponds to the Main ID Register in Technical Reference 
Manuals.
-// and is used in programs like sys-utils
-return StringSwitch(Lines[I].substr(8).ltrim("\t :"))
-.Case("0x926", "arm926ej-s")
-.Case("0xb02", "mpcore")
-.Case("0xb36", "arm1136j-s")
-.Case("0xb56", "arm1156t2-s")
-.Case("0xb76", "arm1176jz-s")
-.Case("0xc08", "cortex-a8")
-.Case("0xc09", "cortex-a9")
-.Case("0xc0f", "cortex-a15")
-.Case("0xc20", "cortex-m0")
-.Case("0xc23", "cortex-m3")
-.Case("0xc24", "cortex-m4")
-.Case("0xd22", "cortex-m55")
-.Case("0xd02", "cortex-a34")
-.Case("0xd04", "cortex-a35")
-.Case("0xd03", "cortex-a53")
-.Case("0xd07", "cortex-a57")
-.Case("0xd08", "cortex-a72")
-.Case("0xd09", "cortex-a73")
-.Case("0xd0a", "cortex-a75")
-.Case("0xd0b", "cortex-a76")
-.Case("0xd0d", "cortex-a77")
-.Case("0xd41", "cortex-a78")
-.Case("0xd44", "cortex-x1")
-.Case("0xd0c", "neoverse-n1")
-.Case("0xd49", "neoverse-n2")
-.Default("generic");
+// The CPU part is a 3 digit hexadecimal number with a 0x prefix. The
+// values correspond to the "Part number" in the CP15/c0 register. The
+// contents are specified in the various processor manuals.
+// This corresponds to the Main ID Register in Technical Reference Manuals.
+// and is used in programs like sys-utils
+return StringSwitch(Part)
+.Case("0x926", "arm926ej-s")
+.Case("0xb02", "mpcore")
+.Case("0xb36", "arm1136j-s")
+.Case("0xb56", "arm1156t2-s")
+.Case("0xb76", "arm1176jz-s")
+.Case("0xc08", "cortex-a8")
+.Case("0xc09", "cortex-a9")
+.Case("0xc0f", "cortex-a15")
+.Case("0xc20", "cortex-m0")
+.Case("0xc23", "cortex-m3")
+.Case("0xc24", "cortex-m4")
+.Case("0xd22", "cortex-m55")
+.Case("0xd02", "cortex-a34")
+.Case("0xd04", "cortex-a35")
+.Case("0xd03", "cortex-a53")
+.Case("0xd07", "cortex-a57

[llvm-branch-commits] [mlir] 5959c28 - [mlir][sparse] add asserts on reading in tensor data

[Aart Bik via llvm-branch-commits]

Author: Aart Bik
Date: 2021-01-20T14:30:13-08:00
New Revision: 5959c28f24856f3d4a1db6b4743c66bdc6dcd735

URL: 
https://github.com/llvm/llvm-project/commit/5959c28f24856f3d4a1db6b4743c66bdc6dcd735
DIFF: 
https://github.com/llvm/llvm-project/commit/5959c28f24856f3d4a1db6b4743c66bdc6dcd735.diff

LOG: [mlir][sparse] add asserts on reading in tensor data

Rationale:
Since I made the argument that metadata helps with extra
verification checks, I better actually do that ;-)

Reviewed By: penpornk

Differential Revision: https://reviews.llvm.org/D95072

Added: 


Modified: 
mlir/lib/ExecutionEngine/SparseUtils.cpp

Removed: 




diff  --git a/mlir/lib/ExecutionEngine/SparseUtils.cpp 
b/mlir/lib/ExecutionEngine/SparseUtils.cpp
index 376b989975b5..d1962661fe79 100644
--- a/mlir/lib/ExecutionEngine/SparseUtils.cpp
+++ b/mlir/lib/ExecutionEngine/SparseUtils.cpp
@@ -48,9 +48,9 @@ namespace {
 /// and a rank-5 tensor element like
 ///   ({i,j,k,l,m}, a[i,j,k,l,m])
 struct Element {
-  Element(const std::vector &ind, double val)
+  Element(const std::vector &ind, double val)
   : indices(ind), value(val){};
-  std::vector indices;
+  std::vector indices;
   double value;
 };
 
@@ -61,9 +61,15 @@ struct Element {
 /// formats require the elements to appear in lexicographic index order).
 struct SparseTensor {
 public:
-  SparseTensor(int64_t capacity) : pos(0) { elements.reserve(capacity); }
+  SparseTensor(const std::vector &szs, uint64_t capacity)
+  : sizes(szs), pos(0) {
+elements.reserve(capacity);
+  }
   // Add element as indices and value.
-  void add(const std::vector &ind, double val) {
+  void add(const std::vector &ind, double val) {
+assert(sizes.size() == ind.size());
+for (int64_t r = 0, rank = sizes.size(); r < rank; r++)
+  assert(ind[r] < sizes[r]); // within bounds
 elements.emplace_back(Element(ind, val));
   }
   // Sort elements lexicographically by index.
@@ -82,6 +88,8 @@ struct SparseTensor {
 }
 return false;
   }
+
+  std::vector sizes; // per-rank dimension sizes
   std::vector elements;
   uint64_t pos;
 };
@@ -225,20 +233,24 @@ extern "C" void *openTensorC(char *filename, uint64_t 
*idata) {
 fprintf(stderr, "Unknown format %s\n", filename);
 exit(1);
   }
-  // Read all nonzero elements.
+  // Prepare sparse tensor object with per-rank dimension sizes
+  // and the number of nonzeros as initial capacity.
   uint64_t rank = idata[0];
   uint64_t nnz = idata[1];
-  SparseTensor *tensor = new SparseTensor(nnz);
-  std::vector indices(rank);
-  double value;
+  std::vector indices(rank);
+  for (uint64_t r = 0; r < rank; r++)
+indices[r] = idata[2 + r];
+  SparseTensor *tensor = new SparseTensor(indices, nnz);
+  // Read all nonzero elements.
   for (uint64_t k = 0; k < nnz; k++) {
 for (uint64_t r = 0; r < rank; r++) {
-  if (fscanf(file, "%" PRId64, &indices[r]) != 1) {
+  if (fscanf(file, "%" PRIu64, &indices[r]) != 1) {
 fprintf(stderr, "Cannot find next index in %s\n", filename);
 exit(1);
   }
   indices[r]--; // 0-based index
 }
+double value;
 if (fscanf(file, "%lg\n", &value) != 1) {
   fprintf(stderr, "Cannot find next value in %s\n", filename);
   exit(1);



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[llvm-branch-commits] [mlir] 735a07f - Revert "[mlir][Affine] Add support for multi-store producer fusion"

[Diego Caballero via llvm-branch-commits]

Author: Diego Caballero
Date: 2021-01-21T00:37:23+02:00
New Revision: 735a07f0478566f6f7c60a8a98eb8884db574113

URL: 
https://github.com/llvm/llvm-project/commit/735a07f0478566f6f7c60a8a98eb8884db574113
DIFF: 
https://github.com/llvm/llvm-project/commit/735a07f0478566f6f7c60a8a98eb8884db574113.diff

LOG: Revert "[mlir][Affine] Add support for multi-store producer fusion"

This reverts commit 7dd198852b4db52ae22242dfeda4eccda83aa8b2.

ASAN issue.

Added: 


Modified: 
mlir/include/mlir/Analysis/AffineStructures.h
mlir/include/mlir/Analysis/Utils.h
mlir/include/mlir/Transforms/LoopFusionUtils.h
mlir/include/mlir/Transforms/Passes.td
mlir/lib/Analysis/AffineStructures.cpp
mlir/lib/Analysis/Utils.cpp
mlir/lib/Transforms/LoopFusion.cpp
mlir/lib/Transforms/Utils/LoopFusionUtils.cpp
mlir/test/Transforms/loop-fusion.mlir

Removed: 




diff  --git a/mlir/include/mlir/Analysis/AffineStructures.h 
b/mlir/include/mlir/Analysis/AffineStructures.h
index 893d4ea4ff46..fa80db7d4b63 100644
--- a/mlir/include/mlir/Analysis/AffineStructures.h
+++ b/mlir/include/mlir/Analysis/AffineStructures.h
@@ -234,21 +234,6 @@ class FlatAffineConstraints {
   //  TODO: add support for non-unit strides.
   LogicalResult addAffineForOpDomain(AffineForOp forOp);
 
-  /// Adds constraints (lower and upper bounds) for each loop in the loop nest
-  /// described by the bound maps 'lbMaps' and 'ubMaps' of a computation slice.
-  /// Every pair ('lbMaps[i]', 'ubMaps[i]') describes the bounds of a loop in
-  /// the nest, sorted outer-to-inner. 'operands' contains the bound operands
-  /// for a single bound map. All the bound maps will use the same bound
-  /// operands. Note that some loops described by a computation slice might not
-  /// exist yet in the IR so the Value attached to those dimension identifiers
-  /// might be empty. For that reason, this method doesn't perform Value
-  /// look-ups to retrieve the dimension identifier positions. Instead, it
-  /// assumes the position of the dim identifiers in the constraint system is
-  /// the same as the position of the loop in the loop nest.
-  LogicalResult addDomainFromSliceMaps(ArrayRef lbMaps,
-   ArrayRef ubMaps,
-   ArrayRef operands);
-
   /// Adds constraints imposed by the `affine.if` operation. These constraints
   /// are collected from the IntegerSet attached to the given `affine.if`
   /// instance argument (`ifOp`). It is asserted that:

diff  --git a/mlir/include/mlir/Analysis/Utils.h 
b/mlir/include/mlir/Analysis/Utils.h
index ee6f8095f25e..30b6272181f5 100644
--- a/mlir/include/mlir/Analysis/Utils.h
+++ b/mlir/include/mlir/Analysis/Utils.h
@@ -83,25 +83,10 @@ struct ComputationSliceState {
   // Clears all bounds and operands in slice state.
   void clearBounds();
 
-  /// Returns true if the computation slice is empty.
+  /// Return true if the computation slice is empty.
   bool isEmpty() const { return ivs.empty(); }
 
-  /// Returns true if the computation slice encloses all the iterations of the
-  /// sliced loop nest. Returns false if it does not. Returns llvm::None if it
-  /// cannot determine if the slice is maximal or not.
-  // TODO: Cache 'isMaximal' so that we don't recompute it when the slice
-  // information hasn't changed.
-  Optional isMaximal() const;
-
   void dump() const;
-
-private:
-  /// Fast check to determine if the computation slice is maximal. Returns true
-  /// if each slice dimension maps to an existing dst dimension and both the 
src
-  /// and the dst loops for those dimensions have the same bounds. Returns 
false
-  /// if both the src and the dst loops don't have the same bounds. Returns
-  /// llvm::None if none of the above can be proven.
-  Optional isSliceMaximalFastCheck() const;
 };
 
 /// Computes the computation slice loop bounds for one loop nest as affine maps

diff  --git a/mlir/include/mlir/Transforms/LoopFusionUtils.h 
b/mlir/include/mlir/Transforms/LoopFusionUtils.h
index 10d6b83d022f..eade565e0325 100644
--- a/mlir/include/mlir/Transforms/LoopFusionUtils.h
+++ b/mlir/include/mlir/Transforms/LoopFusionUtils.h
@@ -50,8 +50,7 @@ struct FusionResult {
 // TODO: Generalize utilities so that producer-consumer and sibling fusion
 // strategies can be used without the assumptions made in the AffineLoopFusion
 // pass.
-class FusionStrategy {
-public:
+struct FusionStrategy {
   enum StrategyEnum {
 // Generic loop fusion: Arbitrary loops are considered for fusion. No
 // assumptions about a specific fusion strategy from AffineLoopFusion pass
@@ -70,34 +69,13 @@ class FusionStrategy {
 // implementation in AffineLoopFusion pass are made. See pass for specific
 // details.
 Sibling
-  };
+  } strategy;
 
-  /// Construct a generic or producer-consumer fusion strategy.
-  FusionStrategy(StrategyEnum strategy) : strateg

[llvm-branch-commits] [llvm] e996f1d - [RISCV] Add another isel pattern for slliu.w.

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-20T14:54:40-08:00
New Revision: e996f1d4194bccf1c8ca984d695b848c0093bc23

URL: 
https://github.com/llvm/llvm-project/commit/e996f1d4194bccf1c8ca984d695b848c0093bc23
DIFF: 
https://github.com/llvm/llvm-project/commit/e996f1d4194bccf1c8ca984d695b848c0093bc23.diff

LOG: [RISCV] Add another isel pattern for slliu.w.

Previously we only matched (and (shl X, C1), 0x << C1)
which matches the InstCombine canonicalization order. But its
possible to see (shl (and X, 0x), C1) if the pattern
is introduced in SelectionDAG. For example, through expansion of
a GEP.

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
llvm/test/CodeGen/RISCV/rv64Zbb.ll

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
index c7bfe99bc712..205f8e65e655 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
@@ -842,6 +842,8 @@ def : Pat<(and (add GPR:$rs, simm12:$simm12), (i64 
0x)),
   (ADDIWU GPR:$rs, simm12:$simm12)>;
 def : Pat<(SLLIUWPat GPR:$rs1, uimm5:$shamt),
   (SLLIUW GPR:$rs1, uimm5:$shamt)>;
+def : Pat<(shl (and GPR:$rs1, 0x), uimm5:$shamt),
+  (SLLIUW GPR:$rs1, uimm5:$shamt)>;
 def : Pat<(and (add GPR:$rs1, GPR:$rs2), (i64 0x)),
   (ADDWU GPR:$rs1, GPR:$rs2)>;
 def : Pat<(and (sub GPR:$rs1, GPR:$rs2), (i64 0x)),

diff  --git a/llvm/test/CodeGen/RISCV/rv64Zbb.ll 
b/llvm/test/CodeGen/RISCV/rv64Zbb.ll
index f4ac43c17d92..56ae050342ee 100644
--- a/llvm/test/CodeGen/RISCV/rv64Zbb.ll
+++ b/llvm/test/CodeGen/RISCV/rv64Zbb.ll
@@ -1070,8 +1070,7 @@ define i128 @slliuw_2(i32 signext %0, i128* %1) {
 ;
 ; RV64IB-LABEL: slliuw_2:
 ; RV64IB:   # %bb.0:
-; RV64IB-NEXT:zext.w a0, a0
-; RV64IB-NEXT:slli a0, a0, 4
+; RV64IB-NEXT:slliu.w a0, a0, 4
 ; RV64IB-NEXT:add a1, a1, a0
 ; RV64IB-NEXT:ld a0, 0(a1)
 ; RV64IB-NEXT:ld a1, 8(a1)
@@ -1079,8 +1078,7 @@ define i128 @slliuw_2(i32 signext %0, i128* %1) {
 ;
 ; RV64IBB-LABEL: slliuw_2:
 ; RV64IBB:   # %bb.0:
-; RV64IBB-NEXT:zext.w a0, a0
-; RV64IBB-NEXT:slli a0, a0, 4
+; RV64IBB-NEXT:slliu.w a0, a0, 4
 ; RV64IBB-NEXT:add a1, a1, a0
 ; RV64IBB-NEXT:ld a0, 0(a1)
 ; RV64IBB-NEXT:ld a1, 8(a1)



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[llvm-branch-commits] [llvm] 0f8386c - [RISCV] Add addu.w and slliu.w test that uses getelementptr with zero extended indices.

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-20T14:54:40-08:00
New Revision: 0f8386c4f6aa804fe43814fcb3ae29d271da82d7

URL: 
https://github.com/llvm/llvm-project/commit/0f8386c4f6aa804fe43814fcb3ae29d271da82d7
DIFF: 
https://github.com/llvm/llvm-project/commit/0f8386c4f6aa804fe43814fcb3ae29d271da82d7.diff

LOG: [RISCV] Add addu.w and slliu.w test that uses getelementptr with zero 
extended indices.

This is closer to the kind of code that these intrinsics are
targeted at. Note we fail to match slliu.w here because our pattern
looks for (and (shl X, C1), 0x << C1) rather than
(shl (and X, 0x), C1). I'll fix this in a follow up
commit.

Added: 


Modified: 
llvm/test/CodeGen/RISCV/rv64Zbb.ll

Removed: 




diff  --git a/llvm/test/CodeGen/RISCV/rv64Zbb.ll 
b/llvm/test/CodeGen/RISCV/rv64Zbb.ll
index 92ed8e7ed5fa..f4ac43c17d92 100644
--- a/llvm/test/CodeGen/RISCV/rv64Zbb.ll
+++ b/llvm/test/CodeGen/RISCV/rv64Zbb.ll
@@ -1057,6 +1057,40 @@ define i64 @slliuw(i64 %a) nounwind {
   ret i64 %shl
 }
 
+define i128 @slliuw_2(i32 signext %0, i128* %1) {
+; RV64I-LABEL: slliuw_2:
+; RV64I:   # %bb.0:
+; RV64I-NEXT:slli a0, a0, 32
+; RV64I-NEXT:srli a0, a0, 32
+; RV64I-NEXT:slli a0, a0, 4
+; RV64I-NEXT:add a1, a1, a0
+; RV64I-NEXT:ld a0, 0(a1)
+; RV64I-NEXT:ld a1, 8(a1)
+; RV64I-NEXT:ret
+;
+; RV64IB-LABEL: slliuw_2:
+; RV64IB:   # %bb.0:
+; RV64IB-NEXT:zext.w a0, a0
+; RV64IB-NEXT:slli a0, a0, 4
+; RV64IB-NEXT:add a1, a1, a0
+; RV64IB-NEXT:ld a0, 0(a1)
+; RV64IB-NEXT:ld a1, 8(a1)
+; RV64IB-NEXT:ret
+;
+; RV64IBB-LABEL: slliuw_2:
+; RV64IBB:   # %bb.0:
+; RV64IBB-NEXT:zext.w a0, a0
+; RV64IBB-NEXT:slli a0, a0, 4
+; RV64IBB-NEXT:add a1, a1, a0
+; RV64IBB-NEXT:ld a0, 0(a1)
+; RV64IBB-NEXT:ld a1, 8(a1)
+; RV64IBB-NEXT:ret
+  %3 = zext i32 %0 to i64
+  %4 = getelementptr inbounds i128, i128* %1, i64 %3
+  %5 = load i128, i128* %4
+  ret i128 %5
+}
+
 ; We select a i32 add that zero-extends the result on RV64 as addwu
 
 define zeroext i32 @zext_add_to_addwu(i32 signext %a, i32 signext %b) nounwind 
{
@@ -1169,6 +1203,32 @@ define i64 @adduw(i64 %a, i64 %b) nounwind {
   ret i64 %add
 }
 
+define signext i8 @adduw_2(i32 signext %0, i8* %1) {
+; RV64I-LABEL: adduw_2:
+; RV64I:   # %bb.0:
+; RV64I-NEXT:slli a0, a0, 32
+; RV64I-NEXT:srli a0, a0, 32
+; RV64I-NEXT:add a0, a1, a0
+; RV64I-NEXT:lb a0, 0(a0)
+; RV64I-NEXT:ret
+;
+; RV64IB-LABEL: adduw_2:
+; RV64IB:   # %bb.0:
+; RV64IB-NEXT:addu.w a0, a1, a0
+; RV64IB-NEXT:lb a0, 0(a0)
+; RV64IB-NEXT:ret
+;
+; RV64IBB-LABEL: adduw_2:
+; RV64IBB:   # %bb.0:
+; RV64IBB-NEXT:addu.w a0, a1, a0
+; RV64IBB-NEXT:lb a0, 0(a0)
+; RV64IBB-NEXT:ret
+  %3 = zext i32 %0 to i64
+  %4 = getelementptr inbounds i8, i8* %1, i64 %3
+  %5 = load i8, i8* %4
+  ret i8 %5
+}
+
 define i64 @subuw(i64 %a, i64 %b) nounwind {
 ; RV64I-LABEL: subuw:
 ; RV64I:   # %bb.0:



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[llvm-branch-commits] [llvm] bb3f169 - [BuildLibcalls, Attrs] Support more variants of C++'s new, add attributes for C++'s delete

[Dávid Bolvanský via llvm-branch-commits]

Author: Dávid Bolvanský
Date: 2021-01-21T00:12:37+01:00
New Revision: bb3f169b59e1c8bd7fd70097532220bbd11e9967

URL: 
https://github.com/llvm/llvm-project/commit/bb3f169b59e1c8bd7fd70097532220bbd11e9967
DIFF: 
https://github.com/llvm/llvm-project/commit/bb3f169b59e1c8bd7fd70097532220bbd11e9967.diff

LOG: [BuildLibcalls, Attrs] Support more variants of C++'s new, add attributes 
for C++'s delete

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95095

Added: 


Modified: 
llvm/lib/Transforms/Utils/BuildLibCalls.cpp
llvm/test/Transforms/InferFunctionAttrs/annotate.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/BuildLibCalls.cpp 
b/llvm/lib/Transforms/Utils/BuildLibCalls.cpp
index 857c3d915e8c..a14c30071399 100644
--- a/llvm/lib/Transforms/Utils/BuildLibCalls.cpp
+++ b/llvm/lib/Transforms/Utils/BuildLibCalls.cpp
@@ -1001,10 +1001,52 @@ bool llvm::inferLibFuncAttributes(Function &F, const 
TargetLibraryInfo &TLI) {
 Changed |= setDoesNotCapture(F, 0);
 Changed |= setDoesNotCapture(F, 1);
 return Changed;
+  case LibFunc_ZdlPvRKSt9nothrow_t: // delete(void*, nothrow)
+  case LibFunc_ZdlPvSt11align_val_tRKSt9nothrow_t: // delete(void*, 
align_val_t, nothrow)
+  case LibFunc_ZdaPvRKSt9nothrow_t: // delete[](void*, nothrow)
+  case LibFunc_ZdaPvSt11align_val_tRKSt9nothrow_t: // delete[](void*, 
align_val_t, nothrow)
+Changed |= setDoesNotThrow(F);
+LLVM_FALLTHROUGH;
+  case LibFunc_ZdlPv: // delete(void*)
+  case LibFunc_ZdlPvj: // delete(void*, unsigned int)
+  case LibFunc_ZdlPvm: // delete(void*, unsigned long)
+  case LibFunc_ZdaPv: // delete[](void*)
+  case LibFunc_ZdaPvj: // delete[](void*, unsigned int)
+  case LibFunc_ZdaPvm: // delete[](void*, unsigned long)
+  case LibFunc_ZdlPvSt11align_val_t: // delete(void*, align_val_t)
+  case LibFunc_ZdlPvjSt11align_val_t: // delete(void*, unsigned int, 
align_val_t)
+  case LibFunc_ZdlPvmSt11align_val_t: // delete(void*, unsigned long, 
align_val_t)
+  case LibFunc_ZdaPvSt11align_val_t: // delete[](void*, align_val_t)
+  case LibFunc_ZdaPvjSt11align_val_t: // delete[](void*, unsigned int, 
align_val_t)
+  case LibFunc_ZdaPvmSt11align_val_t: // delete[](void*, unsigned long, 
align_val_t);
+Changed |= setOnlyAccessesInaccessibleMemOrArgMem(F);
+Changed |= setArgsNoUndef(F);
+Changed |= setWillReturn(F);
+Changed |= setDoesNotCapture(F, 0);
+return Changed;
+  case LibFunc_ZnwjRKSt9nothrow_t: // new(unsigned int, nothrow)
+  case LibFunc_ZnwmRKSt9nothrow_t: // new(unsigned long, nothrow)
+  case LibFunc_ZnajRKSt9nothrow_t: // new[](unsigned int, nothrow)
+  case LibFunc_ZnamRKSt9nothrow_t: // new[](unsigned long, nothrow)
+  case LibFunc_ZnwjSt11align_val_tRKSt9nothrow_t: // new(unsigned int, 
align_val_t, nothrow)
+  case LibFunc_ZnwmSt11align_val_tRKSt9nothrow_t: // new(unsigned long, 
align_val_t, nothrow)
+  case LibFunc_ZnajSt11align_val_tRKSt9nothrow_t: // new[](unsigned int, 
align_val_t, nothrow)
+  case LibFunc_ZnamSt11align_val_tRKSt9nothrow_t: // new[](unsigned long, 
align_val_t, nothrow)
+// Nothrow operator new may return null pointer
+Changed |= setDoesNotThrow(F);
+Changed |= setOnlyAccessesInaccessibleMemory(F);
+Changed |= setRetNoUndef(F);
+Changed |= setRetDoesNotAlias(F);
+Changed |= setWillReturn(F);
+return Changed;
   case LibFunc_Znwj: // new(unsigned int)
   case LibFunc_Znwm: // new(unsigned long)
   case LibFunc_Znaj: // new[](unsigned int)
   case LibFunc_Znam: // new[](unsigned long)
+  case LibFunc_ZnwjSt11align_val_t: // new(unsigned int, align_val_t)
+  case LibFunc_ZnwmSt11align_val_t: // new(unsigned long, align_val_t)
+  case LibFunc_ZnajSt11align_val_t: // new[](unsigned int, align_val_t)
+  case LibFunc_ZnamSt11align_val_t: // new[](unsigned long, align_val_t)
   case LibFunc_msvc_new_int: // new(unsigned int)
   case LibFunc_msvc_new_longlong: // new(unsigned long long)
   case LibFunc_msvc_new_array_int: // new[](unsigned int)

diff  --git a/llvm/test/Transforms/InferFunctionAttrs/annotate.ll 
b/llvm/test/Transforms/InferFunctionAttrs/annotate.ll
index 0af18151d6f6..a847db7eb550 100644
--- a/llvm/test/Transforms/InferFunctionAttrs/annotate.ll
+++ b/llvm/test/Transforms/InferFunctionAttrs/annotate.ll
@@ -9,6 +9,30 @@ declare i8* @_Znwj(i64 )
 ; CHECK: declare noalias noundef nonnull i8* @_Znwj(i64) 
[[INACCESSIBLEMEMONLY_NOFREE_WILLRETURN:#[0-9]+]]
 declare i8* @_Znwm(i64)
 ; CHECK: declare noalias noundef nonnull i8* @_Znwm(i64) 
[[INACCESSIBLEMEMONLY_NOFREE_WILLRETURN]]
+declare i8* @_Znaj(i64)
+; CHECK: declare noalias noundef nonnull i8* @_Znaj(i64) 
[[INACCESSIBLEMEMONLY_NOFREE_WILLRETURN]]
+declare i8* @_Znam(i64)
+; CHECK: declare noalias noundef nonnull i8* @_Znam(i64) 
[[INACCESSIBLEMEMONLY_NOFREE_WILLRETURN]]
+
+
+%"struct.std::nothrow_t" = type { i8 }
+declare i8* @_ZnwmRKSt9nothrow_t(i64, %"struct.std::nothrow_t"*)
+; 

[llvm-branch-commits] [libc] 689de58 - [libc][NFC][obvious] fix the names of MPFR tests

[Michael Jones via llvm-branch-commits]

Author: Michael Jones
Date: 2021-01-20T23:42:01Z
New Revision: 689de5841c1c4c9b0fe711b61d26f7425cf99423

URL: 
https://github.com/llvm/llvm-project/commit/689de5841c1c4c9b0fe711b61d26f7425cf99423
DIFF: 
https://github.com/llvm/llvm-project/commit/689de5841c1c4c9b0fe711b61d26f7425cf99423.diff

LOG: [libc][NFC][obvious] fix the names of MPFR tests

I missed the MPFR tests in my previous commit. They have now been fixed
to not fail the prefix check in the test macro.

Added: 


Modified: 
libc/test/src/math/RIntTest.h
libc/test/src/math/RemQuoTest.h
libc/test/src/math/RoundToIntegerTest.h
libc/test/src/math/fmaf_test.cpp
libc/test/src/math/hypot_test.cpp
libc/test/src/math/hypotf_test.cpp

Removed: 




diff  --git a/libc/test/src/math/RIntTest.h b/libc/test/src/math/RIntTest.h
index d09dc9324977..18331ecdad08 100644
--- a/libc/test/src/math/RIntTest.h
+++ b/libc/test/src/math/RIntTest.h
@@ -128,11 +128,11 @@ class RIntTestTemplate : public 
__llvm_libc::testing::Test {
 };
 
 #define LIST_RINT_TESTS(F, func)   
\
-  using RIntTest = RIntTestTemplate;
\
-  TEST_F(RIntTest, specialNumbers) { testSpecialNumbers(&func); }  
\
-  TEST_F(RIntTest, RoundNumbers) { testRoundNumbers(&func); }  
\
-  TEST_F(RIntTest, Fractions) { testFractions(&func); }
\
-  TEST_F(RIntTest, SubnormalRange) { testSubnormalRange(&func); }  
\
-  TEST_F(RIntTest, NormalRange) { testNormalRange(&func); }
+  using LlvmLibcRIntTest = RIntTestTemplate;
\
+  TEST_F(LlvmLibcRIntTest, specialNumbers) { testSpecialNumbers(&func); }  
\
+  TEST_F(LlvmLibcRIntTest, RoundNumbers) { testRoundNumbers(&func); }  
\
+  TEST_F(LlvmLibcRIntTest, Fractions) { testFractions(&func); }
\
+  TEST_F(LlvmLibcRIntTest, SubnormalRange) { testSubnormalRange(&func); }  
\
+  TEST_F(LlvmLibcRIntTest, NormalRange) { testNormalRange(&func); }
 
 #endif // LLVM_LIBC_TEST_SRC_MATH_RINTTEST_H

diff  --git a/libc/test/src/math/RemQuoTest.h b/libc/test/src/math/RemQuoTest.h
index 1e00ee14927e..f643079b89ac 100644
--- a/libc/test/src/math/RemQuoTest.h
+++ b/libc/test/src/math/RemQuoTest.h
@@ -133,12 +133,12 @@ class RemQuoTestTemplate : public 
__llvm_libc::testing::Test {
 };
 
 #define LIST_REMQUO_TESTS(T, func) 
\
-  using RemQuoTest = RemQuoTestTemplate;
\
-  TEST_F(RemQuoTest, SpecialNumbers) { testSpecialNumbers(&func); }
\
-  TEST_F(RemQuoTest, EqualNumeratorAndDenominator) {   
\
+  using LlvmLibcRemQuoTest = RemQuoTestTemplate;
\
+  TEST_F(LlvmLibcRemQuoTest, SpecialNumbers) { testSpecialNumbers(&func); }
\
+  TEST_F(LlvmLibcRemQuoTest, EqualNumeratorAndDenominator) {   
\
 testEqualNumeratorAndDenominator(&func);   
\
   }
\
-  TEST_F(RemQuoTest, SubnormalRange) { testSubnormalRange(&func); }
\
-  TEST_F(RemQuoTest, NormalRange) { testNormalRange(&func); }
+  TEST_F(LlvmLibcRemQuoTest, SubnormalRange) { testSubnormalRange(&func); }
\
+  TEST_F(LlvmLibcRemQuoTest, NormalRange) { testNormalRange(&func); }
 
 #endif // LLVM_LIBC_TEST_SRC_MATH_REMQUOTEST_H

diff  --git a/libc/test/src/math/RoundToIntegerTest.h 
b/libc/test/src/math/RoundToIntegerTest.h
index d8711faca3f1..4b28039dbbb3 100644
--- a/libc/test/src/math/RoundToIntegerTest.h
+++ b/libc/test/src/math/RoundToIntegerTest.h
@@ -304,13 +304,22 @@ class RoundToIntegerTestTemplate : public 
__llvm_libc::testing::Test {
 };
 
 #define LIST_ROUND_TO_INTEGER_TESTS_HELPER(F, I, func, TestModes)  
\
-  using RoundToIntegerTest = RoundToIntegerTestTemplate;  
\
-  TEST_F(RoundToIntegerTest, InfinityAndNaN) { testInfinityAndNaN(&func); }
\
-  TEST_F(RoundToIntegerTest, RoundNumbers) { testRoundNumbers(&func); }
\
-  TEST_F(RoundToIntegerTest, Fractions) { testFractions(&func); }  
\
-  TEST_F(RoundToIntegerTest, IntegerOverflow) { testIntegerOverflow(&func); }  
\
-  TEST_F(RoundToIntegerTest, SubnormalRange) { testSubnormalRange(&func); }
\
-  TEST_F(RoundToIntegerTest, NormalRange) { testNormalRange(&func); }
+  using LlvmLibcRoundToIntegerTest =   
\
+  RoundToIntegerTestTemplate; 
\
+  TEST_F(LlvmLibcRoundToIntegerTest, InfinityAndNaN) { 
\
+testInfinityAndNaN(&func); 
\
+  }
\
+  TEST_F(LlvmLibcRoundToIntegerTest, RoundNumbers) { 

[llvm-branch-commits] [llvm] 87a8954 - [NFC] Minor cleanup for ValueHandle code.

[Varun Gandhi via llvm-branch-commits]

Author: Varun Gandhi
Date: 2021-01-20T16:27:55-08:00
New Revision: 87a89549c4b14a5e19097484562dd359b77a8770

URL: 
https://github.com/llvm/llvm-project/commit/87a89549c4b14a5e19097484562dd359b77a8770
DIFF: 
https://github.com/llvm/llvm-project/commit/87a89549c4b14a5e19097484562dd359b77a8770.diff

LOG: [NFC] Minor cleanup for ValueHandle code.

Based on feedback in https://reviews.llvm.org/D93433.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D94238

Added: 


Modified: 
llvm/include/llvm/IR/ValueHandle.h

Removed: 




diff  --git a/llvm/include/llvm/IR/ValueHandle.h 
b/llvm/include/llvm/IR/ValueHandle.h
index a88b28ac7e62..29560815ea55 100644
--- a/llvm/include/llvm/IR/ValueHandle.h
+++ b/llvm/include/llvm/IR/ValueHandle.h
@@ -287,7 +287,7 @@ class AssertingVH
 #else
   AssertingVH() : ThePtr(nullptr) {}
   AssertingVH(ValueTy *P) : ThePtr(GetAsValue(P)) {}
-  AssertingVH(const AssertingVH &) = default;
+  AssertingVH(const AssertingVH &) = default;
 #endif
 
   operator ValueTy*() const {
@@ -442,9 +442,9 @@ class CallbackVH : public ValueHandleBase {
 /// PoisoningVH's as it moves. This is required because in non-assert mode this
 /// class turns into a trivial wrapper around a pointer.
 template 
-class PoisoningVH
+class PoisoningVH final
 #if LLVM_ENABLE_ABI_BREAKING_CHECKS
-final : public CallbackVH
+: public CallbackVH
 #endif
 {
   friend struct DenseMapInfo>;



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[llvm-branch-commits] [mlir] c78219f - [mlir] Add a new builtin `unrealized_conversion_cast` operation

[River Riddle via llvm-branch-commits]

Author: River Riddle
Date: 2021-01-20T16:28:18-08:00
New Revision: c78219f644c7a6e352cd416f8ebb4374b745967e

URL: 
https://github.com/llvm/llvm-project/commit/c78219f644c7a6e352cd416f8ebb4374b745967e
DIFF: 
https://github.com/llvm/llvm-project/commit/c78219f644c7a6e352cd416f8ebb4374b745967e.diff

LOG: [mlir] Add a new builtin `unrealized_conversion_cast` operation

An `unrealized_conversion_cast` operation represents an unrealized conversion
from one set of types to another, that is used to enable the inter-mixing of
different type systems. This operation should not be attributed any special
representational or execution semantics, and is generally only intended to be
used to satisfy the temporary intermixing of type systems during the conversion
of one type system to another.

This operation was discussed in the following RFC(and ODM):

https://llvm.discourse.group/t/open-meeting-1-14-dialect-conversion-and-type-conversion-the-question-of-cast-operations/

Differential Revision: https://reviews.llvm.org/D94832

Added: 
mlir/test/Dialect/Builtin/canonicalize.mlir
mlir/test/Dialect/Builtin/invalid.mlir
mlir/test/Dialect/Builtin/ops.mlir

Modified: 
mlir/include/mlir/IR/BuiltinOps.h
mlir/include/mlir/IR/BuiltinOps.td
mlir/lib/IR/BuiltinDialect.cpp
mlir/lib/IR/CMakeLists.txt

Removed: 




diff  --git a/mlir/include/mlir/IR/BuiltinOps.h 
b/mlir/include/mlir/IR/BuiltinOps.h
index c695a005283b..c0163b148f3c 100644
--- a/mlir/include/mlir/IR/BuiltinOps.h
+++ b/mlir/include/mlir/IR/BuiltinOps.h
@@ -17,6 +17,8 @@
 #include "mlir/IR/OwningOpRef.h"
 #include "mlir/IR/SymbolTable.h"
 #include "mlir/Interfaces/CallInterfaces.h"
+#include "mlir/Interfaces/CastInterfaces.h"
+#include "mlir/Interfaces/SideEffectInterfaces.h"
 #include "llvm/Support/PointerLikeTypeTraits.h"
 
 
//===--===//

diff  --git a/mlir/include/mlir/IR/BuiltinOps.td 
b/mlir/include/mlir/IR/BuiltinOps.td
index 86de251094cd..2c4d47d61cbe 100644
--- a/mlir/include/mlir/IR/BuiltinOps.td
+++ b/mlir/include/mlir/IR/BuiltinOps.td
@@ -17,6 +17,8 @@
 include "mlir/IR/BuiltinDialect.td"
 include "mlir/IR/SymbolInterfaces.td"
 include "mlir/Interfaces/CallInterfaces.td"
+include "mlir/Interfaces/CastInterfaces.td"
+include "mlir/Interfaces/SideEffectInterfaces.td"
 
 // Base class for Builtin dialect ops.
 class Builtin_Op traits = []> :
@@ -220,4 +222,53 @@ def ModuleTerminatorOp : Builtin_Op<"module_terminator", [
   let assemblyFormat = "attr-dict";
 }
 
+//===--===//
+// UnrealizedConversionCastOp
+//===--===//
+
+def UnrealizedConversionCastOp : Builtin_Op<"unrealized_conversion_cast", [
+DeclareOpInterfaceMethods, NoSideEffect
+  ]> {
+  let summary = "An unrealized conversion from one set of types to another";
+  let description = [{
+An `unrealized_conversion_cast` operation represents an unrealized
+conversion from one set of types to another, that is used to enable the
+inter-mixing of 
diff erent type systems. This operation should not be
+attributed any special representational or execution semantics, and is
+generally only intended to be used to satisfy the temporary intermixing of
+type systems during the conversion of one type system to another.
+
+This operation may produce results of arity 1-N, and accept as input
+operands of arity 0-N.
+
+Example:
+
+```mlir
+// An unrealized 0-1 conversion. These types of conversions are useful in
+// cases where a type is removed from the type system, but not all uses 
have
+// been converted. For example, imagine we have a tuple type that is
+// expanded to its element types. If only some uses of an empty tuple type
+// instance are converted we still need an instance of the tuple type, but
+// have no inputs to the unrealized conversion.
+%result = unrealized_conversion_cast to !bar.tuple_type<>
+
+// An unrealized 1-1 conversion.
+%result1 = unrealized_conversion_cast %operand : !foo.type to 
!bar.lowered_type
+
+// An unrealized 1-N conversion.
+%results2:2 = unrealized_conversion_cast %tuple_operand : 
!foo.tuple_type to !foo.type, !foo.type
+
+// An unrealized N-1 conversion.
+%result3 = unrealized_conversion_cast %operand, %operand : !foo.type, 
!foo.type to !bar.tuple_type
+```
+  }];
+
+  let arguments = (ins Variadic:$inputs);
+  let results = (outs Variadic:$outputs);
+  let assemblyFormat = [{
+($inputs^ `:` type($inputs))? `to` type($outputs) attr-dict
+  }];
+  let hasFolder = 1;
+}
+
 #endif // BUILTIN_OPS

diff  --git a/mlir/lib/IR/BuiltinDialect.cpp b/mlir/lib/IR/BuiltinDialect.cpp
index 2cd90f3d0fde..138321e734e2 100644
--- a/mlir/lib/IR/BuiltinDialect.cpp
+++ b/mlir/lib/IR/

[llvm-branch-commits] [mlir] 6ccf2d6 - [mlir] Add an interface for Cast-Like operations

[River Riddle via llvm-branch-commits]

Author: River Riddle
Date: 2021-01-20T16:28:17-08:00
New Revision: 6ccf2d62b4876c88427ae97d0cd3c9ed4330560a

URL: 
https://github.com/llvm/llvm-project/commit/6ccf2d62b4876c88427ae97d0cd3c9ed4330560a
DIFF: 
https://github.com/llvm/llvm-project/commit/6ccf2d62b4876c88427ae97d0cd3c9ed4330560a.diff

LOG: [mlir] Add an interface for Cast-Like operations

A cast-like operation is one that converts from a set of input types to a set 
of output types. The arity of the inputs may be from 0-N, whereas the arity of 
the outputs may be anything from 1-N. Cast-like operations are removable in 
cases where they produce a "no-op", i.e when the input types and output types 
match 1-1.

Differential Revision: https://reviews.llvm.org/D94831

Added: 
mlir/include/mlir/Interfaces/CastInterfaces.h
mlir/include/mlir/Interfaces/CastInterfaces.td
mlir/lib/Interfaces/CastInterfaces.cpp

Modified: 
mlir/docs/Tutorials/Toy/Ch-4.md
mlir/examples/toy/Ch4/CMakeLists.txt
mlir/examples/toy/Ch4/include/toy/Dialect.h
mlir/examples/toy/Ch4/include/toy/Ops.td
mlir/examples/toy/Ch4/mlir/Dialect.cpp
mlir/examples/toy/Ch4/mlir/ToyCombine.cpp
mlir/examples/toy/Ch5/CMakeLists.txt
mlir/examples/toy/Ch5/include/toy/Dialect.h
mlir/examples/toy/Ch5/include/toy/Ops.td
mlir/examples/toy/Ch5/mlir/Dialect.cpp
mlir/examples/toy/Ch5/mlir/ToyCombine.cpp
mlir/examples/toy/Ch6/CMakeLists.txt
mlir/examples/toy/Ch6/include/toy/Dialect.h
mlir/examples/toy/Ch6/include/toy/Ops.td
mlir/examples/toy/Ch6/mlir/Dialect.cpp
mlir/examples/toy/Ch6/mlir/ToyCombine.cpp
mlir/examples/toy/Ch7/CMakeLists.txt
mlir/examples/toy/Ch7/include/toy/Dialect.h
mlir/examples/toy/Ch7/include/toy/Ops.td
mlir/examples/toy/Ch7/mlir/Dialect.cpp
mlir/examples/toy/Ch7/mlir/ToyCombine.cpp
mlir/include/mlir/Dialect/StandardOps/IR/Ops.h
mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
mlir/include/mlir/Dialect/Tensor/IR/Tensor.h
mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
mlir/include/mlir/IR/Diagnostics.h
mlir/include/mlir/IR/OpDefinition.h
mlir/include/mlir/Interfaces/CMakeLists.txt
mlir/lib/Dialect/Shape/IR/CMakeLists.txt
mlir/lib/Dialect/StandardOps/CMakeLists.txt
mlir/lib/Dialect/StandardOps/IR/Ops.cpp
mlir/lib/Dialect/Tensor/IR/CMakeLists.txt
mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
mlir/lib/IR/Operation.cpp
mlir/lib/Interfaces/CMakeLists.txt

Removed: 




diff  --git a/mlir/docs/Tutorials/Toy/Ch-4.md b/mlir/docs/Tutorials/Toy/Ch-4.md
index dc1314419320..c454a762e2b5 100644
--- a/mlir/docs/Tutorials/Toy/Ch-4.md
+++ b/mlir/docs/Tutorials/Toy/Ch-4.md
@@ -182,26 +182,50 @@ to add a new operation to the Toy dialect, 
`ToyCastOp`(toy.cast), to represent
 casts between two 
diff erent shapes.
 
 ```tablegen
-def CastOp : Toy_Op<"cast", [NoSideEffect, SameOperandsAndResultShape]> {
+def CastOp : Toy_Op<"cast", [
+DeclareOpInterfaceMethods,
+NoSideEffect,
+SameOperandsAndResultShape]
+  > {
   let summary = "shape cast operation";
   let description = [{
 The "cast" operation converts a tensor from one type to an equivalent type
 without changing any data elements. The source and destination types
-must both be tensor types with the same element type. If both are ranked
-then the rank should be the same and static dimensions should match. The
-operation is invalid if converting to a mismatching constant dimension.
+must both be tensor types with the same element type. If both are ranked,
+then shape is required to match. The operation is invalid if converting
+to a mismatching constant dimension.
   }];
 
   let arguments = (ins F64Tensor:$input);
   let results = (outs F64Tensor:$output);
+}
+```
+
+Note that the definition of this cast operation adds a `CastOpInterface` to the
+traits list. This interface provides several utilities for cast-like operation,
+such as folding identity casts and verification. We hook into this interface by
+providing a definition for the `areCastCompatible` method:
 
-  // Set the folder bit so that we can fold redundant cast operations.
-  let hasFolder = 1;
+```c++
+/// Returns true if the given set of input and result types are compatible with
+/// this cast operation. This is required by the `CastOpInterface` to verify
+/// this operation and provide other additional utilities.
+bool CastOp::areCastCompatible(TypeRange inputs, TypeRange outputs) {
+  if (inputs.size() != 1 || outputs.size() != 1)
+return false;
+  // The inputs must be Tensors with the same element type.
+  TensorType input = inputs.front().dyn_cast();
+  TensorType output = outputs.front().dyn_cast();
+  if (!input || !output || input.getElementType() != output.getElementType())
+return false;
+  // The shape is required to match if both types are ranked.
+  return !input.hasRank() || !output.hasRank() ||