[llvm-branch-commits] [lld] 3809f4e - [ELF] Support R_PPC_ADDR24 (ba foo; bla foo)

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2021-01-17T00:02:13-08:00
New Revision: 3809f4ebabde98bfdc1fdcdad2963a874151820b

URL: 
https://github.com/llvm/llvm-project/commit/3809f4ebabde98bfdc1fdcdad2963a874151820b
DIFF: 
https://github.com/llvm/llvm-project/commit/3809f4ebabde98bfdc1fdcdad2963a874151820b.diff

LOG: [ELF] Support R_PPC_ADDR24 (ba foo; bla foo)

Added: 


Modified: 
lld/ELF/Arch/PPC.cpp
lld/test/ELF/ppc32-reloc-addr.s

Removed: 




diff  --git a/lld/ELF/Arch/PPC.cpp b/lld/ELF/Arch/PPC.cpp
index 5b22e6cd3f5f..aaecef6ee94f 100644
--- a/lld/ELF/Arch/PPC.cpp
+++ b/lld/ELF/Arch/PPC.cpp
@@ -222,6 +222,7 @@ RelExpr PPC::getRelExpr(RelType type, const Symbol &s,
   case R_PPC_ADDR16_HA:
   case R_PPC_ADDR16_HI:
   case R_PPC_ADDR16_LO:
+  case R_PPC_ADDR24:
   case R_PPC_ADDR32:
 return R_ABS;
   case R_PPC_DTPREL16:
@@ -345,6 +346,7 @@ void PPC::relocate(uint8_t *loc, const Relocation &rel, 
uint64_t val) const {
 write32(loc, (read32(loc) & ~mask) | (val & mask));
 break;
   }
+  case R_PPC_ADDR24:
   case R_PPC_REL24:
   case R_PPC_LOCAL24PC:
   case R_PPC_PLTREL24: {

diff  --git a/lld/test/ELF/ppc32-reloc-addr.s b/lld/test/ELF/ppc32-reloc-addr.s
index 98bd61b1192b..78865b82ccbf 100644
--- a/lld/test/ELF/ppc32-reloc-addr.s
+++ b/lld/test/ELF/ppc32-reloc-addr.s
@@ -19,8 +19,13 @@
 # CHECK-LABEL: section .R_PPC_ADDR16_LO:
 # CHECK: addi 4, 4, 4660
 
+.section .R_PPC_ADDR24,"ax",@progbits
+  ba a
+# CHECK-LABEL: section .R_PPC_ADDR24:
+# CHECK: ba 4660
+
 .section .R_PPC_ADDR32,"a",@progbits
   .long a
   .long b
 # HEX-LABEL: section .R_PPC_ADDR32:
-# HEX-NEXT: 10b4 1234 000bcdef
+# HEX-NEXT: {{.*}} 1234 000bcdef



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[llvm-branch-commits] [llvm] b1c2f12 - [BasicAA] Move assumption tracking into AAQI

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-17T10:34:35+01:00
New Revision: b1c2f1282a237e9bc60f1b0020bc7535ca019739

URL: 
https://github.com/llvm/llvm-project/commit/b1c2f1282a237e9bc60f1b0020bc7535ca019739
DIFF: 
https://github.com/llvm/llvm-project/commit/b1c2f1282a237e9bc60f1b0020bc7535ca019739.diff

LOG: [BasicAA] Move assumption tracking into AAQI

D91936 placed the tracking for the assumptions into BasicAA.
However, when recursing over phis, we may use fresh AAQI instances.
In this case AssumptionBasedResults from an inner AAQI can reesult
in a removal of an element from the outer AAQI.

To avoid this, move the tracking into AAQI. This generally makes
more sense, as the NoAlias assumptions themselves are also stored
in AAQI.

The test case only produces an assertion failure with D90094
reapplied. I think the issue exists independently of that change
as well, but I wasn't able to come up with a reproducer.

Added: 
llvm/test/Transforms/MemCpyOpt/aa-recursion-assertion-failure.ll

Modified: 
llvm/include/llvm/Analysis/AliasAnalysis.h
llvm/include/llvm/Analysis/BasicAliasAnalysis.h
llvm/lib/Analysis/BasicAliasAnalysis.cpp

Removed: 




diff  --git a/llvm/include/llvm/Analysis/AliasAnalysis.h 
b/llvm/include/llvm/Analysis/AliasAnalysis.h
index 8a3ea62ff154..9f7461243f35 100644
--- a/llvm/include/llvm/Analysis/AliasAnalysis.h
+++ b/llvm/include/llvm/Analysis/AliasAnalysis.h
@@ -360,6 +360,14 @@ class AAQueryInfo {
   using IsCapturedCacheT = SmallDenseMap;
   IsCapturedCacheT IsCapturedCache;
 
+  /// How many active NoAlias assumption uses there are.
+  int NumAssumptionUses = 0;
+
+  /// Location pairs for which an assumption based result is currently stored.
+  /// Used to remove all potentially incorrect results from the cache if an
+  /// assumption is disproven.
+  SmallVector AssumptionBasedResults;
+
   AAQueryInfo() : AliasCache(), IsCapturedCache() {}
 };
 

diff  --git a/llvm/include/llvm/Analysis/BasicAliasAnalysis.h 
b/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
index 635c35585f81..01b7345317c8 100644
--- a/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
+++ b/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
@@ -190,14 +190,6 @@ class BasicAAResult : public AAResultBase {
   /// Tracks instructions visited by pointsToConstantMemory.
   SmallPtrSet Visited;
 
-  /// How many active NoAlias assumption uses there are.
-  int NumAssumptionUses = 0;
-
-  /// Location pairs for which an assumption based result is currently stored.
-  /// Used to remove all potentially incorrect results from the cache if an
-  /// assumption is disproven.
-  SmallVector AssumptionBasedResults;
-
   static const Value *
   GetLinearExpression(const Value *V, APInt &Scale, APInt &Offset,
   unsigned &ZExtBits, unsigned &SExtBits,

diff  --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp 
b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index 313a85ccc4de..cfed32bbf951 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -1619,13 +1619,13 @@ AliasResult BasicAAResult::aliasCheck(const Value *V1, 
LocationSize V1Size,
 if (!Entry.isDefinitive()) {
   // Remember that we used an assumption.
   ++Entry.NumAssumptionUses;
-  ++NumAssumptionUses;
+  ++AAQI.NumAssumptionUses;
 }
 return Entry.Result;
   }
 
-  int OrigNumAssumptionUses = NumAssumptionUses;
-  unsigned OrigNumAssumptionBasedResults = AssumptionBasedResults.size();
+  int OrigNumAssumptionUses = AAQI.NumAssumptionUses;
+  unsigned OrigNumAssumptionBasedResults = AAQI.AssumptionBasedResults.size();
   AliasResult Result = aliasCheckRecursive(V1, V1Size, V1AAInfo, V2, V2Size,
V2AAInfo, AAQI, O1, O2);
 
@@ -1639,7 +1639,7 @@ AliasResult BasicAAResult::aliasCheck(const Value *V1, 
LocationSize V1Size,
 Result = MayAlias;
 
   // This is a definitive result now, when considered as a root query.
-  NumAssumptionUses -= Entry.NumAssumptionUses;
+  AAQI.NumAssumptionUses -= Entry.NumAssumptionUses;
   Entry.Result = Result;
   Entry.NumAssumptionUses = -1;
 
@@ -1647,13 +1647,13 @@ AliasResult BasicAAResult::aliasCheck(const Value *V1, 
LocationSize V1Size,
   // been based on this assumption. Do this after the Entry updates above to
   // avoid iterator invalidation.
   if (AssumptionDisproven)
-while (AssumptionBasedResults.size() > OrigNumAssumptionBasedResults)
-  AAQI.AliasCache.erase(AssumptionBasedResults.pop_back_val());
+while (AAQI.AssumptionBasedResults.size() > OrigNumAssumptionBasedResults)
+  AAQI.AliasCache.erase(AAQI.AssumptionBasedResults.pop_back_val());
 
   // The result may still be based on assumptions higher up in the chain.
   // Remember it, so it can be purged from the cache later.
-  if (OrigNumAssumptionUses != NumAssumptionUses && Result != MayAlias)
-AssumptionBasedResults.push_back(Loc

[llvm-branch-commits] [llvm] 0b84afa - Reapply [BasicAA] Handle recursive queries more efficiently

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-17T10:34:35+01:00
New Revision: 0b84afa5fcb41429004db72a0588656a8d76bf48

URL: 
https://github.com/llvm/llvm-project/commit/0b84afa5fcb41429004db72a0588656a8d76bf48
DIFF: 
https://github.com/llvm/llvm-project/commit/0b84afa5fcb41429004db72a0588656a8d76bf48.diff

LOG: Reapply [BasicAA] Handle recursive queries more efficiently

There are no changes relative to the original commit. However, an issue
this exposed in BasicAA assumption tracking has been fixed in the
previous commit.

-

An alias query currently works out roughly like this:

 * Look up location pair in cache.
 * Perform BasicAA logic (including cache lookup and insertion...)
 * Perform a recursive query using BestAAResults.
   * Look up location pair in cache (and thus do not recurse into BasicAA)
   * Query all the other AA providers.
 * Query all the other AA providers.

This is a lot of unnecessary work, all ultimately caused by the
BestAAResults query at the end of aliasCheck(). The reason we perform
it, is that aliasCheck() is getting called recursively, and we of
course want those recursive queries to also make use of other AA
providers, not just BasicAA. We can solve this by making the recursive
queries directly use BestAAResults (which will check both BasicAA
and other providers), rather than recursing into aliasCheck().

There are some tradeoffs:

 * We can no longer pass through the precomputed underlying object
   to aliasCheck(). This is not a major concern, because nowadays
   getUnderlyingObject() is quite cheap.
 * Results from other AA providers are no longer cached inside
   BasicAA. The way this worked was already a bit iffy, in that a
   result could be cached, but if it was MayAlias, we'd still end
   up re-querying other providers anyway. If we want to cache
   non-BasicAA results, we should do that in a more principled manner.

In any case, despite those tradeoffs, this works out to be a decent
compile-time improvment. I think it also simplifies the mental model
of how BasicAA works. It took me quite a while to fully understand
how these things interact.

Differential Revision: https://reviews.llvm.org/D90094

Added: 


Modified: 
llvm/include/llvm/Analysis/BasicAliasAnalysis.h
llvm/lib/Analysis/BasicAliasAnalysis.cpp
llvm/lib/Analysis/GlobalsModRef.cpp

Removed: 




diff  --git a/llvm/include/llvm/Analysis/BasicAliasAnalysis.h 
b/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
index 01b7345317c8..46b8cd1f3a88 100644
--- a/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
+++ b/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
@@ -232,18 +232,17 @@ class BasicAAResult : public AAResultBase {
   AliasResult aliasPHI(const PHINode *PN, LocationSize PNSize,
const AAMDNodes &PNAAInfo, const Value *V2,
LocationSize V2Size, const AAMDNodes &V2AAInfo,
-   const Value *UnderV2, AAQueryInfo &AAQI);
+   AAQueryInfo &AAQI);
 
   AliasResult aliasSelect(const SelectInst *SI, LocationSize SISize,
   const AAMDNodes &SIAAInfo, const Value *V2,
   LocationSize V2Size, const AAMDNodes &V2AAInfo,
-  const Value *UnderV2, AAQueryInfo &AAQI);
+  AAQueryInfo &AAQI);
 
   AliasResult aliasCheck(const Value *V1, LocationSize V1Size,
  const AAMDNodes &V1AATag, const Value *V2,
  LocationSize V2Size, const AAMDNodes &V2AATag,
- AAQueryInfo &AAQI, const Value *O1 = nullptr,
- const Value *O2 = nullptr);
+ AAQueryInfo &AAQI);
 
   AliasResult aliasCheckRecursive(const Value *V1, LocationSize V1Size,
   const AAMDNodes &V1AATag, const Value *V2,

diff  --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp 
b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index cfed32bbf951..57e308b5fdf4 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -798,26 +798,8 @@ AliasResult BasicAAResult::alias(const MemoryLocation 
&LocA,
  AAQueryInfo &AAQI) {
   assert(notDifferentParent(LocA.Ptr, LocB.Ptr) &&
  "BasicAliasAnalysis doesn't support interprocedural queries.");
-
-  // If we have a directly cached entry for these locations, we have recursed
-  // through this once, so just return the cached results. Notably, when this
-  // happens, we don't clear the cache.
-  AAQueryInfo::LocPair Locs(LocA, LocB);
-  if (Locs.first.Ptr > Locs.second.Ptr)
-std::swap(Locs.first, Locs.second);
-  auto CacheIt = AAQI.AliasCache.find(Locs);
-  if (CacheIt != AAQI.AliasCache.end()) {
-// This code exists to skip a second BasicAA call while recursing into
-// BestAA. Don't make use of assumptions here.
-const auto &En

[llvm-branch-commits] [clang] 9af0386 - [clang-format] Revert e9e6e3b34a8e

[via llvm-branch-commits]

Author: mydeveloperday
Date: 2021-01-17T11:07:31Z
New Revision: 9af03864df746aa9a9cf3573da952ce6c5d902cd

URL: 
https://github.com/llvm/llvm-project/commit/9af03864df746aa9a9cf3573da952ce6c5d902cd
DIFF: 
https://github.com/llvm/llvm-project/commit/9af03864df746aa9a9cf3573da952ce6c5d902cd.diff

LOG: [clang-format] Revert e9e6e3b34a8e

Reverting {D92753} due to issues with #pragma indentation in #ifdef/endif 
structure

Added: 


Modified: 
clang/docs/ClangFormatStyleOptions.rst
clang/include/clang/Format/Format.h
clang/lib/Format/ContinuationIndenter.cpp
clang/lib/Format/Format.cpp
clang/lib/Format/UnwrappedLineFormatter.cpp
clang/lib/Format/UnwrappedLineParser.cpp
clang/lib/Format/UnwrappedLineParser.h
clang/unittests/Format/FormatTest.cpp

Removed: 




diff  --git a/clang/docs/ClangFormatStyleOptions.rst 
b/clang/docs/ClangFormatStyleOptions.rst
index c58bb1af7ae6..8eee6187d0c6 100644
--- a/clang/docs/ClangFormatStyleOptions.rst
+++ b/clang/docs/ClangFormatStyleOptions.rst
@@ -2181,30 +2181,6 @@ the configuration (without a prefix: ``Auto``).
 
 
 
-**IndentPragmas** (``bool``)
-  Indent pragmas
-
-  When ``false``, pragmas are flushed left or follow IndentPPDirectives.
-  When ``true``, pragmas are indented to the current scope level.
-
-  .. code-block:: c++
-
-false:  true:
-#pragma once   vs   #pragma once
-void foo() {void foo() {
-#pragma omp simd  #pragma omp simd
-  for (int i=0;i<10;i++) {for (int i=0;i<10;i++) {
-#pragma omp simd#pragma omp simd
-for (int i=0;i<10;i++) {for (int i=0;i<10;i++) {
-}   }
-#if 1   #if 1
-#pragma omp simd#pragma omp simd
-for (int i=0;i<10;i++) {for (int i=0;i<10;i++) {
-}   }
-#endif  #endif
-  }   }
-}   }
-
 **IndentRequires** (``bool``)
   Indent the requires clause in a template
 

diff  --git a/clang/include/clang/Format/Format.h 
b/clang/include/clang/Format/Format.h
index c6a9818a8940..6b3fb8164a28 100644
--- a/clang/include/clang/Format/Format.h
+++ b/clang/include/clang/Format/Format.h
@@ -1792,29 +1792,6 @@ struct FormatStyle {
   /// \endcode
   bool IndentGotoLabels;
 
-  /// Indent pragmas
-  ///
-  /// When ``false``, pragmas are flushed left or follow IndentPPDirectives.
-  /// When ``true``, pragmas are indented to the current scope level.
-  /// \code
-  ///   false:  true:
-  ///   #pragma once   vs   #pragma once
-  ///   void foo() {void foo() {
-  ///   #pragma omp simd  #pragma omp simd
-  /// for (int i=0;i<10;i++) {for (int i=0;i<10;i++) {
-  ///   #pragma omp simd#pragma omp simd
-  ///   for (int i=0;i<10;i++) {for (int i=0;i<10;i++) {
-  ///   }   }
-  ///   #if 1   #if 1
-  ///   #pragma omp simd#pragma omp simd
-  ///   for (int i=0;i<10;i++) {for (int i=0;i<10;i++) {
-  ///   }   }
-  ///   #endif  #endif
-  /// }   }
-  ///   }   }
-  /// \endcode
-  bool IndentPragmas;
-
   /// Options for indenting preprocessor directives.
   enum PPDirectiveIndentStyle : unsigned char {
 /// Does not indent any directives.
@@ -2790,7 +2767,6 @@ struct FormatStyle {
IndentCaseLabels == R.IndentCaseLabels &&
IndentCaseBlocks == R.IndentCaseBlocks &&
IndentGotoLabels == R.IndentGotoLabels &&
-   IndentPragmas == R.IndentPragmas &&
IndentPPDirectives == R.IndentPPDirectives &&
IndentExternBlock == R.IndentExternBlock &&
IndentRequires == R.IndentRequires && IndentWidth == R.IndentWidth 
&&

diff  --git a/clang/lib/Format/ContinuationIndenter.cpp 
b/clang/lib/Format/ContinuationIndenter.cpp
index 9e15c87509ac..9db42b6c4a70 100644
--- a/clang/lib/Format/ContinuationIndenter.cpp
+++ b/clang/lib/Format/ContinuationIndenter.cpp
@@ -589,12 +589,6 @@ void ContinuationIndenter::addTokenOnCurrentLine(LineState 
&State, bool DryRun,
State.Line->Type == LT_ImportStatement)) {
 Spaces += State.FirstIndent;
 
-bool isPragmaLine =
-State.Line->First->startsSequence(tok::hash, tok::pp_pragma);
-// If indenting pragmas remove

[llvm-branch-commits] [lldb] e7bc6c5 - Reland [lldb][docs] Use sphinx instead of epydoc to generate LLDB's Python reference

[Raphael Isemann via llvm-branch-commits]

Author: Raphael Isemann
Date: 2021-01-17T12:13:01+01:00
New Revision: e7bc6c594b75602c23cb901f53b3a30d48e2ee78

URL: 
https://github.com/llvm/llvm-project/commit/e7bc6c594b75602c23cb901f53b3a30d48e2ee78
DIFF: 
https://github.com/llvm/llvm-project/commit/e7bc6c594b75602c23cb901f53b3a30d48e2ee78.diff

LOG: Reland [lldb][docs] Use sphinx instead of epydoc to generate LLDB's Python 
reference

The build server should now have the missing dependencies.

Original summary:

Currently LLDB uses epydoc to generate the Python API reference for the website.
epydoc however is unmaintained since more than a decade and no longer works with
Python 3. Also whatever setup we had once for generating the documentation on
the website server no longer seems to work, so the current website documentation
has been stale since more than a year.

This patch replaces epydoc with sphinx and its automodapi plugin that can
generate Python API references. LLVM already uses sphinx for the rest of the
documentation, so this way we are more consistent with the rest of LLVM. The
only new dependency is the automodapi plugin for sphinx.

This patch effectively does the following things:
* Remove the epydoc code.
* Make a new dummy Python API page in our website that just calls the Sphinx
  command for generated the API documentation.
* Add a mock _lldb module that is only used when generating the Python API.
 This way we don't have to build all of LLDB to generate the API reference.

Some notes:
* The long list of skips is necessary due to boilerplate functions that SWIG
  is generating. Sadly automodapi is not really scriptable from what I can see,
  so we have to blacklist this stuff manually.
* The .gitignore change because automodapi wants a subfolder of our
  documentation directory to place generated documentation files there. The path
  is also what is used on the website, so we can't really workaround this
  (without copying the whole `docs` dir somewhere else when we build).
* We have to use environment variables to pass our build path to our sphinx
  configuration. Sphinx doesn't support passing variables onto that script.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D94489

Added: 
lldb/docs/_lldb/__init__.py
lldb/docs/python_api.rst

Modified: 
.gitignore
lldb/docs/CMakeLists.txt
lldb/docs/conf.py
lldb/docs/index.rst
llvm/cmake/modules/AddSphinxTarget.cmake

Removed: 




diff  --git a/.gitignore b/.gitignore
index 5e937552c5f8..c58c673c198a 100644
--- a/.gitignore
+++ b/.gitignore
@@ -63,3 +63,5 @@ pythonenv*
 /clang/utils/analyzer/projects/*/PatchedSource
 /clang/utils/analyzer/projects/*/ScanBuildResults
 /clang/utils/analyzer/projects/*/RefScanBuildResults
+# automodapi puts generated documentation files here.
+/lldb/docs/python_api/

diff  --git a/lldb/docs/CMakeLists.txt b/lldb/docs/CMakeLists.txt
index b633a4abf054..af18eb22e954 100644
--- a/lldb/docs/CMakeLists.txt
+++ b/lldb/docs/CMakeLists.txt
@@ -15,60 +15,39 @@ if(DOXYGEN_FOUND)
   )
 endif()
 
-if (LLDB_ENABLE_PYTHON)
-  find_program(EPYDOC_EXECUTABLE NAMES epydoc epydoc.py)
-  if(EPYDOC_EXECUTABLE)
-message(STATUS "Found epydoc - ${EPYDOC_EXECUTABLE}")
-
-find_program(DOT_EXECUTABLE dot)
-if(DOT_EXECUTABLE)
-  set(EPYDOC_OPTIONS ${EPYDOC_OPTIONS} --graph all --dotpath 
${DOT_EXECUTABLE})
-  message(STATUS "Found dot - ${DOT_EXECUTABLE}")
-endif()
+if (LLVM_ENABLE_SPHINX)
+  include(AddSphinxTarget)
+endif()
 
-# Pretend to make a python package so that we can generate the reference.
-# Because we don't build liblldb, epydoc will complain that the import of
-# _lldb.so failed, but that doesn't prevent it from generating the docs.
+if (LLDB_ENABLE_PYTHON AND SPHINX_FOUND)
+  if (${SPHINX_OUTPUT_HTML})
+# Pretend that the SWIG generated API is a Python package.
 file(MAKE_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/lldb)
 get_target_property(lldb_bindings_dir swig_wrapper_python BINARY_DIR)
 add_custom_target(lldb-python-doc-package
   COMMAND "${CMAKE_COMMAND}" -E copy "${lldb_bindings_dir}/lldb.py" 
"${CMAKE_CURRENT_BINARY_DIR}/lldb/__init__.py"
-  COMMENT "Copying lldb.py to pretend package.")
+  COMMENT "Copying lldb.py to pretend its a Python package.")
 add_dependencies(lldb-python-doc-package swig_wrapper_python)
 
-set(DOC_DIR "${CMAKE_CURRENT_SOURCE_DIR}/doc")
-file(MAKE_DIRECTORY "${DOC_DIR}")
-add_custom_target(lldb-python-doc
-  ${EPYDOC_EXECUTABLE}
-  --html
-  lldb
-  -o ${CMAKE_CURRENT_BINARY_DIR}/python_reference
-  --name "LLDB python API"
-  --url "http://lldb.llvm.org";
-  ${EPYDOC_OPTIONS}
-  WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
-  COMMENT "Generating LLDB Python API reference with epydoc" VERBATIM
-)
-add_dependencies(lldb-python-doc swig_wrapper_python 
lldb-python-doc-package)
-  e

[llvm-branch-commits] [clang] 00dc97f - [clang-format] PR48594 BraceWrapping: SplitEmptyRecord ignored for templates

[via llvm-branch-commits]

Author: mydeveloperday
Date: 2021-01-17T11:14:33Z
New Revision: 00dc97f16708aad67834552285c0af01b37303d6

URL: 
https://github.com/llvm/llvm-project/commit/00dc97f16708aad67834552285c0af01b37303d6
DIFF: 
https://github.com/llvm/llvm-project/commit/00dc97f16708aad67834552285c0af01b37303d6.diff

LOG: [clang-format] PR48594 BraceWrapping: SplitEmptyRecord ignored for 
templates

https://bugs.llvm.org/show_bug.cgi?id=48594

Empty or small templates were not being treated the same way as small classes 
especially when SplitEmptyRecord was set to true

This revision aims to help this by identifying a case when we should try not to 
merge the lines together

Reviewed By: curdeius, JohelEGP

Differential Revision: https://reviews.llvm.org/D93839

Added: 


Modified: 
clang/lib/Format/UnwrappedLineFormatter.cpp
clang/unittests/Format/FormatTest.cpp
clang/unittests/Format/FormatTestCSharp.cpp

Removed: 




diff  --git a/clang/lib/Format/UnwrappedLineFormatter.cpp 
b/clang/lib/Format/UnwrappedLineFormatter.cpp
index d8f718306a45..13c5fdc8bd64 100644
--- a/clang/lib/Format/UnwrappedLineFormatter.cpp
+++ b/clang/lib/Format/UnwrappedLineFormatter.cpp
@@ -248,6 +248,11 @@ class LineJoiner {
 return !Style.BraceWrapping.SplitEmptyRecord && EmptyBlock
? tryMergeSimpleBlock(I, E, Limit)
: 0;
+
+  if (Tok && Tok->is(tok::kw_template) &&
+  Style.BraceWrapping.SplitEmptyRecord && EmptyBlock) {
+return 0;
+  }
 }
 
 // FIXME: TheLine->Level != 0 might or might not be the right check to do.
@@ -355,6 +360,30 @@ class LineJoiner {
 if (TheLine->First->is(tok::l_brace) && I != AnnotatedLines.begin() &&
 I[-1]->First->isOneOf(tok::kw_case, tok::kw_default))
   return 0;
+
+// Don't merge an empty template class or struct if SplitEmptyRecords
+// is defined.
+if (Style.BraceWrapping.SplitEmptyRecord &&
+TheLine->Last->is(tok::l_brace) && I != AnnotatedLines.begin() &&
+I[-1]->Last) {
+  const FormatToken *Previous = I[-1]->Last;
+  if (Previous) {
+if (Previous->is(tok::comment))
+  Previous = Previous->getPreviousNonComment();
+if (Previous) {
+  if (Previous->is(tok::greater))
+return 0;
+  if (Previous->is(tok::identifier)) {
+const FormatToken *PreviousPrevious =
+Previous->getPreviousNonComment();
+if (PreviousPrevious &&
+PreviousPrevious->isOneOf(tok::kw_class, tok::kw_struct))
+  return 0;
+  }
+}
+  }
+}
+
 // Try to merge a block with left brace wrapped that wasn't yet covered
 if (TheLine->Last->is(tok::l_brace)) {
   return !Style.BraceWrapping.AfterFunction ||

diff  --git a/clang/unittests/Format/FormatTest.cpp 
b/clang/unittests/Format/FormatTest.cpp
index acfd229e200b..9fd41dbe7556 100644
--- a/clang/unittests/Format/FormatTest.cpp
+++ b/clang/unittests/Format/FormatTest.cpp
@@ -9891,6 +9891,71 @@ TEST_F(FormatTest, SplitEmptyClass) {
"{\n"
"} Foo_t;",
Style);
+
+  Style.BraceWrapping.SplitEmptyRecord = true;
+  Style.BraceWrapping.AfterStruct = true;
+  verifyFormat("class rep\n"
+   "{\n"
+   "};",
+   Style);
+  verifyFormat("struct rep\n"
+   "{\n"
+   "};",
+   Style);
+  verifyFormat("template  class rep\n"
+   "{\n"
+   "};",
+   Style);
+  verifyFormat("template  struct rep\n"
+   "{\n"
+   "};",
+   Style);
+  verifyFormat("class rep\n"
+   "{\n"
+   "  int x;\n"
+   "};",
+   Style);
+  verifyFormat("struct rep\n"
+   "{\n"
+   "  int x;\n"
+   "};",
+   Style);
+  verifyFormat("template  class rep\n"
+   "{\n"
+   "  int x;\n"
+   "};",
+   Style);
+  verifyFormat("template  struct rep\n"
+   "{\n"
+   "  int x;\n"
+   "};",
+   Style);
+  verifyFormat("template  class rep // Foo\n"
+   "{\n"
+   "  int x;\n"
+   "};",
+   Style);
+  verifyFormat("template  struct rep // Bar\n"
+   "{\n"
+   "  int x;\n"
+   "};",
+   Style);
+
+  verifyFormat("template  class rep\n"
+   "{\n"
+   "  int x;\n"
+   "};",
+   Style);
+
+  verifyFormat("template  class rep>\n"
+   "{\n"
+   "  int x;\n"
+   "};",
+   Style);
+  verifyFormat("template  class rep>\n"
+   "{\n"
+   "};",
+   Style);
 }
 
 TEST_F(FormatTest, SplitEmptyStruct) {

[llvm-branch-commits] [clang-tools-extra] 0f9908a - [clangd] Use empty() instead of size()>0

[Utkarsh Saxena via llvm-branch-commits]

Author: Utkarsh Saxena
Date: 2021-01-17T15:13:01+01:00
New Revision: 0f9908a7c9c547f2675e00f88cc11ec02ca28e8d

URL: 
https://github.com/llvm/llvm-project/commit/0f9908a7c9c547f2675e00f88cc11ec02ca28e8d
DIFF: 
https://github.com/llvm/llvm-project/commit/0f9908a7c9c547f2675e00f88cc11ec02ca28e8d.diff

LOG: [clangd] Use empty() instead of size()>0

Added: 


Modified: 
clang-tools-extra/clangd/Quality.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/Quality.cpp 
b/clang-tools-extra/clangd/Quality.cpp
index 7b6a76584778..f076b44f5743 100644
--- a/clang-tools-extra/clangd/Quality.cpp
+++ b/clang-tools-extra/clangd/Quality.cpp
@@ -512,7 +512,7 @@ evaluateDecisionForest(const SymbolQualitySignals &Quality,
   E.setIsNameInContext(NumMatch > 0);
   E.setNumNameInContext(NumMatch);
   E.setFractionNameInContext(
-  Relevance.ContextWords && Relevance.ContextWords->size() > 0
+  Relevance.ContextWords && Relevance.ContextWords->empty()
   ? NumMatch * 1.0 / Relevance.ContextWords->size()
   : 0);
   E.setIsInBaseClass(Relevance.InBaseClass);



___
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[llvm-branch-commits] [clang-tools-extra] 9abbc05 - [clangd] Use !empty() instead of size()>0

[Utkarsh Saxena via llvm-branch-commits]

Author: Utkarsh Saxena
Date: 2021-01-17T15:26:40+01:00
New Revision: 9abbc050974ff117b79e8e049c52c56db3f49aec

URL: 
https://github.com/llvm/llvm-project/commit/9abbc050974ff117b79e8e049c52c56db3f49aec
DIFF: 
https://github.com/llvm/llvm-project/commit/9abbc050974ff117b79e8e049c52c56db3f49aec.diff

LOG: [clangd] Use !empty() instead of size()>0

Added: 


Modified: 
clang-tools-extra/clangd/Quality.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/Quality.cpp 
b/clang-tools-extra/clangd/Quality.cpp
index f076b44f5743..27b959ecacb3 100644
--- a/clang-tools-extra/clangd/Quality.cpp
+++ b/clang-tools-extra/clangd/Quality.cpp
@@ -512,7 +512,7 @@ evaluateDecisionForest(const SymbolQualitySignals &Quality,
   E.setIsNameInContext(NumMatch > 0);
   E.setNumNameInContext(NumMatch);
   E.setFractionNameInContext(
-  Relevance.ContextWords && Relevance.ContextWords->empty()
+  Relevance.ContextWords && !Relevance.ContextWords->empty()
   ? NumMatch * 1.0 / Relevance.ContextWords->size()
   : 0);
   E.setIsInBaseClass(Relevance.InBaseClass);



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[llvm-branch-commits] [llvm] 4bfbfb9 - [InstSimplify] Add tests for x*C1/C2<=x (NFC)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-17T16:02:55+01:00
New Revision: 4bfbfb9bcb790931b97da972ff02865810f43ce8

URL: 
https://github.com/llvm/llvm-project/commit/4bfbfb9bcb790931b97da972ff02865810f43ce8
DIFF: 
https://github.com/llvm/llvm-project/commit/4bfbfb9bcb790931b97da972ff02865810f43ce8.diff

LOG: [InstSimplify] Add tests for x*C1/C2<=x (NFC)

Tests for PR48744.

Added: 


Modified: 
llvm/test/Transforms/InstSimplify/icmp.ll

Removed: 




diff  --git a/llvm/test/Transforms/InstSimplify/icmp.ll 
b/llvm/test/Transforms/InstSimplify/icmp.ll
index 9d03dc9cbeaf..ad39725889c8 100644
--- a/llvm/test/Transforms/InstSimplify/icmp.ll
+++ b/llvm/test/Transforms/InstSimplify/icmp.ll
@@ -36,3 +36,175 @@ define i1 @poison2(i32 %x) {
   %v = icmp slt i32 %x, poison
   ret i1 %v
 }
+
+define i1 @mul_div_cmp_smaller(i8 %x) {
+; CHECK-LABEL: @mul_div_cmp_smaller(
+; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 3
+; CHECK-NEXT:[[DIV:%.*]] = udiv i8 [[MUL]], 4
+; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DIV]], [[X]]
+; CHECK-NEXT:ret i1 [[CMP]]
+;
+  %mul = mul i8 %x, 3
+  %div = udiv i8 %mul, 4
+  %cmp = icmp ule i8 %div, %x
+  ret i1 %cmp
+}
+
+define i1 @mul_div_cmp_equal(i8 %x) {
+; CHECK-LABEL: @mul_div_cmp_equal(
+; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 3
+; CHECK-NEXT:[[DIV:%.*]] = udiv i8 [[MUL]], 3
+; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DIV]], [[X]]
+; CHECK-NEXT:ret i1 [[CMP]]
+;
+  %mul = mul i8 %x, 3
+  %div = udiv i8 %mul, 3
+  %cmp = icmp ule i8 %div, %x
+  ret i1 %cmp
+}
+
+; Negative test: 3>2
+define i1 @mul_div_cmp_greater(i8 %x) {
+; CHECK-LABEL: @mul_div_cmp_greater(
+; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 3
+; CHECK-NEXT:[[DIV:%.*]] = udiv i8 [[MUL]], 2
+; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DIV]], [[X]]
+; CHECK-NEXT:ret i1 [[CMP]]
+;
+  %mul = mul i8 %x, 3
+  %div = udiv i8 %mul, 2
+  %cmp = icmp ule i8 %div, %x
+  ret i1 %cmp
+}
+define i1 @mul_div_cmp_ugt(i8 %x) {
+; CHECK-LABEL: @mul_div_cmp_ugt(
+; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 3
+; CHECK-NEXT:[[DIV:%.*]] = udiv i8 [[MUL]], 4
+; CHECK-NEXT:[[CMP:%.*]] = icmp ugt i8 [[DIV]], [[X]]
+; CHECK-NEXT:ret i1 [[CMP]]
+;
+  %mul = mul i8 %x, 3
+  %div = udiv i8 %mul, 4
+  %cmp = icmp ugt i8 %div, %x
+  ret i1 %cmp
+}
+
+; Negative test: Wrong predicate
+define i1 @mul_div_cmp_uge(i8 %x) {
+; CHECK-LABEL: @mul_div_cmp_uge(
+; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 3
+; CHECK-NEXT:[[DIV:%.*]] = udiv i8 [[MUL]], 4
+; CHECK-NEXT:[[CMP:%.*]] = icmp uge i8 [[DIV]], [[X]]
+; CHECK-NEXT:ret i1 [[CMP]]
+;
+  %mul = mul i8 %x, 3
+  %div = udiv i8 %mul, 4
+  %cmp = icmp uge i8 %div, %x
+  ret i1 %cmp
+}
+
+; Negative test: Wrong predicate
+define i1 @mul_div_cmp_ult(i8 %x) {
+; CHECK-LABEL: @mul_div_cmp_ult(
+; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 3
+; CHECK-NEXT:[[DIV:%.*]] = udiv i8 [[MUL]], 4
+; CHECK-NEXT:[[CMP:%.*]] = icmp ult i8 [[DIV]], [[X]]
+; CHECK-NEXT:ret i1 [[CMP]]
+;
+  %mul = mul i8 %x, 3
+  %div = udiv i8 %mul, 4
+  %cmp = icmp ult i8 %div, %x
+  ret i1 %cmp
+}
+
+; Negative test: Wrong icmp operand
+define i1 @mul_div_cmp_wrong_operand(i8 %x, i8 %y) {
+; CHECK-LABEL: @mul_div_cmp_wrong_operand(
+; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 3
+; CHECK-NEXT:[[DIV:%.*]] = udiv i8 [[MUL]], 4
+; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DIV]], [[Y:%.*]]
+; CHECK-NEXT:ret i1 [[CMP]]
+;
+  %mul = mul i8 %x, 3
+  %div = udiv i8 %mul, 4
+  %cmp = icmp ule i8 %div, %y
+  ret i1 %cmp
+}
+
+define i1 @mul_lshr_cmp_smaller(i8 %x) {
+; CHECK-LABEL: @mul_lshr_cmp_smaller(
+; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 3
+; CHECK-NEXT:[[DIV:%.*]] = lshr i8 [[MUL]], 2
+; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DIV]], [[X]]
+; CHECK-NEXT:ret i1 [[CMP]]
+;
+  %mul = mul i8 %x, 3
+  %div = lshr i8 %mul, 2
+  %cmp = icmp ule i8 %div, %x
+  ret i1 %cmp
+}
+
+define i1 @mul_lshr_cmp_equal(i8 %x) {
+; CHECK-LABEL: @mul_lshr_cmp_equal(
+; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 4
+; CHECK-NEXT:[[DIV:%.*]] = lshr i8 [[MUL]], 2
+; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DIV]], [[X]]
+; CHECK-NEXT:ret i1 [[CMP]]
+;
+  %mul = mul i8 %x, 4
+  %div = lshr i8 %mul, 2
+  %cmp = icmp ule i8 %div, %x
+  ret i1 %cmp
+}
+
+define i1 @mul_lshr_cmp_greater(i8 %x) {
+; CHECK-LABEL: @mul_lshr_cmp_greater(
+; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 5
+; CHECK-NEXT:[[DIV:%.*]] = lshr i8 [[MUL]], 2
+; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DIV]], [[X]]
+; CHECK-NEXT:ret i1 [[CMP]]
+;
+  %mul = mul i8 %x, 5
+  %div = lshr i8 %mul, 2
+  %cmp = icmp ule i8 %div, %x
+  ret i1 %cmp
+}
+
+define i1 @shl_div_cmp_smaller(i8 %x) {
+; CHECK-LABEL: @shl_div_cmp_smaller(
+; CHECK-NEXT:[[MUL:%.*]] = shl i8 [[X:%.*]], 2
+; CHECK-NEXT:[[DIV:%.*]] = udiv i8 [[MUL]], 5
+; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DI

[llvm-branch-commits] [llvm] a13c0f6 - [InstSimplify] Fold x*C1/C2 <= x (PR48744)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-17T16:02:55+01:00
New Revision: a13c0f62c38131ef2656b06de02d82110abaf272

URL: 
https://github.com/llvm/llvm-project/commit/a13c0f62c38131ef2656b06de02d82110abaf272
DIFF: 
https://github.com/llvm/llvm-project/commit/a13c0f62c38131ef2656b06de02d82110abaf272.diff

LOG: [InstSimplify] Fold x*C1/C2 <= x (PR48744)

We can fold x*C1/C2 <= x to true if C1 <= C2. This is valid even
if the multiplication is not nuw: https://alive2.llvm.org/ce/z/vULors

The multiplication or division can be replaced by shifts. We don't
handle the case where both are shifts, as that should get folded
away by InstCombine.

Added: 


Modified: 
llvm/lib/Analysis/InstructionSimplify.cpp
llvm/test/Transforms/InstSimplify/icmp.ll

Removed: 




diff  --git a/llvm/lib/Analysis/InstructionSimplify.cpp 
b/llvm/lib/Analysis/InstructionSimplify.cpp
index b672798aaffc..3cab06079a87 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -2901,6 +2901,28 @@ static Value *simplifyICmpWithBinOpOnLHS(
   return getTrue(ITy);
   }
 
+  // (x*C1)/C2 <= x for C1 <= C2.
+  // This holds even if the multiplication overflows: Assume that x != 0 and
+  // arithmetic is modulo M. For overflow to occur we must have C1 >= M/x and
+  // thus C2 >= M/x. It follows that (x*C1)/C2 <= (M-1)/C2 <= ((M-1)*x)/M < x.
+  //
+  // Additionally, either the multiplication and division might be represented
+  // as shifts:
+  // (x*C1)>>C2 <= x for C1 < 2**C2.
+  // (xule(APInt(C2->getBitWidth(), 1) << *C2)) ||
+  (match(LBO, m_UDiv(m_Shl(m_Specific(RHS), m_APInt(C1)), m_APInt(C2))) &&
+   (APInt(C1->getBitWidth(), 1) << *C1).ule(*C2))) {
+if (Pred == ICmpInst::ICMP_UGT)
+  return getFalse(ITy);
+if (Pred == ICmpInst::ICMP_ULE)
+  return getTrue(ITy);
+  }
+
   return nullptr;
 }
 

diff  --git a/llvm/test/Transforms/InstSimplify/icmp.ll 
b/llvm/test/Transforms/InstSimplify/icmp.ll
index ad39725889c8..1d4e954256a0 100644
--- a/llvm/test/Transforms/InstSimplify/icmp.ll
+++ b/llvm/test/Transforms/InstSimplify/icmp.ll
@@ -39,10 +39,7 @@ define i1 @poison2(i32 %x) {
 
 define i1 @mul_div_cmp_smaller(i8 %x) {
 ; CHECK-LABEL: @mul_div_cmp_smaller(
-; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 3
-; CHECK-NEXT:[[DIV:%.*]] = udiv i8 [[MUL]], 4
-; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DIV]], [[X]]
-; CHECK-NEXT:ret i1 [[CMP]]
+; CHECK-NEXT:ret i1 true
 ;
   %mul = mul i8 %x, 3
   %div = udiv i8 %mul, 4
@@ -52,10 +49,7 @@ define i1 @mul_div_cmp_smaller(i8 %x) {
 
 define i1 @mul_div_cmp_equal(i8 %x) {
 ; CHECK-LABEL: @mul_div_cmp_equal(
-; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 3
-; CHECK-NEXT:[[DIV:%.*]] = udiv i8 [[MUL]], 3
-; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DIV]], [[X]]
-; CHECK-NEXT:ret i1 [[CMP]]
+; CHECK-NEXT:ret i1 true
 ;
   %mul = mul i8 %x, 3
   %div = udiv i8 %mul, 3
@@ -78,10 +72,7 @@ define i1 @mul_div_cmp_greater(i8 %x) {
 }
 define i1 @mul_div_cmp_ugt(i8 %x) {
 ; CHECK-LABEL: @mul_div_cmp_ugt(
-; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 3
-; CHECK-NEXT:[[DIV:%.*]] = udiv i8 [[MUL]], 4
-; CHECK-NEXT:[[CMP:%.*]] = icmp ugt i8 [[DIV]], [[X]]
-; CHECK-NEXT:ret i1 [[CMP]]
+; CHECK-NEXT:ret i1 false
 ;
   %mul = mul i8 %x, 3
   %div = udiv i8 %mul, 4
@@ -133,10 +124,7 @@ define i1 @mul_div_cmp_wrong_operand(i8 %x, i8 %y) {
 
 define i1 @mul_lshr_cmp_smaller(i8 %x) {
 ; CHECK-LABEL: @mul_lshr_cmp_smaller(
-; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 3
-; CHECK-NEXT:[[DIV:%.*]] = lshr i8 [[MUL]], 2
-; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DIV]], [[X]]
-; CHECK-NEXT:ret i1 [[CMP]]
+; CHECK-NEXT:ret i1 true
 ;
   %mul = mul i8 %x, 3
   %div = lshr i8 %mul, 2
@@ -146,10 +134,7 @@ define i1 @mul_lshr_cmp_smaller(i8 %x) {
 
 define i1 @mul_lshr_cmp_equal(i8 %x) {
 ; CHECK-LABEL: @mul_lshr_cmp_equal(
-; CHECK-NEXT:[[MUL:%.*]] = mul i8 [[X:%.*]], 4
-; CHECK-NEXT:[[DIV:%.*]] = lshr i8 [[MUL]], 2
-; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DIV]], [[X]]
-; CHECK-NEXT:ret i1 [[CMP]]
+; CHECK-NEXT:ret i1 true
 ;
   %mul = mul i8 %x, 4
   %div = lshr i8 %mul, 2
@@ -172,10 +157,7 @@ define i1 @mul_lshr_cmp_greater(i8 %x) {
 
 define i1 @shl_div_cmp_smaller(i8 %x) {
 ; CHECK-LABEL: @shl_div_cmp_smaller(
-; CHECK-NEXT:[[MUL:%.*]] = shl i8 [[X:%.*]], 2
-; CHECK-NEXT:[[DIV:%.*]] = udiv i8 [[MUL]], 5
-; CHECK-NEXT:[[CMP:%.*]] = icmp ule i8 [[DIV]], [[X]]
-; CHECK-NEXT:ret i1 [[CMP]]
+; CHECK-NEXT:ret i1 true
 ;
   %mul = shl i8 %x, 2
   %div = udiv i8 %mul, 5
@@ -185,10 +167,7 @@ define i1 @shl_div_cmp_smaller(i8 %x) {
 
 define i1 @shl_div_cmp_equal(i8 %x) {
 ; CHECK-LABEL: @shl_div_cmp_equal(
-; CHECK-NEXT:[[MUL:%.*]] = shl i8 [[X:%.*]], 2
-; CHEC

[llvm-branch-commits] [lldb] acdc745 - [lldb][docs] Cleanup the Python doc strings for SB API classes

[Raphael Isemann via llvm-branch-commits]

Author: Raphael Isemann
Date: 2021-01-17T16:51:07+01:00
New Revision: acdc74568927d47f94816e73b6e105c9460cc3e4

URL: 
https://github.com/llvm/llvm-project/commit/acdc74568927d47f94816e73b6e105c9460cc3e4
DIFF: 
https://github.com/llvm/llvm-project/commit/acdc74568927d47f94816e73b6e105c9460cc3e4.diff

LOG: [lldb][docs] Cleanup the Python doc strings for SB API classes

The first line of the doc string ends up on the SB API class summary at
the root page of the Python API  web page of LLDB. Currently many of the
descriptions are missing or are several lines which makes the table really
hard to read.

This just adds the missing docstrings where possible and fixes the formatting
where necessary.

Added: 


Modified: 
lldb/bindings/interface/SBAttachInfo.i
lldb/bindings/interface/SBBreakpoint.i
lldb/bindings/interface/SBCommunication.i
lldb/bindings/interface/SBData.i
lldb/bindings/interface/SBExecutionContext.i
lldb/bindings/interface/SBFileSpecList.i
lldb/bindings/interface/SBFrame.i
lldb/bindings/interface/SBHostOS.i
lldb/bindings/interface/SBInstruction.i
lldb/bindings/interface/SBLanguageRuntime.i
lldb/bindings/interface/SBLaunchInfo.i
lldb/bindings/interface/SBLineEntry.i
lldb/bindings/interface/SBMemoryRegionInfoList.i
lldb/bindings/interface/SBModuleSpec.i
lldb/bindings/interface/SBPlatform.i
lldb/bindings/interface/SBQueue.i
lldb/bindings/interface/SBQueueItem.i
lldb/bindings/interface/SBReproducer.i
lldb/bindings/interface/SBStringList.i
lldb/bindings/interface/SBThreadPlan.i
lldb/bindings/interface/SBTrace.i
lldb/bindings/interface/SBTraceOptions.i
lldb/bindings/interface/SBType.i
lldb/bindings/interface/SBTypeEnumMember.i
lldb/bindings/interface/SBVariablesOptions.i
lldb/bindings/python/python-extensions.swig

Removed: 




diff  --git a/lldb/bindings/interface/SBAttachInfo.i 
b/lldb/bindings/interface/SBAttachInfo.i
index 3f4634e14619..9ac96e6dd7be 100644
--- a/lldb/bindings/interface/SBAttachInfo.i
+++ b/lldb/bindings/interface/SBAttachInfo.i
@@ -7,7 +7,9 @@
 
//===--===//
 
 namespace lldb {
-
+%feature("docstring",
+"Describes how to attach when calling :py:class:`SBTarget.Attach`."
+) SBAttachInfo;
 class SBAttachInfo
 {
 public:

diff  --git a/lldb/bindings/interface/SBBreakpoint.i 
b/lldb/bindings/interface/SBBreakpoint.i
index 983e9facfe20..37fcc7fbab48 100644
--- a/lldb/bindings/interface/SBBreakpoint.i
+++ b/lldb/bindings/interface/SBBreakpoint.i
@@ -313,6 +313,10 @@ public:
 
 class SBBreakpointListImpl;
 
+
+%feature("docstring",
+"Represents a list of :py:class:`SBBreakpoint`."
+) SBBreakpointList;
 class LLDB_API SBBreakpointList
 {
 public:

diff  --git a/lldb/bindings/interface/SBCommunication.i 
b/lldb/bindings/interface/SBCommunication.i
index 87d3d0c9c5e4..8611e83e92ad 100644
--- a/lldb/bindings/interface/SBCommunication.i
+++ b/lldb/bindings/interface/SBCommunication.i
@@ -8,6 +8,9 @@
 
 namespace lldb {
 
+%feature("docstring",
+"Allows sending/receiving data."
+) SBCommunication;
 class SBCommunication
 {
 public:

diff  --git a/lldb/bindings/interface/SBData.i 
b/lldb/bindings/interface/SBData.i
index 3e74240329e0..a1fb4472cd23 100644
--- a/lldb/bindings/interface/SBData.i
+++ b/lldb/bindings/interface/SBData.i
@@ -9,6 +9,9 @@
 
 namespace lldb {
 
+%feature("docstring",
+"Represents a data buffer."
+) SBData;
 class SBData
 {
 public:

diff  --git a/lldb/bindings/interface/SBExecutionContext.i 
b/lldb/bindings/interface/SBExecutionContext.i
index 46968d04ae32..5fc5c0571182 100644
--- a/lldb/bindings/interface/SBExecutionContext.i
+++ b/lldb/bindings/interface/SBExecutionContext.i
@@ -8,6 +8,9 @@
 
 namespace lldb {
 
+%feature("docstring",
+"Describes the program context in which a command should be executed."
+) SBExecutionContext;
 class SBExecutionContext
 {
 public:

diff  --git a/lldb/bindings/interface/SBFileSpecList.i 
b/lldb/bindings/interface/SBFileSpecList.i
index 96641613f459..384dd4c4ae08 100644
--- a/lldb/bindings/interface/SBFileSpecList.i
+++ b/lldb/bindings/interface/SBFileSpecList.i
@@ -8,6 +8,9 @@
 
 namespace lldb {
 
+%feature("docstring",
+"Represents a list of :py:class:`SBFileSpec`."
+) SBFileSpecList;
 class SBFileSpecList
 {
 public:

diff  --git a/lldb/bindings/interface/SBFrame.i 
b/lldb/bindings/interface/SBFrame.i
index b4e9b1c5f542..8ceb03bb7a18 100644
--- a/lldb/bindings/interface/SBFrame.i
+++ b/lldb/bindings/interface/SBFrame.i
@@ -10,6 +10,7 @@ namespace lldb {
 
 %feature("docstring",
 "Represents one of the stack frames associated with a thread.
+
 SBThread contains SBFrame(s). For example (from test/lldbutil.py), ::
 
 def print_stacktrace(thread, string_buffer = False):

diff  --git a/lldb/bindings/interface/SBHostOS.i 
b/lldb/bindings/interface/SBHostOS.i
index 14f4186cb9f3..791fa5a

[llvm-branch-commits] [llvm] 469ceaf - [Tests] Add test for PR45691

[Dávid Bolvanský via llvm-branch-commits]

Author: Dávid Bolvanský
Date: 2021-01-17T17:04:49+01:00
New Revision: 469ceaf53892d26f7b68f86f1feb38fe7057815e

URL: 
https://github.com/llvm/llvm-project/commit/469ceaf53892d26f7b68f86f1feb38fe7057815e
DIFF: 
https://github.com/llvm/llvm-project/commit/469ceaf53892d26f7b68f86f1feb38fe7057815e.diff

LOG: [Tests] Add test for PR45691

Added: 
llvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll

Modified: 


Removed: 




diff  --git a/llvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll 
b/llvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll
new file mode 100644
index ..1874378f1f1f
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll
@@ -0,0 +1,112 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; ((ashr X, 31) | 1 ) * X --> abs(X)
+; X * ((ashr X, 31) | 1 ) --> abs(X)
+
+define i32 @ashr_or_mul_to_abs(i32 %X) {
+; CHECK-LABEL: @ashr_or_mul_to_abs(
+; CHECK-NEXT:[[I:%.*]] = ashr i32 [[X:%.*]], 31
+; CHECK-NEXT:[[I1:%.*]] = or i32 [[I]], 1
+; CHECK-NEXT:[[I2:%.*]] = mul nsw i32 [[I1]], [[X]]
+; CHECK-NEXT:ret i32 [[I2]]
+;
+  %i = ashr i32 %X, 31
+  %i1 = or i32 %i, 1
+  %i2 = mul nsw i32 %i1, %X
+  ret i32 %i2
+}
+
+define i32 @ashr_or_mul_to_abs2(i32 %X) {
+; CHECK-LABEL: @ashr_or_mul_to_abs2(
+; CHECK-NEXT:[[I:%.*]] = ashr i32 [[X:%.*]], 31
+; CHECK-NEXT:[[I1:%.*]] = or i32 [[I]], 1
+; CHECK-NEXT:[[I2:%.*]] = mul i32 [[I1]], [[X]]
+; CHECK-NEXT:ret i32 [[I2]]
+;
+  %i = ashr i32 %X, 31
+  %i1 = or i32 %i, 1
+  %i2 = mul i32 %i1, %X
+  ret i32 %i2
+}
+
+define i32 @ashr_or_mul_to_abs3(i32 %X) {
+; CHECK-LABEL: @ashr_or_mul_to_abs3(
+; CHECK-NEXT:[[I:%.*]] = ashr i32 [[X:%.*]], 31
+; CHECK-NEXT:[[I1:%.*]] = or i32 [[I]], 1
+; CHECK-NEXT:[[I2:%.*]] = mul i32 [[I1]], [[X]]
+; CHECK-NEXT:ret i32 [[I2]]
+;
+  %i = ashr i32 %X, 31
+  %i1 = or i32 %i, 1
+  %i2 = mul i32 %X, %i1
+  ret i32 %i2
+}
+
+
+define <4 x i32> @ashr_or_mul_to_abs_vec(<4 x i32> %X) {
+; CHECK-LABEL: @ashr_or_mul_to_abs_vec(
+; CHECK-NEXT:[[I:%.*]] = ashr <4 x i32> [[X:%.*]], 
+; CHECK-NEXT:[[I1:%.*]] = or <4 x i32> [[I]], 
+; CHECK-NEXT:[[I2:%.*]] = mul <4 x i32> [[I1]], [[X]]
+; CHECK-NEXT:ret <4 x i32> [[I2]]
+;
+  %i = ashr <4 x i32> %X, 
+  %i1 = or <4 x i32> %i, 
+  %i2 = mul <4 x i32> %i1, %X
+  ret <4 x i32> %i2
+}
+
+define <4 x i32> @ashr_or_mul_to_abs_vec2(<4 x i32> %X) {
+; CHECK-LABEL: @ashr_or_mul_to_abs_vec2(
+; CHECK-NEXT:[[I:%.*]] = ashr <4 x i32> [[X:%.*]], 
+; CHECK-NEXT:[[I1:%.*]] = or <4 x i32> [[I]], 
+; CHECK-NEXT:[[I2:%.*]] = mul nsw <4 x i32> [[I1]], [[X]]
+; CHECK-NEXT:ret <4 x i32> [[I2]]
+;
+  %i = ashr <4 x i32> %X, 
+  %i1 = or <4 x i32> %i, 
+  %i2 = mul nsw <4 x i32> %i1, %X
+  ret <4 x i32> %i2
+}
+
+define <4 x i32> @ashr_or_mul_to_abs_vec3_undef(<4 x i32> %X) {
+; CHECK-LABEL: @ashr_or_mul_to_abs_vec3_undef(
+; CHECK-NEXT:[[I:%.*]] = ashr <4 x i32> [[X:%.*]], 
+; CHECK-NEXT:[[I1:%.*]] = or <4 x i32> [[I]], 
+; CHECK-NEXT:[[I2:%.*]] = mul <4 x i32> [[I1]], [[X]]
+; CHECK-NEXT:ret <4 x i32> [[I2]]
+;
+  %i = ashr <4 x i32> %X, 
+  %i1 = or <4 x i32> %i, 
+  %i2 = mul <4 x i32> %i1, %X
+  ret <4 x i32> %i2
+}
+
+; Negative tests
+
+define i32 @ashr_or_mul_to_abs_neg(i32 %X) {
+; CHECK-LABEL: @ashr_or_mul_to_abs_neg(
+; CHECK-NEXT:[[I:%.*]] = ashr i32 [[X:%.*]], 30
+; CHECK-NEXT:[[I1:%.*]] = or i32 [[I]], 1
+; CHECK-NEXT:[[I2:%.*]] = mul nsw i32 [[I1]], [[X]]
+; CHECK-NEXT:ret i32 [[I2]]
+;
+  %i = ashr i32 %X, 30
+  %i1 = or i32 %i, 1
+  %i2 = mul nsw i32 %i1, %X
+  ret i32 %i2
+}
+
+define i32 @ashr_or_mul_to_abs_neg2(i32 %X) {
+; CHECK-LABEL: @ashr_or_mul_to_abs_neg2(
+; CHECK-NEXT:[[I:%.*]] = ashr i32 [[X:%.*]], 31
+; CHECK-NEXT:[[I1:%.*]] = or i32 [[I]], 2
+; CHECK-NEXT:[[I2:%.*]] = mul nsw i32 [[I1]], [[X]]
+; CHECK-NEXT:ret i32 [[I2]]
+;
+  %i = ashr i32 %X, 31
+  %i1 = or i32 %i, 2
+  %i2 = mul nsw i32 %i1, %X
+  ret i32 %i2
+}



___
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llvm-branch-commits@lists.llvm.org
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[llvm-branch-commits] [llvm] ed39621 - [InstCombine] Transform abs pattern using multiplication to abs intrinsic (PR45691)

[Dávid Bolvanský via llvm-branch-commits]

Author: Dávid Bolvanský
Date: 2021-01-17T17:06:14+01:00
New Revision: ed396212da41feed9bffb8cc1ca6518ab031a3c7

URL: 
https://github.com/llvm/llvm-project/commit/ed396212da41feed9bffb8cc1ca6518ab031a3c7
DIFF: 
https://github.com/llvm/llvm-project/commit/ed396212da41feed9bffb8cc1ca6518ab031a3c7.diff

LOG: [InstCombine] Transform abs pattern using multiplication to abs intrinsic 
(PR45691)

```
unsigned r(int v)
{
return (1 | -(v < 0)) * v;
}

`r` is equivalent to `abs(v)`.

```

```
define <4 x i8> @src(<4 x i8> %0) {
%1:
  %2 = ashr <4 x i8> %0, { 31, undef, 31, 31 }
  %3 = or <4 x i8> %2, { 1, 1, 1, undef }
  %4 = mul nsw <4 x i8> %3, %0
  ret <4 x i8> %4
}
=>
define <4 x i8> @tgt(<4 x i8> %0) {
%1:
  %2 = icmp slt <4 x i8> %0, { 0, 0, 0, 0 }
  %3 = sub nsw <4 x i8> { 0, 0, 0, 0 }, %0
  %4 = select <4 x i1> %2, <4 x i8> %3, <4 x i8> %0
  ret <4 x i8> %4
}
Transformation seems to be correct!
```

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D94874

Added: 


Modified: 
llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
llvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll

Removed: 




diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 2da7415b908b..4b485a0ad85e 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -153,8 +153,10 @@ Instruction *InstCombinerImpl::visitMul(BinaryOperator &I) 
{
   if (Value *V = SimplifyUsingDistributiveLaws(I))
 return replaceInstUsesWith(I, V);
 
-  // X * -1 == 0 - X
   Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
+  unsigned BitWidth = I.getType()->getScalarSizeInBits();
+
+  // X * -1 == 0 - X
   if (match(Op1, m_AllOnes())) {
 BinaryOperator *BO = BinaryOperator::CreateNeg(Op0, I.getName());
 if (I.hasNoSignedWrap())
@@ -360,6 +362,19 @@ Instruction *InstCombinerImpl::visitMul(BinaryOperator &I) 
{
   if (match(Op1, m_LShr(m_Value(X), m_APInt(C))) && *C == C->getBitWidth() - 1)
 return BinaryOperator::CreateAnd(Builder.CreateAShr(X, *C), Op0);
 
+  // ((ashr X, 31) | 1) * X --> abs(X)
+  // X * ((ashr X, 31) | 1) --> abs(X)
+  if (match(&I, m_c_BinOp(m_Or(m_AShr(m_Value(X),
+m_SpecificIntAllowUndef(BitWidth - 1)),
+ m_One()),
+m_Deferred(X {
+Value *Abs = Builder.CreateBinaryIntrinsic(
+Intrinsic::abs, X,
+ConstantInt::getBool(I.getContext(), I.hasNoSignedWrap()));
+Abs->takeName(&I);
+return replaceInstUsesWith(I, Abs);
+  }
+
   if (Instruction *Ext = narrowMathIfNoOverflow(I))
 return Ext;
 

diff  --git a/llvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll 
b/llvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll
index 1874378f1f1f..ab390a209340 100644
--- a/llvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll
+++ b/llvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll
@@ -6,9 +6,7 @@
 
 define i32 @ashr_or_mul_to_abs(i32 %X) {
 ; CHECK-LABEL: @ashr_or_mul_to_abs(
-; CHECK-NEXT:[[I:%.*]] = ashr i32 [[X:%.*]], 31
-; CHECK-NEXT:[[I1:%.*]] = or i32 [[I]], 1
-; CHECK-NEXT:[[I2:%.*]] = mul nsw i32 [[I1]], [[X]]
+; CHECK-NEXT:[[I2:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
 ; CHECK-NEXT:ret i32 [[I2]]
 ;
   %i = ashr i32 %X, 31
@@ -19,9 +17,7 @@ define i32 @ashr_or_mul_to_abs(i32 %X) {
 
 define i32 @ashr_or_mul_to_abs2(i32 %X) {
 ; CHECK-LABEL: @ashr_or_mul_to_abs2(
-; CHECK-NEXT:[[I:%.*]] = ashr i32 [[X:%.*]], 31
-; CHECK-NEXT:[[I1:%.*]] = or i32 [[I]], 1
-; CHECK-NEXT:[[I2:%.*]] = mul i32 [[I1]], [[X]]
+; CHECK-NEXT:[[I2:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
 ; CHECK-NEXT:ret i32 [[I2]]
 ;
   %i = ashr i32 %X, 31
@@ -30,13 +26,13 @@ define i32 @ashr_or_mul_to_abs2(i32 %X) {
   ret i32 %i2
 }
 
-define i32 @ashr_or_mul_to_abs3(i32 %X) {
+define i32 @ashr_or_mul_to_abs3(i32 %PX) {
 ; CHECK-LABEL: @ashr_or_mul_to_abs3(
-; CHECK-NEXT:[[I:%.*]] = ashr i32 [[X:%.*]], 31
-; CHECK-NEXT:[[I1:%.*]] = or i32 [[I]], 1
-; CHECK-NEXT:[[I2:%.*]] = mul i32 [[I1]], [[X]]
+; CHECK-NEXT:[[X:%.*]] = sdiv i32 42, [[PX:%.*]]
+; CHECK-NEXT:[[I2:%.*]] = call i32 @llvm.abs.i32(i32 [[X]], i1 false)
 ; CHECK-NEXT:ret i32 [[I2]]
 ;
+  %X = sdiv i32 42, %PX ; thwart complexity-based canonicalization
   %i = ashr i32 %X, 31
   %i1 = or i32 %i, 1
   %i2 = mul i32 %X, %i1
@@ -46,9 +42,7 @@ define i32 @ashr_or_mul_to_abs3(i32 %X) {
 
 define <4 x i32> @ashr_or_mul_to_abs_vec(<4 x i32> %X) {
 ; CHECK-LABEL: @ashr_or_mul_to_abs_vec(
-; CHECK-NEXT:[[I:%.*]] = ashr <4 x i32> [[X:%.*]], 
-; CHECK-NEXT:[[I1:%.*]] = or <4 x i32> [[I]], 
-; CHECK-NEXT:[[I2:%.*]] = mul <4 x i32> [[I1]], [[X]]
+; CHECK-NEXT:[[I2:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> 
[[X:%.*]

[llvm-branch-commits] [lldb] 7e9e6ac - [lldb][docs] Fix some RST formatting errors related to code examples.

[Raphael Isemann via llvm-branch-commits]

Author: Raphael Isemann
Date: 2021-01-17T17:41:05+01:00
New Revision: 7e9e6ac526ebd90fe8ec0b8d2bb6edd3516ab908

URL: 
https://github.com/llvm/llvm-project/commit/7e9e6ac526ebd90fe8ec0b8d2bb6edd3516ab908
DIFF: 
https://github.com/llvm/llvm-project/commit/7e9e6ac526ebd90fe8ec0b8d2bb6edd3516ab908.diff

LOG: [lldb][docs] Fix some RST formatting errors related to code examples.

Mostly just making sure the indentation is right (SBDebugger had 0 spaces
as it was still plain text, the others had too much indentation or other
minor issues).

Added: 


Modified: 
lldb/bindings/interface/SBBroadcaster.i
lldb/bindings/interface/SBCommandInterpreterRunOptions.i
lldb/bindings/interface/SBDebugger.i
lldb/bindings/interface/SBProcess.i
lldb/bindings/interface/SBStructuredData.i
lldb/bindings/interface/SBType.i

Removed: 




diff  --git a/lldb/bindings/interface/SBBroadcaster.i 
b/lldb/bindings/interface/SBBroadcaster.i
index 79100e171b49..dd6de1feff42 100644
--- a/lldb/bindings/interface/SBBroadcaster.i
+++ b/lldb/bindings/interface/SBBroadcaster.i
@@ -11,7 +11,7 @@ namespace lldb {
 %feature("docstring",
 "Represents an entity which can broadcast events. A default broadcaster is
 associated with an SBCommandInterpreter, SBProcess, and SBTarget.  For
-example, use
+example, use ::
 
 broadcaster = process.GetBroadcaster()
 

diff  --git a/lldb/bindings/interface/SBCommandInterpreterRunOptions.i 
b/lldb/bindings/interface/SBCommandInterpreterRunOptions.i
index bad099205724..1a618a228bbe 100644
--- a/lldb/bindings/interface/SBCommandInterpreterRunOptions.i
+++ b/lldb/bindings/interface/SBCommandInterpreterRunOptions.i
@@ -12,6 +12,7 @@ namespace lldb {
 "SBCommandInterpreterRunOptions controls how the RunCommandInterpreter runs 
the code it is fed.
 
 A default SBCommandInterpreterRunOptions object has:
+
 * StopOnContinue: false
 * StopOnError:false
 * StopOnCrash:false

diff  --git a/lldb/bindings/interface/SBDebugger.i 
b/lldb/bindings/interface/SBDebugger.i
index f2e23a7ed780..78d737b48c23 100644
--- a/lldb/bindings/interface/SBDebugger.i
+++ b/lldb/bindings/interface/SBDebugger.i
@@ -12,108 +12,108 @@ namespace lldb {
 "SBDebugger is the primordial object that creates SBTargets and provides
 access to them.  It also manages the overall debugging experiences.
 
-For example (from example/disasm.py),
-
-import lldb
-import os
-import sys
-
-def disassemble_instructions (insts):
-for i in insts:
-print i
-
-...
-
-# Create a new debugger instance
-debugger = lldb.SBDebugger.Create()
-
-# When we step or continue, don't return from the function until the process
-# stops. We do this by setting the async mode to false.
-debugger.SetAsync (False)
-
-# Create a target from a file and arch
-print('Creating a target for \'%s\'' % exe)
-
-target = debugger.CreateTargetWithFileAndArch (exe, lldb.LLDB_ARCH_DEFAULT)
-
-if target:
-# If the target is valid set a breakpoint at main
-main_bp = target.BreakpointCreateByName (fname, 
target.GetExecutable().GetFilename());
-
-print main_bp
-
-# Launch the process. Since we specified synchronous mode, we won't return
-# from this function until we hit the breakpoint at main
-process = target.LaunchSimple (None, None, os.getcwd())
-
-# Make sure the launch went ok
-if process:
-# Print some simple process info
-state = process.GetState ()
-print process
-if state == lldb.eStateStopped:
-# Get the first thread
-thread = process.GetThreadAtIndex (0)
-if thread:
-# Print some simple thread info
-print thread
-# Get the first frame
-frame = thread.GetFrameAtIndex (0)
-if frame:
-# Print some simple frame info
-print frame
-function = frame.GetFunction()
-# See if we have debug info (a function)
-if function:
-# We do have a function, print some info for the 
function
-print function
-# Now get all instructions for this function and print 
them
-insts = function.GetInstructions(target)
-disassemble_instructions (insts)
-else:
-# See if we have a symbol in the symbol table for 
where we stopped
-symbol = frame.GetSymbol();
-if symbol:
-# We do have a symbol, print some info for the 
symbol
-print symbol
-# Now get all instructions for this symbol and 
print them
-insts = symbol.GetInstructions(target)
+For example (from example/disasm.py),::
+
+import lldb
+i

[llvm-branch-commits] [llvm] 352fcfc - [llvm] Use llvm::sort (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2021-01-17T10:39:45-08:00
New Revision: 352fcfc69788093b50971a9f5540a61fa0887ce1

URL: 
https://github.com/llvm/llvm-project/commit/352fcfc69788093b50971a9f5540a61fa0887ce1
DIFF: 
https://github.com/llvm/llvm-project/commit/352fcfc69788093b50971a9f5540a61fa0887ce1.diff

LOG: [llvm] Use llvm::sort (NFC)

Added: 


Modified: 
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
llvm/lib/DWARFLinker/DWARFLinker.cpp
llvm/lib/DebugInfo/CodeView/DebugFrameDataSubsection.cpp
llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
llvm/lib/ExecutionEngine/Orc/SpeculateAnalyses.cpp
llvm/lib/FileCheck/FileCheck.cpp
llvm/lib/Object/COFFObjectFile.cpp
llvm/lib/Support/DebugCounter.cpp
llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
llvm/lib/TextAPI/MachO/TextStub.cpp
llvm/tools/llvm-cov/CoverageExporterJson.cpp
llvm/tools/llvm-cov/CoverageExporterLcov.cpp
llvm/tools/llvm-jitlink/llvm-jitlink.cpp

Removed: 




diff  --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp 
b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
index 9f62cce028f8..4d886f708cd4 100644
--- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
@@ -3830,7 +3830,7 @@ void ModuleBitcodeWriterBase::writeModuleLevelReferences(
 NameVals.push_back(VE.getValueID(RI.getValue()));
   // Sort the refs for determinism output, the vector returned by FS->refs() 
has
   // been initialized from a DenseSet.
-  llvm::sort(NameVals.begin() + SizeBeforeRefs, NameVals.end());
+  llvm::sort(drop_begin(NameVals, SizeBeforeRefs));
 
   if (VTableFuncs.empty())
 Stream.EmitRecord(bitc::FS_PERMODULE_GLOBALVAR_INIT_REFS, NameVals,

diff  --git a/llvm/lib/DWARFLinker/DWARFLinker.cpp 
b/llvm/lib/DWARFLinker/DWARFLinker.cpp
index a09cbf9c95ea..b57d14bfcf55 100644
--- a/llvm/lib/DWARFLinker/DWARFLinker.cpp
+++ b/llvm/lib/DWARFLinker/DWARFLinker.cpp
@@ -2590,7 +2590,7 @@ bool DWARFLinker::link() {
 std::vector> Sorted;
 for (auto &E : SizeByObject)
   Sorted.emplace_back(E.first(), E.second);
-llvm::sort(Sorted.begin(), Sorted.end(), [](auto &LHS, auto &RHS) {
+llvm::sort(Sorted, [](auto &LHS, auto &RHS) {
   return LHS.second.Output > RHS.second.Output;
 });
 

diff  --git a/llvm/lib/DebugInfo/CodeView/DebugFrameDataSubsection.cpp 
b/llvm/lib/DebugInfo/CodeView/DebugFrameDataSubsection.cpp
index be8c32d5b294..9bc69abea102 100644
--- a/llvm/lib/DebugInfo/CodeView/DebugFrameDataSubsection.cpp
+++ b/llvm/lib/DebugInfo/CodeView/DebugFrameDataSubsection.cpp
@@ -47,10 +47,9 @@ Error DebugFrameDataSubsection::commit(BinaryStreamWriter 
&Writer) const {
   }
 
   std::vector SortedFrames(Frames.begin(), Frames.end());
-  std::sort(SortedFrames.begin(), SortedFrames.end(),
-[](const FrameData &LHS, const FrameData &RHS) {
-  return LHS.RvaStart < RHS.RvaStart;
-});
+  llvm::sort(SortedFrames, [](const FrameData &LHS, const FrameData &RHS) {
+return LHS.RvaStart < RHS.RvaStart;
+  });
   if (auto EC = Writer.writeArray(makeArrayRef(SortedFrames)))
 return EC;
   return Error::success();

diff  --git a/llvm/lib/DebugInfo/GSYM/GsymCreator.cpp 
b/llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
index 7d9b72c6283d..2001478e8047 100644
--- a/llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
+++ b/llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
@@ -169,7 +169,7 @@ llvm::Error GsymCreator::finalize(llvm::raw_ostream &OS) {
   Finalized = true;
 
   // Sort function infos so we can emit sorted functions.
-  llvm::sort(Funcs.begin(), Funcs.end());
+  llvm::sort(Funcs);
 
   // Don't let the string table indexes change by finalizing in order.
   StrTab.finalizeInOrder();

diff  --git a/llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp 
b/llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
index 9017c824098b..fd9a0deb54d6 100644
--- a/llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
+++ b/llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
@@ -514,11 +514,10 @@ SymbolCache::findLineTable(uint16_t Modi) const {
   }
 
   // Sort EntryList, and add flattened contents to the line table.
-  std::sort(EntryList.begin(), EntryList.end(),
-[](const std::vector &LHS,
-   const std::vector &RHS) {
-  return LHS[0].Addr < RHS[0].Addr;
-});
+  llvm::sort(EntryList, [](const std::vector &LHS,
+   const std::vector &RHS) {
+return LHS[0].Addr < RHS[0].Addr;
+  });
   for (size_t I = 0; I < EntryList.size(); ++I)
 llvm::append_range(ModuleLineTable, EntryList[I]);
 

diff  --git a/llvm/lib/ExecutionEngine/Orc/SpeculateAnalyses.cpp 
b/llvm/lib/ExecutionEngine/Orc/SpeculateAnalyses.cpp
index 7240c1ed0ce9..c2fa4466eab6 100644
--- a/llvm/lib/ExecutionEngine/Orc/SpeculateAnalyses.cpp
+++ b/llvm/lib/ExecutionEngine/Orc/SpeculateAnalyses.cpp

[llvm-branch-commits] [llvm] a591261 - [IRBuilder] "Zero"-initialize SmallVector (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2021-01-17T10:39:47-08:00
New Revision: a59126115e9586dd7fda4bb365ee43682814fc53

URL: 
https://github.com/llvm/llvm-project/commit/a59126115e9586dd7fda4bb365ee43682814fc53
DIFF: 
https://github.com/llvm/llvm-project/commit/a59126115e9586dd7fda4bb365ee43682814fc53.diff

LOG: [IRBuilder] "Zero"-initialize SmallVector (NFC)

Added: 


Modified: 
llvm/lib/IR/IRBuilder.cpp

Removed: 




diff  --git a/llvm/lib/IR/IRBuilder.cpp b/llvm/lib/IR/IRBuilder.cpp
index 7e76a6c2a055..91ca984b755c 100644
--- a/llvm/lib/IR/IRBuilder.cpp
+++ b/llvm/lib/IR/IRBuilder.cpp
@@ -1047,9 +1047,7 @@ Value *IRBuilderBase::CreatePreserveArrayAccessIndex(
 
   Value *LastIndexV = getInt32(LastIndex);
   Constant *Zero = ConstantInt::get(Type::getInt32Ty(Context), 0);
-  SmallVector IdxList;
-  for (unsigned I = 0; I < Dimension; ++I)
-IdxList.push_back(Zero);
+  SmallVector IdxList(Dimension, Zero);
   IdxList.push_back(LastIndexV);
 
   Type *ResultType =



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[llvm-branch-commits] [llvm] 50be8e4 - [TableGen] Drop redundant const from return types (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2021-01-17T10:39:49-08:00
New Revision: 50be8e447152b8512521e568e4918dec486c25a5

URL: 
https://github.com/llvm/llvm-project/commit/50be8e447152b8512521e568e4918dec486c25a5
DIFF: 
https://github.com/llvm/llvm-project/commit/50be8e447152b8512521e568e4918dec486c25a5.diff

LOG: [TableGen] Drop redundant const from return types (NFC)

Identified with readability-const-return-type.

Added: 


Modified: 
llvm/utils/TableGen/CodeGenRegisters.cpp
llvm/utils/TableGen/CodeGenRegisters.h
llvm/utils/TableGen/CodeGenTarget.cpp
llvm/utils/TableGen/CodeGenTarget.h
llvm/utils/TableGen/DAGISelMatcher.h
llvm/utils/TableGen/GlobalISelEmitter.cpp
llvm/utils/TableGen/OptParserEmitter.cpp

Removed: 




diff  --git a/llvm/utils/TableGen/CodeGenRegisters.cpp 
b/llvm/utils/TableGen/CodeGenRegisters.cpp
index f520c1dbc5d2..24eac080cc37 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/CodeGenRegisters.cpp
@@ -196,7 +196,7 @@ void CodeGenRegister::buildObjectGraph(CodeGenRegBank 
&RegBank) {
   }
 }
 
-const StringRef CodeGenRegister::getName() const {
+StringRef CodeGenRegister::getName() const {
   assert(TheDef && "no def");
   return TheDef->getName();
 }

diff  --git a/llvm/utils/TableGen/CodeGenRegisters.h 
b/llvm/utils/TableGen/CodeGenRegisters.h
index 48cb9fe1a7e6..5228e6518fe5 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.h
+++ b/llvm/utils/TableGen/CodeGenRegisters.h
@@ -163,7 +163,7 @@ namespace llvm {
 
 CodeGenRegister(Record *R, unsigned Enum);
 
-const StringRef getName() const;
+StringRef getName() const;
 
 // Extract more information from TheDef. This is used to build an object
 // graph after all CodeGenRegister objects have been created.

diff  --git a/llvm/utils/TableGen/CodeGenTarget.cpp 
b/llvm/utils/TableGen/CodeGenTarget.cpp
index 572851ed8726..8f6d212df5ec 100644
--- a/llvm/utils/TableGen/CodeGenTarget.cpp
+++ b/llvm/utils/TableGen/CodeGenTarget.cpp
@@ -260,9 +260,7 @@ CodeGenTarget::CodeGenTarget(RecordKeeper &records)
 CodeGenTarget::~CodeGenTarget() {
 }
 
-const StringRef CodeGenTarget::getName() const {
-  return TargetRec->getName();
-}
+StringRef CodeGenTarget::getName() const { return TargetRec->getName(); }
 
 /// getInstNamespace - Find and return the target machine's instruction
 /// namespace. The namespace is cached because it is requested multiple times.

diff  --git a/llvm/utils/TableGen/CodeGenTarget.h 
b/llvm/utils/TableGen/CodeGenTarget.h
index 1852bac15511..9de9b512f74f 100644
--- a/llvm/utils/TableGen/CodeGenTarget.h
+++ b/llvm/utils/TableGen/CodeGenTarget.h
@@ -68,7 +68,7 @@ class CodeGenTarget {
   ~CodeGenTarget();
 
   Record *getTargetRecord() const { return TargetRec; }
-  const StringRef getName() const;
+  StringRef getName() const;
 
   /// getInstNamespace - Return the target-specific instruction namespace.
   ///

diff  --git a/llvm/utils/TableGen/DAGISelMatcher.h 
b/llvm/utils/TableGen/DAGISelMatcher.h
index 3a920d1d7f22..ff9a0cb335d1 100644
--- a/llvm/utils/TableGen/DAGISelMatcher.h
+++ b/llvm/utils/TableGen/DAGISelMatcher.h
@@ -706,7 +706,7 @@ class CheckComplexPatMatcher : public Matcher {
   const ComplexPattern &getPattern() const { return Pattern; }
   unsigned getMatchNumber() const { return MatchNumber; }
 
-  const std::string getName() const { return Name; }
+  std::string getName() const { return Name; }
   unsigned getFirstResult() const { return FirstResult; }
 
   static bool classof(const Matcher *N) {

diff  --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp 
b/llvm/utils/TableGen/GlobalISelEmitter.cpp
index a303753d53c7..8026a3a102be 100644
--- a/llvm/utils/TableGen/GlobalISelEmitter.cpp
+++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp
@@ -1582,7 +1582,7 @@ class OperandMatcher : public 
PredicateListMatcher {
 AllocatedTemporariesBaseID(AllocatedTemporariesBaseID) {}
 
   bool hasSymbolicName() const { return !SymbolicName.empty(); }
-  const StringRef getSymbolicName() const { return SymbolicName; }
+  StringRef getSymbolicName() const { return SymbolicName; }
   void setSymbolicName(StringRef Name) {
 assert(SymbolicName.empty() && "Operand already has a symbolic name");
 SymbolicName = std::string(Name);
@@ -2536,7 +2536,7 @@ class CopyRenderer : public OperandRenderer {
 return R->getKind() == OR_Copy;
   }
 
-  const StringRef getSymbolicName() const { return SymbolicName; }
+  StringRef getSymbolicName() const { return SymbolicName; }
 
   void emitRenderOpcodes(MatchTable &Table, RuleMatcher &Rule) const override {
 const OperandMatcher &Operand = Rule.getOperandMatcher(SymbolicName);
@@ -2603,7 +2603,7 @@ class CopyOrAddZeroRegRenderer : public OperandRenderer {
 return R->getKind() == OR_CopyOrAddZeroReg;
   }
 
-  const StringRef getSymbolicName() const { return SymbolicName; }
+  StringRef getSymbolicName() const { return Symbo

[llvm-branch-commits] [clang] 9a7fb08 - NFC: Minor cleanup of function calls

[Stephen Kelly via llvm-branch-commits]

Author: Stephen Kelly
Date: 2021-01-17T18:47:17Z
New Revision: 9a7fb0848771e3d38baf10e4d1078b50dd884265

URL: 
https://github.com/llvm/llvm-project/commit/9a7fb0848771e3d38baf10e4d1078b50dd884265
DIFF: 
https://github.com/llvm/llvm-project/commit/9a7fb0848771e3d38baf10e4d1078b50dd884265.diff

LOG: NFC: Minor cleanup of function calls

Added: 


Modified: 
clang/lib/ASTMatchers/ASTMatchFinder.cpp

Removed: 




diff  --git a/clang/lib/ASTMatchers/ASTMatchFinder.cpp 
b/clang/lib/ASTMatchers/ASTMatchFinder.cpp
index e35600a083d3..8ddd3c87e09d 100644
--- a/clang/lib/ASTMatchers/ASTMatchFinder.cpp
+++ b/clang/lib/ASTMatchers/ASTMatchFinder.cpp
@@ -257,10 +257,7 @@ class MatchChildASTVisitor
   return true;
 ScopedIncrement ScopedDepth(&CurrentDepth);
 
-if (!match(*Node->getDecomposedForm().LHS) ||
-!match(*Node->getDecomposedForm().RHS))
-  return false;
-return true;
+return match(*Node->getLHS()) && match(*Node->getRHS());
   }
   bool TraverseLambdaExpr(LambdaExpr *Node) {
 if (!Finder->isTraversalIgnoringImplicitNodes())



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[llvm-branch-commits] [llvm] 1cc477f - [SimplifyCFG] Add test for PR48778 (NFC)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-17T20:06:17+01:00
New Revision: 1cc477f030bdeb6de98c6bde89fa7850630def24

URL: 
https://github.com/llvm/llvm-project/commit/1cc477f030bdeb6de98c6bde89fa7850630def24
DIFF: 
https://github.com/llvm/llvm-project/commit/1cc477f030bdeb6de98c6bde89fa7850630def24.diff

LOG: [SimplifyCFG] Add test for PR48778 (NFC)

The sdiv is incorrectly speculated.

Added: 
llvm/test/Transforms/SimplifyCFG/pr48778-sdiv-speculation.ll

Modified: 


Removed: 




diff  --git a/llvm/test/Transforms/SimplifyCFG/pr48778-sdiv-speculation.ll 
b/llvm/test/Transforms/SimplifyCFG/pr48778-sdiv-speculation.ll
new file mode 100644
index ..992736c48572
--- /dev/null
+++ b/llvm/test/Transforms/SimplifyCFG/pr48778-sdiv-speculation.ll
@@ -0,0 +1,26 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -simplifycfg -S < %s | FileCheck %s
+
+; sdiv INT_MIN / -1 should not be speculated.
+define i32 @test(i1 %cmp) {
+; CHECK-LABEL: @test(
+; CHECK-NEXT:  else:
+; CHECK-NEXT:[[DIV:%.*]] = sdiv i32 -2147483648, -1
+; CHECK-NEXT:[[CMP2:%.*]] = icmp ne i32 [[DIV]], 0
+; CHECK-NEXT:[[OR_COND:%.*]] = and i1 [[CMP:%.*]], [[CMP2]]
+; CHECK-NEXT:[[MERGE:%.*]] = select i1 [[OR_COND]], i32 1, i32 0
+; CHECK-NEXT:ret i32 [[MERGE]]
+;
+  br i1 %cmp, label %if, label %else
+
+if:
+  %div = sdiv i32 -2147483648, -1
+  %cmp2 = icmp ne i32 %div, 0
+  br i1 %cmp2, label %end, label %else
+
+else:
+  ret i32 0
+
+end:
+  ret i32 1
+}



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[llvm-branch-commits] [llvm] 4229b87 - [ValueTracking] Fix isSafeToSpeculativelyExecute for sdiv (PR48778)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-17T20:06:17+01:00
New Revision: 4229b87ed36cf20b95b363393452aa4815e344e2

URL: 
https://github.com/llvm/llvm-project/commit/4229b87ed36cf20b95b363393452aa4815e344e2
DIFF: 
https://github.com/llvm/llvm-project/commit/4229b87ed36cf20b95b363393452aa4815e344e2.diff

LOG: [ValueTracking] Fix isSafeToSpeculativelyExecute for sdiv (PR48778)

The != -1 check does not work correctly for all bitwidths. Use
isAllOnesValue() instead.

Added: 


Modified: 
llvm/lib/Analysis/ValueTracking.cpp
llvm/test/Transforms/SimplifyCFG/pr48778-sdiv-speculation.ll

Removed: 




diff  --git a/llvm/lib/Analysis/ValueTracking.cpp 
b/llvm/lib/Analysis/ValueTracking.cpp
index 61c992d0eedf..a9cef91e7316 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -4391,7 +4391,7 @@ bool llvm::isSafeToSpeculativelyExecute(const Value *V,
 if (*Denominator == 0)
   return false;
 // It's safe to hoist if the denominator is not 0 or -1.
-if (*Denominator != -1)
+if (!Denominator->isAllOnesValue())
   return true;
 // At this point we know that the denominator is -1.  It is safe to hoist 
as
 // long we know that the numerator is not INT_MIN.

diff  --git a/llvm/test/Transforms/SimplifyCFG/pr48778-sdiv-speculation.ll 
b/llvm/test/Transforms/SimplifyCFG/pr48778-sdiv-speculation.ll
index 992736c48572..cc59ea04c64e 100644
--- a/llvm/test/Transforms/SimplifyCFG/pr48778-sdiv-speculation.ll
+++ b/llvm/test/Transforms/SimplifyCFG/pr48778-sdiv-speculation.ll
@@ -4,11 +4,14 @@
 ; sdiv INT_MIN / -1 should not be speculated.
 define i32 @test(i1 %cmp) {
 ; CHECK-LABEL: @test(
-; CHECK-NEXT:  else:
+; CHECK-NEXT:br i1 [[CMP:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
+; CHECK:   if:
 ; CHECK-NEXT:[[DIV:%.*]] = sdiv i32 -2147483648, -1
 ; CHECK-NEXT:[[CMP2:%.*]] = icmp ne i32 [[DIV]], 0
-; CHECK-NEXT:[[OR_COND:%.*]] = and i1 [[CMP:%.*]], [[CMP2]]
-; CHECK-NEXT:[[MERGE:%.*]] = select i1 [[OR_COND]], i32 1, i32 0
+; CHECK-NEXT:[[SPEC_SELECT:%.*]] = select i1 [[CMP2]], i32 1, i32 0
+; CHECK-NEXT:br label [[ELSE]]
+; CHECK:   else:
+; CHECK-NEXT:[[MERGE:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ 
[[SPEC_SELECT]], [[IF]] ]
 ; CHECK-NEXT:ret i32 [[MERGE]]
 ;
   br i1 %cmp, label %if, label %else



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[llvm-branch-commits] [lldb] a89242d - [lldb] Skip TestPlatformProcessConnect on windows and darwin

[Pavel Labath via llvm-branch-commits]

Author: Pavel Labath
Date: 2021-01-17T20:18:55+01:00
New Revision: a89242d874df72cddeafbebc75ac377371e72796

URL: 
https://github.com/llvm/llvm-project/commit/a89242d874df72cddeafbebc75ac377371e72796
DIFF: 
https://github.com/llvm/llvm-project/commit/a89242d874df72cddeafbebc75ac377371e72796.diff

LOG: [lldb] Skip TestPlatformProcessConnect on windows and darwin

The test fails (for different reasons) on these platforms. Skip for now.

Added: 


Modified: 

lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py

Removed: 




diff  --git 
a/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
 
b/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
index 95a210059b6d..8ddab260b494 100644
--- 
a/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
+++ 
b/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
@@ -10,6 +10,8 @@ class 
TestPlatformProcessConnect(gdbremote_testcase.GdbRemoteTestCaseBase):
 
 @skipIfRemote
 @expectedFailureAll(hostoslist=["windows"], triple='.*-android')
+@skipIfWindows # lldb-server does not terminate correctly
+@skipIfDarwin # lldb-server not found correctly
 def test_platform_process_connect(self):
 self.build()
 



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[llvm-branch-commits] [lldb] 95d1461 - Makefile.rules: Delete GCC 4.6 workaround

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2021-01-17T13:16:38-08:00
New Revision: 95d146182fdf2315e74943b93fb3bb0cbafc5d89

URL: 
https://github.com/llvm/llvm-project/commit/95d146182fdf2315e74943b93fb3bb0cbafc5d89
DIFF: 
https://github.com/llvm/llvm-project/commit/95d146182fdf2315e74943b93fb3bb0cbafc5d89.diff

LOG: Makefile.rules: Delete GCC 4.6 workaround

5.1 is the minimum supported version.

Added: 


Modified: 
lldb/packages/Python/lldbsuite/test/make/Makefile.rules

Removed: 




diff  --git a/lldb/packages/Python/lldbsuite/test/make/Makefile.rules 
b/lldb/packages/Python/lldbsuite/test/make/Makefile.rules
index 5f6218db4d6d..a7efa15e09df 100644
--- a/lldb/packages/Python/lldbsuite/test/make/Makefile.rules
+++ b/lldb/packages/Python/lldbsuite/test/make/Makefile.rules
@@ -513,20 +513,6 @@ ifneq "$(strip $(ARCHIVE_OBJCXX_SOURCES))" ""
endif
 endif
 
-#--
-# Check if we are compiling with gcc 4.6
-#--
-ifneq "$(strip $(CXX_SOURCES) $(OBJCXX_SOURCES))" ""
-ifneq "$(filter g++,$(CXX))" ""
-   CXXVERSION = $(shell $(CXX) -dumpversion | cut -b 1-3)
-   ifeq "$(CXXVERSION)" "4.6"
-   # GCC 4.6 cannot handle -std=c++11, so replace it with 
-std=c++0x
-   # instead. FIXME: remove once GCC version is upgraded.
-   override CXXFLAGS := $(subst -std=c++11,-std=c++0x,$(CXXFLAGS))
-   endif
-endif
-endif
-
 ifeq ($(findstring clang, $(CXX)), clang)
CXXFLAGS += --driver-mode=g++
 endif



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[llvm-branch-commits] [openmp] f855751 - Fix openmp CMake build on non-Linux AArch64 systems.

[Chandler Carruth via llvm-branch-commits]

Author: Chandler Carruth
Date: 2021-01-17T16:18:31-08:00
New Revision: f855751c1284c82c1c46b98f6d1b3ca2021d6cb9

URL: 
https://github.com/llvm/llvm-project/commit/f855751c1284c82c1c46b98f6d1b3ca2021d6cb9
DIFF: 
https://github.com/llvm/llvm-project/commit/f855751c1284c82c1c46b98f6d1b3ca2021d6cb9.diff

LOG: Fix openmp CMake build on non-Linux AArch64 systems.

This just checks for `/proc/cpuinfo` existing before reading it.

Tested on an ARM macOS machine.

Added: 


Modified: 
openmp/runtime/cmake/LibompGetArchitecture.cmake

Removed: 




diff  --git a/openmp/runtime/cmake/LibompGetArchitecture.cmake 
b/openmp/runtime/cmake/LibompGetArchitecture.cmake
index 45c2f279a7d1..dd60a2d347b1 100644
--- a/openmp/runtime/cmake/LibompGetArchitecture.cmake
+++ b/openmp/runtime/cmake/LibompGetArchitecture.cmake
@@ -71,13 +71,15 @@ function(libomp_get_architecture return_arch)
 endfunction()
 
 function(libomp_is_aarch64_a64fx return_is_aarch64_a64fx)
-  file(READ "/proc/cpuinfo" cpu_info_content)
-  string(REGEX MATCH "CPU implementer[ \t]*: 0x46\n" cpu_implementer 
${cpu_info_content})
-  string(REGEX MATCH "CPU architecture[ \t]*: 8\n" cpu_architecture 
${cpu_info_content})
-
   set(is_aarch64_a64fx FALSE)
-  if (cpu_architecture AND cpu_implementer)
-set(is_aarch64_a64fx TRUE)
+  if (EXISTS "/proc/cpuinfo")
+file(READ "/proc/cpuinfo" cpu_info_content)
+string(REGEX MATCH "CPU implementer[ \t]*: 0x46\n" cpu_implementer 
${cpu_info_content})
+string(REGEX MATCH "CPU architecture[ \t]*: 8\n" cpu_architecture 
${cpu_info_content})
+
+if (cpu_architecture AND cpu_implementer)
+  set(is_aarch64_a64fx TRUE)
+endif()
   endif()
 
   set(${return_is_aarch64_a64fx} "${is_aarch64_a64fx}" PARENT_SCOPE)



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[llvm-branch-commits] [llvm] 3bdf450 - [NFC] [TargetRegisterInfo] add one use check to lookThruCopyLike.

[Chen Zheng via llvm-branch-commits]

Author: Chen Zheng
Date: 2021-01-17T19:56:42-05:00
New Revision: 3bdf4507b66348ad78df4655a8e4f36c3fc10f3c

URL: 
https://github.com/llvm/llvm-project/commit/3bdf4507b66348ad78df4655a8e4f36c3fc10f3c
DIFF: 
https://github.com/llvm/llvm-project/commit/3bdf4507b66348ad78df4655a8e4f36c3fc10f3c.diff

LOG: [NFC] [TargetRegisterInfo] add one use check to lookThruCopyLike.

add one use check to lookThruCopyLike.

The root node is safe to be deleted if we are sure that every
definition in the copy chain only has one use.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D92069

Added: 


Modified: 
llvm/include/llvm/CodeGen/TargetRegisterInfo.h
llvm/lib/CodeGen/TargetRegisterInfo.cpp

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/TargetRegisterInfo.h 
b/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
index 6f32729a1e83..e07779e04b7b 100644
--- a/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
@@ -410,10 +410,13 @@ class TargetRegisterInfo : public MCRegisterInfo {
 
   /// Returns the original SrcReg unless it is the target of a copy-like
   /// operation, in which case we chain backwards through all such operations
-  /// to the ultimate source register.  If a physical register is encountered,
+  /// to the ultimate source register. If a physical register is encountered,
   /// we stop the search.
+  /// If one definition in the copy chain has multiple uses, set \p
+  /// AllDefHaveOneUser to false, otherwise set it to true.
   virtual Register lookThruCopyLike(Register SrcReg,
-const MachineRegisterInfo *MRI) const;
+const MachineRegisterInfo *MRI,
+bool *AllDefHaveOneUser = nullptr) const;
 
   /// Return a null-terminated list of all of the callee-saved registers on
   /// this target. The register should be in the order of desired callee-save

diff  --git a/llvm/lib/CodeGen/TargetRegisterInfo.cpp 
b/llvm/lib/CodeGen/TargetRegisterInfo.cpp
index 4a190c9f50af..09c7383a291b 100644
--- a/llvm/lib/CodeGen/TargetRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/TargetRegisterInfo.cpp
@@ -510,13 +510,19 @@ TargetRegisterInfo::getRegSizeInBits(Register Reg,
   return getRegSizeInBits(*RC);
 }
 
-Register
-TargetRegisterInfo::lookThruCopyLike(Register SrcReg,
- const MachineRegisterInfo *MRI) const {
+Register TargetRegisterInfo::lookThruCopyLike(Register SrcReg,
+  const MachineRegisterInfo *MRI,
+  bool *AllDefHaveOneUser) const {
+  if (AllDefHaveOneUser)
+*AllDefHaveOneUser = true;
+
   while (true) {
 const MachineInstr *MI = MRI->getVRegDef(SrcReg);
-if (!MI->isCopyLike())
+if (!MI->isCopyLike()) {
+  if (AllDefHaveOneUser && !MRI->hasOneNonDBGUse(SrcReg))
+*AllDefHaveOneUser = false;
   return SrcReg;
+}
 
 Register CopySrcReg;
 if (MI->isCopy())
@@ -526,8 +532,11 @@ TargetRegisterInfo::lookThruCopyLike(Register SrcReg,
   CopySrcReg = MI->getOperand(2).getReg();
 }
 
-if (!CopySrcReg.isVirtual())
+if (!CopySrcReg.isVirtual()) {
+  if (AllDefHaveOneUser)
+*AllDefHaveOneUser = false;
   return CopySrcReg;
+}
 
 SrcReg = CopySrcReg;
   }



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[llvm-branch-commits] [lldb] b74ae43 - Makefile.rules: Make HOST_OS/OS simply expanded variable to avoid excess uname -s invocations

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2021-01-17T17:19:29-08:00
New Revision: b74ae43c44b1c954508149409d3cfe6477be4079

URL: 
https://github.com/llvm/llvm-project/commit/b74ae43c44b1c954508149409d3cfe6477be4079
DIFF: 
https://github.com/llvm/llvm-project/commit/b74ae43c44b1c954508149409d3cfe6477be4079.diff

LOG: Makefile.rules: Make HOST_OS/OS simply expanded variable to avoid excess 
uname -s invocations

This decreases the number of runs from 18 to 1.

Added: 


Modified: 
lldb/packages/Python/lldbsuite/test/make/Makefile.rules

Removed: 




diff  --git a/lldb/packages/Python/lldbsuite/test/make/Makefile.rules 
b/lldb/packages/Python/lldbsuite/test/make/Makefile.rules
index a7efa15e09df..d715f1ca24e4 100644
--- a/lldb/packages/Python/lldbsuite/test/make/Makefile.rules
+++ b/lldb/packages/Python/lldbsuite/test/make/Makefile.rules
@@ -56,12 +56,12 @@ LLDB_BASE_DIR := $(THIS_FILE_DIR)/../../../../../
 # When running tests from Visual Studio, the environment variable isn't
 # inherited all the way down to the process spawned for make.
 #--
-HOST_OS = $(shell uname -s)
+HOST_OS := $(shell uname -s)
 ifneq (,$(findstring windows32,$(HOST_OS)))
-   HOST_OS = Windows_NT
+   HOST_OS := Windows_NT
 endif
 ifeq "$(OS)" ""
-   OS = $(HOST_OS)
+   OS := $(HOST_OS)
 endif
 
 #--



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[llvm-branch-commits] [llvm] a817f46 - [JITLink][ELF] Skip DWARF sections in ELF objects.

[Lang Hames via llvm-branch-commits]

Author: Lang Hames
Date: 2021-01-18T12:42:48+11:00
New Revision: a817f46d50c34ea6b798d28bd5fa6a3ee7435497

URL: 
https://github.com/llvm/llvm-project/commit/a817f46d50c34ea6b798d28bd5fa6a3ee7435497
DIFF: 
https://github.com/llvm/llvm-project/commit/a817f46d50c34ea6b798d28bd5fa6a3ee7435497.diff

LOG: [JITLink][ELF] Skip DWARF sections in ELF objects.

This matches current JITLink/MachO behavior and avoids processing currently
unsupported relocations.

Added: 
llvm/test/ExecutionEngine/JITLink/X86/ELF_skip_debug_sections.s

Modified: 
llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp

Removed: 




diff  --git a/llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp 
b/llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
index f3a150d23737..30366a82a043 100644
--- a/llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
+++ b/llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
@@ -24,6 +24,7 @@ using namespace llvm::jitlink;
 using namespace llvm::jitlink::ELF_x86_64_Edges;
 
 namespace {
+
 class ELF_x86_64_GOTAndStubsBuilder
 : public BasicGOTAndStubsBuilder {
 public:
@@ -110,6 +111,14 @@ class ELF_x86_64_GOTAndStubsBuilder
   Section *GOTSection = nullptr;
   Section *StubsSection = nullptr;
 };
+
+const char *const DwarfSectionNames[] = {
+#define HANDLE_DWARF_SECTION(ENUM_NAME, ELF_NAME, CMDLINE_NAME, OPTION)
\
+  ELF_NAME,
+#include "llvm/BinaryFormat/Dwarf.def"
+#undef HANDLE_DWARF_SECTION
+};
+
 } // namespace
 
 const uint8_t ELF_x86_64_GOTAndStubsBuilder::NullGOTEntryContent[8] = {
@@ -191,6 +200,14 @@ static Error optimizeELF_x86_64_GOTAndStubs(LinkGraph &G) {
 
   return Error::success();
 }
+
+static bool isDwarfSection(StringRef SectionName) {
+  for (auto &DwarfSectionName : DwarfSectionNames)
+if (SectionName == DwarfSectionName)
+  return true;
+  return false;
+}
+
 namespace llvm {
 namespace jitlink {
 
@@ -305,6 +322,16 @@ class ELFLinkGraphBuilder_x86_64 {
   auto Name = Obj.getSectionName(SecRef);
   if (!Name)
 return Name.takeError();
+
+  // Skip Dwarf sections.
+  if (isDwarfSection(*Name)) {
+LLVM_DEBUG({
+  dbgs() << *Name
+ << " is a debug section: No graph section will be created.\n";
+});
+continue;
+  }
+
   sys::Memory::ProtectionFlags Prot;
   if (SecRef.sh_flags & ELF::SHF_EXECINSTR) {
 Prot = static_cast(sys::Memory::MF_READ |
@@ -373,6 +400,10 @@ class ELFLinkGraphBuilder_x86_64 {
   auto RelSectName = Obj.getSectionName(SecRef);
   if (!RelSectName)
 return RelSectName.takeError();
+
+  LLVM_DEBUG({
+dbgs() << "Adding relocations from section " << *RelSectName << "\n";
+  });
   // Deal with .eh_frame later
   if (*RelSectName == StringRef(".rela.eh_frame"))
 continue;
@@ -385,6 +416,18 @@ class ELFLinkGraphBuilder_x86_64 {
   if (!UpdateSectionName)
 return UpdateSectionName.takeError();
 
+  // Don't process relocations for debug sections.
+  if (isDwarfSection(*UpdateSectionName)) {
+LLVM_DEBUG({
+  dbgs() << "  Target is dwarf section " << *UpdateSectionName
+ << ". Skipping.\n";
+});
+continue;
+  } else
+LLVM_DEBUG({
+  dbgs() << "  For target section " << *UpdateSectionName << "\n";
+});
+
   auto JITSection = G->findSectionByName(*UpdateSectionName);
   if (!JITSection)
 return make_error(
@@ -473,6 +516,9 @@ class ELFLinkGraphBuilder_x86_64 {
   auto Name = Obj.getSectionName(SecRef);
   if (!Name)
 return Name.takeError();
+
+  LLVM_DEBUG(dbgs() << "Processing symbol section " << *Name << ":\n");
+
   auto Section = G->findSectionByName(*Name);
   if (!Section)
 return make_error("Could not find a section " +
@@ -531,6 +577,10 @@ class ELFLinkGraphBuilder_x86_64 {
   if (!sectName)
 return Name.takeError();
 
+  // Skip debug section symbols.
+  if (isDwarfSection(*sectName))
+continue;
+
   auto JitSection = G->findSectionByName(*sectName);
   if (!JitSection)
 return make_error(

diff  --git a/llvm/test/ExecutionEngine/JITLink/X86/ELF_skip_debug_sections.s 
b/llvm/test/ExecutionEngine/JITLink/X86/ELF_skip_debug_sections.s
new file mode 100644
index ..506bbdfd8844
--- /dev/null
+++ b/llvm/test/ExecutionEngine/JITLink/X86/ELF_skip_debug_sections.s
@@ -0,0 +1,240 @@
+# RUN: llvm-mc -triple=x86_64-pc-linux-gnu -filetype=obj -o %t %s
+# RUN: llvm-jitlink -debug-only=jitlink -noexec %t 2>&1 | FileCheck %s
+#
+# Check that debug sections are not emitted.
+#
+# CHECK: .debug_info is a debug section: No graph section will be created.
+
+   .text
+   .file   "ELF_skip_debug_sections.c"
+   .globl  foo
+   .p2align4, 0x90
+   .type   foo,@function
+foo:
+.Lfunc_begin0:
+   .file   

[llvm-branch-commits] [llvm] 2639c16 - [InstCombine] more tests for D94861 (NFC)

[Juneyoung Lee via llvm-branch-commits]

Author: Juneyoung Lee
Date: 2021-01-18T11:12:52+09:00
New Revision: 2639c162b71f4b9e5c0ffefaa861fe915b73cb87

URL: 
https://github.com/llvm/llvm-project/commit/2639c162b71f4b9e5c0ffefaa861fe915b73cb87
DIFF: 
https://github.com/llvm/llvm-project/commit/2639c162b71f4b9e5c0ffefaa861fe915b73cb87.diff

LOG: [InstCombine] more tests for D94861 (NFC)

Added: 


Modified: 
llvm/test/Transforms/InstCombine/select-safe-transforms.ll

Removed: 




diff  --git a/llvm/test/Transforms/InstCombine/select-safe-transforms.ll 
b/llvm/test/Transforms/InstCombine/select-safe-transforms.ll
index f6dfb672e7f2..48235863d9ff 100644
--- a/llvm/test/Transforms/InstCombine/select-safe-transforms.ll
+++ b/llvm/test/Transforms/InstCombine/select-safe-transforms.ll
@@ -88,6 +88,34 @@ define i1 @xor_and(i1 %c, i32 %X, i32 %Y) {
   ret i1 %res
 }
 
+define <2 x i1> @xor_and2(<2 x i1> %c, <2 x i32> %X, <2 x i32> %Y) {
+; CHECK-LABEL: @xor_and2(
+; CHECK-NEXT:[[COMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:[[SEL:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> [[COMP]], 
<2 x i1> 
+; CHECK-NEXT:[[RES:%.*]] = xor <2 x i1> [[SEL]], 
+; CHECK-NEXT:ret <2 x i1> [[RES]]
+;
+  %comp = icmp ult <2 x i32> %X, %Y
+  %sel = select <2 x i1> %c, <2 x i1> %comp, <2 x i1> 
+  %res = xor <2 x i1> %sel, 
+  ret <2 x i1> %res
+}
+
+@glb = global i8 0
+
+define <2 x i1> @xor_and3(<2 x i1> %c, <2 x i32> %X, <2 x i32> %Y) {
+; CHECK-LABEL: @xor_and3(
+; CHECK-NEXT:[[COMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:[[SEL:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> [[COMP]], 
<2 x i1> 
+; CHECK-NEXT:[[RES:%.*]] = xor <2 x i1> [[SEL]], 
+; CHECK-NEXT:ret <2 x i1> [[RES]]
+;
+  %comp = icmp ult <2 x i32> %X, %Y
+  %sel = select <2 x i1> %c, <2 x i1> %comp, <2 x i1> 
+  %res = xor <2 x i1> %sel, 
+  ret <2 x i1> %res
+}
+
 define i1 @xor_or(i1 %c, i32 %X, i32 %Y) {
 ; CHECK-LABEL: @xor_or(
 ; CHECK-NEXT:[[COMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
@@ -100,3 +128,29 @@ define i1 @xor_or(i1 %c, i32 %X, i32 %Y) {
   %res = xor i1 %sel, true
   ret i1 %res
 }
+
+define <2 x i1> @xor_or2(<2 x i1> %c, <2 x i32> %X, <2 x i32> %Y) {
+; CHECK-LABEL: @xor_or2(
+; CHECK-NEXT:[[COMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:[[SEL:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> , <2 x i1> [[COMP]]
+; CHECK-NEXT:[[RES:%.*]] = xor <2 x i1> [[SEL]], 
+; CHECK-NEXT:ret <2 x i1> [[RES]]
+;
+  %comp = icmp ult <2 x i32> %X, %Y
+  %sel = select <2 x i1> %c, <2 x i1> , <2 x i1> %comp
+  %res = xor <2 x i1> %sel, 
+  ret <2 x i1> %res
+}
+
+define <2 x i1> @xor_or3(<2 x i1> %c, <2 x i32> %X, <2 x i32> %Y) {
+; CHECK-LABEL: @xor_or3(
+; CHECK-NEXT:[[COMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:[[SEL:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> , <2 x i1> [[COMP]]
+; CHECK-NEXT:[[RES:%.*]] = xor <2 x i1> [[SEL]], 
+; CHECK-NEXT:ret <2 x i1> [[RES]]
+;
+  %comp = icmp ult <2 x i32> %X, %Y
+  %sel = select <2 x i1> %c, <2 x i1> , <2 x i1> %comp
+  %res = xor <2 x i1> %sel, 
+  ret <2 x i1> %res
+}



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[llvm-branch-commits] [llvm] 2d98907 - [PowerPC] [NFC] Add AIX triple to some regression tests

[Qiu Chaofan via llvm-branch-commits]

Author: Qiu Chaofan
Date: 2021-01-18T11:44:00+08:00
New Revision: 2d9890775f523a7a7ed2d7d064273bf7e28ebf20

URL: 
https://github.com/llvm/llvm-project/commit/2d9890775f523a7a7ed2d7d064273bf7e28ebf20
DIFF: 
https://github.com/llvm/llvm-project/commit/2d9890775f523a7a7ed2d7d064273bf7e28ebf20.diff

LOG: [PowerPC] [NFC] Add AIX triple to some regression tests

As part of the effort to improve AIX support, regression test coverage
misses quite a lot for AIX subtarget. This patch adds AIX triple to
those don't need extra change, and we can cover more cases in following
commits.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D94159

Added: 


Modified: 
llvm/test/CodeGen/PowerPC/and-mask.ll
llvm/test/CodeGen/PowerPC/bool-math.ll
llvm/test/CodeGen/PowerPC/bswap64.ll
llvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll
llvm/test/CodeGen/PowerPC/cmpb-ppc32.ll
llvm/test/CodeGen/PowerPC/cmpb.ll
llvm/test/CodeGen/PowerPC/constant-combines.ll
llvm/test/CodeGen/PowerPC/constants-i64.ll
llvm/test/CodeGen/PowerPC/fdiv.ll
llvm/test/CodeGen/PowerPC/fma-assoc.ll
llvm/test/CodeGen/PowerPC/ftrunc-vec.ll
llvm/test/CodeGen/PowerPC/hoist-logic.ll
llvm/test/CodeGen/PowerPC/inc-of-add.ll
llvm/test/CodeGen/PowerPC/maddld.ll
llvm/test/CodeGen/PowerPC/mi-peephole-splat.ll
llvm/test/CodeGen/PowerPC/mulli.ll
llvm/test/CodeGen/PowerPC/ori_imm32.ll
llvm/test/CodeGen/PowerPC/ori_imm64.ll
llvm/test/CodeGen/PowerPC/popcnt-zext.ll
llvm/test/CodeGen/PowerPC/pr33093.ll
llvm/test/CodeGen/PowerPC/pr39478.ll
llvm/test/CodeGen/PowerPC/rotl-2.ll
llvm/test/CodeGen/PowerPC/setcc-to-sub.ll
llvm/test/CodeGen/PowerPC/shift-cmp.ll
llvm/test/CodeGen/PowerPC/unal-vec-ldst.ll
llvm/test/CodeGen/PowerPC/vec_clz.ll
llvm/test/CodeGen/PowerPC/vec_constants.ll
llvm/test/CodeGen/PowerPC/vec_revb.ll
llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll
llvm/test/CodeGen/PowerPC/vmladduhm.ll

Removed: 




diff  --git a/llvm/test/CodeGen/PowerPC/and-mask.ll 
b/llvm/test/CodeGen/PowerPC/and-mask.ll
index 489880b29e67..e5664f92b3c9 100644
--- a/llvm/test/CodeGen/PowerPC/and-mask.ll
+++ b/llvm/test/CodeGen/PowerPC/and-mask.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck %s
 
 ; mask 0xFFFE
 define i32 @test1(i32 %a) {

diff  --git a/llvm/test/CodeGen/PowerPC/bool-math.ll 
b/llvm/test/CodeGen/PowerPC/bool-math.ll
index 9ec3c7b4671a..9e443fb0e507 100644
--- a/llvm/test/CodeGen/PowerPC/bool-math.ll
+++ b/llvm/test/CodeGen/PowerPC/bool-math.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=powerpc64le-- -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff -verify-machineinstrs | 
FileCheck %s
 
 define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) {
 ; CHECK-LABEL: sub_zext_cmp_mask_same_size_result:

diff  --git a/llvm/test/CodeGen/PowerPC/bswap64.ll 
b/llvm/test/CodeGen/PowerPC/bswap64.ll
index 75a839a3b95f..ef3cd4aa72ca 100644
--- a/llvm/test/CodeGen/PowerPC/bswap64.ll
+++ b/llvm/test/CodeGen/PowerPC/bswap64.ll
@@ -1,8 +1,12 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown \
 ; RUN:   -mcpu=pwr9 | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff \
+; RUN:   -mcpu=pwr9 -vec-extabi | FileCheck %s
 ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown \
 ; RUN:   -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefix=NO-ALTIVEC
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff \
+; RUN:   -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefix=NO-ALTIVEC
 
 declare i64 @llvm.bswap.i64(i64)
 

diff  --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll 
b/llvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll
index d53b442fef71..2f96d21f6320 100644
--- a/llvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -verify-machineinstrs -mtriple powerpc64le -mcpu=pwr9 | 
FileCheck %s
+; RUN: llc < %s -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff 
-vec-extabi -mcpu=pwr9 | FileCheck %s
 
 define i64 @raw() {
 ; CHECK-LABEL: raw:

diff  --git a/llvm/test/CodeGen/PowerPC/cmpb-ppc32.ll 
b/llvm/test/CodeGen/PowerPC/cmpb-ppc32.ll
index ab63784134f9..af2904cad806 100644
--- a/llvm/test/CodeGen/PowerPC/cmpb-ppc32.ll
+++ b/llvm/test/CodeGen/PowerPC/cmpb-ppc32.ll
@@ -1,7 +1,6 @@
 ; NOTE: Assertions have been autogenerate

[llvm-branch-commits] [llvm] f776d8b - [Legalizer] Promote result type in expanding FP_TO_XINT

[Qiu Chaofan via llvm-branch-commits]

Author: Qiu Chaofan
Date: 2021-01-18T11:56:11+08:00
New Revision: f776d8b12f0ec19cfff60c967565788ce4f926e6

URL: 
https://github.com/llvm/llvm-project/commit/f776d8b12f0ec19cfff60c967565788ce4f926e6
DIFF: 
https://github.com/llvm/llvm-project/commit/f776d8b12f0ec19cfff60c967565788ce4f926e6.diff

LOG: [Legalizer] Promote result type in expanding FP_TO_XINT

This patch promotes result integer type of FP_TO_XINT in expanding.
So crash in conversion from ppc_fp128 to i1 will be fixed.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D92473

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp 
b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
index ccd2bf2cc924..966645e3256d 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -913,6 +913,24 @@ SDValue DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
  0);
 }
 
+// Even if the result type is legal, no libcall may exactly match. (e.g. We
+// don't have FP-i8 conversions) This helper method looks for an appropriate
+// promoted libcall.
+static RTLIB::Libcall findFPToIntLibcall(EVT SrcVT, EVT RetVT, EVT &Promoted,
+ bool Signed) {
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
+  for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
+   IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
+   ++IntVT) {
+Promoted = (MVT::SimpleValueType)IntVT;
+// The type needs to big enough to hold the result.
+if (Promoted.bitsGE(RetVT))
+  LC = Signed ? RTLIB::getFPTOSINT(SrcVT, Promoted)
+  : RTLIB::getFPTOUINT(SrcVT, Promoted);
+  }
+  return LC;
+}
+
 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT(SDNode *N) {
   bool IsStrict = N->isStrictFPOpcode();
   bool Signed = N->getOpcode() == ISD::FP_TO_SINT ||
@@ -928,16 +946,9 @@ SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT(SDNode 
*N) {
   // a larger type, eg: fp -> i32. Even if it is legal, no libcall may exactly
   // match, eg. we don't have fp -> i8 conversions.
   // Look for an appropriate libcall.
-  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
-  for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
-   IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
-   ++IntVT) {
-NVT = (MVT::SimpleValueType)IntVT;
-// The type needs to big enough to hold the result.
-if (NVT.bitsGE(RVT))
-  LC = Signed ? RTLIB::getFPTOSINT(SVT, NVT) : RTLIB::getFPTOUINT(SVT, 
NVT);
-  }
-  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_XINT!");
+  RTLIB::Libcall LC = findFPToIntLibcall(SVT, RVT, NVT, Signed);
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && NVT.isSimple() &&
+ "Unsupported FP_TO_XINT!");
 
   Op = GetSoftenedFloat(Op);
   SDValue Chain = IsStrict ? N->getOperand(0) : SDValue();
@@ -1895,12 +1906,14 @@ SDValue 
DAGTypeLegalizer::ExpandFloatOp_FP_TO_XINT(SDNode *N) {
 N->getOpcode() == ISD::STRICT_FP_TO_SINT;
   SDValue Op = N->getOperand(IsStrict ? 1 : 0);
   SDValue Chain = IsStrict ? N->getOperand(0) : SDValue();
-  RTLIB::Libcall LC = Signed ? RTLIB::getFPTOSINT(Op.getValueType(), RVT)
- : RTLIB::getFPTOUINT(Op.getValueType(), RVT);
-  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_XINT!");
+
+  EVT NVT;
+  RTLIB::Libcall LC = findFPToIntLibcall(Op.getValueType(), RVT, NVT, Signed);
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && NVT.isSimple() &&
+ "Unsupported FP_TO_XINT!");
   TargetLowering::MakeLibCallOptions CallOptions;
   std::pair Tmp =
-  TLI.makeLibCall(DAG, LC, RVT, Op, CallOptions, dl, Chain);
+  TLI.makeLibCall(DAG, LC, NVT, Op, CallOptions, dl, Chain);
   if (!IsStrict)
 return Tmp.first;
 

diff  --git a/llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll 
b/llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
index 864a573896b2..44676c7a827b 100644
--- a/llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
@@ -1975,6 +1975,100 @@ entry:
   ret ppc_fp128 %conv
 }
 
+define i1 @ppcq_to_s1(ppc_fp128 %a) {
+; PC64LE-LABEL: ppcq_to_s1:
+; PC64LE:   # %bb.0: # %entry
+; PC64LE-NEXT:mflr 0
+; PC64LE-NEXT:std 0, 16(1)
+; PC64LE-NEXT:stdu 1, -32(1)
+; PC64LE-NEXT:.cfi_def_cfa_offset 32
+; PC64LE-NEXT:.cfi_offset lr, 16
+; PC64LE-NEXT:bl __gcc_qtou
+; PC64LE-NEXT:nop
+; PC64LE-NEXT:addi 1, 1, 32
+; PC64LE-NEXT:ld 0, 16(1)
+; PC64LE-NEXT:mtlr 0
+; PC64LE-NEXT:blr
+;
+; PC64LE9-LABEL: ppcq_to_s1:
+; PC64LE9:   # %bb.0: # %entry
+; PC64LE9-NEXT:mflr 0
+; PC64LE9-NEXT

[llvm-branch-commits] [llvm] 7011086 - [test] Autogen a loop vectorizer test to make future changes visible

[Philip Reames via llvm-branch-commits]

Author: Philip Reames
Date: 2021-01-17T20:03:22-08:00
New Revision: 7011086dc1cd5575f971db0138a62387939e6a73

URL: 
https://github.com/llvm/llvm-project/commit/7011086dc1cd5575f971db0138a62387939e6a73
DIFF: 
https://github.com/llvm/llvm-project/commit/7011086dc1cd5575f971db0138a62387939e6a73.diff

LOG: [test] Autogen a loop vectorizer test to make future changes visible

Added: 


Modified: 
llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll

Removed: 




diff  --git a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll 
b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
index dbc90bcf4519..0d4bdf0ecac3 100644
--- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
+++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -S -loop-vectorize -instcombine -force-vector-width=4 
-force-vector-interleave=1 -enable-interleaved-mem-accesses=true 
-runtime-memory-check-threshold=24 < %s | FileCheck %s
 
 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
@@ -16,19 +17,48 @@ target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
 ;   }
 ; }
 
-; CHECK-LABEL: @test_array_load2_store2(
-; CHECK: %wide.vec = load <8 x i32>, <8 x i32>* %{{.*}}, align 4
-; CHECK: shufflevector <8 x i32> %wide.vec, <8 x i32> poison, <4 x i32> 
-; CHECK: shufflevector <8 x i32> %wide.vec, <8 x i32> poison, <4 x i32> 
-; CHECK: add nsw <4 x i32>
-; CHECK: mul nsw <4 x i32>
-; CHECK: %interleaved.vec = shufflevector <4 x i32> {{.*}}, <8 x i32> 
-; CHECK: store <8 x i32> %interleaved.vec, <8 x i32>* %{{.*}}, align 4
 
 @AB = common global [1024 x i32] zeroinitializer, align 4
 @CD = common global [1024 x i32] zeroinitializer, align 4
 
 define void @test_array_load2_store2(i32 %C, i32 %D) {
+; CHECK-LABEL: @test_array_load2_store2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
+; CHECK:   vector.ph:
+; CHECK-NEXT:[[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> 
poison, i32 [[C:%.*]], i32 0
+; CHECK-NEXT:[[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> 
[[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer
+; CHECK-NEXT:[[BROADCAST_SPLATINSERT2:%.*]] = insertelement <4 x i32> 
poison, i32 [[D:%.*]], i32 0
+; CHECK-NEXT:[[BROADCAST_SPLAT3:%.*]] = shufflevector <4 x i32> 
[[BROADCAST_SPLATINSERT2]], <4 x i32> poison, <4 x i32> zeroinitializer
+; CHECK-NEXT:br label [[VECTOR_BODY:%.*]]
+; CHECK:   vector.body:
+; CHECK-NEXT:[[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ 
[[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 1
+; CHECK-NEXT:[[TMP0:%.*]] = getelementptr inbounds [1024 x i32], [1024 x 
i32]* @AB, i64 0, i64 [[OFFSET_IDX]]
+; CHECK-NEXT:[[TMP1:%.*]] = bitcast i32* [[TMP0]] to <8 x i32>*
+; CHECK-NEXT:[[WIDE_VEC:%.*]] = load <8 x i32>, <8 x i32>* [[TMP1]], align 
4
+; CHECK-NEXT:[[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], 
<8 x i32> poison, <4 x i32> 
+; CHECK-NEXT:[[STRIDED_VEC1:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], 
<8 x i32> poison, <4 x i32> 
+; CHECK-NEXT:[[TMP2:%.*]] = or i64 [[OFFSET_IDX]], 1
+; CHECK-NEXT:[[TMP3:%.*]] = add nsw <4 x i32> [[STRIDED_VEC]], 
[[BROADCAST_SPLAT]]
+; CHECK-NEXT:[[TMP4:%.*]] = mul nsw <4 x i32> [[STRIDED_VEC1]], 
[[BROADCAST_SPLAT3]]
+; CHECK-NEXT:[[TMP5:%.*]] = getelementptr inbounds [1024 x i32], [1024 x 
i32]* @CD, i64 0, i64 [[TMP2]]
+; CHECK-NEXT:[[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 
-1
+; CHECK-NEXT:[[TMP7:%.*]] = bitcast i32* [[TMP6]] to <8 x i32>*
+; CHECK-NEXT:[[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i32> [[TMP3]], 
<4 x i32> [[TMP4]], <8 x i32> 
+; CHECK-NEXT:store <8 x i32> [[INTERLEAVED_VEC]], <8 x i32>* [[TMP7]], 
align 4
+; CHECK-NEXT:[[INDEX_NEXT]] = add i64 [[INDEX]], 4
+; CHECK-NEXT:[[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 512
+; CHECK-NEXT:br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label 
[[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]]
+; CHECK:   middle.block:
+; CHECK-NEXT:br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
+; CHECK:   scalar.ph:
+; CHECK-NEXT:br label [[FOR_BODY:%.*]]
+; CHECK:   for.body:
+; CHECK-NEXT:br i1 undef, label [[FOR_BODY]], label [[FOR_END]], 
[[LOOP2:!llvm.loop !.*]]
+; CHECK:   for.end:
+; CHECK-NEXT:ret void
+;
 entry:
   br label %for.body
 
@@ -67,24 +97,48 @@ for.end:  ; preds = 
%for.body
 ;   }
 ; }
 
-; CHECK-LABEL: @test_struct_array_load3_store3(
-; CHECK: %wide.vec = load <12 x i32>, <12 x i32>* {{.*}}, align 4
-; CHECK: shufflevector <12 x i32> %wide.vec, <12 x i32> poison, <4 x i32> 
-; CHECK: shufflevector <12 x i32> %wide.vec, <12 x i32> poison, <4 x i32

[llvm-branch-commits] [llvm] 8356610 - [test] pre commit a couple more tests for vectorizing multiple exit loops

[Philip Reames via llvm-branch-commits]

Author: Philip Reames
Date: 2021-01-17T20:29:13-08:00
New Revision: 8356610f8d48ca7ecbb930dd9b987e4269784710

URL: 
https://github.com/llvm/llvm-project/commit/8356610f8d48ca7ecbb930dd9b987e4269784710
DIFF: 
https://github.com/llvm/llvm-project/commit/8356610f8d48ca7ecbb930dd9b987e4269784710.diff

LOG: [test] pre commit a couple more tests for vectorizing multiple exit loops

Added: 


Modified: 
llvm/test/Transforms/LoopVectorize/loop-form.ll

Removed: 




diff  --git a/llvm/test/Transforms/LoopVectorize/loop-form.ll 
b/llvm/test/Transforms/LoopVectorize/loop-form.ll
index 5b2dd81a395b..91780789088b 100644
--- a/llvm/test/Transforms/LoopVectorize/loop-form.ll
+++ b/llvm/test/Transforms/LoopVectorize/loop-form.ll
@@ -588,6 +588,140 @@ if.end2:
   ret i32 1
 }
 
+; LCSSA, common value each exit
+define i32 @multiple_exit_blocks2(i16* %p, i32 %n) {
+; CHECK-LABEL: @multiple_exit_blocks2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:br label [[FOR_COND:%.*]]
+; CHECK:   for.cond:
+; CHECK-NEXT:[[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], 
[[FOR_BODY:%.*]] ]
+; CHECK-NEXT:[[CMP:%.*]] = icmp slt i32 [[I]], [[N:%.*]]
+; CHECK-NEXT:br i1 [[CMP]], label [[FOR_BODY]], label [[IF_END:%.*]]
+; CHECK:   for.body:
+; CHECK-NEXT:[[IPROM:%.*]] = sext i32 [[I]] to i64
+; CHECK-NEXT:[[B:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], i64 
[[IPROM]]
+; CHECK-NEXT:store i16 0, i16* [[B]], align 4
+; CHECK-NEXT:[[INC]] = add nsw i32 [[I]], 1
+; CHECK-NEXT:[[CMP2:%.*]] = icmp slt i32 [[I]], 2096
+; CHECK-NEXT:br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END2:%.*]]
+; CHECK:   if.end:
+; CHECK-NEXT:[[I_LCSSA:%.*]] = phi i32 [ [[I]], [[FOR_COND]] ]
+; CHECK-NEXT:ret i32 [[I_LCSSA]]
+; CHECK:   if.end2:
+; CHECK-NEXT:[[I_LCSSA1:%.*]] = phi i32 [ [[I]], [[FOR_BODY]] ]
+; CHECK-NEXT:ret i32 [[I_LCSSA1]]
+;
+; TAILFOLD-LABEL: @multiple_exit_blocks2(
+; TAILFOLD-NEXT:  entry:
+; TAILFOLD-NEXT:br label [[FOR_COND:%.*]]
+; TAILFOLD:   for.cond:
+; TAILFOLD-NEXT:[[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], 
[[FOR_BODY:%.*]] ]
+; TAILFOLD-NEXT:[[CMP:%.*]] = icmp slt i32 [[I]], [[N:%.*]]
+; TAILFOLD-NEXT:br i1 [[CMP]], label [[FOR_BODY]], label [[IF_END:%.*]]
+; TAILFOLD:   for.body:
+; TAILFOLD-NEXT:[[IPROM:%.*]] = sext i32 [[I]] to i64
+; TAILFOLD-NEXT:[[B:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], 
i64 [[IPROM]]
+; TAILFOLD-NEXT:store i16 0, i16* [[B]], align 4
+; TAILFOLD-NEXT:[[INC]] = add nsw i32 [[I]], 1
+; TAILFOLD-NEXT:[[CMP2:%.*]] = icmp slt i32 [[I]], 2096
+; TAILFOLD-NEXT:br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END2:%.*]]
+; TAILFOLD:   if.end:
+; TAILFOLD-NEXT:[[I_LCSSA:%.*]] = phi i32 [ [[I]], [[FOR_COND]] ]
+; TAILFOLD-NEXT:ret i32 [[I_LCSSA]]
+; TAILFOLD:   if.end2:
+; TAILFOLD-NEXT:[[I_LCSSA1:%.*]] = phi i32 [ [[I]], [[FOR_BODY]] ]
+; TAILFOLD-NEXT:ret i32 [[I_LCSSA1]]
+;
+entry:
+  br label %for.cond
+
+for.cond:
+  %i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+  %cmp = icmp slt i32 %i, %n
+  br i1 %cmp, label %for.body, label %if.end
+
+for.body:
+  %iprom = sext i32 %i to i64
+  %b = getelementptr inbounds i16, i16* %p, i64 %iprom
+  store i16 0, i16* %b, align 4
+  %inc = add nsw i32 %i, 1
+  %cmp2 = icmp slt i32 %i, 2096
+  br i1 %cmp2, label %for.cond, label %if.end2
+
+if.end:
+  ret i32 %i
+
+if.end2:
+  ret i32 %i
+}
+
+; LCSSA, distinct value each exit
+define i32 @multiple_exit_blocks3(i16* %p, i32 %n) {
+; CHECK-LABEL: @multiple_exit_blocks3(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:br label [[FOR_COND:%.*]]
+; CHECK:   for.cond:
+; CHECK-NEXT:[[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], 
[[FOR_BODY:%.*]] ]
+; CHECK-NEXT:[[CMP:%.*]] = icmp slt i32 [[I]], [[N:%.*]]
+; CHECK-NEXT:br i1 [[CMP]], label [[FOR_BODY]], label [[IF_END:%.*]]
+; CHECK:   for.body:
+; CHECK-NEXT:[[IPROM:%.*]] = sext i32 [[I]] to i64
+; CHECK-NEXT:[[B:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], i64 
[[IPROM]]
+; CHECK-NEXT:store i16 0, i16* [[B]], align 4
+; CHECK-NEXT:[[INC]] = add nsw i32 [[I]], 1
+; CHECK-NEXT:[[CMP2:%.*]] = icmp slt i32 [[I]], 2096
+; CHECK-NEXT:br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END2:%.*]]
+; CHECK:   if.end:
+; CHECK-NEXT:[[I_LCSSA:%.*]] = phi i32 [ [[I]], [[FOR_COND]] ]
+; CHECK-NEXT:ret i32 [[I_LCSSA]]
+; CHECK:   if.end2:
+; CHECK-NEXT:[[INC_LCSSA:%.*]] = phi i32 [ [[INC]], [[FOR_BODY]] ]
+; CHECK-NEXT:ret i32 [[INC_LCSSA]]
+;
+; TAILFOLD-LABEL: @multiple_exit_blocks3(
+; TAILFOLD-NEXT:  entry:
+; TAILFOLD-NEXT:br label [[FOR_COND:%.*]]
+; TAILFOLD:   for.cond:
+; TAILFOLD-NEXT:[[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], 
[[FOR_BODY:%.*]] ]
+; TAILFOLD-NEXT:[[CMP:%.*]] = icmp slt i32 [[I]], [[N:%.*]]
+; TAILFOLD-

[llvm-branch-commits] [llvm] e561906 - [JITLink][ELF] New ELF skip-debug-sections test requires asserts.

[Lang Hames via llvm-branch-commits]

Author: Lang Hames
Date: 2021-01-18T15:41:53+11:00
New Revision: e5619065b8b8c441c0cbccbb81f5fa7857cf670a

URL: 
https://github.com/llvm/llvm-project/commit/e5619065b8b8c441c0cbccbb81f5fa7857cf670a
DIFF: 
https://github.com/llvm/llvm-project/commit/e5619065b8b8c441c0cbccbb81f5fa7857cf670a.diff

LOG: [JITLink][ELF] New ELF skip-debug-sections test requires asserts.

This should fix the failures on Release mode testers.

Added: 


Modified: 
llvm/test/ExecutionEngine/JITLink/X86/ELF_skip_debug_sections.s

Removed: 




diff  --git a/llvm/test/ExecutionEngine/JITLink/X86/ELF_skip_debug_sections.s 
b/llvm/test/ExecutionEngine/JITLink/X86/ELF_skip_debug_sections.s
index 506bbdfd8844..53132c4a987b 100644
--- a/llvm/test/ExecutionEngine/JITLink/X86/ELF_skip_debug_sections.s
+++ b/llvm/test/ExecutionEngine/JITLink/X86/ELF_skip_debug_sections.s
@@ -1,3 +1,4 @@
+# REQUIRES: asserts
 # RUN: llvm-mc -triple=x86_64-pc-linux-gnu -filetype=obj -o %t %s
 # RUN: llvm-jitlink -debug-only=jitlink -noexec %t 2>&1 | FileCheck %s
 #



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[llvm-branch-commits] [llvm] 26a396c - [PowerPC] support register pressure reduction in machine combiner.

[Chen Zheng via llvm-branch-commits]

Author: Chen Zheng
Date: 2021-01-17T23:56:13-05:00
New Revision: 26a396c4ef481cb159bba631982841736a125a9c

URL: 
https://github.com/llvm/llvm-project/commit/26a396c4ef481cb159bba631982841736a125a9c
DIFF: 
https://github.com/llvm/llvm-project/commit/26a396c4ef481cb159bba631982841736a125a9c.diff

LOG: [PowerPC] support register pressure reduction in machine combiner.

Reassociating some patterns to generate more fma instructions to
reduce register pressure.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D92071

Added: 
llvm/test/CodeGen/PowerPC/register-pressure-reduction.ll

Modified: 
llvm/include/llvm/CodeGen/MachineCombinerPattern.h
llvm/lib/CodeGen/MachineCombiner.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.h

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/MachineCombinerPattern.h 
b/llvm/include/llvm/CodeGen/MachineCombinerPattern.h
index e9f52fb064e1..ac0cc70744d1 100644
--- a/llvm/include/llvm/CodeGen/MachineCombinerPattern.h
+++ b/llvm/include/llvm/CodeGen/MachineCombinerPattern.h
@@ -29,6 +29,11 @@ enum class MachineCombinerPattern {
   REASSOC_XY_AMM_BMM,
   REASSOC_XMM_AMM_BMM,
 
+  // These are patterns matched by the PowerPC to reassociate FMA and FSUB to
+  // reduce register pressure.
+  REASSOC_XY_BCA,
+  REASSOC_XY_BAC,
+
   // These are multiply-add patterns matched by the AArch64 machine combiner.
   MULADDW_OP1,
   MULADDW_OP2,

diff  --git a/llvm/lib/CodeGen/MachineCombiner.cpp 
b/llvm/lib/CodeGen/MachineCombiner.cpp
index 878912a6032b..e2b6cfe55c16 100644
--- a/llvm/lib/CodeGen/MachineCombiner.cpp
+++ b/llvm/lib/CodeGen/MachineCombiner.cpp
@@ -279,6 +279,9 @@ static CombinerObjective 
getCombinerObjective(MachineCombinerPattern P) {
   case MachineCombinerPattern::REASSOC_XY_AMM_BMM:
   case MachineCombinerPattern::REASSOC_XMM_AMM_BMM:
 return CombinerObjective::MustReduceDepth;
+  case MachineCombinerPattern::REASSOC_XY_BCA:
+  case MachineCombinerPattern::REASSOC_XY_BAC:
+return CombinerObjective::MustReduceRegisterPressure;
   default:
 return CombinerObjective::Default;
   }

diff  --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp 
b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 75a498b807cd..71d9fb2c179e 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -21,12 +21,15 @@
 #include "llvm/ADT/Statistic.h"
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/CodeGen/LiveIntervals.h"
+#include "llvm/CodeGen/MachineConstantPool.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineMemOperand.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/PseudoSourceValue.h"
+#include "llvm/CodeGen/RegisterClassInfo.h"
+#include "llvm/CodeGen/RegisterPressure.h"
 #include "llvm/CodeGen/ScheduleDAG.h"
 #include "llvm/CodeGen/SlotIndexes.h"
 #include "llvm/CodeGen/StackMaps.h"
@@ -73,6 +76,14 @@ static cl::opt
 UseOldLatencyCalc("ppc-old-latency-calc", cl::Hidden,
   cl::desc("Use the old (incorrect) instruction latency calculation"));
 
+static cl::opt
+FMARPFactor("ppc-fma-rp-factor", cl::Hidden, cl::init(1.5),
+cl::desc("register pressure factor for the transformations."));
+
+static cl::opt EnableFMARegPressureReduction(
+"ppc-fma-rp-reduction", cl::Hidden, cl::init(true),
+cl::desc("enable register pressure reduce in machine combiner pass."));
+
 // Pin the vtable to this file.
 void PPCInstrInfo::anchor() {}
 
@@ -278,21 +289,23 @@ bool PPCInstrInfo::isAssociativeAndCommutative(const 
MachineInstr &Inst) const {
 #define InfoArrayIdxFMULInst 2
 #define InfoArrayIdxAddOpIdx 3
 #define InfoArrayIdxMULOpIdx 4
+#define InfoArrayIdxFSubInst 5
 // Array keeps info for FMA instructions:
 // Index 0(InfoArrayIdxFMAInst): FMA instruction;
-// Index 1(InfoArrayIdxFAddInst): ADD instruction assoaicted with FMA;
-// Index 2(InfoArrayIdxFMULInst): MUL instruction assoaicted with FMA;
+// Index 1(InfoArrayIdxFAddInst): ADD instruction associated with FMA;
+// Index 2(InfoArrayIdxFMULInst): MUL instruction associated with FMA;
 // Index 3(InfoArrayIdxAddOpIdx): ADD operand index in FMA operands;
 // Index 4(InfoArrayIdxMULOpIdx): first MUL operand index in FMA operands;
-//second MUL operand index is plus 1.
-static const uint16_t FMAOpIdxInfo[][5] = {
+//second MUL operand index is plus 1;
+// Index 5(InfoArrayIdxFSubInst): SUB instruction associated with FMA.
+static const uint16_t FMAOpIdxInfo[][6] = {
 // FIXME: Add more FMA instructions like XSNMADDADP and so on.
-{PPC::XSMADDADP, PPC::XSADDDP, PPC::XSMULDP, 1, 2},
-{PPC::XSMADDASP, PPC::XSADDSP, PPC::XSMULSP, 1, 2},
-{PPC::XVMADDADP, PPC::XVADDDP, PPC::XVMULDP, 1, 2},
-   

[llvm-branch-commits] [clang] bcc1dee - [clang-format] Add StatementAttributeLikeMacros option

[Björn Schäpers via llvm-branch-commits]

Author: Björn Schäpers
Date: 2021-01-18T06:54:31+01:00
New Revision: bcc1dee60019f3a488a04dc7f701f7a692040fed

URL: 
https://github.com/llvm/llvm-project/commit/bcc1dee60019f3a488a04dc7f701f7a692040fed
DIFF: 
https://github.com/llvm/llvm-project/commit/bcc1dee60019f3a488a04dc7f701f7a692040fed.diff

LOG: [clang-format] Add StatementAttributeLikeMacros option

This allows to ignore for example Qts emit when
AlignConsecutiveDeclarations is set, otherwise it is parsed as a type
and it results in some misformating:

unsigned char MyChar = 'x';
emit  signal(MyChar);

Differential Revision: https://reviews.llvm.org/D93776

Added: 


Modified: 
clang/docs/ClangFormatStyleOptions.rst
clang/docs/ReleaseNotes.rst
clang/include/clang/Format/Format.h
clang/lib/Format/Format.cpp
clang/lib/Format/FormatToken.h
clang/lib/Format/FormatTokenLexer.cpp
clang/lib/Format/TokenAnnotator.cpp
clang/lib/Format/WhitespaceManager.cpp
clang/unittests/Format/FormatTest.cpp

Removed: 




diff  --git a/clang/docs/ClangFormatStyleOptions.rst 
b/clang/docs/ClangFormatStyleOptions.rst
index 8eee6187d0c6..928d136ef9ff 100644
--- a/clang/docs/ClangFormatStyleOptions.rst
+++ b/clang/docs/ClangFormatStyleOptions.rst
@@ -3074,6 +3074,20 @@ the configuration (without a prefix: ``Auto``).
 
 
 
+**StatementAttributeLikeMacros** (``std::vector``)
+  Macros which are ignored in front of a statement, as if they were an
+  attribute. So that they are not parsed as identifier, for example for Qts
+  emit. \code
+AlignConsecutiveDeclarations: true
+StatementAttributeLikeMacros: []
+unsigned char data = 'x';
+emit  signal(data); // This is parsed as variable declaration.
+
+AlignConsecutiveDeclarations: true
+StatementAttributeLikeMacros: [emit]
+unsigned char data = 'x';
+emit signal(data); // Now it's fine again.
+
 **StatementMacros** (``std::vector``)
   A vector of macros that should be interpreted as complete
   statements.

diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 76d4b6bb5acd..7fcae5bce164 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -296,6 +296,10 @@ clang-format
 - Option ``SpaceBeforeCaseColon`` has been added to add a space before the
   colon in a case or default statement.
 
+- Option ``StatementAttributeLikeMacros`` has been added to declare
+  macros which are not parsed as a type in front of a statement. See
+  the documentation for an example.
+
 
 libclang
 

diff  --git a/clang/include/clang/Format/Format.h 
b/clang/include/clang/Format/Format.h
index 6b3fb8164a28..943a33cee4fd 100644
--- a/clang/include/clang/Format/Format.h
+++ b/clang/include/clang/Format/Format.h
@@ -2676,6 +2676,21 @@ struct FormatStyle {
   /// \endcode
   LanguageStandard Standard;
 
+  /// Macros which are ignored in front of a statement, as if they were an
+  /// attribute. So that they are not parsed as identifier, for example for Qts
+  /// emit. \code
+  ///   AlignConsecutiveDeclarations: true
+  ///   StatementAttributeLikeMacros: []
+  ///   unsigned char data = 'x';
+  ///   emit  signal(data); // This is parsed as variable declaration.
+  ///
+  ///   AlignConsecutiveDeclarations: true
+  ///   StatementAttributeLikeMacros: [emit]
+  ///   unsigned char data = 'x';
+  ///   emit signal(data); // Now it's fine again.
+  /// \endcode
+  std::vector StatementAttributeLikeMacros;
+
   /// The number of columns used for tab stops.
   unsigned TabWidth;
 
@@ -2825,9 +2840,11 @@ struct FormatStyle {
SpacesInSquareBrackets == R.SpacesInSquareBrackets &&
SpaceBeforeSquareBrackets == R.SpaceBeforeSquareBrackets &&
BitFieldColonSpacing == R.BitFieldColonSpacing &&
-   Standard == R.Standard && TabWidth == R.TabWidth &&
-   StatementMacros == R.StatementMacros && UseTab == R.UseTab &&
-   UseCRLF == R.UseCRLF && TypenameMacros == R.TypenameMacros;
+   Standard == R.Standard &&
+   StatementAttributeLikeMacros == R.StatementAttributeLikeMacros &&
+   StatementMacros == R.StatementMacros && TabWidth == R.TabWidth &&
+   UseTab == R.UseTab && UseCRLF == R.UseCRLF &&
+   TypenameMacros == R.TypenameMacros;
   }
 
   llvm::Optional GetLanguageStyle(LanguageKind Language) const;

diff  --git a/clang/lib/Format/Format.cpp b/clang/lib/Format/Format.cpp
index 1207ac2dcc2b..9f007819326c 100644
--- a/clang/lib/Format/Format.cpp
+++ b/clang/lib/Format/Format.cpp
@@ -549,6 +549,8 @@ template <> struct MappingTraits {
Style.ExperimentalAutoDetectBinPacking);
 IO.mapOptional("FixNamespaceComments", Style.FixNamespaceComments);
 IO.mapOptional("ForEachMacros", Style.ForEachMacros);
+IO.mapOptional("StatementAttributeLikeMacros",
+   Style.StatementAttributeLikeMacros);
 IO.m

[llvm-branch-commits] [llvm] cfec6cd - [IR] Allow scalable vectors in structs to support intrinsics returning multiple values.

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-17T23:29:51-08:00
New Revision: cfec6cd50c36f3db2fcd4084a8ef4df834a4eb24

URL: 
https://github.com/llvm/llvm-project/commit/cfec6cd50c36f3db2fcd4084a8ef4df834a4eb24
DIFF: 
https://github.com/llvm/llvm-project/commit/cfec6cd50c36f3db2fcd4084a8ef4df834a4eb24.diff

LOG: [IR] Allow scalable vectors in structs to support intrinsics returning 
multiple values.

RISC-V would like to use a struct of scalable vectors to return multiple
values from intrinsics. This woud also be needed for target independent
intrinsics like llvm.sadd.overflow.

This patch removes the existing restriction for this. I've modified
StructType::isSized to consider a struct containing scalable vectors
as unsized so the verifier won't allow loads/stores/allocas of these
structs.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D94142

Added: 
llvm/test/CodeGen/RISCV/scalable-vector-struct.ll
llvm/test/Other/scalable-vector-struct-intrinsic.ll
llvm/test/Verifier/scalable-vector-struct-alloca.ll
llvm/test/Verifier/scalable-vector-struct-load.ll
llvm/test/Verifier/scalable-vector-struct-store.ll

Modified: 
llvm/docs/LangRef.rst
llvm/include/llvm/IR/DerivedTypes.h
llvm/lib/CodeGen/Analysis.cpp
llvm/lib/IR/DataLayout.cpp
llvm/lib/IR/Type.cpp
llvm/lib/IR/Verifier.cpp
llvm/test/Verifier/scalable-global-vars.ll

Removed: 
llvm/test/Other/scalable-vector-struct.ll



diff  --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index ccf1feb420eb..1b6052f58f9d 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -704,7 +704,9 @@ Variables and aliases can have a
 :ref:`Thread Local Storage Model `.
 
 :ref:`Scalable vectors ` cannot be global variables or members of
-structs or arrays because their size is unknown at compile time.
+arrays because their size is unknown at compile time. They are allowed in
+structs to facilitate intrinsics returning multiple values. Structs containing
+scalable vectors cannot be used in loads, stores, allocas, or GEPs.
 
 Syntax::
 

diff  --git a/llvm/include/llvm/IR/DerivedTypes.h 
b/llvm/include/llvm/IR/DerivedTypes.h
index 51c5dd2d5845..c3d97f4520e1 100644
--- a/llvm/include/llvm/IR/DerivedTypes.h
+++ b/llvm/include/llvm/IR/DerivedTypes.h
@@ -284,6 +284,9 @@ class StructType : public Type {
   /// isSized - Return true if this is a sized type.
   bool isSized(SmallPtrSetImpl *Visited = nullptr) const;
 
+  /// Returns true if this struct contains a scalable vector.
+  bool containsScalableVectorType() const;
+
   /// Return true if this is a named struct that has a non-empty name.
   bool hasName() const { return SymbolTableEntry != nullptr; }
 

diff  --git a/llvm/lib/CodeGen/Analysis.cpp b/llvm/lib/CodeGen/Analysis.cpp
index cfd53bf53115..48b69c8bc203 100644
--- a/llvm/lib/CodeGen/Analysis.cpp
+++ b/llvm/lib/CodeGen/Analysis.cpp
@@ -88,19 +88,25 @@ void llvm::ComputeValueVTs(const TargetLowering &TLI, const 
DataLayout &DL,
uint64_t StartingOffset) {
   // Given a struct type, recursively traverse the elements.
   if (StructType *STy = dyn_cast(Ty)) {
-const StructLayout *SL = DL.getStructLayout(STy);
+// If the Offsets aren't needed, don't query the struct layout. This allows
+// us to support structs with scalable vectors for operations that don't
+// need offsets.
+const StructLayout *SL = Offsets ? DL.getStructLayout(STy) : nullptr;
 for (StructType::element_iterator EB = STy->element_begin(),
   EI = EB,
   EE = STy->element_end();
- EI != EE; ++EI)
+ EI != EE; ++EI) {
+  // Don't compute the element offset if we didn't get a StructLayout 
above.
+  uint64_t EltOffset = SL ? SL->getElementOffset(EI - EB) : 0;
   ComputeValueVTs(TLI, DL, *EI, ValueVTs, MemVTs, Offsets,
-  StartingOffset + SL->getElementOffset(EI - EB));
+  StartingOffset + EltOffset);
+}
 return;
   }
   // Given an array type, recursively traverse the elements.
   if (ArrayType *ATy = dyn_cast(Ty)) {
 Type *EltTy = ATy->getElementType();
-uint64_t EltSize = DL.getTypeAllocSize(EltTy);
+uint64_t EltSize = DL.getTypeAllocSize(EltTy).getFixedValue();
 for (unsigned i = 0, e = ATy->getNumElements(); i != e; ++i)
   ComputeValueVTs(TLI, DL, EltTy, ValueVTs, MemVTs, Offsets,
   StartingOffset + i * EltSize);
@@ -131,16 +137,21 @@ void llvm::computeValueLLTs(const DataLayout &DL, Type 
&Ty,
 uint64_t StartingOffset) {
   // Given a struct type, recursively traverse the elements.
   if (StructType *STy = dyn_cast(&Ty)) {
-const StructLayout *SL = DL.getStructLayout(STy);
-for (unsigned I = 0, E = STy->getNumElements(); I != E; ++I)
+// If the Offsets aren't needed, don't que