Author: Juneyoung Lee Date: 2021-01-18T11:12:52+09:00 New Revision: 2639c162b71f4b9e5c0ffefaa861fe915b73cb87
URL: https://github.com/llvm/llvm-project/commit/2639c162b71f4b9e5c0ffefaa861fe915b73cb87 DIFF: https://github.com/llvm/llvm-project/commit/2639c162b71f4b9e5c0ffefaa861fe915b73cb87.diff LOG: [InstCombine] more tests for D94861 (NFC) Added: Modified: llvm/test/Transforms/InstCombine/select-safe-transforms.ll Removed: ################################################################################ diff --git a/llvm/test/Transforms/InstCombine/select-safe-transforms.ll b/llvm/test/Transforms/InstCombine/select-safe-transforms.ll index f6dfb672e7f2..48235863d9ff 100644 --- a/llvm/test/Transforms/InstCombine/select-safe-transforms.ll +++ b/llvm/test/Transforms/InstCombine/select-safe-transforms.ll @@ -88,6 +88,34 @@ define i1 @xor_and(i1 %c, i32 %X, i32 %Y) { ret i1 %res } +define <2 x i1> @xor_and2(<2 x i1> %c, <2 x i32> %X, <2 x i32> %Y) { +; CHECK-LABEL: @xor_and2( +; CHECK-NEXT: [[COMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> [[COMP]], <2 x i1> <i1 true, i1 false> +; CHECK-NEXT: [[RES:%.*]] = xor <2 x i1> [[SEL]], <i1 true, i1 true> +; CHECK-NEXT: ret <2 x i1> [[RES]] +; + %comp = icmp ult <2 x i32> %X, %Y + %sel = select <2 x i1> %c, <2 x i1> %comp, <2 x i1> <i1 true, i1 false> + %res = xor <2 x i1> %sel, <i1 true, i1 true> + ret <2 x i1> %res +} + +@glb = global i8 0 + +define <2 x i1> @xor_and3(<2 x i1> %c, <2 x i32> %X, <2 x i32> %Y) { +; CHECK-LABEL: @xor_and3( +; CHECK-NEXT: [[COMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> [[COMP]], <2 x i1> <i1 icmp eq (i8* inttoptr (i64 1234 to i8*), i8* @glb), i1 false> +; CHECK-NEXT: [[RES:%.*]] = xor <2 x i1> [[SEL]], <i1 true, i1 true> +; CHECK-NEXT: ret <2 x i1> [[RES]] +; + %comp = icmp ult <2 x i32> %X, %Y + %sel = select <2 x i1> %c, <2 x i1> %comp, <2 x i1> <i1 icmp eq (i8* @glb, i8* inttoptr (i64 1234 to i8*)), i1 false> + %res = xor <2 x i1> %sel, <i1 true, i1 true> + ret <2 x i1> %res +} + define i1 @xor_or(i1 %c, i32 %X, i32 %Y) { ; CHECK-LABEL: @xor_or( ; CHECK-NEXT: [[COMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]] @@ -100,3 +128,29 @@ define i1 @xor_or(i1 %c, i32 %X, i32 %Y) { %res = xor i1 %sel, true ret i1 %res } + +define <2 x i1> @xor_or2(<2 x i1> %c, <2 x i32> %X, <2 x i32> %Y) { +; CHECK-LABEL: @xor_or2( +; CHECK-NEXT: [[COMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> <i1 true, i1 false>, <2 x i1> [[COMP]] +; CHECK-NEXT: [[RES:%.*]] = xor <2 x i1> [[SEL]], <i1 true, i1 true> +; CHECK-NEXT: ret <2 x i1> [[RES]] +; + %comp = icmp ult <2 x i32> %X, %Y + %sel = select <2 x i1> %c, <2 x i1> <i1 true, i1 false>, <2 x i1> %comp + %res = xor <2 x i1> %sel, <i1 true, i1 true> + ret <2 x i1> %res +} + +define <2 x i1> @xor_or3(<2 x i1> %c, <2 x i32> %X, <2 x i32> %Y) { +; CHECK-LABEL: @xor_or3( +; CHECK-NEXT: [[COMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> <i1 icmp eq (i8* inttoptr (i64 1234 to i8*), i8* @glb), i1 false>, <2 x i1> [[COMP]] +; CHECK-NEXT: [[RES:%.*]] = xor <2 x i1> [[SEL]], <i1 true, i1 true> +; CHECK-NEXT: ret <2 x i1> [[RES]] +; + %comp = icmp ult <2 x i32> %X, %Y + %sel = select <2 x i1> %c, <2 x i1> <i1 icmp eq (i8* @glb, i8* inttoptr (i64 1234 to i8*)), i1 false>, <2 x i1> %comp + %res = xor <2 x i1> %sel, <i1 true, i1 true> + ret <2 x i1> %res +} _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
