[Lldb-commits] [lldb] 3a9e07b - [LLDB][LoongArch] Make software single stepping work

2022-12-08 Thread Weining Lu via lldb-commits 

Author: Weining Lu
Date: 2022-12-08T19:06:07+08:00
New Revision: 3a9e07b1e7f4718a0e117f3a732f1679c4bf2e30

URL: 
https://github.com/llvm/llvm-project/commit/3a9e07b1e7f4718a0e117f3a732f1679c4bf2e30
DIFF: 
https://github.com/llvm/llvm-project/commit/3a9e07b1e7f4718a0e117f3a732f1679c4bf2e30.diff

LOG: [LLDB][LoongArch] Make software single stepping work

Hardware single stepping is not currently supported by the linux kernel.
In order to support single step debugging, add EmulateInstructionLoongArch
to implement the software Single Stepping. This patch only support the
simplest single step execution of non-jump instructions.

Reviewed By: SixWeining, DavidSpickett

Differential Revision: https://reviews.llvm.org/D139158

Added: 
lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h

Modified: 
lldb/source/Plugins/Instruction/CMakeLists.txt
lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.cpp
lldb/tools/lldb-server/CMakeLists.txt
lldb/tools/lldb-server/SystemInitializerLLGS.cpp

Removed: 




diff  --git a/lldb/source/Plugins/Instruction/CMakeLists.txt 
b/lldb/source/Plugins/Instruction/CMakeLists.txt
index 631c0b307cac..46d610f261e0 100644
--- a/lldb/source/Plugins/Instruction/CMakeLists.txt
+++ b/lldb/source/Plugins/Instruction/CMakeLists.txt
@@ -1,5 +1,6 @@
 add_subdirectory(ARM)
 add_subdirectory(ARM64)
+add_subdirectory(LoongArch)
 add_subdirectory(MIPS)
 add_subdirectory(MIPS64)
 add_subdirectory(PPC64)

diff  --git a/lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt 
b/lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt
new file mode 100644
index ..59802ee8fa9a
--- /dev/null
+++ b/lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt
@@ -0,0 +1,11 @@
+add_lldb_library(lldbPluginInstructionLoongArch PLUGIN
+  EmulateInstructionLoongArch.cpp
+
+  LINK_LIBS
+lldbCore
+lldbInterpreter
+lldbPluginProcessUtility
+lldbSymbol
+  LINK_COMPONENTS
+Support
+  )

diff  --git 
a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp 
b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
new file mode 100644
index ..14ac993d9ac0
--- /dev/null
+++ b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
@@ -0,0 +1,181 @@
+//===---EmulateInstructionLoongArch.cpp===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include 
+
+#include "EmulateInstructionLoongArch.h"
+#include "Plugins/Process/Utility/InstructionUtils.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h"
+#include "Plugins/Process/Utility/lldb-loongarch-register-enums.h"
+#include "lldb/Core/Address.h"
+#include "lldb/Core/PluginManager.h"
+#include "lldb/Interpreter/OptionValueArray.h"
+#include "lldb/Interpreter/OptionValueDictionary.h"
+#include "lldb/Symbol/UnwindPlan.h"
+#include "lldb/Utility/ArchSpec.h"
+#include "lldb/Utility/LLDBLog.h"
+#include "lldb/Utility/RegisterValue.h"
+#include "lldb/Utility/Stream.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/Support/MathExtras.h"
+
+using namespace lldb;
+using namespace lldb_private;
+
+LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionLoongArch, InstructionLoongArch)
+
+namespace lldb_private {
+
+EmulateInstructionLoongArch::Opcode *
+EmulateInstructionLoongArch::GetOpcodeForInstruction(uint32_t inst) {
+  // TODO: Add the mask of jump instruction.
+  static EmulateInstructionLoongArch::Opcode g_opcodes[] = {
+  {0x, 0x, &EmulateInstructionLoongArch::EmulateNonJMP,
+   "NonJMP"}};
+  static const size_t num_loongarch_opcodes = std::size(g_opcodes);
+
+  for (size_t i = 0; i < num_loongarch_opcodes; ++i)
+if ((g_opcodes[i].mask & inst) == g_opcodes[i].value)
+  return &g_opcodes[i];
+  return nullptr;
+}
+
+bool EmulateInstructionLoongArch::EvaluateInstruction(uint32_t options) {
+  uint32_t inst_size = m_opcode.GetByteSize();
+  uint32_t inst = m_opcode.GetOpcode32();
+  bool increase_pc = options & eEmulateInstructionOptionAutoAdvancePC;
+  bool success = false;
+
+  Opcode *opcode_data = GetOpcodeForInstruction(inst);
+  if (!opcode_data)
+return false;
+
+  lldb::addr_t old_pc = 0;
+  if (increase_pc) {
+old_pc = ReadPC(&success);
+if (!success)
+  return false;
+  }
+
+  // Call the Emulate... function.
+  if (!(this->*opcode_data->callback)(inst))
+return false;
+
+  if (increase_pc) {
+lld

[Lldb-commits] [lldb] 2bfef8d - Revert "[LLDB][LoongArch] Make software single stepping work"

2022-12-08 Thread Weining Lu via lldb-commits 

Author: Weining Lu
Date: 2022-12-08T19:56:58+08:00
New Revision: 2bfef8d5370fbe9d500441b2e1e3fe4a4d68deec

URL: 
https://github.com/llvm/llvm-project/commit/2bfef8d5370fbe9d500441b2e1e3fe4a4d68deec
DIFF: 
https://github.com/llvm/llvm-project/commit/2bfef8d5370fbe9d500441b2e1e3fe4a4d68deec.diff

LOG: Revert "[LLDB][LoongArch] Make software single stepping work"

This reverts commit 3a9e07b1e7f4718a0e117f3a732f1679c4bf2e30.

Reason to revert: author name is wrong.

Added: 


Modified: 
lldb/source/Plugins/Instruction/CMakeLists.txt
lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.cpp
lldb/tools/lldb-server/CMakeLists.txt
lldb/tools/lldb-server/SystemInitializerLLGS.cpp

Removed: 
lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h



diff  --git a/lldb/source/Plugins/Instruction/CMakeLists.txt 
b/lldb/source/Plugins/Instruction/CMakeLists.txt
index 46d610f261e0d..631c0b307cac4 100644
--- a/lldb/source/Plugins/Instruction/CMakeLists.txt
+++ b/lldb/source/Plugins/Instruction/CMakeLists.txt
@@ -1,6 +1,5 @@
 add_subdirectory(ARM)
 add_subdirectory(ARM64)
-add_subdirectory(LoongArch)
 add_subdirectory(MIPS)
 add_subdirectory(MIPS64)
 add_subdirectory(PPC64)

diff  --git a/lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt 
b/lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt
deleted file mode 100644
index 59802ee8fa9ad..0
--- a/lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt
+++ /dev/null
@@ -1,11 +0,0 @@
-add_lldb_library(lldbPluginInstructionLoongArch PLUGIN
-  EmulateInstructionLoongArch.cpp
-
-  LINK_LIBS
-lldbCore
-lldbInterpreter
-lldbPluginProcessUtility
-lldbSymbol
-  LINK_COMPONENTS
-Support
-  )

diff  --git 
a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp 
b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
deleted file mode 100644
index 14ac993d9ac0f..0
--- a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
+++ /dev/null
@@ -1,181 +0,0 @@
-//===---EmulateInstructionLoongArch.cpp===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-
-#include 
-
-#include "EmulateInstructionLoongArch.h"
-#include "Plugins/Process/Utility/InstructionUtils.h"
-#include "Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h"
-#include "Plugins/Process/Utility/lldb-loongarch-register-enums.h"
-#include "lldb/Core/Address.h"
-#include "lldb/Core/PluginManager.h"
-#include "lldb/Interpreter/OptionValueArray.h"
-#include "lldb/Interpreter/OptionValueDictionary.h"
-#include "lldb/Symbol/UnwindPlan.h"
-#include "lldb/Utility/ArchSpec.h"
-#include "lldb/Utility/LLDBLog.h"
-#include "lldb/Utility/RegisterValue.h"
-#include "lldb/Utility/Stream.h"
-#include "llvm/ADT/STLExtras.h"
-#include "llvm/Support/MathExtras.h"
-
-using namespace lldb;
-using namespace lldb_private;
-
-LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionLoongArch, InstructionLoongArch)
-
-namespace lldb_private {
-
-EmulateInstructionLoongArch::Opcode *
-EmulateInstructionLoongArch::GetOpcodeForInstruction(uint32_t inst) {
-  // TODO: Add the mask of jump instruction.
-  static EmulateInstructionLoongArch::Opcode g_opcodes[] = {
-  {0x, 0x, &EmulateInstructionLoongArch::EmulateNonJMP,
-   "NonJMP"}};
-  static const size_t num_loongarch_opcodes = std::size(g_opcodes);
-
-  for (size_t i = 0; i < num_loongarch_opcodes; ++i)
-if ((g_opcodes[i].mask & inst) == g_opcodes[i].value)
-  return &g_opcodes[i];
-  return nullptr;
-}
-
-bool EmulateInstructionLoongArch::EvaluateInstruction(uint32_t options) {
-  uint32_t inst_size = m_opcode.GetByteSize();
-  uint32_t inst = m_opcode.GetOpcode32();
-  bool increase_pc = options & eEmulateInstructionOptionAutoAdvancePC;
-  bool success = false;
-
-  Opcode *opcode_data = GetOpcodeForInstruction(inst);
-  if (!opcode_data)
-return false;
-
-  lldb::addr_t old_pc = 0;
-  if (increase_pc) {
-old_pc = ReadPC(&success);
-if (!success)
-  return false;
-  }
-
-  // Call the Emulate... function.
-  if (!(this->*opcode_data->callback)(inst))
-return false;
-
-  if (increase_pc) {
-lldb::addr_t new_pc = ReadPC(&success);
-if (!success)
-  return false;
-
-if (new_pc == old_pc && !WritePC(old_pc + inst_size))
-  return false;
-  }
-  return true;
-}
-
-bool EmulateInstructionLoongArch::ReadInstruction() {
-  bool

[Lldb-commits] [lldb] f0f3395 - [LLDB][LoongArch] Make software single stepping work

2022-12-08 Thread Weining Lu via lldb-commits 

Author: Hui Li
Date: 2022-12-08T19:59:39+08:00
New Revision: f0f33957d03444eefc8264cbfe7f5cfe7bee6f3d

URL: 
https://github.com/llvm/llvm-project/commit/f0f33957d03444eefc8264cbfe7f5cfe7bee6f3d
DIFF: 
https://github.com/llvm/llvm-project/commit/f0f33957d03444eefc8264cbfe7f5cfe7bee6f3d.diff

LOG: [LLDB][LoongArch] Make software single stepping work

Hardware single stepping is not currently supported by the linux kernel.
In order to support single step debugging, add EmulateInstructionLoongArch
to implement the software Single Stepping. This patch only support the
simplest single step execution of non-jump instructions.

Reviewed By: SixWeining, DavidSpickett

Differential Revision: https://reviews.llvm.org/D139158

Added: 
lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h

Modified: 
lldb/source/Plugins/Instruction/CMakeLists.txt
lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.cpp
lldb/tools/lldb-server/CMakeLists.txt
lldb/tools/lldb-server/SystemInitializerLLGS.cpp

Removed: 




diff  --git a/lldb/source/Plugins/Instruction/CMakeLists.txt 
b/lldb/source/Plugins/Instruction/CMakeLists.txt
index 631c0b307cac4..46d610f261e0d 100644
--- a/lldb/source/Plugins/Instruction/CMakeLists.txt
+++ b/lldb/source/Plugins/Instruction/CMakeLists.txt
@@ -1,5 +1,6 @@
 add_subdirectory(ARM)
 add_subdirectory(ARM64)
+add_subdirectory(LoongArch)
 add_subdirectory(MIPS)
 add_subdirectory(MIPS64)
 add_subdirectory(PPC64)

diff  --git a/lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt 
b/lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt
new file mode 100644
index 0..59802ee8fa9ad
--- /dev/null
+++ b/lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt
@@ -0,0 +1,11 @@
+add_lldb_library(lldbPluginInstructionLoongArch PLUGIN
+  EmulateInstructionLoongArch.cpp
+
+  LINK_LIBS
+lldbCore
+lldbInterpreter
+lldbPluginProcessUtility
+lldbSymbol
+  LINK_COMPONENTS
+Support
+  )

diff  --git 
a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp 
b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
new file mode 100644
index 0..14ac993d9ac0f
--- /dev/null
+++ b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
@@ -0,0 +1,181 @@
+//===---EmulateInstructionLoongArch.cpp===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include 
+
+#include "EmulateInstructionLoongArch.h"
+#include "Plugins/Process/Utility/InstructionUtils.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h"
+#include "Plugins/Process/Utility/lldb-loongarch-register-enums.h"
+#include "lldb/Core/Address.h"
+#include "lldb/Core/PluginManager.h"
+#include "lldb/Interpreter/OptionValueArray.h"
+#include "lldb/Interpreter/OptionValueDictionary.h"
+#include "lldb/Symbol/UnwindPlan.h"
+#include "lldb/Utility/ArchSpec.h"
+#include "lldb/Utility/LLDBLog.h"
+#include "lldb/Utility/RegisterValue.h"
+#include "lldb/Utility/Stream.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/Support/MathExtras.h"
+
+using namespace lldb;
+using namespace lldb_private;
+
+LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionLoongArch, InstructionLoongArch)
+
+namespace lldb_private {
+
+EmulateInstructionLoongArch::Opcode *
+EmulateInstructionLoongArch::GetOpcodeForInstruction(uint32_t inst) {
+  // TODO: Add the mask of jump instruction.
+  static EmulateInstructionLoongArch::Opcode g_opcodes[] = {
+  {0x, 0x, &EmulateInstructionLoongArch::EmulateNonJMP,
+   "NonJMP"}};
+  static const size_t num_loongarch_opcodes = std::size(g_opcodes);
+
+  for (size_t i = 0; i < num_loongarch_opcodes; ++i)
+if ((g_opcodes[i].mask & inst) == g_opcodes[i].value)
+  return &g_opcodes[i];
+  return nullptr;
+}
+
+bool EmulateInstructionLoongArch::EvaluateInstruction(uint32_t options) {
+  uint32_t inst_size = m_opcode.GetByteSize();
+  uint32_t inst = m_opcode.GetOpcode32();
+  bool increase_pc = options & eEmulateInstructionOptionAutoAdvancePC;
+  bool success = false;
+
+  Opcode *opcode_data = GetOpcodeForInstruction(inst);
+  if (!opcode_data)
+return false;
+
+  lldb::addr_t old_pc = 0;
+  if (increase_pc) {
+old_pc = ReadPC(&success);
+if (!success)
+  return false;
+  }
+
+  // Call the Emulate... function.
+  if (!(this->*opcode_data->callback)(inst))
+return false;
+
+  if (increase_pc) {
+l

[Lldb-commits] [lldb] eafe2d4 - [LLDB][LoongArch] Add branch instructions for EmulateInstructionLoongArch

2022-12-16 Thread Weining Lu via lldb-commits 

Author: Hui Li
Date: 2022-12-16T17:48:37+08:00
New Revision: eafe2d4cf17b7448db5750aff79ee3bb0158f945

URL: 
https://github.com/llvm/llvm-project/commit/eafe2d4cf17b7448db5750aff79ee3bb0158f945
DIFF: 
https://github.com/llvm/llvm-project/commit/eafe2d4cf17b7448db5750aff79ee3bb0158f945.diff

LOG: [LLDB][LoongArch] Add branch instructions for EmulateInstructionLoongArch

Add conditional and unconditional branch instructions for loongarch64.
Note that this does not include floating-point branch instructions, that will 
come in a later patch.

Reviewed By: SixWeining, DavidSpickett

Differential Revision: https://reviews.llvm.org/D139833

Added: 


Modified: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h

Removed: 




diff  --git 
a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp 
b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
index 14ac993d9ac0..b37bb860254e 100644
--- a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
+++ b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
@@ -33,8 +33,30 @@ namespace lldb_private {
 
 EmulateInstructionLoongArch::Opcode *
 EmulateInstructionLoongArch::GetOpcodeForInstruction(uint32_t inst) {
-  // TODO: Add the mask of jump instruction.
+  // TODO: Add the mask for other instruction.
   static EmulateInstructionLoongArch::Opcode g_opcodes[] = {
+  {0xfc00, 0x4000, &EmulateInstructionLoongArch::EmulateBEQZ,
+   "beqz rj, offs21"},
+  {0xfc00, 0x4400, &EmulateInstructionLoongArch::EmulateBNEZ,
+   "bnez rj, offs21"},
+  {0xfc00, 0x4c00, &EmulateInstructionLoongArch::EmulateJIRL,
+   "jirl rd, rj, offs16"},
+  {0xfc00, 0x5000, &EmulateInstructionLoongArch::EmulateB,
+   " b  offs26"},
+  {0xfc00, 0x5400, &EmulateInstructionLoongArch::EmulateBL,
+   "bl  offs26"},
+  {0xfc00, 0x5800, &EmulateInstructionLoongArch::EmulateBEQ,
+   "beq  rj, rd, offs16"},
+  {0xfc00, 0x5c00, &EmulateInstructionLoongArch::EmulateBNE,
+   "bne  rj, rd, offs16"},
+  {0xfc00, 0x6000, &EmulateInstructionLoongArch::EmulateBLT,
+   "blt  rj, rd, offs16"},
+  {0xfc00, 0x6400, &EmulateInstructionLoongArch::EmulateBGE,
+   "bge  rj, rd, offs16"},
+  {0xfc00, 0x6800, &EmulateInstructionLoongArch::EmulateBLTU,
+   "bltu rj, rd, offs16"},
+  {0xfc00, 0x6c00, &EmulateInstructionLoongArch::EmulateBGEU,
+   "bgeu rj, rd, offs16"},
   {0x, 0x, &EmulateInstructionLoongArch::EmulateNonJMP,
"NonJMP"}};
   static const size_t num_loongarch_opcodes = std::size(g_opcodes);
@@ -176,6 +198,339 @@ bool EmulateInstructionLoongArch::SupportsThisArch(const 
ArchSpec &arch) {
   return arch.GetTriple().isLoongArch();
 }
 
+bool EmulateInstructionLoongArch::EmulateBEQZ(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateBEQZ64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateBNEZ(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateBNEZ64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateJIRL(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateJIRL64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateB(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateB64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateBL(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateBL64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateBEQ(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateBEQ64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateBNE(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateJIRL64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateBLT(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateBLT64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateBGE(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateBGE64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateBLTU(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateBLTU64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateBGEU(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateBGEU64(inst);
+  else
+return false;
+}
+
 bool EmulateInstructionLoongArch::EmulateNonJMP(uint32_t inst) { return false; 
}
 
+// beqz rj, offs21
+// if GR[rj] == 0:
+//   PC = PC + SignExtend({offs21, 2'b0}, GRLEN)
+bool EmulateInstructionLoongArch::EmulateBEQZ64(uint32_t inst) {
+  uint64_t next_pc, imm_sign_extend;
+

[Lldb-commits] [lldb] 3473c10 - [LLDB][LoongArch] Optimize EmulateInstructionLoongArch related code

2022-12-27 Thread Weining Lu via lldb-commits 

Author: Hui Li
Date: 2022-12-28T09:13:05+08:00
New Revision: 3473c1093aa03eb51fb756e05f7ed48907187ae0

URL: 
https://github.com/llvm/llvm-project/commit/3473c1093aa03eb51fb756e05f7ed48907187ae0
DIFF: 
https://github.com/llvm/llvm-project/commit/3473c1093aa03eb51fb756e05f7ed48907187ae0.diff

LOG: [LLDB][LoongArch] Optimize EmulateInstructionLoongArch related code

This is a code optimization patch that does not include feature additions
or deletions.

Reviewed By: SixWeining

Differential Revision: https://reviews.llvm.org/D140616

Added: 


Modified: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp

Removed: 




diff  --git 
a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp 
b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
index b37bb860254eb..a17d8609b0d55 100644
--- a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
+++ b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
@@ -199,80 +199,47 @@ bool EmulateInstructionLoongArch::SupportsThisArch(const 
ArchSpec &arch) {
 }
 
 bool EmulateInstructionLoongArch::EmulateBEQZ(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBEQZ64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBEQZ64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBNEZ(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBNEZ64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBNEZ64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateJIRL(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateJIRL64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateJIRL64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateB(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateB64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateB64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBL(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBL64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBL64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBEQ(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBEQ64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBEQ64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBNE(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateJIRL64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBNE64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBLT(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBLT64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBLT64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBGE(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBGE64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBGE64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBLTU(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBLTU64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBLTU64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBGEU(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBGEU64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBGEU64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateNonJMP(uint32_t inst) { return false; 
}
@@ -281,20 +248,17 @@ bool EmulateInstructionLoongArch::EmulateNonJMP(uint32_t 
inst) { return false; }
 // if GR[rj] == 0:
 //   PC = PC + SignExtend({offs21, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBEQZ64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
-  uint64_t rj_val;
   uint64_t pc = ReadPC(&success);
   if (!success)
 return false;
   uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0) << 16);
-  rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
+  uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
 return false;
   if (rj_val == 0) {
-imm_sign_extend = llvm::SignExtend64<23>(offs21 << 2);
-next_pc = pc + imm_sign_extend;
+uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2);
 return WritePC(next_pc);
   } else
 return WritePC(pc + 4);
@@ -304,20 +268,17 @@ bool EmulateInstructionLoongArch::EmulateBEQZ64(uint32_t 
inst) {
 // if GR[rj] != 0:
 //   PC = PC + SignExtend({offs21, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBNEZ64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
-  uint64_t rj_val;
   uint64_t pc = ReadPC(&success);
   if (!success)
 return false;
   uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0)

[Lldb-commits] [lldb] d52582b - [LLDB][LoongArch] ObjectFile: add a case for `EM_LOONGARCH`

2023-01-12 Thread Weining Lu via lldb-commits 

Author: Hui Li
Date: 2023-01-13T10:17:31+08:00
New Revision: d52582b6b7dfff5538008ad1ebb141da283d9206

URL: 
https://github.com/llvm/llvm-project/commit/d52582b6b7dfff5538008ad1ebb141da283d9206
DIFF: 
https://github.com/llvm/llvm-project/commit/d52582b6b7dfff5538008ad1ebb141da283d9206.diff

LOG: [LLDB][LoongArch] ObjectFile: add a case for `EM_LOONGARCH`

This adds the jump slot mapping for LoongArch. This is a simple
change that ensures lldb running properly.

 Note that this problem was found only when CMake variables
 "DLLVM_ENABLE_ASSERTIONS=ON" is selected.

Without this patch,

```
$ build/bin/lldb  test

../ELFHeader::GetRelocationJumpSlotType() const: Assertion `false && 
"architecture not supported"' fail

```
With this patch

```
$ build/bin/lldb  test
(lldb) target create "test"
Current executable set to '../test' (loongarch64).

```

Reviewed By: SixWeining, DavidSpickett

Differential Revision: https://reviews.llvm.org/D141245

Added: 


Modified: 
lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp

Removed: 




diff  --git a/lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp 
b/lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp
index abda0cd0e9a38..a6e385f70709b 100644
--- a/lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp
+++ b/lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp
@@ -211,6 +211,9 @@ unsigned ELFHeader::GetRelocationJumpSlotType() const {
   case EM_RISCV:
 slot = R_RISCV_JUMP_SLOT;
 break;
+  case EM_LOONGARCH:
+slot = R_LARCH_JUMP_SLOT;
+break;
   }
 
   return slot;



___
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[Lldb-commits] [lldb] 1eaadae - [LLDB][LoongArch] Add unittests for EmulateInstructionLoongArch

2023-01-12 Thread Weining Lu via lldb-commits 

Author: Hui Li
Date: 2023-01-13T10:17:55+08:00
New Revision: 1eaadaea5090f88d4e26331a5046a1a07f15a6ea

URL: 
https://github.com/llvm/llvm-project/commit/1eaadaea5090f88d4e26331a5046a1a07f15a6ea
DIFF: 
https://github.com/llvm/llvm-project/commit/1eaadaea5090f88d4e26331a5046a1a07f15a6ea.diff

LOG: [LLDB][LoongArch] Add unittests for EmulateInstructionLoongArch

Add unit tests For EmulateInstructionLoongArch existing branch instruction.
Add 19 test cases in total.

Without this patch:

```
$ ninja check-lldb-unit
[0/1] Running lldb unit test suite

Testing Time: 10.55s
  Passed: 1025
```

With this patch:

```
$ ninja check-lldb-unit
[0/1] Running lldb unit test suite

Testing Time: 10.45s
  Passed: 1044
```

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D140386

Added: 
lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp

Modified: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
lldb/unittests/Instruction/CMakeLists.txt

Removed: 




diff  --git 
a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp 
b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
index fb0317acc91af..c17da8b25aa31 100644
--- a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
+++ b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
@@ -68,6 +68,16 @@ 
EmulateInstructionLoongArch::GetOpcodeForInstruction(uint32_t inst) {
   return nullptr;
 }
 
+bool EmulateInstructionLoongArch::TestExecute(uint32_t inst) {
+  Opcode *opcode_data = GetOpcodeForInstruction(inst);
+  if (!opcode_data)
+return false;
+  // Call the Emulate... function.
+  if (!(this->*opcode_data->callback)(inst))
+return false;
+  return true;
+}
+
 bool EmulateInstructionLoongArch::EvaluateInstruction(uint32_t options) {
   uint32_t inst_size = m_opcode.GetByteSize();
   uint32_t inst = m_opcode.GetOpcode32();

diff  --git 
a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h 
b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
index e5193dfad7db0..15da499261b05 100644
--- a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
+++ b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
@@ -60,6 +60,7 @@ class EmulateInstructionLoongArch : public EmulateInstruction 
{
   lldb::addr_t ReadPC(bool *success);
   bool WritePC(lldb::addr_t pc);
   bool IsLoongArch64() { return m_arch_subtype == llvm::Triple::loongarch64; }
+  bool TestExecute(uint32_t inst);
 
 private:
   struct Opcode {

diff  --git a/lldb/unittests/Instruction/CMakeLists.txt 
b/lldb/unittests/Instruction/CMakeLists.txt
index 1d011d5f7c5b8..7b1f8afce6b29 100644
--- a/lldb/unittests/Instruction/CMakeLists.txt
+++ b/lldb/unittests/Instruction/CMakeLists.txt
@@ -1,5 +1,6 @@
 add_lldb_unittest(EmulatorTests
   ARM64/TestAArch64Emulator.cpp
+  LoongArch/TestLoongArchEmulator.cpp
   RISCV/TestRISCVEmulator.cpp
 
   LINK_LIBS
@@ -7,8 +8,9 @@ add_lldb_unittest(EmulatorTests
 lldbSymbol
 lldbTarget
 lldbPluginInstructionARM64
+lldbPluginInstructionLoongArch
 lldbPluginInstructionRISCV
 
   LINK_COMPONENTS
 Support
-  )
\ No newline at end of file
+  )

diff  --git a/lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp 
b/lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp
new file mode 100644
index 0..af16559161507
--- /dev/null
+++ b/lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp
@@ -0,0 +1,230 @@
+//===-- TestLoongArchEmulator.cpp 
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "lldb/Core/Address.h"
+#include "lldb/Core/Disassembler.h"
+#include "lldb/Core/PluginManager.h"
+#include "lldb/Target/ExecutionContext.h"
+#include "lldb/Utility/ArchSpec.h"
+#include "lldb/Utility/RegisterValue.h"
+#include "gtest/gtest.h"
+
+#include "Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h"
+#include "Plugins/Process/Utility/lldb-loongarch-register-enums.h"
+
+using namespace llvm;
+using namespace lldb;
+using namespace lldb_private;
+
+#define GEN_BCOND_TEST(bit, name, rj_val, rd_val_branched, rd_val_continued)   
\
+  TEST_F(LoongArch##bit##EmulatorTester, test##name##branched) {   
\
+testBcondBranch(this, name, true, rj_val, rd_val_branched);
\
+  }
\
+

[Lldb-commits] [lldb] b1f4f06 - [LLDB][LoongArch] Delete the s9 register alias definition

2023-01-13 Thread Weining Lu via lldb-commits 

Author: Hui Li
Date: 2023-01-14T09:22:14+08:00
New Revision: b1f4f06dede54627c546d0e7f21e7e72295f280b

URL: 
https://github.com/llvm/llvm-project/commit/b1f4f06dede54627c546d0e7f21e7e72295f280b
DIFF: 
https://github.com/llvm/llvm-project/commit/b1f4f06dede54627c546d0e7f21e7e72295f280b.diff

LOG: [LLDB][LoongArch] Delete the s9 register alias definition

In RegisterInfos_loongarch64.h, r22 is defined twice. Having an extra array
member causes problems reading and writing registers defined after r22. So,
for r22, keep the alias fp, delete the s9 alias.

The PC register is incorrectly accessed when the step command is executed.
The step command behavior is incorrect.

This test reflects this problem:

```
loongson@linux:~$ cat test.c

 #include 

int func(int a) {
  return a + 1;
}

int main(int argc, char const *argv[]) {
  func(10);
  return 0;
}

loongson@linux:~$ clang -g test.c  -o test

```

Without this patch:
```
loongson@linux:~$ llvm-project/llvm/build/bin/lldb test
(lldb) target create "test"
Current executable set to '/home/loongson/test' (loongarch64).
(lldb) b main
Breakpoint 1: where = test`main + 40 at test.c:8:3, address = 0x00012668
(lldb) r
Process 278049 launched: '/home/loongson/test' (loongarch64)
Process 278049 stopped
* thread #1, name = 'test', stop reason = breakpoint 1.1
frame #0: 0x00012668 test`main(argc=1, argv=0x7fff72a8) at 
test.c:8:3
   5}
   6
   7int main(int argc, char const *argv[]) {
-> 8  func(10);
   9  return 0;
   10   }
   11
(lldb) s
Process 278049 stopped
* thread #1, name = 'test', stop reason = step in
frame #0: 0x00012670 test`main(argc=1, argv=0x7fff72a8) at 
test.c:9:3
   6
   7int main(int argc, char const *argv[]) {
   8  func(10);
-> 9  return 0;
   10   }

```

With this patch:

```
loongson@linux:~$ llvm-project/llvm/build/bin/lldb test
(lldb) target create "test"
Current executable set to '/home/loongson/test' (loongarch64).
(lldb) b main
Breakpoint 1: where = test`main + 40 at test.c:8:3, address = 0x00012668
(lldb) r
Process 278632 launched: '/home/loongson/test' (loongarch64)
Process 278632 stopped
* thread #1, name = 'test', stop reason = breakpoint 1.1
frame #0: 0x00012668 test`main(argc=1, argv=0x7fff72a8) at 
test.c:8:3
   5}
   6
   7int main(int argc, char const *argv[]) {
-> 8  func(10);
   9  return 0;
   10   }
   11
(lldb) s
Process 278632 stopped
* thread #1, name = 'test', stop reason = step in
frame #0: 0x00012624 test`func(a=10) at test.c:4:10
   1 #include 
   2
   3int func(int a) {
-> 4  return a + 1;
   5}

```

Reviewed By: SixWeining, DavidSpickett

Differential Revision: https://reviews.llvm.org/D140615

Added: 


Modified: 
lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
lldb/source/Utility/LoongArch_DWARF_Registers.h

Removed: 




diff  --git a/lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h 
b/lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
index 723881bb92750..27f2bac22dd51 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
@@ -100,7 +100,6 @@ static lldb_private::RegisterInfo 
g_register_infos_loongarch64[] = {
 DEFINE_GPR64_ALT(r20, t8, LLDB_INVALID_REGNUM),
 DEFINE_GPR64(r21, LLDB_INVALID_REGNUM),
 DEFINE_GPR64_ALT(r22, fp, LLDB_REGNUM_GENERIC_FP),
-DEFINE_GPR64_ALT(r22, s9, LLDB_REGNUM_GENERIC_FP),
 DEFINE_GPR64_ALT(r23, s0, LLDB_INVALID_REGNUM),
 DEFINE_GPR64_ALT(r24, s1, LLDB_INVALID_REGNUM),
 DEFINE_GPR64_ALT(r25, s2, LLDB_INVALID_REGNUM),

diff  --git 
a/lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h 
b/lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
index d53e8ce1b3f7d..f55c807f86c00 100644
--- a/lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
+++ b/lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
@@ -85,7 +85,6 @@ enum {
   gpr_t7_loongarch = gpr_r19_loongarch,
   gpr_t8_loongarch = gpr_r20_loongarch,
   gpr_fp_loongarch = gpr_r22_loongarch,
-  gpr_s9_loongarch = gpr_r22_loongarch,
   gpr_s0_loongarch = gpr_r23_loongarch,
   gpr_s1_loongarch = gpr_r24_loongarch,
   gpr_s2_loongarch = gpr_r25_loongarch,

diff  --git a/lldb/source/Utility/LoongArch_DWARF_Registers.h 
b/lldb/source/Utility/LoongArch_DWARF_Registers.h
index b9c1928531442..34e40a066051e 100644
--- a/lldb/source/Utility/LoongArch_DWARF_Registers.h
+++ b/lldb/source/Utility/LoongArch_DWARF_Registers.h
@@ -128,7 +128,6 @@ enum {
   dwarf_gpr_t7 = dwarf_gpr_r19,
   dwarf_gpr_t8 = dwarf_gpr_r20,
   dwarf_gpr_fp = dwarf_gpr_r22,
-  dwarf_gpr_s9 = dwarf_gpr_r22,
   dwarf_gpr_s0 = dwarf_gpr_r23,
   dwar

[Lldb-commits] [lldb] b7ae576 - [LLDB][LoongArch] Add FP branch instructions for EmulateInstructionLoongArch

2023-01-13 Thread Weining Lu via lldb-commits 

Author: Hui Li
Date: 2023-01-14T09:22:18+08:00
New Revision: b7ae5762a110ee7c28b218b4ed4e3e24b2b3c64d

URL: 
https://github.com/llvm/llvm-project/commit/b7ae5762a110ee7c28b218b4ed4e3e24b2b3c64d
DIFF: 
https://github.com/llvm/llvm-project/commit/b7ae5762a110ee7c28b218b4ed4e3e24b2b3c64d.diff

LOG: [LLDB][LoongArch] Add FP branch instructions for 
EmulateInstructionLoongArch

Add floating-point branch Instructions for EmulateInstructionLoongArch and
add relevant unit tests.

Without this patch:

```
$ ninja check-lldb-unit
[0/1] Running lldb unit test suite

Testing Time: 10.45s
  Passed: 1044
```

With this patch:

```
$ ninja check-lldb-unit
[0/1] Running lldb unit test suite

Testing Time: 10.20s
  Passed: 1048

```

Reviewed By: SixWeining, MaskRay, DavidSpickett

Differential Revision: https://reviews.llvm.org/D140759

Added: 


Modified: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp

Removed: 




diff  --git 
a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp 
b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
index c17da8b25aa31..adfd57dff07c0 100644
--- a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
+++ b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
@@ -40,6 +40,10 @@ 
EmulateInstructionLoongArch::GetOpcodeForInstruction(uint32_t inst) {
"beqz rj, offs21"},
   {0xfc00, 0x4400, &EmulateInstructionLoongArch::EmulateBNEZ,
"bnez rj, offs21"},
+  {0xfc000300, 0x4800, &EmulateInstructionLoongArch::EmulateBCEQZ,
+   "bceqz cj, offs21"},
+  {0xfc000300, 0x48000100, &EmulateInstructionLoongArch::EmulateBCNEZ,
+   "bcnez cj, offs21"},
   {0xfc00, 0x4c00, &EmulateInstructionLoongArch::EmulateJIRL,
"jirl rd, rj, offs16"},
   {0xfc00, 0x5000, &EmulateInstructionLoongArch::EmulateB,
@@ -217,6 +221,14 @@ bool EmulateInstructionLoongArch::EmulateBNEZ(uint32_t 
inst) {
   return IsLoongArch64() ? EmulateBNEZ64(inst) : false;
 }
 
+bool EmulateInstructionLoongArch::EmulateBCEQZ(uint32_t inst) {
+  return IsLoongArch64() ? EmulateBCEQZ64(inst) : false;
+}
+
+bool EmulateInstructionLoongArch::EmulateBCNEZ(uint32_t inst) {
+  return IsLoongArch64() ? EmulateBCNEZ64(inst) : false;
+}
+
 bool EmulateInstructionLoongArch::EmulateJIRL(uint32_t inst) {
   return IsLoongArch64() ? EmulateJIRL64(inst) : false;
 }
@@ -295,6 +307,50 @@ bool EmulateInstructionLoongArch::EmulateBNEZ64(uint32_t 
inst) {
 return WritePC(pc + 4);
 }
 
+// bceqz cj, offs21
+// if CFR[cj] == 0:
+// PC = PC + SignExtend({offs21, 2'b0}, GRLEN)
+bool EmulateInstructionLoongArch::EmulateBCEQZ64(uint32_t inst) {
+  bool success = false;
+  uint32_t cj = Bits32(inst, 7, 5) + fpr_fcc0_loongarch;
+  uint64_t pc = ReadPC(&success);
+  if (!success)
+return false;
+  uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0) << 16);
+  uint8_t cj_val =
+  (uint8_t)ReadRegisterUnsigned(eRegisterKindLLDB, cj, 0, &success);
+  if (!success)
+return false;
+  if (cj_val == 0) {
+uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2);
+return WritePC(next_pc);
+  } else
+return WritePC(pc + 4);
+  return false;
+}
+
+// bcnez cj, offs21
+// if CFR[cj] != 0:
+// PC = PC + SignExtend({offs21, 2'b0}, GRLEN)
+bool EmulateInstructionLoongArch::EmulateBCNEZ64(uint32_t inst) {
+  bool success = false;
+  uint32_t cj = Bits32(inst, 7, 5) + fpr_fcc0_loongarch;
+  uint64_t pc = ReadPC(&success);
+  if (!success)
+return false;
+  uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0) << 16);
+  uint8_t cj_val =
+  (uint8_t)ReadRegisterUnsigned(eRegisterKindLLDB, cj, 0, &success);
+  if (!success)
+return false;
+  if (cj_val != 0) {
+uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2);
+return WritePC(next_pc);
+  } else
+return WritePC(pc + 4);
+  return false;
+}
+
 // jirl rd, rj, offs16
 // GR[rd] = PC + 4
 // PC = GR[rj] + SignExtend({offs16, 2'b0}, GRLEN)

diff  --git 
a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h 
b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
index 15da499261b05..e03356244b476 100644
--- a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
+++ b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
@@ -75,6 +75,8 @@ class EmulateInstructionLoongArch : public EmulateInstruction 
{
 
   bool EmulateBEQZ(uint32_t inst);
   bool EmulateBNEZ(uint32_t inst);
+  bool EmulateBCEQZ(uint32_t inst);
+  bool EmulateBCNEZ(uint32_t inst);
   bool EmulateJIRL(uint32_t inst);
   bool EmulateB(uint32_t inst);
   bool EmulateBL(uint32_t inst);
@@ -88,6 +9

[Lldb-commits] [lldb] 5273168 - [lldb] Fix typo in LoongArch unittest

2023-02-06 Thread Weining Lu via lldb-commits 

Author: Weining Lu
Date: 2023-02-07T15:09:04+08:00
New Revision: 52731683c9a2f4f8138c317201ea68eaedca7225

URL: 
https://github.com/llvm/llvm-project/commit/52731683c9a2f4f8138c317201ea68eaedca7225
DIFF: 
https://github.com/llvm/llvm-project/commit/52731683c9a2f4f8138c317201ea68eaedca7225.diff

LOG: [lldb] Fix typo in LoongArch unittest

Added: 


Modified: 
lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp

Removed: 




diff  --git a/lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp 
b/lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp
index 376af1f015905..f9372ded0133b 100644
--- a/lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp
+++ b/lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp
@@ -170,7 +170,7 @@ TEST_F(LoongArch64EmulatorTester, testJIRL) {
   addr_t old_pc = 0x12000600;
   WritePC(old_pc);
   // JIRL r1, r12, 0x10
-  // | 31   26 | 25   15 | 9   5 | 4   0 |
+  // | 31   26 | 25   10 | 9   5 | 4   0 |
   // | 0 1 0 0 1 1 | 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 | 0 1 1 0 0 | 0 0 0 0 1 |
   uint32_t inst = 0b0100110001011001;
   uint32_t offs16 = 0x10;



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[Lldb-commits] [lldb] c2c9387 - [LLDB][ObjectFileELF] Support LoongArch64 in ApplyReloctions

2023-03-13 Thread Weining Lu via lldb-commits 

Author: Weining Lu
Date: 2023-03-13T16:23:09+08:00
New Revision: c2c93873d1912a62685818ec9f4e020ee7a1c616

URL: 
https://github.com/llvm/llvm-project/commit/c2c93873d1912a62685818ec9f4e020ee7a1c616
DIFF: 
https://github.com/llvm/llvm-project/commit/c2c93873d1912a62685818ec9f4e020ee7a1c616.diff

LOG: [LLDB][ObjectFileELF] Support LoongArch64 in ApplyReloctions

Currently ApplyReloctions() deals with different archs' relocation types
together (in a single `switch() {..}`). I think it is incorrect because
different relocation types of different archs may have same enum values.

For example:
`R_LARCH_32` and `R_X86_64_64` are both `1`;
`R_LARCH_64` and `R_X86_64_PC32` are both `2`.

This patch handles each arch in seperate `switch()` to solve the enum
values conflict issue.

And a new test is added for LoongArch64.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D145462

Added: 
lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml

Modified: 
lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp

Removed: 




diff  --git a/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp 
b/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
index 9131367bf2230..d91b350af6fee 100644
--- a/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ b/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -2593,6 +2593,50 @@ ObjectFileELF::ParseTrampolineSymbols(Symtab 
*symbol_table, user_id_t start_id,
  rel_data, symtab_data, strtab_data);
 }
 
+static void ApplyELF64ABS64Relocation(Symtab *symtab, ELFRelocation &rel,
+  DataExtractor &debug_data,
+  Section *rel_section) {
+  Symbol *symbol = symtab->FindSymbolByID(ELFRelocation::RelocSymbol64(rel));
+  if (symbol) {
+addr_t value = symbol->GetAddressRef().GetFileAddress();
+DataBufferSP &data_buffer_sp = debug_data.GetSharedDataBuffer();
+// ObjectFileELF creates a WritableDataBuffer in CreateInstance.
+WritableDataBuffer *data_buffer =
+llvm::cast(data_buffer_sp.get());
+uint64_t *dst = reinterpret_cast(
+data_buffer->GetBytes() + rel_section->GetFileOffset() +
+ELFRelocation::RelocOffset64(rel));
+uint64_t val_offset = value + ELFRelocation::RelocAddend64(rel);
+memcpy(dst, &val_offset, sizeof(uint64_t));
+  }
+}
+
+static void ApplyELF64ABS32Relocation(Symtab *symtab, ELFRelocation &rel,
+  DataExtractor &debug_data,
+  Section *rel_section, bool is_signed) {
+  Symbol *symbol = symtab->FindSymbolByID(ELFRelocation::RelocSymbol64(rel));
+  if (symbol) {
+addr_t value = symbol->GetAddressRef().GetFileAddress();
+value += ELFRelocation::RelocAddend32(rel);
+if ((!is_signed && (value > UINT32_MAX)) ||
+(is_signed &&
+ ((int64_t)value > INT32_MAX || (int64_t)value < INT32_MIN))) {
+  Log *log = GetLog(LLDBLog::Modules);
+  LLDB_LOGF(log, "Failed to apply debug info relocations");
+  return;
+}
+uint32_t truncated_addr = (value & 0x);
+DataBufferSP &data_buffer_sp = debug_data.GetSharedDataBuffer();
+// ObjectFileELF creates a WritableDataBuffer in CreateInstance.
+WritableDataBuffer *data_buffer =
+llvm::cast(data_buffer_sp.get());
+uint32_t *dst = reinterpret_cast(
+data_buffer->GetBytes() + rel_section->GetFileOffset() +
+ELFRelocation::RelocOffset32(rel));
+memcpy(dst, &truncated_addr, sizeof(uint32_t));
+  }
+}
+
 unsigned ObjectFileELF::ApplyRelocations(
 Symtab *symtab, const ELFHeader *hdr, const ELFSectionHeader *rel_hdr,
 const ELFSectionHeader *symtab_hdr, const ELFSectionHeader *debug_hdr,
@@ -2656,55 +2700,50 @@ unsigned ObjectFileELF::ApplyRelocations(
  reloc_type(rel));
   }
 } else {
-  switch (reloc_type(rel)) {
-  case R_AARCH64_ABS64:
-  case R_X86_64_64: {
-symbol = symtab->FindSymbolByID(reloc_symbol(rel));
-if (symbol) {
-  addr_t value = symbol->GetAddressRef().GetFileAddress();
-  DataBufferSP &data_buffer_sp = debug_data.GetSharedDataBuffer();
-  // ObjectFileELF creates a WritableDataBuffer in CreateInstance.
-  WritableDataBuffer *data_buffer =
-  llvm::cast(data_buffer_sp.get());
-  uint64_t *dst = reinterpret_cast(
-  data_buffer->GetBytes() + rel_section->GetFileOffset() +
-  ELFRelocation::RelocOffset64(rel));
-  uint64_t val_offset = value + ELFRelocation::RelocAddend64(rel);
-  memcpy(dst, &val_offset, sizeof(uint64_t));
+  switch (hdr->e_machine) {
+  case llvm::ELF::EM_AARCH64:
+switch (reloc_type(rel)) {
+case R_AARCH64_ABS64:
+  ApplyELF64ABS64Relocation(symtab, rel, debug_data, rel_section);
+

[Lldb-commits] [lldb] 174a38f - [LLDB][ObjectFileELF] Correct the return type of RelocOffset64 and RelocAddend64

2023-03-13 Thread Weining Lu via lldb-commits 

Author: Weining Lu
Date: 2023-03-13T16:23:10+08:00
New Revision: 174a38f9c3167573e060493b94135cf453d27879

URL: 
https://github.com/llvm/llvm-project/commit/174a38f9c3167573e060493b94135cf453d27879
DIFF: 
https://github.com/llvm/llvm-project/commit/174a38f9c3167573e060493b94135cf453d27879.diff

LOG: [LLDB][ObjectFileELF] Correct the return type of RelocOffset64 and 
RelocAddend64

According to `/usr/include/elf.h` and 
`lldb/source/Plugins/ObjectFile/ELF/ELFHeader.h`.
For ELF64 relocation, types of `offset` and `addend` should be `elf_addr` and 
`elf_sxword`.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D145550

Added: 


Modified: 
lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml

Removed: 




diff  --git a/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp 
b/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
index d91b350af6fee..6281cfaa121b7 100644
--- a/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ b/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -116,11 +116,11 @@ class ELFRelocation {
 
   static unsigned RelocOffset32(const ELFRelocation &rel);
 
-  static unsigned RelocOffset64(const ELFRelocation &rel);
+  static elf_addr RelocOffset64(const ELFRelocation &rel);
 
   static unsigned RelocAddend32(const ELFRelocation &rel);
 
-  static unsigned RelocAddend64(const ELFRelocation &rel);
+  static elf_sxword RelocAddend64(const ELFRelocation &rel);
 
   bool IsRela() { return (reloc.is()); }
 
@@ -192,7 +192,7 @@ unsigned ELFRelocation::RelocOffset32(const ELFRelocation 
&rel) {
 return rel.reloc.get()->r_offset;
 }
 
-unsigned ELFRelocation::RelocOffset64(const ELFRelocation &rel) {
+elf_addr ELFRelocation::RelocOffset64(const ELFRelocation &rel) {
   if (rel.reloc.is())
 return rel.reloc.get()->r_offset;
   else
@@ -206,7 +206,7 @@ unsigned ELFRelocation::RelocAddend32(const ELFRelocation 
&rel) {
 return rel.reloc.get()->r_addend;
 }
 
-unsigned ELFRelocation::RelocAddend64(const ELFRelocation &rel) {
+elf_sxword  ELFRelocation::RelocAddend64(const ELFRelocation &rel) {
   if (rel.reloc.is())
 return 0;
   else

diff  --git a/lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml 
b/lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
index 1be63870343bb..8fcc4d343de63 100644
--- a/lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
+++ b/lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
@@ -6,9 +6,9 @@
 # CHECK:  Name: .debug_info
 # CHECK:  Data:  (
 ## Before relocation:
-##:   
+##:     
 ## After relocation:
-# CHECK-NEXT: : 3412 7856 
+# CHECK-NEXT: : 3412 88776655 44332211 8899AABB CCDDEEFF
 # CHECK-NEXT: )
 
 --- !ELF
@@ -22,7 +22,7 @@ Sections:
 Type:SHT_PROGBITS
   - Name:.debug_info
 Type:SHT_PROGBITS
-Content: 
+Content: 
   - Name:.rela.debug_info
 Type:SHT_RELA
 Info:.debug_info
@@ -34,7 +34,11 @@ Sections:
   - Offset:  0x0004
 Symbol:  .debug_str
 Type:R_LARCH_64
-Addend:  0x5678
+Addend:  0x1122334455667788
+  - Offset:  0x000C
+Symbol:  .debug_str
+Type:R_LARCH_64
+Addend:  0xFFEEDDCCBBAA9988
 Symbols:
   - Name:.debug_str
 Type:STT_SECTION



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[Lldb-commits] [lldb] 27705f4 - [LLDB][ObjectFileELF] Correct the return type of Reloc{Offset, Addend}32

2023-03-13 Thread Weining Lu via lldb-commits 

Author: Weining Lu
Date: 2023-03-13T16:23:10+08:00
New Revision: 27705f456a3a03e7c935f7f573c05f742df4f272

URL: 
https://github.com/llvm/llvm-project/commit/27705f456a3a03e7c935f7f573c05f742df4f272
DIFF: 
https://github.com/llvm/llvm-project/commit/27705f456a3a03e7c935f7f573c05f742df4f272.diff

LOG: [LLDB][ObjectFileELF] Correct the return type of Reloc{Offset,Addend}32

This is a follow up of D145550.

I think Reloc{Type,Symbol}{32,64} can keep unchanged as they are not
directly returning a field of the ELFRel[a] struct.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D145571

Added: 


Modified: 
lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp

Removed: 




diff  --git a/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp 
b/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
index 6281cfaa121b7..5b75738e070c3 100644
--- a/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ b/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -114,11 +114,11 @@ class ELFRelocation {
 
   static unsigned RelocSymbol64(const ELFRelocation &rel);
 
-  static unsigned RelocOffset32(const ELFRelocation &rel);
+  static elf_addr RelocOffset32(const ELFRelocation &rel);
 
   static elf_addr RelocOffset64(const ELFRelocation &rel);
 
-  static unsigned RelocAddend32(const ELFRelocation &rel);
+  static elf_sxword RelocAddend32(const ELFRelocation &rel);
 
   static elf_sxword RelocAddend64(const ELFRelocation &rel);
 
@@ -185,7 +185,7 @@ unsigned ELFRelocation::RelocSymbol64(const ELFRelocation 
&rel) {
 return ELFRela::RelocSymbol64(*rel.reloc.get());
 }
 
-unsigned ELFRelocation::RelocOffset32(const ELFRelocation &rel) {
+elf_addr ELFRelocation::RelocOffset32(const ELFRelocation &rel) {
   if (rel.reloc.is())
 return rel.reloc.get()->r_offset;
   else
@@ -199,7 +199,7 @@ elf_addr ELFRelocation::RelocOffset64(const ELFRelocation 
&rel) {
 return rel.reloc.get()->r_offset;
 }
 
-unsigned ELFRelocation::RelocAddend32(const ELFRelocation &rel) {
+elf_sxword ELFRelocation::RelocAddend32(const ELFRelocation &rel) {
   if (rel.reloc.is())
 return 0;
   else



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[Lldb-commits] [lldb] e9c3461 - [LLDB][LoongArch] Add LoongArch ArchSpec and subtype detection

2022-11-01 Thread Weining Lu via lldb-commits 

Author: Tiezhu Yang
Date: 2022-11-01T17:06:04+08:00
New Revision: e9c34618c904e0b22b6c9fec1f4a410e7484b8d3

URL: 
https://github.com/llvm/llvm-project/commit/e9c34618c904e0b22b6c9fec1f4a410e7484b8d3
DIFF: 
https://github.com/llvm/llvm-project/commit/e9c34618c904e0b22b6c9fec1f4a410e7484b8d3.diff

LOG: [LLDB][LoongArch] Add LoongArch ArchSpec and subtype detection

Define LoongArch architecture subtypes, add the LoongArch ArchSpec bits,
and inspect the ELF header to detect the right subtype based on ELF class.

Here is a simple test:

```
[loongson@linux ~]$ cat hello.c

int main()
{
printf("Hello, World!\n");
return 0;
}
[loongson@linux ~]$ clang hello.c -g -o hello
```

Without this patch:

```
[loongson@linux ~]$ llvm-project/llvm/build/bin/lldb hello
(lldb) target create "hello"
error: '/home/loongson/hello' doesn't contain any 'host' platform 
architectures: unknown
```

With this patch:

```
[loongson@linux ~]$ llvm-project/llvm/build/bin/lldb hello
(lldb) target create "hello"
Current executable set to '/home/loongson/hello' (loongarch64).
(lldb) run
Process 735167 launched: '/home/loongson/hello' (loongarch64)
Hello, World!
Process 735167 exited with status = 0 (0x)
(lldb) quit
[loongson@linux ~]$ llvm-project/llvm/build/bin/llvm-lit 
llvm-project/lldb/test/Shell/ObjectFile/ELF/loongarch-arch.yaml
llvm-lit: /home/loongson/llvm-project/llvm/utils/lit/lit/llvm/config.py:456: 
note: using clang: /home/loongson/llvm-project/llvm/build/bin/clang
-- Testing: 1 tests, 1 workers --
PASS: lldb-shell :: ObjectFile/ELF/loongarch-arch.yaml (1 of 1)

Testing Time: 0.09s
  Passed: 1
```

Reviewed By: SixWeining, xen0n, DavidSpickett

Differential Revision: https://reviews.llvm.org/D137057

Added: 
lldb/test/Shell/ObjectFile/ELF/loongarch-arch.yaml

Modified: 
lldb/include/lldb/Utility/ArchSpec.h
lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
lldb/source/Utility/ArchSpec.cpp

Removed: 




diff  --git a/lldb/include/lldb/Utility/ArchSpec.h 
b/lldb/include/lldb/Utility/ArchSpec.h
index ae210a6d7bf17..371607175b1dd 100644
--- a/lldb/include/lldb/Utility/ArchSpec.h
+++ b/lldb/include/lldb/Utility/ArchSpec.h
@@ -108,6 +108,12 @@ class ArchSpec {
 eRISCVSubType_riscv64,
   };
 
+  enum LoongArchSubType {
+eLoongArchSubType_unknown,
+eLoongArchSubType_loongarch32,
+eLoongArchSubType_loongarch64,
+  };
+
   enum Core {
 eCore_arm_generic,
 eCore_arm_armv4,
@@ -204,6 +210,9 @@ class ArchSpec {
 eCore_riscv32,
 eCore_riscv64,
 
+eCore_loongarch32,
+eCore_loongarch64,
+
 eCore_uknownMach32,
 eCore_uknownMach64,
 

diff  --git a/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp 
b/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
index af1b0930c1b7f..cf1b375001d62 100644
--- a/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ b/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -320,6 +320,18 @@ static uint32_t ppc64VariantFromElfFlags(const 
elf::ELFHeader &header) {
 return ArchSpec::eCore_ppc64_generic;
 }
 
+static uint32_t loongarchVariantFromElfFlags(const elf::ELFHeader &header) {
+  uint32_t fileclass = header.e_ident[EI_CLASS];
+  switch (fileclass) {
+  case llvm::ELF::ELFCLASS32:
+return ArchSpec::eLoongArchSubType_loongarch32;
+  case llvm::ELF::ELFCLASS64:
+return ArchSpec::eLoongArchSubType_loongarch64;
+  default:
+return ArchSpec::eLoongArchSubType_unknown;
+  }
+}
+
 static uint32_t subTypeFromElfHeader(const elf::ELFHeader &header) {
   if (header.e_machine == llvm::ELF::EM_MIPS)
 return mipsVariantFromElfFlags(header);
@@ -327,6 +339,8 @@ static uint32_t subTypeFromElfHeader(const elf::ELFHeader 
&header) {
 return ppc64VariantFromElfFlags(header);
   else if (header.e_machine == llvm::ELF::EM_RISCV)
 return riscvVariantFromElfFlags(header);
+  else if (header.e_machine == llvm::ELF::EM_LOONGARCH)
+return loongarchVariantFromElfFlags(header);
 
   return LLDB_INVALID_CPUTYPE;
 }

diff  --git a/lldb/source/Utility/ArchSpec.cpp 
b/lldb/source/Utility/ArchSpec.cpp
index 0850e49b87307..126bedc209232 100644
--- a/lldb/source/Utility/ArchSpec.cpp
+++ b/lldb/source/Utility/ArchSpec.cpp
@@ -220,6 +220,11 @@ static const CoreDefinition g_core_definitions[] = {
 {eByteOrderLittle, 8, 2, 4, llvm::Triple::riscv64, ArchSpec::eCore_riscv64,
  "riscv64"},
 
+{eByteOrderLittle, 4, 4, 4, llvm::Triple::loongarch32,
+ ArchSpec::eCore_loongarch32, "loongarch32"},
+{eByteOrderLittle, 8, 4, 4, llvm::Triple::loongarch64,
+ ArchSpec::eCore_loongarch64, "loongarch64"},
+
 {eByteOrderLittle, 4, 4, 4, llvm::Triple::UnknownArch,
  ArchSpec::eCore_uknownMach32, "unknown-mach-32"},
 {eByteOrderLittle, 8, 4, 4, llvm::Triple::UnknownArch,
@@ -406,6 +411,12 @@ static const ArchDefinitionEntry g_elf_arch_entries[] = {
  ArchSpec::eRISCVSubType_riscv32, 0xu, 0xu

[Lldb-commits] [lldb] de86508 - [LLDB] [LoongArch] Add loongarch64 case in ComputeHostArchitectureSupport()

2022-11-03 Thread Weining Lu via lldb-commits 

Author: Weining Lu
Date: 2022-11-04T10:26:31+08:00
New Revision: de865087f8c07c742dec3523ec8cbe6895bd57ac

URL: 
https://github.com/llvm/llvm-project/commit/de865087f8c07c742dec3523ec8cbe6895bd57ac
DIFF: 
https://github.com/llvm/llvm-project/commit/de865087f8c07c742dec3523ec8cbe6895bd57ac.diff

LOG: [LLDB] [LoongArch] Add loongarch64 case in ComputeHostArchitectureSupport()

This is a simple change, loongarch64 host also supports 32-bit binaries,
so note it.

Without this patch:

```
[loongson@linux build]$ ./tools/lldb/unittests/Host/HostTests | tail -6
[==] 78 tests from 18 test suites ran. (16 ms total)
[  PASSED  ] 77 tests.
[  FAILED  ] 1 test, listed below:
[  FAILED  ] HostTest.GetProcessInfo

 1 FAILED TEST
```

With this patch:

```
[loongson@linux build]$ ./tools/lldb/unittests/Host/HostTests | tail -2
[==] 78 tests from 18 test suites ran. (15 ms total)
[  PASSED  ] 78 tests.
```

Reviewed By: xen0n, MaskRay, DavidSpickett

Differential Revision: https://reviews.llvm.org/D137312

Added: 


Modified: 
lldb/source/Host/common/HostInfoBase.cpp

Removed: 




diff  --git a/lldb/source/Host/common/HostInfoBase.cpp 
b/lldb/source/Host/common/HostInfoBase.cpp
index e8088344422a7..9a7b77c19de1d 100644
--- a/lldb/source/Host/common/HostInfoBase.cpp
+++ b/lldb/source/Host/common/HostInfoBase.cpp
@@ -340,6 +340,7 @@ void HostInfoBase::ComputeHostArchitectureSupport(ArchSpec 
&arch_32,
   case llvm::Triple::ppc64le:
   case llvm::Triple::x86_64:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch64:
 arch_64.SetTriple(triple);
 arch_32.SetTriple(triple.get32BitArchVariant());
 break;



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[Lldb-commits] [lldb] b3578f3 - Revert "[LLDB] [LoongArch] Add loongarch64 case in ComputeHostArchitectureSupport()"

2022-11-03 Thread Weining Lu via lldb-commits 

Author: Weining Lu
Date: 2022-11-04T10:38:10+08:00
New Revision: b3578f33c8b0a05070661565af54352fe3381f6d

URL: 
https://github.com/llvm/llvm-project/commit/b3578f33c8b0a05070661565af54352fe3381f6d
DIFF: 
https://github.com/llvm/llvm-project/commit/b3578f33c8b0a05070661565af54352fe3381f6d.diff

LOG: Revert "[LLDB] [LoongArch] Add loongarch64 case in 
ComputeHostArchitectureSupport()"

This reverts commit de865087f8c07c742dec3523ec8cbe6895bd57ac.

Reason to revert: author name is wrong.

Added: 


Modified: 
lldb/source/Host/common/HostInfoBase.cpp

Removed: 




diff  --git a/lldb/source/Host/common/HostInfoBase.cpp 
b/lldb/source/Host/common/HostInfoBase.cpp
index 9a7b77c19de1d..e8088344422a7 100644
--- a/lldb/source/Host/common/HostInfoBase.cpp
+++ b/lldb/source/Host/common/HostInfoBase.cpp
@@ -340,7 +340,6 @@ void HostInfoBase::ComputeHostArchitectureSupport(ArchSpec 
&arch_32,
   case llvm::Triple::ppc64le:
   case llvm::Triple::x86_64:
   case llvm::Triple::riscv64:
-  case llvm::Triple::loongarch64:
 arch_64.SetTriple(triple);
 arch_32.SetTriple(triple.get32BitArchVariant());
 break;



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[Lldb-commits] [lldb] 8cca7f3 - Reland "[LLDB] [LoongArch] Add loongarch64 case in ComputeHostArchitectureSupport()"

2022-11-03 Thread Weining Lu via lldb-commits 

Author: Tiezhu Yang
Date: 2022-11-04T10:40:53+08:00
New Revision: 8cca7f3bf741287eb21ce273106244349a03345a

URL: 
https://github.com/llvm/llvm-project/commit/8cca7f3bf741287eb21ce273106244349a03345a
DIFF: 
https://github.com/llvm/llvm-project/commit/8cca7f3bf741287eb21ce273106244349a03345a.diff

LOG: Reland "[LLDB] [LoongArch] Add loongarch64 case in 
ComputeHostArchitectureSupport()"

This is a simple change, loongarch64 host also supports 32-bit binaries,
so note it.

Without this patch:

```
[loongson@linux build]$ ./tools/lldb/unittests/Host/HostTests | tail -6
[==] 78 tests from 18 test suites ran. (16 ms total)
[  PASSED  ] 77 tests.
[  FAILED  ] 1 test, listed below:
[  FAILED  ] HostTest.GetProcessInfo

 1 FAILED TEST
```

With this patch:

```
[loongson@linux build]$ ./tools/lldb/unittests/Host/HostTests | tail -2
[==] 78 tests from 18 test suites ran. (15 ms total)
[  PASSED  ] 78 tests.
```

Reviewed By: SixWeining, xen0n, MaskRay, DavidSpickett

Differential Revision: https://reviews.llvm.org/D137312

Added: 


Modified: 
lldb/source/Host/common/HostInfoBase.cpp

Removed: 




diff  --git a/lldb/source/Host/common/HostInfoBase.cpp 
b/lldb/source/Host/common/HostInfoBase.cpp
index e8088344422a7..9a7b77c19de1d 100644
--- a/lldb/source/Host/common/HostInfoBase.cpp
+++ b/lldb/source/Host/common/HostInfoBase.cpp
@@ -340,6 +340,7 @@ void HostInfoBase::ComputeHostArchitectureSupport(ArchSpec 
&arch_32,
   case llvm::Triple::ppc64le:
   case llvm::Triple::x86_64:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch64:
 arch_64.SetTriple(triple);
 arch_32.SetTriple(triple.get32BitArchVariant());
 break;



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[Lldb-commits] [lldb] 97842fc - [LLDB] Add LoongArch software breakpoint trap opcode

2022-11-09 Thread Weining Lu via lldb-commits 

Author: Teizhu Yang
Date: 2022-11-10T13:49:11+08:00
New Revision: 97842fcba9e3a3fa4db52a47215641f9141fea63

URL: 
https://github.com/llvm/llvm-project/commit/97842fcba9e3a3fa4db52a47215641f9141fea63
DIFF: 
https://github.com/llvm/llvm-project/commit/97842fcba9e3a3fa4db52a47215641f9141fea63.diff

LOG: [LLDB] Add LoongArch software breakpoint trap opcode

Use `break 0x5` for LoongArch software breakpoint traps.
The magic number 0x5 means `BRK_SSTEPBP` as defined in
the kernel header `asm/break.h` on LoongArch.

Reviewed By: SixWeining, xen0n

Differential Revision: https://reviews.llvm.org/D137519

Added: 


Modified: 
lldb/source/Host/common/NativeProcessProtocol.cpp
lldb/source/Target/Platform.cpp

Removed: 




diff  --git a/lldb/source/Host/common/NativeProcessProtocol.cpp 
b/lldb/source/Host/common/NativeProcessProtocol.cpp
index cdb59842e658b..21f382da2f229 100644
--- a/lldb/source/Host/common/NativeProcessProtocol.cpp
+++ b/lldb/source/Host/common/NativeProcessProtocol.cpp
@@ -507,6 +507,8 @@ 
NativeProcessProtocol::GetSoftwareBreakpointTrapOpcode(size_t size_hint) {
   static const uint8_t g_ppcle_opcode[] = {0x08, 0x00, 0xe0, 0x7f}; // trap
   static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
   static const uint8_t g_riscv_opcode_c[] = {0x02, 0x90};   // c.ebreak
+  static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+   0x00}; // break 0x5
 
   switch (GetArchitecture().GetMachine()) {
   case llvm::Triple::aarch64:
@@ -541,6 +543,10 @@ 
NativeProcessProtocol::GetSoftwareBreakpointTrapOpcode(size_t size_hint) {
   : llvm::makeArrayRef(g_riscv_opcode);
   }
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
+return llvm::makeArrayRef(g_loongarch_opcode);
+
   default:
 return llvm::createStringError(llvm::inconvertibleErrorCode(),
"CPU type not supported!");
@@ -567,6 +573,8 @@ size_t 
NativeProcessProtocol::GetSoftwareBreakpointPCOffset() {
   case llvm::Triple::ppc64le:
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
 // On these architectures the PC doesn't get updated for breakpoint hits.
 return 0;
 

diff  --git a/lldb/source/Target/Platform.cpp b/lldb/source/Target/Platform.cpp
index 306ee99be5952..7bb2b1ccf7cbb 100644
--- a/lldb/source/Target/Platform.cpp
+++ b/lldb/source/Target/Platform.cpp
@@ -1939,6 +1939,14 @@ size_t Platform::GetSoftwareBreakpointTrapOpcode(Target 
&target,
 }
   } break;
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64: {
+static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+ 0x00}; // break 0x5
+trap_opcode = g_loongarch_opcode;
+trap_opcode_size = sizeof(g_loongarch_opcode);
+  } break;
+
   default:
 return 0;
   }



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[Lldb-commits] [lldb] ed34590 - [LLDB] Add LoongArch register definitions and operations

2022-11-25 Thread Weining Lu via lldb-commits 

Author: Tiezhu Yang
Date: 2022-11-25T21:19:36+08:00
New Revision: ed34590c1acb300abe51d2686148c62e8c517993

URL: 
https://github.com/llvm/llvm-project/commit/ed34590c1acb300abe51d2686148c62e8c517993
DIFF: 
https://github.com/llvm/llvm-project/commit/ed34590c1acb300abe51d2686148c62e8c517993.diff

LOG: [LLDB] Add LoongArch register definitions and operations

Use the same register layout as Linux kernel, implement the
related read and write operations.

Reviewed By: SixWeining, xen0n, DavidSpickett

Differential Revision: https://reviews.llvm.org/D138407

Added: 
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
lldb/source/Utility/LoongArch_DWARF_Registers.h

Modified: 
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
lldb/source/Plugins/Process/Utility/CMakeLists.txt
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h

Removed: 




diff  --git 
a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp 
b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
index a788248f03c1f..8d7bd35b3bdbf 100644
--- 
a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
+++ 
b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
@@ -18,6 +18,15 @@
 
 #include "Plugins/Process/Linux/NativeProcessLinux.h"
 #include "Plugins/Process/Linux/Procfs.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h"
+#include "Plugins/Process/Utility/lldb-loongarch-register-enums.h"
+
+// NT_PRSTATUS and NT_FPREGSET definition
+#include 
+// struct iovec definition
+#include 
+
+#define REG_CONTEXT_SIZE (GetGPRSize() + GetFPRSize())
 
 using namespace lldb;
 using namespace lldb_private;
@@ -52,6 +61,9 @@ 
NativeRegisterContextLinux_loongarch64::NativeRegisterContextLinux_loongarch64(
   NativeRegisterContextLinux(native_thread) {
   ::memset(&m_fpr, 0, sizeof(m_fpr));
   ::memset(&m_gpr, 0, sizeof(m_gpr));
+
+  m_gpr_is_valid = false;
+  m_fpu_is_valid = false;
 }
 
 const RegisterInfoPOSIX_loongarch64 &
@@ -69,24 +81,258 @@ const RegisterSet 
*NativeRegisterContextLinux_loongarch64::GetRegisterSet(
   return GetRegisterInfo().GetRegisterSet(set_index);
 }
 
+uint32_t NativeRegisterContextLinux_loongarch64::GetUserRegisterCount() const {
+  uint32_t count = 0;
+  for (uint32_t set_index = 0; set_index < GetRegisterSetCount(); ++set_index)
+count += GetRegisterSet(set_index)->num_registers;
+  return count;
+}
+
 Status NativeRegisterContextLinux_loongarch64::ReadRegister(
 const RegisterInfo *reg_info, RegisterValue ®_value) {
-  return Status("Failed to read register value");
+  Status error;
+
+  if (!reg_info) {
+error.SetErrorString("reg_info NULL");
+return error;
+  }
+
+  const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
+
+  if (reg == LLDB_INVALID_REGNUM)
+return Status("no lldb regnum for %s", reg_info && reg_info->name
+   ? reg_info->name
+   : "");
+
+  uint8_t *src = nullptr;
+  uint32_t offset = LLDB_INVALID_INDEX32;
+
+  if (IsGPR(reg)) {
+error = ReadGPR();
+if (error.Fail())
+  return error;
+
+offset = reg_info->byte_offset;
+assert(offset < GetGPRSize());
+src = (uint8_t *)GetGPRBuffer() + offset;
+
+  } else if (IsFPR(reg)) {
+error = ReadFPR();
+if (error.Fail())
+  return error;
+
+offset = CalculateFprOffset(reg_info);
+assert(offset < GetFPRSize());
+src = (uint8_t *)GetFPRBuffer() + offset;
+  } else
+return Status("failed - register wasn't recognized to be a GPR or an FPR, "
+  "write strategy unknown");
+
+  reg_value.SetFromMemoryData(*reg_info, src, reg_info->byte_size,
+  eByteOrderLittle, error);
+
+  return error;
 }
 
 Status NativeRegisterContextLinux_loongarch64::WriteRegister(
 const RegisterInfo *reg_info, const RegisterValue ®_value) {
+  Status error;
+
+  if (!reg_info)
+return Status("reg_info NULL");
+
+  const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
+
+  if (reg == LLDB_INVALID_REGNUM)
+return Status("no lldb regnum for %s", reg_info->name != nullptr
+   ? reg_info->name
+   : "");
+
+  uint8_t *dst = nullptr;
+  uint32_t offset = LLDB_INVALID_INDEX32;
+
+  if (IsGPR(reg)) {
+error = ReadGPR();
+if (error.Fail())
+