RFC ThreadSanitizer tests

[max]

Hello,

Here is a patch with initial ThreadSanitizer testsuite. It basically 
adds several tests from upstream LLVM testsuite.
It works fine on x86_64 with patch from 
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59188 applied.


Ok to commit or should we wait for fix for 59188?

-Maxim.
2013-12-05  Max Ostapenko 

* c-c++-common/tsan: New folder with tests added.
* lib/tsan-dg.exp: New testfiles.
* gcc.dg/tsan/tsan.exp: New testfiles.
* g++.dg/dg.exp: Add tsan directory to the list
of folders that are handled specially.
diff --git a/gcc/testsuite/c-c++-common/tsan/atomic_stack.c b/gcc/testsuite/c-c++-common/tsan/atomic_stack.c
new file mode 100644
index 000..eac71b8
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/tsan/atomic_stack.c
@@ -0,0 +1,32 @@
+/* { dg-do run } */
+/* { dg-shouldfail "tsan" } */
+
+#include 
+#include 
+
+int Global;
+
+void *Thread1(void *x) {
+  sleep(1);
+  __atomic_fetch_add(&Global, 1, __ATOMIC_RELAXED);
+  return NULL;
+}
+
+void *Thread2(void *x) {
+  Global++;
+  return NULL;
+}
+
+int main() {
+  pthread_t t[2];
+  pthread_create(&t[0], NULL, Thread1, NULL);
+  pthread_create(&t[1], NULL, Thread2, NULL);
+  pthread_join(t[0], NULL);
+  pthread_join(t[1], NULL);
+  return 0;
+}
+
+/* { dg-output "WARNING: ThreadSanitizer: data race.*(\n|\r\n|\r)" } */
+/* { dg-output "  Atomic write of size 4.*" } */
+/* { dg-output "#0 __tsan_atomic32_fetch_add.*" } */
+/* { dg-output "#1 Thread1.*" } */
diff --git a/gcc/testsuite/c-c++-common/tsan/fd_pipe_race.c b/gcc/testsuite/c-c++-common/tsan/fd_pipe_race.c
new file mode 100644
index 000..fc76cbf
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/tsan/fd_pipe_race.c
@@ -0,0 +1,37 @@
+/* { dg-do run } */
+/* { dg-shouldfail "tsan" } */
+
+#include 
+#include 
+#include 
+
+int fds[2];
+
+void *Thread1(void *x) {
+  write(fds[1], "a", 1);
+  return NULL;
+}
+
+void *Thread2(void *x) {
+  sleep(1);
+  close(fds[0]);
+  close(fds[1]);
+  return NULL;
+}
+
+int main() {
+  pipe(fds);
+  pthread_t t[2];
+  pthread_create(&t[0], NULL, Thread1, NULL);
+  pthread_create(&t[1], NULL, Thread2, NULL);
+  pthread_join(t[0], NULL);
+  pthread_join(t[1], NULL);
+}
+
+/* { dg-output "WARNING: ThreadSanitizer: data race.*\n" } */
+/* { dg-output "  Write of size 8.*\n" } */
+/* { dg-output "#0 close.*\n" } */
+/* { dg-output "#1 Thread2.*\n" } */
+/* { dg-output "  Previous read of size 8.*\n" } */
+/* { dg-output "#0 write.*\n" } */
+/* { dg-output "#1 Thread1.*\n" } */
diff --git a/gcc/testsuite/c-c++-common/tsan/free_race.c b/gcc/testsuite/c-c++-common/tsan/free_race.c
new file mode 100644
index 000..362c92b
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/tsan/free_race.c
@@ -0,0 +1,28 @@
+/* { dg-do run } */
+/* { dg-shouldfail "tsan" } */
+
+#include 
+
+void __attribute__((noinline)) foo(int *mem) {
+  free(mem);
+}
+
+void __attribute__((noinline)) bar(int *mem) {
+  mem[0] = 42;
+}
+
+int main() {
+  int *mem =(int*)malloc (100);
+  foo(mem);
+  bar(mem);
+  return 0;
+}
+
+/* { dg-output "WARNING: ThreadSanitizer: heap-use-after-free.*(\n|\r\n|\r)" } */
+/* { dg-output "  Write of size 4 at.* by main thread:(\n|\r\n|\r)" } */
+/* { dg-output "#0 bar.*(\n|\r\n|\r)" } */
+/* { dg-output "#1 main.*(\n|\r\n|\r)" } */
+/* { dg-output "  Previous write of size 8 at.* by main thread:(\n|\r\n|\r)" } */
+/* { dg-output "#0 free.*(\n|\r\n|\r)" } */
+/* { dg-output "#\(1|2\) foo.*(\n|\r\n|\r)" } */
+/* { dg-output "#\(2|3\) main.*(\n|\r\n|\r)" } */
diff --git a/gcc/testsuite/c-c++-common/tsan/mutexset1.c b/gcc/testsuite/c-c++-common/tsan/mutexset1.c
new file mode 100644
index 000..783f262
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/tsan/mutexset1.c
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-shouldfail "tsan" } */
+
+#include 
+#include 
+#include 
+
+int Global;
+pthread_mutex_t mtx;
+
+void *Thread1(void *x) {
+  sleep(1);
+  pthread_mutex_lock(&mtx);
+  Global++;
+  pthread_mutex_unlock(&mtx);
+  return NULL;
+}
+
+void *Thread2(void *x) {
+  Global--;
+  return NULL;/* { dg-output ".*" } */
+
+}
+
+int main() {
+  pthread_mutex_init(&mtx, 0);
+  pthread_t t[2];
+  pthread_create(&t[0], NULL, Thread1, NULL);
+  pthread_create(&t[1], NULL, Thread2, NULL);
+  pthread_join(t[0], NULL);
+  pthread_join(t[1], NULL);
+  pthread_mutex_destroy(&mtx);
+  return 0;
+}
+
+/* { dg-output "WARNING: ThreadSanitizer: data race.*(\n|\r\n|\r)" } */
+/* { dg-output "  Read of size 4 at 0x\[0-9a-f\]+ by thread T1 \\(mutexes: write M\[0-9\]\\):.*" } */
+/* { dg-output "  Previous write of size 4 at 0x\[0-9a-f\]+ by thread T2:.*" } */
+/* { dg-output "

[COMMITTED] gcc: xtensa: fix salt/saltu version check

[Max Filippov]

gcc/
* config/xtensa/xtensa.h (TARGET_SALT): Change HW version from
26 (which corresponds to RF-2014.0) to 27 (which
corresponds to RG-2015.0, the release where salt/saltu opcodes
were introduced).
---
 gcc/config/xtensa/xtensa.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index 5987681e5496..49e6350001da 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -54,7 +54,7 @@ along with GCC; see the file COPYING3.  If not see
 #define TARGET_WINDOWED_ABIxtensa_windowed_abi
 #define TARGET_DEBUG   XCHAL_HAVE_DEBUG
 #define TARGET_L32RXCHAL_HAVE_L32R
-#define TARGET_SALT(XTENSA_MARCH_EARLIEST >= 26)
+#define TARGET_SALT(XTENSA_MARCH_EARLIEST >= 27)
 
 #define TARGET_DEFAULT (MASK_SERIALIZE_VOLATILE)
 
-- 
2.39.2

[PATCH] gcc: xtensa: reorder movsi_internal patterns for better code generation during LRA

[Max Filippov]

After switching to LRA xtensa backend generates the following code for
saving/loading registers:

movi a9, 0x190
add  a9, a9, sp
s32i.n   a3, a9, 0

instead of the shorter and more efficient

s32i a3, a9, 0x190

E.g. the following code can be used to reproduce it:

int f1(int a, int b, int c, int d, int e, int f, int *p);
int f2(int a, int b, int c, int d, int e, int f, int *p);
int f3(int a, int b, int c, int d, int e, int f, int *p);

int foo(int a, int b, int c, int d, int e, int f)
{
int g[100];
return
f1(a, b, c, d, e, f, g) +
f2(a, b, c, d, e, f, g) +
f3(a, b, c, d, e, f, g);
}

This happens in the LRA pass because s32i.n and l32i.n are listed before
the s32i and l32i in the movsi_internal pattern and alternative
consideration loop stops early.

gcc/

* config/xtensa/xtensa.md (movsi_internal): Move l32i and s32i
patterns ahead of the l32i.n and s32i.n.
---
 gcc/config/xtensa/xtensa.md | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 1a2249b059a0..5cdf4dffe700 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -1270,13 +1270,15 @@
 })
 
 (define_insn "movsi_internal"
-  [(set (match_operand:SI 0 "nonimmed_operand" 
"=D,D,D,D,R,R,a,q,a,a,W,a,a,U,*a,*A")
-   (match_operand:SI 1 "move_operand" 
"M,D,d,R,D,d,r,r,I,Y,i,T,U,r,*A,*r"))]
+  [(set (match_operand:SI 0 "nonimmed_operand" 
"=D,D,D,a,U,D,R,R,a,q,a,a,W,a,*a,*A")
+   (match_operand:SI 1 "move_operand" 
"M,D,d,U,r,R,D,d,r,r,I,Y,i,T,*A,*r"))]
   "xtensa_valid_move (SImode, operands)"
   "@
movi.n\t%0, %x1
mov.n\t%0, %1
mov.n\t%0, %1
+   %v1l32i\t%0, %1
+   %v0s32i\t%1, %0
%v1l32i.n\t%0, %1
%v0s32i.n\t%1, %0
%v0s32i.n\t%1, %0
@@ -1286,13 +1288,11 @@
movi\t%0, %1
const16\t%0, %t1\;const16\t%0, %b1
%v1l32r\t%0, %1
-   %v1l32i\t%0, %1
-   %v0s32i\t%1, %0
rsr\t%0, ACCLO
wsr\t%1, ACCLO"
-  [(set_attr "type"
"move,move,move,load,store,store,move,move,move,move,move,load,load,store,rsr,wsr")
+  [(set_attr "type"
"move,move,move,load,store,load,store,store,move,move,move,move,move,load,rsr,wsr")
(set_attr "mode""SI")
-   (set_attr "length"  "2,2,2,2,2,2,3,3,3,3,6,3,3,3,3,3")])
+   (set_attr "length"  "2,2,2,3,3,2,2,2,3,3,3,3,6,3,3,3")])
 
 (define_split
   [(set (match_operand:SHI 0 "register_operand")
-- 
2.39.2

[PATCH] libgcc: arm: fix build for FDPIC target

[Max Filippov]

libgcc/
* unwind-arm-common.inc (__gnu_personality_sigframe_fdpic): Cast
last argument of _Unwind_VRS_Set to void *.
---
 libgcc/unwind-arm-common.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc
index 5453f38186b5..576f7e93e8a8 100644
--- a/libgcc/unwind-arm-common.inc
+++ b/libgcc/unwind-arm-common.inc
@@ -248,7 +248,7 @@ __gnu_personality_sigframe_fdpic (_Unwind_State state,
  + ARM_SIGCONTEXT_R0;
 /* Restore regs saved on stack by the kernel.  */
 for (i = 0; i < 16; i++)
-   _Unwind_VRS_Set (context, _UVRSC_CORE, i, _UVRSD_UINT32, sp + 4 * i);
+   _Unwind_VRS_Set (context, _UVRSC_CORE, i, _UVRSD_UINT32, (void *)(sp + 
4 * i));
 
 return _URC_CONTINUE_UNWIND;
 }
-- 
2.39.2

Re: [PATCH] xtensa: Add supplementary split pattern for "*addsubx"

[Max Filippov]

On Thu, Mar 21, 2024 at 4:36 PM Takayuki 'January June' Suwa
 wrote:
>
> int test(int a) {
>return a * 4 + 3;
> }
>
> In the example above, since Xtensa has instructions to add register value
> scaled by 2, 4 or 8 (and corresponding define_insns), we would expect them
> to be used but not, because it is transformed before reaching the RTL
> generation pass as below:
>
> int test(int a) {
>return (a + 7500) * 4;
> }
>
> Fortunately, the RTL combination pass tries a splitting pattern that matches
> the first example, so it is easy to solve by defining that pattern.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.md: Add new split pattern described above.
> ---
>  gcc/config/xtensa/xtensa.md | 14 ++
>  1 file changed, 14 insertions(+)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.

-- 
Thanks.
-- Max

Re: [PATCH] libgcc: arm: fix build for FDPIC target

[Max Filippov]

On Fri, Mar 22, 2024 at 1:15 PM Max Filippov  wrote:
>
> libgcc/
> * unwind-arm-common.inc (__gnu_personality_sigframe_fdpic): Cast
> last argument of _Unwind_VRS_Set to void *.
> ---
>  libgcc/unwind-arm-common.inc | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Build-tested for arm-gnu-uclinuxfdpiceabi, committed as obvious.

-- 
Thanks.
-- Max

Re: [PATCH 1/2] xtensa: Recover constant synthesis for HImode after LRA transition

[Max Filippov]

Hi Suwa-san,

On Sat, Feb 3, 2024 at 6:20 AM Takayuki 'January June' Suwa
 wrote:
> After LRA transition, HImode constants that don't fit into signed 12 bits
> are no longer subject to constant synthesis:

with this change I get multiple ICEs during libgomp, libgfortran and
libstdc++ builds, e.g.:

/home/jcmvbkbc/ws/tensilica/gcc/gcc/libstdc++-v3/src/c++20/tzdb.cc:1228:3:
error: unrecognizable insn:
1228 |   }
 |   ^
(insn 3131 27 3132 2 (set (subreg:SI (reg:DI 176) 0)
   (const_int 78796800 [0x4b25800]))
"/home/jcmvbkbc/ws/tensilica/gcc/builds/gcc-14-8779-ge15d00be88c1-xtensa-call0-le/xtensa-buildroot-linux-uclibc/libstdc++-v3/include/bits/chrono.h":574:6
-1
(nil))
during RTL pass: subreg3
/home/jcmvbkbc/ws/tensilica/gcc/gcc/libstdc++-v3/src/c++20/tzdb.cc:1228:3:
internal compiler error: in extract_insn, at recog.cc:2812
0x7cb898 _fatal_insn(char const*, rtx_def const*, char const*, int, char const*)
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/rtl-error.cc:108
0x7cb8b4 _fatal_insn_not_found(rtx_def const*, char const*, int, char const*)
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/rtl-error.cc:116
0x7ca31e extract_insn(rtx_insn*)
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/recog.cc:2812
0x1c08b57 decompose_multiword_subregs
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/lower-subreg.cc:1569
0x1c09d7d execute
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/lower-subreg.cc:1834



/home/jcmvbkbc/ws/tensilica/gcc/gcc/libstdc++-v3/src/filesystem/ops.cc:936:1:
error: unrecognizable insn:
 936 | }
 | ^
(insn 260 21 261 2 (set (reg:SI 4 a4)
   (const_int 10 [0x3b9aca00]))
"/home/jcmvbkbc/ws/tensilica/gcc/builds/gcc-14-8779-ge15d00be88c1-xtensa-call0-le/xtensa-buildroot-linux-uclibc/libstdc++-v3/include/bits/chrono.h":214:38
discrim 1 -1
(nil))
during RTL pass: subreg3
/home/jcmvbkbc/ws/tensilica/gcc/gcc/libstdc++-v3/src/filesystem/ops.cc:936:1:
internal compiler error: in extract_insn, at recog.cc:2812
0x7cb898 _fatal_insn(char const*, rtx_def const*, char const*, int, char const*)
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/rtl-error.cc:108
0x7cb8b4 _fatal_insn_not_found(rtx_def const*, char const*, int, char const*)
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/rtl-error.cc:116
0x7ca31e extract_insn(rtx_insn*)
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/recog.cc:2812
0x1c08b57 decompose_multiword_subregs
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/lower-subreg.cc:1569
0x1c09d7d execute
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/lower-subreg.cc:1834


-- 
Thanks.
-- Max

Re: [PATCH 1/2 v2] xtensa: Recover constant synthesis for HImode after LRA transition

[Max Filippov]

On Sun, Feb 4, 2024 at 2:20 AM Takayuki 'January June' Suwa
 wrote:
>
> After LRA transition, HImode constants that don't fit into signed 12 bits
> are no longer subject to constant synthesis:
>
> /* example */
> void test(void) {
>   short foo = 32767;
>   __asm__ ("" :: "r"(foo));
> }
>
> ;; before
> .literal_position
> .literal .LC0, 32767
> test:
> l32ra9, .LC0
> ret.n
>
> This patch fixes that:
>
> ;; after
> test:
> movi.n  a9, -1
> extui   a9, a9, 17, 15
> ret.n
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.md (SHI): New mode iterator.
> (2 split patterns related to constsynth):
> Change to also accept HImode operands.
> ---
>  gcc/config/xtensa/xtensa.md | 22 ++
>  1 file changed, 14 insertions(+), 8 deletions(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.

-- 
Thanks.
-- Max

Re: [PATCH 2/2] xtensa: Fix missing mode warning in "*eqne_zero_masked_bits"

[Max Filippov]

On Sat, Feb 3, 2024 at 6:19 AM Takayuki 'January June' Suwa
 wrote:
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.md (*eqne_zero_masked_bits):
> Add missing ":SI" to the match_operator.
> ---
>  gcc/config/xtensa/xtensa.md | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.

-- 
Thanks.
-- Max

Re: [PATCH] xtensa: Make full transition to LRA

[Max Filippov]

Hi Suwa-san,

I've finally processed the new issues introduced by this change.

On Wed, May 10, 2023 at 2:10 AM Max Filippov  wrote:
> On Mon, May 8, 2023 at 6:38 AM Takayuki 'January June' Suwa
>  wrote:
> >
> > gcc/ChangeLog:
> >
> > * config/xtensa/constraints.md (R, T, U):
> > Change define_constraint to define_memory_constraint.
> > * config/xtensa/xtensa.cc
> > (xtensa_lra_p, TARGET_LRA_P): Remove.
> > (xtensa_emit_move_sequence): Remove "if (reload_in_progress)"
> > clause as it can no longer be true.
> > (xtensa_output_integer_literal_parts): Consider 16-bit wide
> > constants.
> > (xtensa_legitimate_constant_p): Add short-circuit path for
> > integer load instructions.
> > * config/xtensa/xtensa.md (movsf): Use can_create_pseudo_p()
> > rather reload_in_progress and reload_completed.
> > * config/xtensa/xtensa.opt (mlra): Remove.
> > ---
> >  gcc/config/xtensa/constraints.md | 26 --
> >  gcc/config/xtensa/xtensa.cc  | 26 +-
> >  gcc/config/xtensa/xtensa.md  |  2 +-
> >  gcc/config/xtensa/xtensa.opt |  4 
> >  4 files changed, 14 insertions(+), 44 deletions(-)
>
> That's impressive.
> This version introduces a few execution failures in the testsuite on
> little endian targets and a bunch more (but not all, some execution
> tests still pass) on big endian.
> I'm traveling this week and likely won't be able to take a deep look
> into it until 5/15.
>
> New LE failures:

All of the LE failures are related to zero-overhead loops. Dropping the
operand 2 from the doloop_end pattern fixes that (change 1).

> New BE failures:

All of the BE failures are related to loading HImode constants into
registers, which instead of

.literal .LCx value
...
l32r register, .LCx

now generates the following code:

.literal .LCx value
.literal .LCy .LCx
...
l32r register1, .LCy
l16ui register, register1, 0

I've fixed that by allowing HImode constants in the literal pool in the
'move_operand' predicate, making addresses of such constants
legitimate in the xtensa_legitimate_address_p and adding an
alternative with l32r opcode to the movhi_internal pattern (change 2).

With these additional changes there's no new regression failures
and the generated code looks mostly the same as with the reload.

--
Thanks.
-- Max
From 0fb9ddfd22d11579674ac4a95912d2bc5612deb7 Mon Sep 17 00:00:00 2001
From: Max Filippov 
Date: Sun, 21 Jan 2024 16:14:20 -0800
Subject: [PATCH 1/2] gcc: xtensa: drop operand 2 from doloop_end pattern

gcc/ChangeLog:
	* config/xtensa/xtensa.md (doloop_end): Drop operand 2.
---
 gcc/config/xtensa/xtensa.md | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 7aded86e244f..a9c37da48b81 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -2368,14 +2368,12 @@
 	  (set (match_dup 0)
 		   (plus:SI (match_dup 0)
 			(const_int -1)))
-	  (unspec [(const_int 0)] UNSPEC_LSETUP_END)
-	  (clobber (match_dup 2))])] ; match_scratch
+	  (unspec [(const_int 0)] UNSPEC_LSETUP_END)])]
   "TARGET_LOOPS && optimize"
 {
   /* The loop optimizer doesn't check the predicates... */
   if (GET_MODE (operands[0]) != SImode)
 FAIL;
-  operands[2] = gen_rtx_SCRATCH (SImode);
 })
 
 
-- 
2.39.2

From e5536a47e9f1ae856c2491919933d18866511991 Mon Sep 17 00:00:00 2001
From: Max Filippov 
Date: Tue, 23 Jan 2024 10:57:21 -0800
Subject: [PATCH 2/2] gcc: xtensa: fix HImode constant loads

gcc/ChangeLog:
	* config/xtensa/predicates.md (move_operand): Don't check that a
	constant pool operand size is a multiple of UNITS_PER_WORD.
	* config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Don't
	check that mode size is at least UNITS_PER_WORD.
	* config/xtensa/xtensa.md (movhi_internal): Add alternative
	loading constant from a literal pool.
---
 gcc/config/xtensa/predicates.md | 4 +---
 gcc/config/xtensa/xtensa.cc | 2 +-
 gcc/config/xtensa/xtensa.md | 9 +
 3 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/gcc/config/xtensa/predicates.md b/gcc/config/xtensa/predicates.md
index 672fb003a6c5..dd77911e3b70 100644
--- a/gcc/config/xtensa/predicates.md
+++ b/gcc/config/xtensa/predicates.md
@@ -143,9 +143,7 @@
 (define_predicate "move_operand"
   (ior
  (ior (match_operand 0 "register_operand")
-	  (and (match_operand 0 "memory_operand")
-	   (match_test "!constantpool_mem_p (op)
-			|| GET_MODE_SIZE (mode) % UNITS_PER_WORD == 0")))
+	  (match_operand 0 "memory_operand"))
  (ior (and (match_cod

[PATCH v2] xtensa: Make full transition to LRA

[Max Filippov]

From: Takayuki 'January June' Suwa 

gcc/ChangeLog:

* config/xtensa/constraints.md (R, T, U):
Change define_constraint to define_memory_constraint.
* config/xtensa/predicates.md (move_operand): Don't check that a
constant pool operand size is a multiple of UNITS_PER_WORD.
* config/xtensa/xtensa.cc
(xtensa_lra_p, TARGET_LRA_P): Remove.
(xtensa_emit_move_sequence): Remove "if (reload_in_progress)"
clause as it can no longer be true.
(fixup_subreg_mem): Drop function.
(xtensa_output_integer_literal_parts): Consider 16-bit wide
constants.
(xtensa_legitimate_constant_p): Add short-circuit path for
integer load instructions. Don't check that mode size is
at least UNITS_PER_WORD.
* config/xtensa/xtensa.md (movsf): Use can_create_pseudo_p()
rather reload_in_progress and reload_completed.
(doloop_end): Drop operand 2.
(movhi_internal): Add alternative loading constant from a
literal pool.
* config/xtensa/xtensa.opt (mlra): Change to no effect.
---
 gcc/config/xtensa/constraints.md | 26 ++
 gcc/config/xtensa/predicates.md  |  4 +--
 gcc/config/xtensa/xtensa.cc  | 46 +---
 gcc/config/xtensa/xtensa.md  | 15 +--
 gcc/config/xtensa/xtensa.opt |  4 +--
 5 files changed, 24 insertions(+), 71 deletions(-)

diff --git a/gcc/config/xtensa/constraints.md b/gcc/config/xtensa/constraints.md
index 5cade1db8ff1..dc6ffb5ba15c 100644
--- a/gcc/config/xtensa/constraints.md
+++ b/gcc/config/xtensa/constraints.md
@@ -123,29 +123,19 @@
   (and (match_code "const_int")
   (match_test "! xtensa_split1_finished_p ()"
 
-;; Memory constraints.  Do not use define_memory_constraint here.  Doing so
-;; causes reload to force some constants into the constant pool, but since
-;; the Xtensa constant pool can only be accessed with L32R instructions, it
-;; is always better to just copy a constant into a register.  Instead, use
-;; regular constraints but add a check to allow pseudos during reload.
+;; Memory constraints.
 
-(define_constraint "R"
+(define_memory_constraint "R"
  "Memory that can be accessed with a 4-bit unsigned offset from a register."
- (ior (and (match_code "mem")
-  (match_test "smalloffset_mem_p (op)"))
-  (and (match_code "reg")
-  (match_test "reload_in_progress
-   && REGNO (op) >= FIRST_PSEUDO_REGISTER"
+ (and (match_code "mem")
+  (match_test "smalloffset_mem_p (op)")))
 
-(define_constraint "T"
+(define_memory_constraint "T"
  "Memory in a literal pool (addressable with an L32R instruction)."
  (and (match_code "mem")
   (match_test "!TARGET_CONST16 && constantpool_mem_p (op)")))
 
-(define_constraint "U"
+(define_memory_constraint "U"
  "Memory that is not in a literal pool."
- (ior (and (match_code "mem")
-  (match_test "! constantpool_mem_p (op)"))
-  (and (match_code "reg")
-  (match_test "reload_in_progress
-   && REGNO (op) >= FIRST_PSEUDO_REGISTER"
+ (and (match_code "mem")
+  (match_test "! constantpool_mem_p (op)")))
diff --git a/gcc/config/xtensa/predicates.md b/gcc/config/xtensa/predicates.md
index 672fb003a6c5..dd77911e3b70 100644
--- a/gcc/config/xtensa/predicates.md
+++ b/gcc/config/xtensa/predicates.md
@@ -143,9 +143,7 @@
 (define_predicate "move_operand"
   (ior
  (ior (match_operand 0 "register_operand")
- (and (match_operand 0 "memory_operand")
-  (match_test "!constantpool_mem_p (op)
-   || GET_MODE_SIZE (mode) % UNITS_PER_WORD == 0")))
+ (match_operand 0 "memory_operand"))
  (ior (and (match_code "const_int")
   (match_test "(GET_MODE_CLASS (mode) == MODE_INT
 && xtensa_simm12b (INTVAL (op)))
diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
index a4f8e3e49d06..22b4416f48e4 100644
--- a/gcc/config/xtensa/xtensa.cc
+++ b/gcc/config/xtensa/xtensa.cc
@@ -115,7 +115,6 @@ static enum internal_test map_test_to_internal_test (enum 
rtx_code);
 static rtx gen_int_relational (enum rtx_code, rtx, rtx);
 static rtx gen_float_relational (enum rtx_code, rtx, rtx);
 static rtx gen_conditional_move (enum rtx_code, machine_mode, rtx, rtx);
-static rtx fixup_subreg_mem (rtx);
 static struct machine_function * xtensa_init_machine_status (void);
 static rtx xtensa_legitimize_tls_address (rtx);
 static rtx xtensa_legitimize_address (rtx, rtx, machine_mode);
@@ -192,7 +191,6 @@ static void xtensa_output_mi_thunk (FILE *file, tree thunk 
ATTRIBUTE_UNUSED,
HOST_WIDE_INT delta,
HOST_WIDE_INT vcall_offset,
tree function);
-static bool xtensa_lra_p (void);
 
 static rtx xtensa_delegitimize_address (rtx);
 
@@ -286,9 +284,6 @@ static rtx xtensa_delegitimize_address (

[COMMITTED] xtensa: Make full transition to LRA

[Max Filippov]

From: Takayuki 'January June' Suwa 

gcc/ChangeLog:

* config/xtensa/constraints.md (R, T, U):
Change define_constraint to define_memory_constraint.
* config/xtensa/predicates.md (move_operand): Don't check that a
constant pool operand size is a multiple of UNITS_PER_WORD.
* config/xtensa/xtensa.cc
(xtensa_lra_p, TARGET_LRA_P): Remove.
(xtensa_emit_move_sequence): Remove "if (reload_in_progress)"
clause as it can no longer be true.
(fixup_subreg_mem): Drop function.
(xtensa_output_integer_literal_parts): Consider 16-bit wide
constants.
(xtensa_legitimate_constant_p): Add short-circuit path for
integer load instructions. Don't check that mode size is
at least UNITS_PER_WORD.
* config/xtensa/xtensa.md (movsf): Use can_create_pseudo_p()
rather reload_in_progress and reload_completed.
(doloop_end): Drop operand 2.
(movhi_internal): Add alternative loading constant from a
literal pool.
(define_split for DI register_operand): Don't limit to
!TARGET_AUTO_LITPOOLS.
* config/xtensa/xtensa.opt (mlra): Change to no effect.
---
 gcc/config/xtensa/constraints.md | 26 ++
 gcc/config/xtensa/predicates.md  |  7 ++---
 gcc/config/xtensa/xtensa.cc  | 46 +---
 gcc/config/xtensa/xtensa.md  | 17 ++--
 gcc/config/xtensa/xtensa.opt |  4 +--
 5 files changed, 26 insertions(+), 74 deletions(-)

diff --git a/gcc/config/xtensa/constraints.md b/gcc/config/xtensa/constraints.md
index 27fd49656e5c..d855fb8d6057 100644
--- a/gcc/config/xtensa/constraints.md
+++ b/gcc/config/xtensa/constraints.md
@@ -123,29 +123,19 @@
   (and (match_code "const_int")
   (match_test "! xtensa_split1_finished_p ()"
 
-;; Memory constraints.  Do not use define_memory_constraint here.  Doing so
-;; causes reload to force some constants into the constant pool, but since
-;; the Xtensa constant pool can only be accessed with L32R instructions, it
-;; is always better to just copy a constant into a register.  Instead, use
-;; regular constraints but add a check to allow pseudos during reload.
+;; Memory constraints.
 
-(define_constraint "R"
+(define_memory_constraint "R"
  "Memory that can be accessed with a 4-bit unsigned offset from a register."
- (ior (and (match_code "mem")
-  (match_test "smalloffset_mem_p (op)"))
-  (and (match_code "reg")
-  (match_test "reload_in_progress
-   && REGNO (op) >= FIRST_PSEUDO_REGISTER"
+ (and (match_code "mem")
+  (match_test "smalloffset_mem_p (op)")))
 
-(define_constraint "T"
+(define_memory_constraint "T"
  "Memory in a literal pool (addressable with an L32R instruction)."
  (and (match_code "mem")
   (match_test "!TARGET_CONST16 && constantpool_mem_p (op)")))
 
-(define_constraint "U"
+(define_memory_constraint "U"
  "Memory that is not in a literal pool."
- (ior (and (match_code "mem")
-  (match_test "! constantpool_mem_p (op)"))
-  (and (match_code "reg")
-  (match_test "reload_in_progress
-   && REGNO (op) >= FIRST_PSEUDO_REGISTER"
+ (and (match_code "mem")
+  (match_test "! constantpool_mem_p (op)")))
diff --git a/gcc/config/xtensa/predicates.md b/gcc/config/xtensa/predicates.md
index a3dd1a929c76..a296c7ecc99a 100644
--- a/gcc/config/xtensa/predicates.md
+++ b/gcc/config/xtensa/predicates.md
@@ -143,17 +143,14 @@
 (define_predicate "move_operand"
   (ior
  (ior (match_operand 0 "register_operand")
- (and (match_operand 0 "memory_operand")
-  (match_test "!constantpool_mem_p (op)
-   || GET_MODE_SIZE (mode) % UNITS_PER_WORD == 0")))
+ (match_operand 0 "memory_operand"))
  (ior (and (match_code "const_int")
   (match_test "(GET_MODE_CLASS (mode) == MODE_INT
 && xtensa_simm12b (INTVAL (op)))
|| ! xtensa_split1_finished_p ()"))
  (and (match_code "const_int,const_double,const,symbol_ref,label_ref")
   (match_test "(TARGET_CONST16 || TARGET_AUTO_LITPOOLS)
-   && CONSTANT_P (op)
-   && GET_MODE_SIZE (mode) % UNITS_PER_WORD == 0")
+   && CONSTANT_P (op)")
 
 ;; Accept the floating point constant 1 in the appropriate mode.
 (define_predicate "const_float_1_operand"
diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
index 12677af3bd89..9beac9324679 100644
--- a/gcc/config/xtensa/xtensa.cc
+++ b/gcc/config/xtensa/xtensa.cc
@@ -115,7 +115,6 @@ static enum internal_test map_test_to_internal_test (enum 
rtx_code);
 static rtx gen_int_relational (enum rtx_code, rtx, rtx);
 static rtx gen_float_relational (enum rtx_code, rtx, rtx);
 static rtx gen_conditional_move (enum rtx_code, machine_mode, rtx, rtx);
-static rtx fixup_subreg_mem (r

Re: [RFC 1/2] libbacktrace: add FDPIC support

[Max Filippov]

On Wed, Jul 10, 2024 at 12:49 PM Ian Lance Taylor  wrote:
> On Sun, May 26, 2024 at 11:51 PM Max Filippov  wrote:
> > diff --git a/libbacktrace/internal.h b/libbacktrace/internal.h
> > index 4fa0af8cb6c9..456911166026 100644
> > --- a/libbacktrace/internal.h
> > +++ b/libbacktrace/internal.h
> > @@ -323,10 +323,22 @@ struct dwarf_sections
> >
> >  struct dwarf_data;
> >
> > +#if defined (HAVE_DL_ITERATE_PHDR) && defined (__FDPIC__)
> > +typedef struct elf32_fdpic_loadaddr base_address_type;
> > +#define __RELOC_UINTPTR(ptr, base) ((uintptr_t)__RELOC_POINTER (ptr, base))
> > +#define no_base_address ((struct elf32_fdpic_loadaddr){0})
> > +#else
> > +typedef uintptr_t base_address_type;
> > +#define __RELOC_POINTER(ptr, base) ((ptr) + (base))
> > +#define __RELOC_UINTPTR(ptr, base) ((uintptr_t)__RELOC_POINTER (ptr, base))
> > +#define no_base_address ((uintptr_t)0)
> > +#endif
> > +
> > +
>
> When I look at the uClibc sources, I don't understand how this works.
> This sets no_base_address to have a zero map field.  But
> __RELOC_POINTER will crash when given a zero map field.

That's right. But __RELOC_POINTER should never be called for base
address set to no_base_address, that's what the following hunk ensures:

--->8---
@@ -6636,9 +6636,15 @@ elf_add (struct backtrace_state *state, const
char *filename, int descriptor,

  /* If the executable is ET_DYN, it is either a PIE, or we are running
 directly a shared library with .interp.  We need to wait for
- dl_iterate_phdr in that case to determine the actual base_address.  */
+ dl_iterate_phdr in that case to determine the actual base_address.
+ In case of FDPIC we always need the actual base_address.  */
+#ifndef __FDPIC__
  if (exe && ehdr.e_type == ET_DYN)
return -1;
+#else
+  if (exe)
+return -1;
+#endif

  shoff = ehdr.e_shoff;
  shnum = ehdr.e_shnum;

--->8---
>  At least that is what it looks like in 
> uClibc/libc/sysdeps/linux/bfin/bits/elf-fdpic.h.
>  What target and what library are you using?

I'm using xtensa-linux-uclibcfdpic (gcc part is still WIP, most recent
version is available in https://github.com/jcmvbkbc/gcc-xtensa
tagged xtensa-fdpic-abi-spec-1.4) with uClibc-ng

-- 
Thanks.
-- Max

Re: [RFC 1/2] libbacktrace: add FDPIC support

[Max Filippov]

On Mon, Jul 15, 2024 at 10:21:18AM -0700, Ian Lance Taylor wrote:
> Can you see whether this patch works for FDPIC support?  This is based
> on your patch but has various changes.  Thanks.

Yes, it is working.

-- 
Thanks.
-- Max

[RFC 2/2] libstdc++-v3/src/libbacktrace: add -funwind-tables

[Max Filippov]

libstdc++-v3/

* src/libbacktrace/Makefile.am (AM_CFLAGS, AM_CXXFLAGS): Add
-funwind-tables
* src/libbacktrace/Makefile.in: Regenerate.
---
 libstdc++-v3/src/libbacktrace/Makefile.am | 4 ++--
 libstdc++-v3/src/libbacktrace/Makefile.in | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/libstdc++-v3/src/libbacktrace/Makefile.am 
b/libstdc++-v3/src/libbacktrace/Makefile.am
index a2e786712593..ecc0be7c305c 100644
--- a/libstdc++-v3/src/libbacktrace/Makefile.am
+++ b/libstdc++-v3/src/libbacktrace/Makefile.am
@@ -51,11 +51,11 @@ C_WARN_FLAGS = $(WARN_FLAGS) -Wstrict-prototypes 
-Wmissing-prototypes -Wold-styl
 CXX_WARN_FLAGS = $(WARN_FLAGS) -Wno-unused-parameter
 AM_CFLAGS = \
$(glibcxx_lt_pic_flag) $(glibcxx_compiler_shared_flag) \
-   $(C_WARN_FLAGS)
+   -funwind-tables $(C_WARN_FLAGS)
 AM_CFLAGS += $(EXTRA_CFLAGS)
 AM_CXXFLAGS = \
$(glibcxx_lt_pic_flag) $(glibcxx_compiler_shared_flag) \
-   $(CXX_WARN_FLAGS) -fno-rtti -fno-exceptions
+   -funwind-tables $(CXX_WARN_FLAGS) -fno-rtti -fno-exceptions
 AM_CXXFLAGS += $(EXTRA_CXXFLAGS)
 
 obj_prefix = std_stacktrace
diff --git a/libstdc++-v3/src/libbacktrace/Makefile.in 
b/libstdc++-v3/src/libbacktrace/Makefile.in
index b5713b0c616e..eec6b36d8cbd 100644
--- a/libstdc++-v3/src/libbacktrace/Makefile.in
+++ b/libstdc++-v3/src/libbacktrace/Makefile.in
@@ -473,9 +473,9 @@ libstdc___libbacktrace_la_CPPFLAGS = \
 C_WARN_FLAGS = $(WARN_FLAGS) -Wstrict-prototypes -Wmissing-prototypes 
-Wold-style-definition -Wno-unused-but-set-variable
 CXX_WARN_FLAGS = $(WARN_FLAGS) -Wno-unused-parameter
 AM_CFLAGS = $(glibcxx_lt_pic_flag) $(glibcxx_compiler_shared_flag) \
-   $(C_WARN_FLAGS) $(EXTRA_CFLAGS)
+   -funwind-tables $(C_WARN_FLAGS) $(EXTRA_CFLAGS)
 AM_CXXFLAGS = $(glibcxx_lt_pic_flag) $(glibcxx_compiler_shared_flag) \
-   $(CXX_WARN_FLAGS) -fno-rtti -fno-exceptions $(EXTRA_CXXFLAGS)
+   -funwind-tables $(CXX_WARN_FLAGS) -fno-rtti -fno-exceptions 
$(EXTRA_CXXFLAGS)
 obj_prefix = std_stacktrace
 
 # Each FILE.c in SOURCES will be compiled to SHORTNAME-FILE.o
-- 
2.39.2

[RFC 0/2] libbacktrace: add FDPIC support

[Max Filippov]

This is an RFC series that adds FDPIC ELF target support to
libbacktrace.

While debugging this I've noticed that there's no unwinding info for the
libstdc++ version of libbacktrace, which made backtraces empty for me,
both on xtensa-linux-uclibcfdpic and on regular xtensa-linux-uclibc.
Adding -funwind-tables to the libstdc++ version of libbacktrace fixed
that. Which makes me wonder how it works for other architectures?

Max Filippov (2):
  libbacktrace: add FDPIC support
  libstdc++-v3/src/libbacktrace: add -funwind-tables

 libbacktrace/dwarf.c  | 60 ++-
 libbacktrace/elf.c| 20 +---
 libbacktrace/internal.h   | 14 +-
 libstdc++-v3/src/libbacktrace/Makefile.am |  4 +-
 libstdc++-v3/src/libbacktrace/Makefile.in |  4 +-
 5 files changed, 66 insertions(+), 36 deletions(-)

-- 
2.39.2

[RFC 1/2] libbacktrace: add FDPIC support

[Max Filippov]

Instead of a single base address FDPIC ELF files use load map: a
structure with an array of mappings for individual segments.  Change
libbacktrace functions and structures to support that.

libbacktrace/

PR libbacktrace/114941
* dwarf.c: Include  or  if available.
(struct dwarf_data): Change base_address type to base_address_type.
(add_low_high_range): Change base_address argument type to
base_address_type.  Use __RELOC_UINTPTR for lowpc and highpc
calculation.
(add_ranges_from_ranges): Change base_address argument type to
base_address_type.  Use __RELOC_UINTPTR to calculate arguments
for add_range().
(add_ranges_from_rnglists): Change base_address argument type to
base_address_type.  Use __RELOC_UINTPTR to calculate arguments
for add_range().  Use __RELOC_UINTPTR for low calculation.
(add_ranges, find_address_ranges, build_address_map): Change
base_address argument type to base_address_type.
(add_line): Use __RELOC_UINTPTR for ln->pc calculation.
(build_dwarf_data, backtrace_dwarf_add): Change base_address
argument type to base_address_type.
* elf.c (elf_initialize_syminfo): Change base_address argument
type to base_address_type.  Use __RELOC_UINTPTR for
elf_symbols[j].address calculation.
(elf_add): Change base_address argument type to
base_address_type.  Do early return -1 in case of FDPIC
executable, update corresponding comment.
(backtrace_initialize): Change NULL base address parameter in
the add_elf() call to no_base_address.
* internal.h (base_address_type, __RELOC_POINTER)
(__RELOC_UINTPTR, no_base_address): New definitions.
(backtrace_dwarf_add): Change base_address argument type to
base_address_type.
---
 libbacktrace/dwarf.c| 60 -
 libbacktrace/elf.c  | 20 +-
 libbacktrace/internal.h | 14 +-
 3 files changed, 62 insertions(+), 32 deletions(-)

diff --git a/libbacktrace/dwarf.c b/libbacktrace/dwarf.c
index ed0672964c24..bcab23562e2a 100644
--- a/libbacktrace/dwarf.c
+++ b/libbacktrace/dwarf.c
@@ -43,6 +43,15 @@ POSSIBILITY OF SUCH DAMAGE.  */
 #include "backtrace.h"
 #include "internal.h"
 
+#ifdef __FDPIC__
+ #ifdef HAVE_LINK_H
+  #include 
+ #endif
+ #ifdef HAVE_SYS_LINK_H
+  #include 
+ #endif
+#endif
+
 #if !defined(HAVE_DECL_STRNLEN) || !HAVE_DECL_STRNLEN
 
 /* If strnlen is not declared, provide our own version.  */
@@ -389,7 +398,7 @@ struct dwarf_data
   /* The data for .gnu_debugaltlink.  */
   struct dwarf_data *altlink;
   /* The base address for this file.  */
-  uintptr_t base_address;
+  base_address_type base_address;
   /* A sorted list of address ranges.  */
   struct unit_addrs *addrs;
   /* Number of address ranges in list.  */
@@ -1610,7 +1619,7 @@ update_pcrange (const struct attr* attr, const struct 
attr_val* val,
 static int
 add_low_high_range (struct backtrace_state *state,
const struct dwarf_sections *dwarf_sections,
-   uintptr_t base_address, int is_bigendian,
+   base_address_type base_address, int is_bigendian,
struct unit *u, const struct pcrange *pcrange,
int (*add_range) (struct backtrace_state *state,
  void *rdata, uintptr_t lowpc,
@@ -1646,8 +1655,8 @@ add_low_high_range (struct backtrace_state *state,
 
   /* Add in the base address of the module when recording PC values,
  so that we can look up the PC directly.  */
-  lowpc += base_address;
-  highpc += base_address;
+  lowpc = __RELOC_UINTPTR (lowpc, base_address);
+  highpc = __RELOC_UINTPTR (highpc, base_address);
 
   return add_range (state, rdata, lowpc, highpc, error_callback, data, vec);
 }
@@ -1659,7 +1668,7 @@ static int
 add_ranges_from_ranges (
 struct backtrace_state *state,
 const struct dwarf_sections *dwarf_sections,
-uintptr_t base_address, int is_bigendian,
+base_address_type base_address, int is_bigendian,
 struct unit *u, uintptr_t base,
 const struct pcrange *pcrange,
 int (*add_range) (struct backtrace_state *state, void *rdata,
@@ -1706,8 +1715,8 @@ add_ranges_from_ranges (
   else
{
  if (!add_range (state, rdata, 
- (uintptr_t) low + base + base_address,
- (uintptr_t) high + base + base_address,
+ __RELOC_UINTPTR (low + base, base_address),
+ __RELOC_UINTPTR (high + base, base_address),
  error_callback, data, vec))
return 0;
}
@@ -1726,7 +1735,7 @@ static int
 add_ranges_from_rnglists (
 struct backtrace_state *state,
 const struct dwarf_sections *dwarf_sections,
-uintptr_t base_address, int is_bigendian,
+base_address_type base_address, int is_bigendian,

Re: [RFC 0/2] libbacktrace: add FDPIC support

[Max Filippov]

On Mon, May 27, 2024 at 12:01 AM Rainer Orth
 wrote:
> > This is an RFC series that adds FDPIC ELF target support to
> > libbacktrace.
> >
> > While debugging this I've noticed that there's no unwinding info for the
> > libstdc++ version of libbacktrace, which made backtraces empty for me,
> > both on xtensa-linux-uclibcfdpic and on regular xtensa-linux-uclibc.
> > Adding -funwind-tables to the libstdc++ version of libbacktrace fixed
> > that. Which makes me wonder how it works for other architectures?
>
> it doesn't ;-(  See PR libstdc++/111641 for details.  There's a patch in
> there, too.

Oh, cool, thanks for the pointer Rainer. So patch 2 of this series can be
disregarded.

-- 
Thanks.
-- Max

Re: [PATCH 1/2] xtensa: Use REG_P(), MEM_P(), etc. instead of comparing GET_CODE()

[Max Filippov]

On Thu, May 30, 2024 at 6:33 AM Takayuki 'January June' Suwa
 wrote:
>
> Instead of comparing directly, this patch replaces as much as possible with
> macros that determine RTX code such as REG_P(), SUBREG_P() or MEM_P(), etc.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.cc (xtensa_valid_move, constantpool_address_p,
> xtensa_tls_symbol_p, gen_int_relational, xtensa_emit_move_sequence,
> xtensa_copy_incoming_a7, xtensa_expand_block_move,
> xtensa_expand_nonlocal_goto, xtensa_emit_call,
> xtensa_legitimate_address_p, xtensa_legitimize_address,
> xtensa_tls_referenced_p, print_operand, print_operand_address,
> xtensa_output_literal):
> Replace RTX code comparisons with their predicate macros such as
> REG_P().
> * config/xtensa/xtensa.h (CONSTANT_ADDRESS_P,
> LEGITIMATE_PIC_OPERAND_P): Ditto.
> * config/xtensa/xtensa.md (reload_literal, indirect_jump):
> Ditto.
> ---
>   gcc/config/xtensa/xtensa.cc | 90 ++---
>   gcc/config/xtensa/xtensa.h  | 10 ++---
>   gcc/config/xtensa/xtensa.md |  4 +-
>   3 files changed, 51 insertions(+), 53 deletions(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
For some reason neither git am nor patch -p1 could apply this patch,
so I did that manually.

-- 
Thanks.
-- Max

Re: [PATCH 2/2] xtensa: Use epilogue_completed rather than cfun->machine->epilogue_done

[Max Filippov]

On Thu, May 30, 2024 at 6:33 AM Takayuki 'January June' Suwa
 wrote:
>
> In commit ad89d820bf, an "epilogue_done" member was added to the
> machine_function structure, but it is sufficient to use the existing
> "epilogue_completed" global variable.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa-protos.h
> (xtensa_use_return_instruction_p): Remove.
> * config/xtensa/xtensa.cc
> (machine_function): Remove "epilogue_done" field.
> (xtensa_expand_epilogue): Remove "cfun->machine->epilogue_done" usage.
> (xtensa_use_return_instruction_p): Remove.
> * config/xtensa/xtensa.md ("return"):
> Replace calling "xtensa_use_return_instruction_p()" with inline code.
> ---
>   gcc/config/xtensa/xtensa-protos.h |  1 -
>   gcc/config/xtensa/xtensa.cc   | 14 --
>   gcc/config/xtensa/xtensa.md   |  5 -
>   3 files changed, 4 insertions(+), 16 deletions(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.

-- 
Thanks.
-- Max

Re: [PATCH 1/2] xtensa: Simplify several MD templates

[Max Filippov]

On Fri, May 31, 2024 at 07:23:13PM +0900, Takayuki 'January June' Suwa wrote:
> No functional changes.
> 
> gcc/ChangeLog:
> 
>   * config/xtensa/predicates.md
>   (subreg_HQI_lowpart_operator, xtensa_sminmax_operator):
>   New operator predicates.
>   * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
>   Remove.
>   * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p): Ditto.
>   * config/xtensa/xtensa.md
>   (*addsubx, *extzvsi-1bit_ashlsi3, *extzvsi-1bit_addsubx):
>   Revise the output statements by conditional ternary operator rather
>   than switch-case clause in order to avoid using gcc_unreachable().
>   (xtensa_clamps): Reduce to a single pattern definition using the
>   predicate added above.
>   (Some split patterns to assist *masktrue_const_bitcmpl): Ditto.
> ---
>  gcc/config/xtensa/predicates.md   |  23 +++
>  gcc/config/xtensa/xtensa-protos.h |   1 -
>  gcc/config/xtensa/xtensa.cc   |  10 ---
>  gcc/config/xtensa/xtensa.md   | 109 ++
>  4 files changed, 43 insertions(+), 100 deletions(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.

Suwa-san, something has changed in your mail setup apparently: every
patch context line now gets an extra space in the beginning. Could you
please fix that?

-- 
Thanks.
-- Max

Re: [PATCH 2/2] xtensa: Prepend "(use A0_REG)" to sibling call CALL_INSN_FUNCTION_USAGE instead of emitting it as insn at the end of epilogue

[Max Filippov]

On Fri, May 31, 2024 at 07:24:48PM +0900, Takayuki 'January June' Suwa wrote:
> No functional changes.
> 
> gcc/ChangeLog:
> 
>   * config/xtensa/xtensa-protos.h (xtensa_expand_call):
>   Add the third argument as boolean.
>   (xtensa_expand_epilogue): Remove the first argument.
>   * config/xtensa/xtensa.cc (xtensa_expand_call):
>   Add the third argument "sibcall_p", and modify in order to prepend
>   "(use A0_REG)" to CALL_INSN_FUNCTION_USAGE if the argument is true.
>   (xtensa_expand_epilogue): Remove the first argument "sibcall_p" and
>   its conditional clause.
>   * config/xtensa/xtensa.md (call, call_value, sibcall, sibcall_value):
>   Append a boolean value to the argument of xtensa_expand_call()
>   indicating whether it is sibling call or not.
>   (epilogue): Remove the boolean argument from xtensa_expand_epilogue(),
>   and then append emitting "(return)".
>   (sibcall_epilogue): Remove the boolean argument from
>   xtensa_expand_epilogue().
> ---
>  gcc/config/xtensa/xtensa-protos.h |  4 ++--
>  gcc/config/xtensa/xtensa.cc   | 16 ++--
>  gcc/config/xtensa/xtensa.md   | 13 +++--
>  3 files changed, 19 insertions(+), 14 deletions(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.

-- 
Thanks.
-- Max

Re: [RFC 1/2] libbacktrace: add FDPIC support

[Max Filippov]

On Sun, May 26, 2024 at 11:50 PM Max Filippov  wrote:
>
> Instead of a single base address FDPIC ELF files use load map: a
> structure with an array of mappings for individual segments.  Change
> libbacktrace functions and structures to support that.

Ping?

> libbacktrace/
>
> PR libbacktrace/114941
> * dwarf.c: Include  or  if available.
> (struct dwarf_data): Change base_address type to base_address_type.
> (add_low_high_range): Change base_address argument type to
> base_address_type.  Use __RELOC_UINTPTR for lowpc and highpc
> calculation.
> (add_ranges_from_ranges): Change base_address argument type to
> base_address_type.  Use __RELOC_UINTPTR to calculate arguments
> for add_range().
> (add_ranges_from_rnglists): Change base_address argument type to
> base_address_type.  Use __RELOC_UINTPTR to calculate arguments
> for add_range().  Use __RELOC_UINTPTR for low calculation.
> (add_ranges, find_address_ranges, build_address_map): Change
> base_address argument type to base_address_type.
> (add_line): Use __RELOC_UINTPTR for ln->pc calculation.
> (build_dwarf_data, backtrace_dwarf_add): Change base_address
> argument type to base_address_type.
> * elf.c (elf_initialize_syminfo): Change base_address argument
> type to base_address_type.  Use __RELOC_UINTPTR for
> elf_symbols[j].address calculation.
> (elf_add): Change base_address argument type to
> base_address_type.  Do early return -1 in case of FDPIC
> executable, update corresponding comment.
> (backtrace_initialize): Change NULL base address parameter in
> the add_elf() call to no_base_address.
> * internal.h (base_address_type, __RELOC_POINTER)
> (__RELOC_UINTPTR, no_base_address): New definitions.
> (backtrace_dwarf_add): Change base_address argument type to
> base_address_type.
> ---
>  libbacktrace/dwarf.c| 60 -
>  libbacktrace/elf.c  | 20 +-----
>  libbacktrace/internal.h | 14 +-
>  3 files changed, 62 insertions(+), 32 deletions(-)

-- 
Thanks.
-- Max

Re: [PATCH] xtensa: constantsynth: Reforge to fix some non-fatal issues

[Max Filippov]

   
 
0xc19207 gt_ggc_mx_function(void*)

/home/jcmvbkbc/ws/tensilica/gcc/builds/gcc-15-1382-g448482d3d5c2-xtensa-call0-le/gcc/gtype-desc.cc:1680

 
0x85ffe7 gt_ggc_mx_lang_tree_node(void*)
./gt-c-c-decl.h:289 
0x86019c gt_ggc_mx_lang_tree_node(void*)
./gt-c-c-decl.h:381
0x860134 gt_ggc_mx_lang_tree_node(void*)


./gt-c-c-decl.h:365
0x85fa04 gt_ggc_mx_lang_tree_node(void*)


./gt-c-c-decl.h:259
0x86019c gt_ggc_mx_lang_tree_node(void*)


./gt-c-c-decl.h:381
0x86063e gt_ggc_mx_lang_tree_node(void*)


./gt-c-c-decl.h:204
0x8601be gt_ggc_mx_lang_tree_node(void*)


./gt-c-c-decl.h:383
0x85fa04 gt_ggc_mx_lang_tree_node(void*)
./gt-c-c-decl.h:259 


0x86019c gt_ggc_mx_lang_tree_node(void*)


./gt-c-c-decl.h:381
0x8600ee gt_ggc_mx_lang_tree_node(void*)


./gt-c-c-decl.h:360
0xc99b58 gt_ggc_mx_ipa_return_value_summary(void*)  


./gt-ipa-prop.h:44
0xc99b58 gt_ggc_mx_ipa_return_value_summary(void*)  


./gt-ipa-prop.h:39
0xc99b58 gt_ggc_mx(ipa_return_value_summary*&)
        ./gt-ipa-prop.h:62  



-- 
Thanks.
-- Max

Re: [PATCH v2] xtensa: constantsynth: Reforge to fix some non-fatal issues

[Max Filippov]

On Tue, Jun 18, 2024 at 7:56 PM Takayuki 'January June' Suwa
 wrote:
>
> The previous constant synthesis logic had some issues that were non-fatal
> but worth considering:
>
> - It didn't work with DFmode literals, because those were cast to SImode
>rather SFmode when splitting into two natural-width words by
>split_double().
>
> - It didn't work with large literals when TARGET_AUTO_LITPOOLS was enabled,
>because those were relaxed MOVI immediates rather references to literal
>pool entries,
>
> - It didn't take into account that when literals with the same RTL
>representation are pooled multiple times within a function, those entries
>are shared (especially important when optimizing for size).
>
> This patch addresses the above issues by making appropriate tweaks to the
> constant synthesis logic.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa-protos.h (xtensa_constantsynth):
> Change the second argument from HOST_WIDE_INT to rtx.
> * config/xtensa/xtensa.cc (#include):
> Add "context.h" and "pass_manager.h".
> (machine_function): Add a new hash_map field "litpool_usage".
> (xtensa_constantsynth): Make "src" (the second operand) accept
> RTX literal instead of its value, and treat both bare and pooled
> SI/SFmode literals equally by bit-exact canonicalization into
> CONST_INT RTX internally.  And then, make avoid synthesis if
> such multiple identical canonicalized literals are found in same
> function when optimizing for size.  Finally, for literals where
> synthesis is not possible or has been avoided, re-emit "move"
> RTXes with canonicalized ones to increase the chances of sharing
> literal pool entries.
> * config/xtensa/xtensa.md (split patterns for constant synthesis):
> Change to simply invoke xtensa_constantsynth() as mentioned above,
> and add new patterns for when TARGET_AUTO_LITPOOLS is enabled.
> ---
>   gcc/config/xtensa/xtensa-protos.h |  2 +-
>   gcc/config/xtensa/xtensa.cc   | 75 ---
>   gcc/config/xtensa/xtensa.md   | 56 ++-
>   3 files changed, 103 insertions(+), 30 deletions(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.

-- 
Thanks.
-- Max

Re: [PATCH] xtensa: Eliminate double MEMW insertions for volatile memory

[Max Filippov]

On Tue, Jun 18, 2024 at 10:00 PM Takayuki 'January June' Suwa
 wrote:
>
> This patch makes avoid inserting a MEMW instruction before a load/store
> nstruction with volatile memory reference if there is already a MEMW
> immediately before it.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.cc (print_operand):
> When outputting MEMW before the instruction, check if the previous
> instruction is already that.
> ---
>   gcc/config/xtensa/xtensa.cc | 12 +++-
>   1 file changed, 11 insertions(+), 1 deletion(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.

-- 
Thanks.
-- Max

[COMMITTED] gcc: xtensa: disable late-combine by default

[Max Filippov]

gcc/
* config/xtensa/xtensa.cc (xtensa_option_override_after_change):
New function.
(TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE): Define as
xtensa_option_override_after_change.
(xtensa_option_override): Call
xtensa_option_override_after_change.
---
 gcc/config/xtensa/xtensa.cc | 13 +
 1 file changed, 13 insertions(+)

diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
index d49d224466ad..10d964b51a96 100644
--- a/gcc/config/xtensa/xtensa.cc
+++ b/gcc/config/xtensa/xtensa.cc
@@ -114,6 +114,7 @@ struct GTY(()) machine_function
 };
 
 static void xtensa_option_override (void);
+static void xtensa_option_override_after_change (void);
 static enum internal_test map_test_to_internal_test (enum rtx_code);
 static rtx gen_int_relational (enum rtx_code, rtx, rtx);
 static rtx gen_float_relational (enum rtx_code, rtx, rtx);
@@ -303,6 +304,9 @@ static rtx xtensa_delegitimize_address (rtx);
 #undef TARGET_OPTION_OVERRIDE
 #define TARGET_OPTION_OVERRIDE xtensa_option_override
 
+#undef TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE
+#define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE 
xtensa_option_override_after_change
+
 #undef TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA
 #define TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA xtensa_output_addr_const_extra
 
@@ -2988,6 +2992,15 @@ xtensa_option_override (void)
  the define_insn_and_splits are fixed.  */
   if (!OPTION_SET_P (flag_late_combine_instructions))
 flag_late_combine_instructions = 0;
+
+  xtensa_option_override_after_change ();
+}
+
+static void
+xtensa_option_override_after_change (void)
+{
+  if (!OPTION_SET_P (flag_late_combine_instructions))
+flag_late_combine_instructions = 0;
 }
 
 /* Implement TARGET_HARD_REGNO_NREGS.  */
-- 
2.39.2

Re: [PATCH v2 2/3] xtensa: Make use of std::swap where appropriate

[Max Filippov]

On Sun, Jul 14, 2024 at 4:05 AM Takayuki 'January June' Suwa
 wrote:
>
> No functional changes.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.cc
> (gen_int_relational, gen_float_relational): Replace tempvar-based
> value-swapping codes with std::swap.
> * config/xtensa/xtensa.md (movdi_internal, movdf_internal):
> Ditto.
> ---
>   gcc/config/xtensa/xtensa.cc | 12 ++--
>   gcc/config/xtensa/xtensa.md | 10 --
>   2 files changed, 6 insertions(+), 16 deletions(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master

-- 
Thanks.
-- Max

Re: [PATCH 3/3] xtensa: Make use of scaled [U]FLOAT/TRUNC.S instructions

[Max Filippov]

On Sun, Jul 14, 2024 at 4:05 AM Takayuki 'January June' Suwa
 wrote:
>
> [U]FLOAT.S machine instruction in Xtensa ISA, which converts an integer to
> a hardware single-precision FP register, has the ability to divide the
> result by power of two (0 to 15th).
>
> Similarly, [U]TRUNC.S instruction, which truncates single-precision FP to
> integer, can multiply the source value by power of two in advance, but
> neither of these currently uses this function (always specified with 0th
> power of two, i.e. a scaling factor of 1).
>
> This patch unleashes the scaling ability of the above instructions.
>
>  /* example */
>  float test0(int a) {
>return a / 2.f;
>  }
>  float test1(unsigned int a) {
>return a / 32768.f;
>  }
>  int test2(float a) {
>return a * 2;
>  }
>  unsigned int test3(float a) {
>return a * 32768;
>  }
>
>  ;; before
>  test0:
> movi.n  a9, 0x3f
> float.s f0, a2, 0
> sllia9, a9, 24
> wfr f1, a9
> mul.s   f0, f0, f1
> rfr a2, f0
> ret.n
>  test1:
> movi.n  a9, 7
> ufloat.sf0, a2, 0
> sllia9, a9, 27
> wfr f1, a9
> mul.s   f0, f0, f1
> rfr a2, f0
> ret.n
>  test2:
> wfr f1, a2
> add.s   f0, f1, f1
> trunc.s a2, f0, 0
> ret.n
>  test3:
> movi.n  a9, 0x47
> sllia9, a9, 24
> wfr f1, a2
> wfr f2, a9
> mul.s   f0, f1, f2
> utrunc.sa2, f0, 0
> ret.n
>
>  ;; after
>  test0:
> float.s f0, a2, 1
> rfr a2, f0
> ret.n
>  test1:
> ufloat.sf0, a2, 15
> rfr a2, f0
> ret.n
>  test2:
> wfr f0, a2
> trunc.s a2, f0, 1
> ret.n
>  test3:
> wfr f0, a2
> utrunc.sa2, f0, 15
> ret.n
>
> gcc/ChangeLog:
>
> * config/xtensa/predicates.md
> (fix_scaling_operand, float_scaling_operand): New predicates.
> * config/xtensa/xtensa.md
> (any_fix/m_fix/s_fix, any_float/m_float/s_float):
> New code iterators and their attributes.
> (fix_truncsfsi2): Change from "fix_truncsfsi2".
> (*fix_truncsfsi2_2x, *fix_truncsfsi2_scaled):
> New insn definitions.
> (floatsisf2): Change from "floatsisf2".
> (*floatsisf2_scaled): New insn definition.
> ---
>   gcc/config/xtensa/predicates.md | 20 
>   gcc/config/xtensa/xtensa.md | 58 ++---
>   2 files changed, 66 insertions(+), 12 deletions(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master

-- 
Thanks.
-- Max

Re: [PATCH v2 1/3] xtensa: Resurrect LEAF_REGISTERS and LEAF_REG_REMAP

[Max Filippov]

On Sun, Jul 14, 2024 at 4:05 AM Takayuki 'January June' Suwa
 wrote:
>
> They were once mistakenly removed with
> "xtensa: Remove old broken tweak for leaf function", but caused unwanted
> register spills.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.h (LEAF_REGISTERS, LEAF_REG_REMAP):
> Withdraw the removal.
> * config/xtensa/xtensa.cc (xtensa_leaf_regs): Ditto.
> ---
>   gcc/config/xtensa/xtensa.cc | 11 +++
>   gcc/config/xtensa/xtensa.h  | 12 
>   2 files changed, 23 insertions(+)

with this change I get the following regressions on little-endian call0
configuration:

+FAIL: gcc.c-torture/compile/20071102-1.c   -O3 -g  (internal compiler
error: in loc_cmp, at var-tracking.cc:3462)
+FAIL: gcc.c-torture/compile/20071102-1.c   -O3 -g  (test for excess errors)
+FAIL: gcc.c-torture/compile/simd-2.c   -O3 -g  (internal compiler
error: in loc_cmp, at var-tracking.cc:3462)
+FAIL: gcc.c-torture/compile/simd-2.c   -O3 -g  (test for excess errors)

their backtraces look like this:

during RTL pass: vartrack
/home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/testsuite/gcc.c-torture/compile/20071102-1.c:
In function 'g':
/home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/testsuite/gcc.c-torture/compile/20071102-1.c:32:1:
internal compiler error: in loc_cmp, at var-tracking.cc:3462
0x1b19d1e internal_error(char const*, ...)
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/diagnostic-global-context.cc:491
0x845156 fancy_abort(char const*, int, char const*)
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/diagnostic.cc:1725
0x77ea22 loc_cmp
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:3462
0x129cfc4 canonicalize_loc_order_check(variable**, dataflow_set*)
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:3640
0x12ad319 void hash_table::traverse_noresize(dataflow_set*)
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/hash-table.h:1173
0x12ad319 void hash_table::traverse(dataflow_set*)
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/hash-table.h:1194
0x12ac844 compute_bb_dataflow
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:7041
0x12ac844 vt_find_locations
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:7185
0x12ac9cb variable_tracking_main_1
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:10525
0x12acb5b variable_tracking_main()
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:10571
0x12acb5b execute
   /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:10608


> diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
> index d49d224466a..099213f0994 100644
> --- a/gcc/config/xtensa/xtensa.cc
> +++ b/gcc/config/xtensa/xtensa.cc
> @@ -113,6 +113,17 @@ struct GTY(()) machine_function
> hash_map *litpool_usage;
>   };
>
> +/* Vector, indexed by hard register number, which contains 1 for a
> +   register that is allowable in a candidate for leaf function
> +   treatment.  */
> +const char xtensa_leaf_regs[FIRST_PSEUDO_REGISTER] =
> +{
> +  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
> +  1, 1, 1,
> +  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
> +  1
> +};
> +
>   static void xtensa_option_override (void);
>   static enum internal_test map_test_to_internal_test (enum rtx_code);
>   static rtx gen_int_relational (enum rtx_code, rtx, rtx);
> diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
> index 86802343152..3bff973fd88 100644
> --- a/gcc/config/xtensa/xtensa.h
> +++ b/gcc/config/xtensa/xtensa.h
> @@ -253,6 +253,18 @@ along with GCC; see the file COPYING3.  If not see
>   }
>   #define ADJUST_REG_ALLOC_ORDER xtensa_adjust_reg_alloc_order ()
>
> +/* For Xtensa, the only point of this is to prevent GCC from otherwise
> +   giving preference to call-used registers.  To minimize window
> +   overflows for the AR registers, we want to give preference to the
> +   lower-numbered AR registers.  For other register files, which are
> +   not windowed, we still prefer call-used registers, if there are any.  */
> +extern const char xtensa_leaf_regs[FIRST_PSEUDO_REGISTER];
> +#define LEAF_REGISTERS xtensa_leaf_regs
> +
> +/* For Xtensa, no remapping is necessary, but this macro must be
> +   defined if LEAF_REGISTERS is defined.  */
> +#define LEAF_REG_REMAP(REGNO) ((int) (REGNO))
> +
>   /* Internal macros to classify a register number.  */
>
>   /* 16 address registers + fake registers */
> --
> 2.39.2



-- 
Thanks.
-- Max

Re: [PATCH] xtensa: Fix the regression introduce by abe81aa19f250516fd57f76cad9c0920cce221bc

[Max Filippov]

On Fri, Jul 19, 2024 at 1:35 PM Takayuki 'January June' Suwa
 wrote:
>
> It is not wrong but also not optimal to specify that sibcalls require
> register A0 in RTX generation pass, by misleading DFA into thinking it
> is being used in function body.
> It would be better to specify it in pro_and_epilogue as with 'return'
> insn in order to avoid incorrect removing load that restores A0 in
> subsequent passes, but since it is not possible to modify each sibcall
> there, as a workaround we will preface it with a 'use' as before.
>
> This patch effectively reverts commit 
> abe81aa19f250516fd57f76cad9c0920cce221bc.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa-protos.h (xtensa_expand_call):
> Remove the third argument.
> * config/xtensa/xtensa.cc (xtensa_expand_call):
> Remove the third argument and the code that uses it.
> * config/xtensa/xtensa.md (call, call_value, sibcall, sibcall_value):
> Remove each Boolean constant specified in the third argument of
> xtensa_expand_call.
> (sibcall_epilogue): Add emitting '(use A0_REG)' after calling
> xtensa_expand_epilogue.
> ---
>   gcc/config/xtensa/xtensa-protos.h |  2 +-
>   gcc/config/xtensa/xtensa.cc   | 10 +-
>   gcc/config/xtensa/xtensa.md   |  9 +
>   3 files changed, 7 insertions(+), 14 deletions(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master

-- 
Thanks.
-- Max

Re: [PATCH 1/2] xtensa: Fix suboptimal loading of pooled constant value into hardware single-precision FP register

[Max Filippov]

On Tue, Jul 23, 2024 at 5:52 PM Takayuki 'January June' Suwa
 wrote:
>
> We would like to implement the following to store a single-precision FP
> constant in a hardware FP register:
>
> - Load the bit-exact integer image of the pooled single-precision FP
>constant into an address (integer) register
> - Then, assign from that address register to a hardware single-precision
>FP register
>
> .literal_position
> .literal.LC1, 0x3f80
> ...
> l32ra9, .LC1
> wfr f0, a9
>
> However, it was emitted as follows:
>
> - Load the address of the FP constant entry in litpool into an address
>register
> - Then, dereference the address via that address register into a hardware
>single-precision FP register
>
> .literal_position
> .literal.LC1, 0x3f80
> .literal.LC2, .LC1
> ...
> l32ra9, .LC2
> lsi f0, a9, 0
>
> It is obviously inefficient to read the pool twice.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.md (movsf_internal):
> Reorder alternative that corresponds to L32R machine instruction,
> and prefix alternatives that correspond to LSI/SSI instructions
> with the constraint character '^' so that they are disparaged by
> reload/LRA.

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master

-- 
Thanks.
-- Max

Re: [PATCH 2/2] xtensa: Add missing speed cost for TYPE_FARITH in TARGET_INSN_COST

[Max Filippov]

On Tue, Jul 23, 2024 at 5:52 PM Takayuki 'January June' Suwa
 wrote:
>
> According to the implemented pipeline model, this cost can be assumed to be
> 1 clock cycle.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.cc (xtensa_insn_cost):
> Add a case statement for TYPE_FARITH.

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master

-- 
Thanks.
-- Max

[PATCH] xtensa: fix libgcc build with --text-section-literals

[Max Filippov]

Functions __muldf3_aux, __divdf3_aux, __mulsf3_aux and __divsf3_aux
don't start with leaf_entry, so they need explicit .literal_position,
otherwise libgcc build fails in the presence of --text-section-literals.

2016-02-17  Max Filippov  
libgcc/
* config/xtensa/ieee754-df.S (__muldf3_aux, __divdf3_aux): Add
.literal_position before the function.
* config/xtensa/ieee754-sf.S (__mulsf3_aux, __divsf3_aux):
Likewise.
---
 libgcc/config/xtensa/ieee754-df.S | 2 ++
 libgcc/config/xtensa/ieee754-sf.S | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/libgcc/config/xtensa/ieee754-df.S 
b/libgcc/config/xtensa/ieee754-df.S
index 743dbf2..1d9ef46 100644
--- a/libgcc/config/xtensa/ieee754-df.S
+++ b/libgcc/config/xtensa/ieee754-df.S
@@ -606,6 +606,7 @@ __subdf3:
 #define XCHAL_NO_MUL 1
 #endif
 
+   .literal_position
 __muldf3_aux:
 
/* Handle unusual cases (zeros, subnormals, NaNs and Infinities).
@@ -1216,6 +1217,7 @@ __muldf3:
 
 #ifdef L_divdf3
 
+   .literal_position
/* Division */
 __divdf3_aux:
 
diff --git a/libgcc/config/xtensa/ieee754-sf.S 
b/libgcc/config/xtensa/ieee754-sf.S
index 1843749..7864a74 100644
--- a/libgcc/config/xtensa/ieee754-sf.S
+++ b/libgcc/config/xtensa/ieee754-sf.S
@@ -487,6 +487,7 @@ __subsf3:
 #define XCHAL_NO_MUL 1
 #endif
 
+   .literal_position
 __mulsf3_aux:
 
/* Handle unusual cases (zeros, subnormals, NaNs and Infinities).
@@ -884,6 +885,7 @@ __mulsf3:
 
 #ifdef L_divsf3
 
+   .literal_position
/* Division */
 __divsf3_aux:
 
-- 
2.1.4

Re: [PATCH] xtensa: fix libgcc build with --text-section-literals

[Max Filippov]

On Wed, Feb 17, 2016 at 10:59 PM, augustine.sterl...@gmail.com
 wrote:
> On Tue, Feb 16, 2016 at 4:35 PM, Max Filippov  wrote:
>> Functions __muldf3_aux, __divdf3_aux, __mulsf3_aux and __divsf3_aux
>> don't start with leaf_entry, so they need explicit .literal_position,
>> otherwise libgcc build fails in the presence of --text-section-literals.
>>
>> 2016-02-17  Max Filippov  
>> libgcc/
>> * config/xtensa/ieee754-df.S (__muldf3_aux, __divdf3_aux): Add
>> .literal_position before the function.
>> * config/xtensa/ieee754-sf.S (__mulsf3_aux, __divsf3_aux):
>> Likewise.
>
> This is OK, please submit.

Applied to trunk. Thank you!

-- Max

Re: [PATCH] Postpone __LINE__ evaluation to the end of #line directives

[Max Woodbury]

From 6c95593f684c120a0ea7ef6178401283f63250b7 Mon Sep 17 00:00:00 2001
From: Max TenEyck Woodbury 
Date: Sun, 24 Nov 2013 09:48:09 -0500
Subject: [PATCH] Postpone __LINE__ evaluation to the end of #line directives
To: gcc-patches@gcc.gnu.org

Copyright 2013 assigned to the Free Software Foundation.
---
 gcc/testsuite/gcc.dg/cpp/line4.c | 19 +++
 libcpp/directives.c  |  9 -
 libcpp/internal.h|  1 +
 libcpp/macro.c   |  3 +++
 4 files changed, 27 insertions(+), 5 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/cpp/line4.c 
b/gcc/testsuite/gcc.dg/cpp/line4.c

index 84dbf96..0120a2b 100644
--- a/gcc/testsuite/gcc.dg/cpp/line4.c
+++ b/gcc/testsuite/gcc.dg/cpp/line4.c
@@ -13,7 +13,18 @@ enum { i = __LINE__ };
 enum { j = __LINE__ };

 #line 16  /* N.B. the _next_ line is line 16.  */
-
-char array1[i== 44 ? 1 : -1];
-char array2[j== 90 ? 1 : -1];
-char array3[__LINE__ == 19 ? 1 : -1];
+ /* __LINE__ should 
be 16 */
+char array1[i== 44 ? 1 : -1]; 
 /* 17 */
+char array2[j== 90 ? 1 : -1]; 
 /* 18 */
+char array3[__LINE__ == 19 ? 1 : -1]; 
 /* 19 */
+ 
 /* 20 */
+# line __LINE__ /* N.B. the __LINE__ sequence should _not_ change here. 
 */
+ 
 /* 22 */
+char array4[__LINE__ == 23 ? 1: -1]; 
 /* 23 */
+char array5[__LINE__ == 23 ? -1: 1]; 
 /* 24 */
+ 
 /* 25 */
+# line __LINE__ /* N.B. nor should a multi-line comment change the fact 

+   that the __LINE__ sequence should _not_ change here. 
*/
+ 
 /* 28 */
+char array6[__LINE__ == 29 ? 1: -1]; 
 /* 29 */
+char array7[__LINE__ == 27 ? -1: 1]; 
 /* 30 */

diff --git a/libcpp/directives.c b/libcpp/directives.c
index 65b2034..adb04a5 100644
--- a/libcpp/directives.c
+++ b/libcpp/directives.c
@@ -900,7 +900,9 @@ do_line (cpp_reader *pfile)
   bool wrapped;

   /* #line commands expand macros.  */
+  ++pfile->state.in_directive;  /* Request special __LINE__ 
handling. */

   token = cpp_get_token (pfile);
+  --pfile->state.in_directive;  /* Cancel 
request */

   if (token->type != CPP_NUMBER
   || strtolinenum (token->val.str.text, token->val.str.len,
   &new_lineno, &wrapped))
@@ -914,7 +916,9 @@ do_line (cpp_reader *pfile)
   return;
 }

-  if (CPP_PEDANTIC (pfile) && (new_lineno == 0 || new_lineno > cap || 
wrapped))

+  if (CPP_PEDANTIC (pfile) && (new_lineno == 0
+  || (new_lineno > cap && new_lineno != CUR__LINE__)
+  || wrapped))
 cpp_error (pfile, CPP_DL_PEDWARN, "line number out of range");
   else if (wrapped)
 cpp_error (pfile, CPP_DL_WARNING, "line number out of range");
@@ -936,6 +940,9 @@ do_line (cpp_reader *pfile)
 }

   skip_rest_of_line (pfile);
+  if ( new_lineno == CUR__LINE__ )  /* Postponed 
evaluation ? */

+new_lineno = linemap_get_expansion_line (pfile->line_table,
+ 
pfile->line_table->highest_line);

   _cpp_do_file_change (pfile, LC_RENAME_VERBATIM, new_file, new_lineno,
   map_sysp);
 }
diff --git a/libcpp/internal.h b/libcpp/internal.h
index 5321458..268de86 100644
--- a/libcpp/internal.h
+++ b/libcpp/internal.h
@@ -604,6 +604,7 @@ cpp_in_primary_file (cpp_reader *pfile)
 {
   return pfile->line_table->depth == 1;
 }
+#define CUR__LINE__ -1U

 /* In macro.c */
 extern void _cpp_free_definition (cpp_hashnode *);
diff --git a/libcpp/macro.c b/libcpp/macro.c
index e359d15..47e41b6 100644
--- a/libcpp/macro.c
+++ b/libcpp/macro.c
@@ -309,6 +309,9 @@ _cpp_builtin_macro_text (cpp_reader *pfile, 
cpp_hashnode *node)

   /* If __LINE__ is embedded in a macro, it must expand to the
 line of the macro's invocation, not its definition.
 Otherwise things like assert() will not work properly.  */
+  if (pfile->state.in_directive > 1)   /* In #line 
directive? */
+number = CUR__LINE__;  /* yes, postpone the 
lookup... */

+  else
   number = linemap_get_expansion_line (pfile->line_table,
   CPP_OPTION (pfile, traditional)
   ? 
pfile->line_table->highest_line

--
1.8.0.rc0.18.gf84667d

Re: [PATCH] Postpone __LINE__ evaluation to the end of #line directives

[Max Woodbury]

On 11/27/2013 05:46 AM, Marek Polacek wrote:> On Wed, Nov 27, 2013 at 
05:29:22AM -0500, mtewoodb...@gmail.com wrote:

>> From: Max TenEyck Woodbury 
>
> This patch is badly missing a description.  You also want to mention
> the PR number, if this fixes a bug.  I guess this is to fix PR58687.
>

I am new to GNU patching.  There is some description on Bugzilla.  At
least one other group I have worked with disliked bug number references
in patches.

Please point me to the formatting requirements for change log entries...

On 11/27/2013 11:21 AM, Joseph S. Myers wrote:

On Wed, 27 Nov 2013, mtewoodb...@gmail.com wrote:


Copyright 2013 assigned to the Free Software Foundation.


FWIW I don't see this in copyright.list yet.  If you sent the paperwork
(whether paper mail or scans) to the FSF over a week ago and haven't had
it acknowledged, please chase up ass...@gnu.org, and keep chasing them up
weekly until it's acknowledged and a maintainer confirms it's now listed
in copyright.list.


I am a new at GNU patching.  I had hoped that a simple assignment in
the document would be sufficient.  I really do not want to turn
Everything I do over to FSF...




diff --git a/gcc/testsuite/gcc.dg/cpp/line4.c b/gcc/testsuite/gcc.dg/cpp/line4.c


I think it's best to leave this test as-is and add a new test line9.c
specifically for this case of "#line __LINE__".  Changing existing tests
unnecessarily complicates establishing whether a newly seen failure is a
regression or not.


HMM?  Not sure I understand that line of reasoning.  The test is about
setting the line number.  This just adds the __LINE__ special case.



I think it would be worth including tests where the __LINE__ expansion
(which as you note should be the line number of the line *after* the
directive) is involved in concatenation or stringized, e.g.

#define xstr(x) #x
#define str(x) xstr(x)
#line 1 str(__LINE__)

which should set __FILE__ to be the stringized number of the line after
the directive.  (I hope these cases will just work given your patch, so
this is just a matter of adding more to the testcase.)



This patch would not do that.  It only fixes the use of __LINE__ when
used to reset the line number.  There are at least two ways this could
be implemented and keep with the standard:

One would be to set the new line value as soon as it is seen in the
'# line' directive and let the normal __LINE__ tracking take care of
the end-of-line increments.  That would require a larger change than
this patch and would have implications when it comes to error handling.

The other is to postpone macro expansion until the end of the directive
has been seen.  That would require two passes over the token sequence;
one to build the sequence and a second to evaluate it.  Doing that is
'the right thing' in my opinion but it should be applied to all the
other directives that permit  substitution as well.  I tried
to do it that way initially, but that requires a deeper understanding
of the current implementation than I was able to build quickly.  I
would like to see a 'theory of operation' document that contained such
details, as some commercial software shops require, but that does not
seem to be how it is done here.

So I punted...

Re: [PATCH] Postpone __LINE__ evaluation to the end of #line directives

[Max Woodbury]

On 11/27/2013 04:10 PM, Joseph S. Myers wrote:

On further consideration, I'm not convinced there's a bug here at all; I
don't think it's sufficiently defined in the standard what the current
token is for the purposes of line numbering when __LINE__ gets expanded to
be able to say that one or the other value in a directive is wrong.  As
far as I can tell after checking the reflector email archives, the only
time WG14 considered anything vaguely relevant was C90 DR#173, which
didn't receive a response.

is a statement by the standard editor that some cases were deliberately
left ambiguous.  So that suggests the bug should be closed as INVALID (but
if you think this case should be fully defined, you could always file a DR
with WG14).


PLEASE think about this a bit more.

There should be a way to change the __FILE__ value without changing the
line number sequencing.  Whatever that mechanism is, it should NOT
introduce maintenance problems that involve counting lines of code.

A little Googeling quickly turns up examples that make it clear that:

#line __LINE__ "new__FILE__value"

is that expected mechanism,

A little additional thought should make it clear that multi-line
comments should NOT screw up resetting the line number,  They are
supposed to be removed in a translation phase before the phase where
directives are identified.

There is also the way the standard defines the two fixed forms for
'#line' first and then allows for  substitution for cases
that do not match the prescribed forms as a separate form.  All three
forms require that the  be seen before the directive is
processed which means any substitution for __LINE__ should only take
place AFTER the  that ends the directive has been seen.

In other words, if you processed the text in multiple phases the way
the standard requires, you would not substitute the value for the
__LINE__ token until after the end of the directive has been seen.
Thus the problem only arises because this implementation folds the
translation phases into a single pass over the text and takes an
improper short-cut as it does so.  The standard explicitly warns
against this kind of mistake.

It looks to me like WG14 tried quite hard to make the expected form
work the way most people expect it to.

So I have STRONG objections to calling the bug report 'INVALID'!

Fwd: Re: [PATCH] Postpone __LINE__ evaluation to the end of #line directives

[Max Woodbury]

 Original Message 
Subject: Re: [PATCH] Postpone __LINE__ evaluation to the end of #line 
directives

Date: Thu, 28 Nov 2013 17:32:41 -0500
From: Max Woodbury 
To: Joseph S. Myers 

On 11/28/2013 11:34 AM, Joseph S. Myers wrote:

On Wed, 27 Nov 2013, Max Woodbury wrote:


There should be a way to change the __FILE__ value without changing the
line number sequencing.  Whatever that mechanism is, it should NOT
introduce maintenance problems that involve counting lines of code.


I think that #line is mainly intended for use by code generators that
generate C code, rather than directly by people writing C programs.  Such
a code generator can easily manage counting lines of code.


A little Googeling quickly turns up examples that make it clear that:

 #line __LINE__ "new__FILE__value"

is that expected mechanism,


You'll find any number of examples online based on misconceptions about
the C languages, possibly together with what one particular implementation
does.  Any recommendation to do things based on an area where the editor
of the standard has said the ambiguity in the standard is deliberate is
clearly a bad recommendation.  Recommendations on use of C should be based
on areas where the standard is clear and implementations agree.


Please try not to be deliberately obstructive.  While #line is indeed
used extensively by code generators to map generated code back to the
source code used by the generator, other uses are possible, and the
expectations associated with those uses are worthy of serious
consideration.  '#line __LINE__' is indeed a common idiom and it is
expected to leave the line numbering sequence unchanged.

As for the sequence of comments you point to, they are discussing the
use of __LINE__ in macros, not directives.  The standard is quite a bit
more explicit about token substitution in directives, making it fairly
clear that substitution is not to occur in directives until
specifically called for.  The elaboration of three distinct forms for
the '#line' directive with substitution only being called for in the
third and last form, indicates that something special is intended.

The standard was not created in a vacuum.  The ideas did not
materialize out of thin air.  The elaborate specification was intended
to codify actual usage.  That usage included the '#line __LINE__' idiom
with its intent to NOT break line sequencing.


In other words, if you processed the text in multiple phases the way
the standard requires, you would not substitute the value for the
__LINE__ token until after the end of the directive has been seen.
Thus the problem only arises because this implementation folds the
translation phases into a single pass over the text and takes an
improper short-cut as it does so.  The standard explicitly warns
against this kind of mistake.


The standard itself mixes up the phases.  Recall that the definition of
line number is "one greater than the number of new-line characters read or
introduced in translation phase 1 (5.1.1.2) while processing the source
file to the current token" (where "current token" is never defined).  If
the phases were completely separate, by your reasoning every newline has
been processed in phase 1 before any of phases 2, 3 or 4 do anything, and
so all line numbers relate to the end of the file.  There is absolutely
nothing to say that the newline at the end of the #line directive has been
read "while processing the source file to the current token" (if __LINE__
in the #line directive is the current token) but that the newline after it
hasn't been read; if anything, the phases imply that all newlines have
been read.


The standard also includes a mechanism for encoding s seen
in tokens, so that argument falls apart fairly easily.


This case is just as ambiguous as the case of a multi-line macro call,
where __LINE__ gets expanded somewhere in the macro arguments, and the
line number can be that of the macro name, or of the closing parenthesis
of the call, or somewhere in between, and the standard does not make a
conformance distinction between those choices.

So, I don't think we should make complicated changes to implement one
particular choice in an area of deliberate ambiguity without direction
from WG14 to eliminate the ambiguity in the standard.  Instead, we can let
the choices be whatever is most natural in the implementation.  If you
believe the standard is defective in not defining certain things, I advise
filing a DR (or, when next open for revisions, proposing a paper at a
meeting to change the definition as you think appropriate).


As pointed out above, this case is distinct from the macro CALL case.
The rules are much more explicitly spelled out for directives and is
only ambiguous if you start with the preconceived notion that it is.
The standard is explicit enough as it stands.

Further, the changes are not all that complicated.  O

Re: [PATCH 1/2] xtensa: fix TLS calls for call0 ABI

[Max Filippov]

On Tue, Sep 15, 2015 at 9:21 PM, augustine.sterl...@gmail.com
 wrote:
> On Tue, Sep 15, 2015 at 3:00 AM, Max Filippov  wrote:
>> 2015-09-15  Max Filippov  
>> gcc/
>> * config/xtensa/xtensa.c (xtensa_call_tls_desc): Use a10 or a2
>> to pass TLS call argument, according to current ABI.
>> * config/xtensa/xtensa.md (tls_call pattern): Use callx8 or
>
> Approved, please apply.

Applied both patches to trunk. Thank you!

-- Max

[PATCH] xtensa: add uclinux support

[Max Filippov]

2015-09-30  Max Filippov  
gcc/
* config.gcc (xtensa*-*-uclinux*): New configuration.
* config/xtensa/uclinux.h: New file.
* config/xtensa/uclinux.opt: New file.

libgcc/
* config.host (xtensa*-*-uclinux*): New configuration.
---
 gcc/config.gcc|  5 
 gcc/config/xtensa/uclinux.h   | 69 +++
 gcc/config/xtensa/uclinux.opt | 32 
 libgcc/config.host|  5 
 4 files changed, 111 insertions(+)
 create mode 100644 gcc/config/xtensa/uclinux.h
 create mode 100644 gcc/config/xtensa/uclinux.opt

diff --git a/gcc/config.gcc b/gcc/config.gcc
index c52f5a8..56797bd 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2995,6 +2995,11 @@ xtensa*-*-linux*)
tm_file="${tm_file} dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h 
xtensa/linux.h"
tmake_file="${tmake_file} xtensa/t-xtensa"
;;
+xtensa*-*-uclinux*)
+   tm_file="${tm_file} dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h 
xtensa/uclinux.h"
+   tmake_file="${tmake_file} xtensa/t-xtensa"
+   extra_options="${extra_options} xtensa/uclinux.opt"
+   ;;
 am33_2.0-*-linux*)
tm_file="mn10300/mn10300.h dbxelf.h elfos.h gnu-user.h linux.h 
glibc-stdint.h mn10300/linux.h"
gas=yes gnu_ld=yes
diff --git a/gcc/config/xtensa/uclinux.h b/gcc/config/xtensa/uclinux.h
new file mode 100644
index 000..4606020
--- /dev/null
+++ b/gcc/config/xtensa/uclinux.h
@@ -0,0 +1,69 @@
+/* Xtensa Linux configuration.
+   Derived from the configuration for GCC for Intel i386 running Linux.
+   Copyright (C) 2001-2015 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+#undef TARGET_OS_CPP_BUILTINS
+#define TARGET_OS_CPP_BUILTINS()   \
+  do   \
+{  \
+  GNU_USER_TARGET_OS_CPP_BUILTINS ();  \
+  builtin_define ("__uClinux__");  \
+}  \
+  while (0)
+
+#undef SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}"
+
+#undef SIZE_TYPE
+#define SIZE_TYPE "unsigned int"
+
+#undef PTRDIFF_TYPE
+#define PTRDIFF_TYPE "int"
+
+#undef WCHAR_TYPE
+#define WCHAR_TYPE "long int"
+
+#undef WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE 32
+
+#undef ASM_SPEC
+#define ASM_SPEC \
+ "%{mtext-section-literals:--text-section-literals} \
+  %{mno-text-section-literals:--no-text-section-literals} \
+  %{mtarget-align:--target-align} \
+  %{mno-target-align:--no-target-align} \
+  %{mlongcalls:--longcalls} \
+  %{mno-longcalls:--no-longcalls} \
+  %{mauto-litpools:--auto-litpools} \
+  %{mno-auto-litpools:--no-auto-litpools}"
+
+#undef LINK_SPEC
+#define LINK_SPEC "%{!no-elf2flt:%{!elf2flt*:-elf2flt}}"
+
+#undef LOCAL_LABEL_PREFIX
+#define LOCAL_LABEL_PREFIX "."
+
+/* Always enable "-fpic" for Xtensa Linux.  */
+#define XTENSA_ALWAYS_PIC 1
+
+#undef TARGET_LIBC_HAS_FUNCTION
+#define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function
+
+#undef DBX_REGISTER_NUMBER
+
diff --git a/gcc/config/xtensa/uclinux.opt b/gcc/config/xtensa/uclinux.opt
new file mode 100644
index 000..95ef777
--- /dev/null
+++ b/gcc/config/xtensa/uclinux.opt
@@ -0,0 +1,32 @@
+; Xtensa uClinux options.
+
+; Copyright (C) 2015 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3.  If not see
+; <http://www.gnu.org/licenses/>.
+
+; See the GCC internals manual (options.texi) for a description of
+; this file's format.
+
+

Re: [PATCH] xtensa: add uclinux support

[Max Filippov]

On Sat, Oct 3, 2015 at 6:19 PM, augustine.sterl...@gmail.com
 wrote:
> On Wed, Sep 30, 2015 at 8:23 AM, Max Filippov  wrote:
>> 2015-09-30  Max Filippov  
>> gcc/
>> * config.gcc (xtensa*-*-uclinux*): New configuration.
>> * config/xtensa/uclinux.h: New file.
>> * config/xtensa/uclinux.opt: New file.
>>
>> libgcc/
>> * config.host (xtensa*-*-uclinux*): New configuration.
>
> Approved, please apply.

Applied to trunk. Thanks!

-- Max

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[PATCH] xtensa: fix PR target/91880

[Max Filippov]

Xtensa hwloop_optimize segfaults when zero overhead loop is about to be
inserted as the first instruction of the function.
Insert zero overhead loop instruction into new basic block before the
loop when basic block that precedes the loop is empty.

2019-09-24  Max Filippov  
gcc/
* config/xtensa/xtensa.c (hwloop_optimize): Insert zero overhead
loop instruction into new basic block before the loop when basic
block that precedes the loop is empty.

gcc/testsuite/
* gcc.target/xtensa/pr91880.c: New test case.
* gcc.target/xtensa/xtensa.exp: New test suite.
---
 gcc/config/xtensa/xtensa.c |  5 ++--
 gcc/testsuite/gcc.target/xtensa/pr91880.c  | 10 
 gcc/testsuite/gcc.target/xtensa/xtensa.exp | 41 ++
 3 files changed, 54 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/xtensa/pr91880.c
 create mode 100644 gcc/testsuite/gcc.target/xtensa/xtensa.exp

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index ee5612441e25..2527468d57db 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -4235,7 +4235,9 @@ hwloop_optimize (hwloop_info loop)
 
   seq = get_insns ();
 
-  if (!single_succ_p (entry_bb) || vec_safe_length (loop->incoming) > 1)
+  entry_after = BB_END (entry_bb);
+  if (!single_succ_p (entry_bb) || vec_safe_length (loop->incoming) > 1
+  || !entry_after)
 {
   basic_block new_bb;
   edge e;
@@ -4256,7 +4258,6 @@ hwloop_optimize (hwloop_info loop)
 }
   else
 {
-  entry_after = BB_END (entry_bb);
   while (DEBUG_INSN_P (entry_after)
  || (NOTE_P (entry_after)
 && NOTE_KIND (entry_after) != NOTE_INSN_BASIC_BLOCK))
diff --git a/gcc/testsuite/gcc.target/xtensa/pr91880.c 
b/gcc/testsuite/gcc.target/xtensa/pr91880.c
new file mode 100644
index ..f4895a1bb8ec
--- /dev/null
+++ b/gcc/testsuite/gcc.target/xtensa/pr91880.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -fomit-frame-pointer -fno-tree-vectorize" } */
+
+void foo (unsigned int n, char *a, char *b)
+{
+  int i;
+
+  for (i = 0; i <= n - 1; ++i)
+a[i] = b[i];
+}
diff --git a/gcc/testsuite/gcc.target/xtensa/xtensa.exp 
b/gcc/testsuite/gcc.target/xtensa/xtensa.exp
new file mode 100644
index ..8720327f526e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/xtensa/xtensa.exp
@@ -0,0 +1,41 @@
+# Copyright (C) 2019 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't an Xtensa target.
+if ![istarget xtensa*-*-*] then {
+  return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \
+   "" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish
-- 
2.11.0

Re: [PATCH] xtensa: fix PR target/91880

[Max Filippov]

On Thu, Sep 26, 2019 at 1:42 PM augustine.sterl...@gmail.com
 wrote:
>
> On Tue, Sep 24, 2019 at 5:41 PM Max Filippov  wrote:
> >
> > Xtensa hwloop_optimize segfaults when zero overhead loop is about to be
> > inserted as the first instruction of the function.
> > Insert zero overhead loop instruction into new basic block before the
> > loop when basic block that precedes the loop is empty.
> >
> > 2019-09-24  Max Filippov  
> > gcc/
> > * config/xtensa/xtensa.c (hwloop_optimize): Insert zero overhead
> > loop instruction into new basic block before the loop when basic
> > block that precedes the loop is empty.
> >
> > gcc/testsuite/
> > * gcc.target/xtensa/pr91880.c: New test case.
> > * gcc.target/xtensa/xtensa.exp: New test suite.
> > ---
> >  gcc/config/xtensa/xtensa.c |  5 ++--
> >  gcc/testsuite/gcc.target/xtensa/pr91880.c  | 10 
> >  gcc/testsuite/gcc.target/xtensa/xtensa.exp | 41 
> > ++
> >  3 files changed, 54 insertions(+), 2 deletions(-)
> >  create mode 100644 gcc/testsuite/gcc.target/xtensa/pr91880.c
> >  create mode 100644 gcc/testsuite/gcc.target/xtensa/xtensa.exp
>
> Approved. Thanks.

Thanks. Applied to trunk.
I'll backport it later to gcc-7..9 branches.

-- Max

[PATCH] gcc: xtensa: fix NAND code in xtensa_expand_atomic

[Max Filippov]

NAND is ~(a1 & a2), but xtensa_expand_atomic does ~a1 & a2.
That fixes libatomic tests atomic-op-{1,2}.

gcc/
2018-09-04  Max Filippov  

* config/xtensa/xtensa.c (xtensa_expand_atomic): Reorder AND and
XOR operations in NAND case.
---
 gcc/config/xtensa/xtensa.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 7cfe64d42895..b88556625223 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -1614,10 +1614,10 @@ xtensa_expand_atomic (enum rtx_code code, rtx target, 
rtx mem, rtx val,
   break;
 
 case MULT: /* NAND */
-  tmp = expand_simple_binop (SImode, XOR, old, ac.modemask,
-NULL_RTX, 1, OPTAB_DIRECT);
-  tmp = expand_simple_binop (SImode, AND, tmp, val,
+  tmp = expand_simple_binop (SImode, AND, old, val,
 new_rtx, 1, OPTAB_DIRECT);
+  tmp = expand_simple_binop (SImode, XOR, tmp, ac.modemask,
+NULL_RTX, 1, OPTAB_DIRECT);
   break;
 
 default:
-- 
2.11.0

[PATCH v2] gcc: xtensa: fix NAND code in xtensa_expand_atomic

[Max Filippov]

NAND is ~(a1 & a2), but xtensa_expand_atomic does ~a1 & a2.
That fixes libatomic tests atomic-op-{1,2}.

gcc/
2018-09-04  Max Filippov  

* config/xtensa/xtensa.c (xtensa_expand_atomic): Reorder AND and
XOR operations in NAND case.
---
Changes v1->v2:
- put final inversion result into the new_rtx avoiding unneeded move

 gcc/config/xtensa/xtensa.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 7cfe64d42895..080bb4ad765d 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -1614,9 +1614,9 @@ xtensa_expand_atomic (enum rtx_code code, rtx target, rtx 
mem, rtx val,
   break;
 
 case MULT: /* NAND */
-  tmp = expand_simple_binop (SImode, XOR, old, ac.modemask,
+  tmp = expand_simple_binop (SImode, AND, old, val,
 NULL_RTX, 1, OPTAB_DIRECT);
-  tmp = expand_simple_binop (SImode, AND, tmp, val,
+  tmp = expand_simple_binop (SImode, XOR, tmp, ac.modemask,
 new_rtx, 1, OPTAB_DIRECT);
   break;
 
-- 
2.11.0

Re: [PATCH v2] gcc: xtensa: fix NAND code in xtensa_expand_atomic

[Max Filippov]

On Tue, Sep 4, 2018 at 10:35 AM, augustine.sterl...@gmail.com
 wrote:
> On Tue, Sep 4, 2018 at 9:42 AM Max Filippov  wrote:
>>
>> NAND is ~(a1 & a2), but xtensa_expand_atomic does ~a1 & a2.
>> That fixes libatomic tests atomic-op-{1,2}.
>>
>> gcc/
>> 2018-09-04  Max Filippov  
>>
>> * config/xtensa/xtensa.c (xtensa_expand_atomic): Reorder AND and
>> XOR operations in NAND case.
>
>
> Approved.

Thanks. Applied to trunk and gcc-[678] branches.

-- 
Thanks.
-- Max

Re: [RFC 1/5] gcc: xtensa: allow XCHAL_* macros to be non-constant

[Max Filippov]

On Thu, May 25, 2017 at 11:15 AM, augustine.sterl...@gmail.com
 wrote:
> On Mon, May 22, 2017 at 2:09 PM, Max Filippov  wrote:
>> XCHAL_* macros from the xtensa-config.h are used in a number of places
>> that require them to be preprocessor constants. Rewrite these places so
>> that non-constant XCHAL_* definitions could be used there.
>>
>> 2017-05-22  Max Filippov  
>> gcc/
>> * config/xtensa/xtensa.c (xtensa_option_override): Append
>> MASK_CONST16 to target_flags in the absence of TARGET_L32R.
>> (hwloop_optimize, hwloop_fail, hwloop_pattern_reg,
>>  xtensa_doloop_hooks): Define unconditionally.
>> (xtensa_reorg_loops): Only call reorg_loops in the presence of
>> TARGET_LOOPS.
>> * config/xtensa/xtensa.h (TARGET_L32R): New definition.
>> (TARGET_DEFAULT): Remove XCHAL_HAVE_L32R condition and account
>> for it in xtensa_option_override.
>> (HARD_FRAME_POINTER_IS_FRAME_POINTER,
>>  HARD_FRAME_POINTER_IS_ARG_POINTER): New definitions.
>
> This is OK. Please apply.

Applied this one to trunk. Thanks!

-- Max

[PATCH] gcc: xtensa: enable address sanitizer

[Max Filippov]

gcc/
2017-12-04  Max Filippov  

* config/xtensa/xtensa.c (xtensa_asan_shadow_offset): New
function.
(TARGET_ASAN_SHADOW_OFFSET): New macro definition.
* config/xtensa/xtensa.h (FRAME_GROWS_DOWNWARD): Set to 1 if
ASAN is enabled.
---
 gcc/config/xtensa/xtensa.c | 12 
 gcc/config/xtensa/xtensa.h |  3 ++-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 1e73b2f4405d..92b9a600df82 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -183,6 +183,7 @@ static bool xtensa_hard_regno_mode_ok (unsigned int, 
machine_mode);
 static bool xtensa_modes_tieable_p (machine_mode, machine_mode);
 static HOST_WIDE_INT xtensa_constant_alignment (const_tree, HOST_WIDE_INT);
 static HOST_WIDE_INT xtensa_starting_frame_offset (void);
+static unsigned HOST_WIDE_INT xtensa_asan_shadow_offset (void);
 
 
 
@@ -325,6 +326,9 @@ static HOST_WIDE_INT xtensa_starting_frame_offset (void);
 #undef TARGET_STARTING_FRAME_OFFSET
 #define TARGET_STARTING_FRAME_OFFSET xtensa_starting_frame_offset
 
+#undef TARGET_ASAN_SHADOW_OFFSET
+#define TARGET_ASAN_SHADOW_OFFSET xtensa_asan_shadow_offset
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 
@@ -4413,4 +4417,12 @@ xtensa_starting_frame_offset (void)
   return crtl->outgoing_args_size;
 }
 
+/* Implement TARGET_ASAN_SHADOW_OFFSET.  */
+
+static unsigned HOST_WIDE_INT
+xtensa_asan_shadow_offset (void)
+{
+  return HOST_WIDE_INT_UC (0x1000);
+}
+
 #include "gt-xtensa.h"
diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index b4cf53708b3e..1602fae3d9ea 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -430,7 +430,8 @@ enum reg_class
 
 #define STACK_GROWS_DOWNWARD 1
 
-#define FRAME_GROWS_DOWNWARD flag_stack_protect
+#define FRAME_GROWS_DOWNWARD (flag_stack_protect \
+ || (flag_sanitize & SANITIZE_ADDRESS) != 0)
 
 /* The ARG_POINTER and FRAME_POINTER are not real Xtensa registers, so
they are eliminated to either the stack pointer or hard frame pointer.  */
-- 
2.1.4

Re: [PATCH] gcc: xtensa: enable address sanitizer

[Max Filippov]

On Mon, Dec 4, 2017 at 1:31 PM, Jakub Jelinek  wrote:
> On Mon, Dec 04, 2017 at 01:28:53PM -0800, Max Filippov wrote:
>> gcc/
>> 2017-12-04  Max Filippov  
>>
>>   * config/xtensa/xtensa.c (xtensa_asan_shadow_offset): New
>>   function.
>>   (TARGET_ASAN_SHADOW_OFFSET): New macro definition.
>>   * config/xtensa/xtensa.h (FRAME_GROWS_DOWNWARD): Set to 1 if
>>   ASAN is enabled.
>
> Is this just for -fsanitize=kernel-address ?  Because I don't see any
> libsanitizer/ changes (and those would need to go upstream first anyway).

Yes, it's for the -fsanitize=kernel-address. I'll port libsanitizer later.

-- 
Thanks.
-- Max

Re: [PATCH] gcc: xtensa: enable address sanitizer

[Max Filippov]

On Mon, Dec 4, 2017 at 9:37 PM, augustine.sterl...@gmail.com
 wrote:
> On Mon, Dec 4, 2017 at 1:28 PM, Max Filippov  wrote:
>> gcc/
>> 2017-12-04  Max Filippov  
>>
>> * config/xtensa/xtensa.c (xtensa_asan_shadow_offset): New
>> function.
>> (TARGET_ASAN_SHADOW_OFFSET): New macro definition.
>> * config/xtensa/xtensa.h (FRAME_GROWS_DOWNWARD): Set to 1 if
>> ASAN is enabled.
>
> This is OK.

Thanks! Applied to trunk and backported to gcc-7-branch.

-- Max

[PATCH] xtensa: fix PR target/65416

[Max Filippov]

The issue is caused by reordering of stack pointer update after stack
space allocation with instructions that write to the allocated stack
space. In windowed ABI register spill area for the previous call frame
is located just below the stack pointer and may be reloaded back into
the register file on movsp.
Implement allocate_stack pattern for windowed ABI configuration and
insert an instruction that prevents reordering of frame memory access
and stack pointer update.

gcc/
2018-06-17  Max Filippov  

* config/xtensa/xtensa.md (UNSPEC_FRAME_BLOCKAGE): New unspec
constant.
(allocate_stack, frame_blockage, *frame_blockage): New patterns.
---
 gcc/config/xtensa/xtensa.md | 46 +
 1 file changed, 46 insertions(+)

diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 84967dbedc08..209f839cfb0f 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -38,6 +38,7 @@
   (UNSPEC_MEMW 11)
   (UNSPEC_LSETUP_START  12)
   (UNSPEC_LSETUP_END13)
+  (UNSPEC_FRAME_BLOCKAGE 14)
 
   (UNSPECV_SET_FP  1)
   (UNSPECV_ENTRY   2)
@@ -1676,6 +1677,32 @@
 
 ;; Miscellaneous instructions.
 
+;; In windowed ABI stack pointer adjustment must happen before any access
+;; to the space allocated on stack is allowed, otherwise register spill
+;; area may be clobbered.  That's what frame blockage is supposed to enforce.
+
+(define_expand "allocate_stack"
+  [(set (match_operand 0 "nonimmed_operand")
+(minus (reg A1_REG) (match_operand 1 "add_operand")))
+   (set (reg A1_REG)
+(minus (reg A1_REG) (match_dup 1)))]
+  "TARGET_WINDOWED_ABI"
+{
+  if (CONST_INT_P (operands[1]))
+{
+  rtx neg_op0 = GEN_INT (-INTVAL (operands[1]));
+  emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
+}
+  else
+{
+  emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx,
+operands[1]));
+}
+  emit_move_insn (operands[0], virtual_stack_dynamic_rtx);
+  emit_insn (gen_frame_blockage ());
+  DONE;
+})
+
 (define_expand "prologue"
   [(const_int 0)]
   ""
@@ -1767,6 +1794,25 @@
   [(set_attr "length" "0")
(set_attr "type" "nop")])
 
+;; Do not schedule instructions accessing memory before this point.
+
+(define_expand "frame_blockage"
+  [(set (match_dup 0)
+(unspec:BLK [(match_dup 1)] UNSPEC_FRAME_BLOCKAGE))]
+  ""
+{
+  operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
+  MEM_VOLATILE_P (operands[0]) = 1;
+  operands[1] = stack_pointer_rtx;
+})
+
+(define_insn "*frame_blockage"
+  [(set (match_operand:BLK 0 "" "")
+(unspec:BLK [(match_operand:SI 1 "" "")] UNSPEC_FRAME_BLOCKAGE))]
+  ""
+  ""
+  [(set_attr "length" "0")])
+
 (define_insn "trap"
   [(trap_if (const_int 1) (const_int 0))]
   ""
-- 
2.11.0

Re: [PATCH] xtensa: fix PR target/65416

[Max Filippov]

On Tue, Jun 19, 2018 at 10:11 AM, augustine.sterl...@gmail.com
 wrote:
> On Mon, Jun 18, 2018 at 3:10 PM, Max Filippov  wrote:
>>
>> gcc/
>> 2018-06-17  Max Filippov  
>>
>> * config/xtensa/xtensa.md (UNSPEC_FRAME_BLOCKAGE): New unspec
>> constant.
>> (allocate_stack, frame_blockage, *frame_blockage): New patterns.
>
>
> This is OK.

Thanks. Applied to trunk. Will also backport to gcc-7 and gcc-6 branches.

-- 
Thanks.
-- Max

On Tue, Jun 19, 2018 at 10:11 AM, augustine.sterl...@gmail.com
 wrote:
> On Mon, Jun 18, 2018 at 3:10 PM, Max Filippov  wrote:
>>
>> gcc/
>> 2018-06-17  Max Filippov  
>>
>> * config/xtensa/xtensa.md (UNSPEC_FRAME_BLOCKAGE): New unspec
>> constant.
>> (allocate_stack, frame_blockage, *frame_blockage): New patterns.
>
>
> This is OK.



-- 
Thanks.
-- Max

[PATCH] libgcc: xtensa: fix NaN return from add/sub/mul/div helpers

[Max Filippov]

libgcc/
2018-01-22  Max Filippov  

* config/xtensa/ieee754-df.S (__addsf3, __subsf3, __mulsf3)
(__divsf3): Make NaN return value quiet.
* config/xtensa/ieee754-sf.S (__adddf3, __subdf3, __muldf3)
(__divdf3): Make NaN return value quiet.
---
 libgcc/config/xtensa/ieee754-df.S | 54 ---
 libgcc/config/xtensa/ieee754-sf.S | 51 
 2 files changed, 74 insertions(+), 31 deletions(-)

diff --git a/libgcc/config/xtensa/ieee754-df.S 
b/libgcc/config/xtensa/ieee754-df.S
index 9aa55d1f74a4..2662a6600751 100644
--- a/libgcc/config/xtensa/ieee754-df.S
+++ b/libgcc/config/xtensa/ieee754-df.S
@@ -64,17 +64,26 @@ __adddf3_aux:
 
 .Ladd_xnan_or_inf:
/* If y is neither Infinity nor NaN, return x.  */
-   bnall   yh, a6, 1f
+   bnall   yh, a6, .Ladd_return_nan_or_inf
/* If x is a NaN, return it.  Otherwise, return y.  */
sllia7, xh, 12
or  a7, a7, xl
-   beqza7, .Ladd_ynan_or_inf
-1: leaf_return
+   bneza7, .Ladd_return_nan
 
 .Ladd_ynan_or_inf:
/* Return y.  */
mov xh, yh
mov xl, yl
+
+.Ladd_return_nan_or_inf:
+   sllia7, xh, 12
+   or  a7, a7, xl
+   bneza7, .Ladd_return_nan
+   leaf_return
+
+.Ladd_return_nan:
+   movia4, 0x8 /* make it a quiet NaN */
+   or  xh, xh, a4
leaf_return
 
 .Ladd_opposite_signs:
@@ -319,17 +328,24 @@ __subdf3_aux:
 
 .Lsub_xnan_or_inf:
/* If y is neither Infinity nor NaN, return x.  */
-   bnall   yh, a6, 1f
+   bnall   yh, a6, .Lsub_return_nan_or_inf
+
+.Lsub_return_nan:
/* Both x and y are either NaN or Inf, so the result is NaN.  */
movia4, 0x8 /* make it a quiet NaN */
or  xh, xh, a4
-1: leaf_return
+   leaf_return
 
 .Lsub_ynan_or_inf:
/* Negate y and return it.  */
sllia7, a6, 11
xor xh, yh, a7
mov xl, yl
+
+.Lsub_return_nan_or_inf:
+   sllia7, xh, 12
+   or  a7, a7, xl
+   bneza7, .Lsub_return_nan
leaf_return
 
 .Lsub_opposite_signs:
@@ -692,10 +708,7 @@ __muldf3_aux:
/* If y is zero, return NaN.  */
bnezyl, 1f
sllia8, yh, 1
-   bneza8, 1f
-   movia4, 0x8 /* make it a quiet NaN */
-   or  xh, xh, a4
-   j   .Lmul_done
+   beqza8, .Lmul_return_nan
 1:
/* If y is NaN, return y.  */
bnall   yh, a6, .Lmul_returnx
@@ -708,6 +721,9 @@ __muldf3_aux:
mov xl, yl
 
 .Lmul_returnx:
+   sllia8, xh, 12
+   or  a8, a8, xl
+   bneza8, .Lmul_return_nan
/* Set the sign bit and return.  */
extui   a7, a7, 31, 1
sllixh, xh, 1
@@ -720,8 +736,11 @@ __muldf3_aux:
bnezxl, .Lmul_returny
sllia8, xh, 1
bneza8, .Lmul_returny
-   movia7, 0x8 /* make it a quiet NaN */
-   or  xh, yh, a7
+   mov xh, yh
+
+.Lmul_return_nan:
+   movia4, 0x8 /* make it a quiet NaN */
+   or  xh, xh, a4
j   .Lmul_done
 
.align  4
@@ -1370,10 +1389,11 @@ __divdf3_aux:
sllia7, a7, 31
xor xh, xh, a7
/* If y is NaN or Inf, return NaN.  */
-   bnall   yh, a6, 1f
-   movia4, 0x8 /* make it a quiet NaN */
-   or  xh, xh, a4
-1: leaf_return
+   ballyh, a6, .Ldiv_return_nan
+   sllia8, xh, 12
+   or  a8, a8, xl
+   bneza8, .Ldiv_return_nan
+   leaf_return
 
 .Ldiv_ynan_or_inf:
/* If y is Infinity, return zero.  */
@@ -1383,6 +1403,10 @@ __divdf3_aux:
/* y is NaN; return it.  */
mov xh, yh
mov xl, yl
+
+.Ldiv_return_nan:
+   movia4, 0x8 /* make it a quiet NaN */
+   or  xh, xh, a4
leaf_return
 
 .Ldiv_highequal1:
diff --git a/libgcc/config/xtensa/ieee754-sf.S 
b/libgcc/config/xtensa/ieee754-sf.S
index 659f183f6ba8..d48b230a7588 100644
--- a/libgcc/config/xtensa/ieee754-sf.S
+++ b/libgcc/config/xtensa/ieee754-sf.S
@@ -64,15 +64,23 @@ __addsf3_aux:
 
 .Ladd_xnan_or_inf:
/* If y is neither Infinity nor NaN, return x.  */
-   bnall   a3, a6, 1f
+   bnall   a3, a6, .Ladd_return_nan_or_inf
/* If x is a NaN, return it.  Otherwise, return y.  */
sllia7, a2, 9
-   beqza7, .Ladd_ynan_or_inf
-1: leaf_return
+   bneza7, .Ladd_return_nan
 
 .Ladd_ynan_or_inf:
/* Return y.  */
mov a2, a3
+
+.Ladd_return_nan_or_inf:
+   sllia7, a2, 9
+   bneza7, .Ladd_return_nan
+   leaf_return
+
+.Ladd_return_nan:
+   movia6, 0x40/* make it a quiet NaN */
+   or  a2, a2, a6
leaf_return
 
 .Ladd_opposite_signs:
@@ -265,16 +273,22 @@ __subsf3_aux:
 
 .Lsub_xnan_or_inf:
/* If y is neither Infinity nor NaN, return x

Re: [PATCH] libgcc: xtensa: fix NaN return from add/sub/mul/div helpers

[Max Filippov]

On Tue, Jan 23, 2018 at 1:07 PM, augustine.sterl...@gmail.com
 wrote:
> On Tue, Jan 23, 2018 at 9:55 AM, Max Filippov  wrote:
>> libgcc/
>> 2018-01-22  Max Filippov  
>>
>> * config/xtensa/ieee754-df.S (__addsf3, __subsf3, __mulsf3)
>> (__divsf3): Make NaN return value quiet.
>> * config/xtensa/ieee754-sf.S (__adddf3, __subdf3, __muldf3)
>> (__divdf3): Make NaN return value quiet.
>
> This is fine. Please apply.

Thanks, applied to trunk and backported to gcc-6 and gcc-7 branches.

-- Max

[PATCH] libgcc: xtensa: fix build with -mtext-section-literals

[Max Filippov]

libgcc/
2018-01-31  Max Filippov  

* config/xtensa/ieee754-df.S (__adddf3_aux): Add
.literal_position directive.
* config/xtensa/ieee754-sf.S (__addsf3_aux): Likewise.
---
 libgcc/config/xtensa/ieee754-df.S | 1 +
 libgcc/config/xtensa/ieee754-sf.S | 1 +
 2 files changed, 2 insertions(+)

diff --git a/libgcc/config/xtensa/ieee754-df.S 
b/libgcc/config/xtensa/ieee754-df.S
index 2662a6600751..a997c1b42632 100644
--- a/libgcc/config/xtensa/ieee754-df.S
+++ b/libgcc/config/xtensa/ieee754-df.S
@@ -55,6 +55,7 @@ __negdf2:
 
 #ifdef L_addsubdf3
 
+   .literal_position
/* Addition */
 __adddf3_aux:

diff --git a/libgcc/config/xtensa/ieee754-sf.S 
b/libgcc/config/xtensa/ieee754-sf.S
index d48b230a7588..695c67b0fc8f 100644
--- a/libgcc/config/xtensa/ieee754-sf.S
+++ b/libgcc/config/xtensa/ieee754-sf.S
@@ -55,6 +55,7 @@ __negsf2:
 
 #ifdef L_addsubsf3
 
+   .literal_position
/* Addition */
 __addsf3_aux:
 
-- 
2.1.4

Re: [PATCH] libgcc: xtensa: fix build with -mtext-section-literals

[Max Filippov]

On Wed, Jan 31, 2018 at 11:11 AM, augustine.sterl...@gmail.com
 wrote:
> On Tue, Jan 30, 2018 at 8:02 PM, Max Filippov  wrote:
>>
>> libgcc/
>> 2018-01-31  Max Filippov  
>>
>> * config/xtensa/ieee754-df.S (__adddf3_aux): Add
>> .literal_position directive.
>> * config/xtensa/ieee754-sf.S (__addsf3_aux): Likewise.
>
>
> This is fine, but when did it stop working, and why isn't there a test
> that would catch it?

I broke it with the recent softfloat NaN fix. Haven't noticed that because
I usually build without any flags or with -mauto-litpools.
Let me add the test, thanks for the suggestion.

-- 
Thanks.
-- Max

Re: [PATCH] libgcc: xtensa: fix build with -mtext-section-literals

[Max Filippov]

Hi Sterling,

On Wed, Jan 31, 2018 at 11:17 AM, Max Filippov  wrote:
> On Wed, Jan 31, 2018 at 11:11 AM, augustine.sterl...@gmail.com 
>  wrote:
>> On Tue, Jan 30, 2018 at 8:02 PM, Max Filippov  wrote:
>>>
>>> libgcc/
>>> 2018-01-31  Max Filippov  
>>>
>>> * config/xtensa/ieee754-df.S (__adddf3_aux): Add
>>> .literal_position directive.
>>> * config/xtensa/ieee754-sf.S (__addsf3_aux): Likewise.
>>
>> This is fine, but when did it stop working, and why isn't there a test
>> that would catch it?
>
> I broke it with the recent softfloat NaN fix. Haven't noticed that because
> I usually build without any flags or with -mauto-litpools.
> Let me add the test, thanks for the suggestion.

I've taken a look at gcc testsuites and I don't see how to add a test that would
check that libgcc builds with different compiler options. Any suggestions?

-- 
Thanks.
-- Max

Re: [PATCH] libgcc: xtensa: fix build with -mtext-section-literals

[Max Filippov]

On Thu, Feb 1, 2018 at 9:12 AM, Max Filippov  wrote:
> On Wed, Jan 31, 2018 at 11:17 AM, Max Filippov  wrote:
>> On Wed, Jan 31, 2018 at 11:11 AM, augustine.sterl...@gmail.com 
>>  wrote:
>>> On Tue, Jan 30, 2018 at 8:02 PM, Max Filippov  wrote:
>>>>
>>>> libgcc/
>>>> 2018-01-31  Max Filippov  
>>>>
>>>> * config/xtensa/ieee754-df.S (__adddf3_aux): Add
>>>> .literal_position directive.
>>>> * config/xtensa/ieee754-sf.S (__addsf3_aux): Likewise.
>>>
>>> This is fine, but when did it stop working, and why isn't there a test
>>> that would catch it?
>>
>> I broke it with the recent softfloat NaN fix. Haven't noticed that because
>> I usually build without any flags or with -mauto-litpools.
>> Let me add the test, thanks for the suggestion.
>
> I've taken a look at gcc testsuites and I don't see how to add a test that 
> would
> check that libgcc builds with different compiler options. Any suggestions?

If there are no suggestions I will check in the fix as is and will add building
with -mtext-section-literals to my testing scripts.

-- 
Thanks.
-- Max

Re: [PATCH] libgcc: xtensa: fix build with -mtext-section-literals

[Max Filippov]

On Wed, Feb 7, 2018 at 2:10 PM, Max Filippov  wrote:
> On Thu, Feb 1, 2018 at 9:12 AM, Max Filippov  wrote:
>> On Wed, Jan 31, 2018 at 11:17 AM, Max Filippov  wrote:
>>> On Wed, Jan 31, 2018 at 11:11 AM, augustine.sterl...@gmail.com 
>>>  wrote:
>>>> On Tue, Jan 30, 2018 at 8:02 PM, Max Filippov  wrote:
>>>>>
>>>>> libgcc/
>>>>> 2018-01-31  Max Filippov  
>>>>>
>>>>> * config/xtensa/ieee754-df.S (__adddf3_aux): Add
>>>>> .literal_position directive.
>>>>> * config/xtensa/ieee754-sf.S (__addsf3_aux): Likewise.
>>>>
>>>> This is fine, but when did it stop working, and why isn't there a test
>>>> that would catch it?
>>>
>>> I broke it with the recent softfloat NaN fix. Haven't noticed that because
>>> I usually build without any flags or with -mauto-litpools.
>>> Let me add the test, thanks for the suggestion.
>>
>> I've taken a look at gcc testsuites and I don't see how to add a test that 
>> would
>> check that libgcc builds with different compiler options. Any suggestions?
>
> If there are no suggestions I will check in the fix as is and will add 
> building
> with -mtext-section-literals to my testing scripts.

I've checked the fix into the trunk, gcc-6 and gcc-7 branches.

-- 
Thanks.
-- Max

[PATCH 2/2] xtensa: use pre- and postincrement FP load/store when available

[Max Filippov]

Earlier versions of xtensa FPU used to support preincrement FP load and
store instructions (lsiu/ssiu). Recent FPU supports postincrement FP
load and store instructions only (lsip/ssip). Use configuration macro to
decide which version is available.

2014-10-10  Max Filippov  

gcc/
* config/xtensa/xtensa.h (TARGET_HARD_FLOAT_POSTINC): new macro.
* config/xtensa/xtensa.md (*lsiu, *ssiu): add dependency on
!TARGET_HARD_FLOAT_POSTINC.
(*lsip, *ssip): new instructions.
---
 gcc/config/xtensa/xtensa.h  |  4 
 gcc/config/xtensa/xtensa.md | 36 ++--
 2 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index c4a8f88..54bfea4 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -39,6 +39,9 @@ extern unsigned xtensa_current_frame_size;
 #ifndef XCHAL_HAVE_THREADPTR
 #define XCHAL_HAVE_THREADPTR 0
 #endif
+#ifndef XCHAL_HAVE_FP_POSTINC
+#define XCHAL_HAVE_FP_POSTINC 0
+#endif
 #define TARGET_BIG_ENDIAN  XCHAL_HAVE_BE
 #define TARGET_DENSITY XCHAL_HAVE_DENSITY
 #define TARGET_MAC16   XCHAL_HAVE_MAC16
@@ -55,6 +58,7 @@ extern unsigned xtensa_current_frame_size;
 #define TARGET_HARD_FLOAT_RECIPXCHAL_HAVE_FP_RECIP
 #define TARGET_HARD_FLOAT_SQRT XCHAL_HAVE_FP_SQRT
 #define TARGET_HARD_FLOAT_RSQRTXCHAL_HAVE_FP_RSQRT
+#define TARGET_HARD_FLOAT_POSTINC XCHAL_HAVE_FP_POSTINC
 #define TARGET_ABS XCHAL_HAVE_ABS
 #define TARGET_ADDXXCHAL_HAVE_ADDX
 #define TARGET_RELEASE_SYNCXCHAL_HAVE_RELEASE_SYNC
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 0e3f033..b8acebb 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -922,7 +922,7 @@
 (match_operand:SI 2 "fpmem_offset_operand" "i"
(set (match_dup 1)
(plus:SI (match_dup 1) (match_dup 2)))]
-  "TARGET_HARD_FLOAT"
+  "TARGET_HARD_FLOAT && !TARGET_HARD_FLOAT_POSTINC"
 {
   if (TARGET_SERIALIZE_VOLATILE && volatile_refs_p (PATTERN (insn)))
 output_asm_insn ("memw", operands);
@@ -938,7 +938,7 @@
(match_operand:SF 2 "register_operand" "f"))
(set (match_dup 0)
(plus:SI (match_dup 0) (match_dup 1)))]
-  "TARGET_HARD_FLOAT"
+  "TARGET_HARD_FLOAT && !TARGET_HARD_FLOAT_POSTINC"
 {
   if (TARGET_SERIALIZE_VOLATILE && volatile_refs_p (PATTERN (insn)))
 output_asm_insn ("memw", operands);
@@ -948,6 +948,38 @@
(set_attr "mode""SF")
(set_attr "length"  "3")])
 
+(define_insn "*lsip"
+  [(set (match_operand:SF 0 "register_operand" "=f")
+   (mem:SF (match_operand:SI 1 "register_operand" "+a")))
+   (set (match_dup 1)
+   (plus:SI (match_dup 1)
+(match_operand:SI 2 "fpmem_offset_operand" "i")))]
+  "TARGET_HARD_FLOAT && TARGET_HARD_FLOAT_POSTINC"
+{
+  if (TARGET_SERIALIZE_VOLATILE && volatile_refs_p (PATTERN (insn)))
+output_asm_insn ("memw", operands);
+  return "lsip\t%0, %1, %2";
+}
+  [(set_attr "type""fload")
+   (set_attr "mode""SF")
+   (set_attr "length"  "3")])
+
+(define_insn "*ssip"
+  [(set (mem:SF (match_operand:SI 0 "register_operand" "+a"))
+   (match_operand:SF 1 "register_operand" "f"))
+   (set (match_dup 0)
+   (plus:SI (match_dup 0)
+(match_operand:SI 2 "fpmem_offset_operand" "i")))]
+  "TARGET_HARD_FLOAT && TARGET_HARD_FLOAT_POSTINC"
+{
+  if (TARGET_SERIALIZE_VOLATILE && volatile_refs_p (PATTERN (insn)))
+output_asm_insn ("memw", operands);
+  return "ssip\t%1, %0, %2";
+}
+  [(set_attr "type""fstore")
+   (set_attr "mode""SF")
+   (set_attr "length"  "3")])
+
 ;; 64-bit floating point moves
 
 (define_expand "movdf"
-- 
1.8.1.4

[PATCH 0/2] xtensa: fix floating-point parts of machine description

[Max Filippov]

Hi Sterling,

this series fixes two bugs in xtensa.md:
- generation of non-existent instructions for division/reciprocal/square root
- generation of pre- or post-increment floating point loads/stores depending
  on whether the core supports former or latter.

These changes allow building gcc for modern xtensa cores with FPU.
Tested on xtensa-linux-uclibc.

Max Filippov (2):
  xtensa: drop unimplemented floating point operations
  xtensa: use pre- and postincrement FP load/store when available

 gcc/config/xtensa/xtensa.h  |  4 +++
 gcc/config/xtensa/xtensa.md | 80 -
 2 files changed, 39 insertions(+), 45 deletions(-)

-- 
1.8.1.4

[PATCH 1/2] xtensa: drop unimplemented floating point operations

[Max Filippov]

xtensa ISA never implemented FP division, reciprocal, square root and
inverse square root as single opcode. Remove patterns that can emit
them.

2014-10-09  Max Filippov  

gcc/
* config/xtensa/xtensa.md (divsf3, *recipsf2, sqrtsf2, *rsqrtsf2):
remove.
---
 gcc/config/xtensa/xtensa.md | 44 +---
 1 file changed, 1 insertion(+), 43 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index dddc6ab..0e3f033 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -82,7 +82,7 @@
 ;; Attributes.
 
 (define_attr "type"
-  
"unknown,jump,call,load,store,move,arith,multi,nop,farith,fmadd,fdiv,fsqrt,fconv,fload,fstore,mul16,mul32,div32,mac16,rsr,wsr,entry"
+  
"unknown,jump,call,load,store,move,arith,multi,nop,farith,fmadd,fconv,fload,fstore,mul16,mul32,div32,mac16,rsr,wsr,entry"
   (const_string "unknown"))
 
 (define_attr "mode"
@@ -360,26 +360,6 @@
(set_attr "mode""SI")
(set_attr "length"  "3")])
 
-(define_insn "divsf3"
-  [(set (match_operand:SF 0 "register_operand" "=f")
-   (div:SF (match_operand:SF 1 "register_operand" "f")
-   (match_operand:SF 2 "register_operand" "f")))]
-  "TARGET_HARD_FLOAT_DIV"
-  "div.s\t%0, %1, %2"
-  [(set_attr "type""fdiv")
-   (set_attr "mode""SF")
-   (set_attr "length"  "3")])
-
-(define_insn "*recipsf2"
-  [(set (match_operand:SF 0 "register_operand" "=f")
-   (div:SF (match_operand:SF 1 "const_float_1_operand" "")
-   (match_operand:SF 2 "register_operand" "f")))]
-  "TARGET_HARD_FLOAT_RECIP && flag_unsafe_math_optimizations"
-  "recip.s\t%0, %2"
-  [(set_attr "type""fdiv")
-   (set_attr "mode""SF")
-   (set_attr "length"  "3")])
-
 
 ;; Remainders.
 
@@ -404,28 +384,6 @@
(set_attr "length"  "3")])
 
 
-;; Square roots.
-
-(define_insn "sqrtsf2"
-  [(set (match_operand:SF 0 "register_operand" "=f")
-   (sqrt:SF (match_operand:SF 1 "register_operand" "f")))]
-  "TARGET_HARD_FLOAT_SQRT"
-  "sqrt.s\t%0, %1"
-  [(set_attr "type""fsqrt")
-   (set_attr "mode""SF")
-   (set_attr "length"  "3")])
-
-(define_insn "*rsqrtsf2"
-  [(set (match_operand:SF 0 "register_operand" "=f")
-   (div:SF (match_operand:SF 1 "const_float_1_operand" "")
-   (sqrt:SF (match_operand:SF 2 "register_operand" "f"]
-  "TARGET_HARD_FLOAT_RSQRT && flag_unsafe_math_optimizations"
-  "rsqrt.s\t%0, %2"
-  [(set_attr "type""fsqrt")
-   (set_attr "mode""SF")
-   (set_attr "length"  "3")])
-
-
 ;; Absolute value.
 
 (define_insn "abssi2"
-- 
1.8.1.4

Re: [PATCH 0/2] xtensa: fix floating-point parts of machine description

[Max Filippov]

On Mon, Oct 13, 2014 at 8:03 PM, augustine.sterl...@gmail.com
 wrote:
> On Sun, Oct 12, 2014 at 3:46 PM, Max Filippov  wrote:
>> Hi Sterling,
>>
>> this series fixes two bugs in xtensa.md:
>
> HI Max, thanks for this. I don't see a patch though.

It's a cover letter with a summary of changes. Patches go as replies to it.

-- 
Thanks.
-- Max

Re: [PATCH 2/2] xtensa: use pre- and postincrement FP load/store when available

[Max Filippov]

On Mon, Oct 13, 2014 at 8:04 PM, augustine.sterl...@gmail.com
 wrote:
> On Sun, Oct 12, 2014 at 3:46 PM, Max Filippov  wrote:
>> 2014-10-10  Max Filippov  
>>
>> gcc/
>> * config/xtensa/xtensa.h (TARGET_HARD_FLOAT_POSTINC): new macro.
>> * config/xtensa/xtensa.md (*lsiu, *ssiu): add dependency on
>> !TARGET_HARD_FLOAT_POSTINC.
>> (*lsip, *ssip): new instructions.
>
> Approved. Do you have write priviliges?

I don't, will request.

-- 
Thanks.
-- Max

Re: [PATCH 1/2] xtensa: drop unimplemented floating point operations

[Max Filippov]

On Mon, Oct 13, 2014 at 8:05 PM, augustine.sterl...@gmail.com
 wrote:
> On Sun, Oct 12, 2014 at 3:46 PM, Max Filippov  wrote:
>> xtensa ISA never implemented FP division, reciprocal, square root and
>> inverse square root as single opcode. Remove patterns that can emit
>> them.
>>
>> 2014-10-09  Max Filippov  
>>
>> gcc/
>> * config/xtensa/xtensa.md (divsf3, *recipsf2, sqrtsf2, *rsqrtsf2):
>>     remove.
>
> Approved.

Applied to trunk. Thanks!

-- Max

Re: [PATCH 2/2] xtensa: use pre- and postincrement FP load/store when available

[Max Filippov]

On Mon, Oct 13, 2014 at 8:04 PM, augustine.sterl...@gmail.com
 wrote:
> On Sun, Oct 12, 2014 at 3:46 PM, Max Filippov  wrote:
>> 2014-10-10  Max Filippov  
>>
>> gcc/
>> * config/xtensa/xtensa.h (TARGET_HARD_FLOAT_POSTINC): new macro.
>> * config/xtensa/xtensa.md (*lsiu, *ssiu): add dependency on
>> !TARGET_HARD_FLOAT_POSTINC.
>> (*lsip, *ssip): new instructions.
>
> Approved. Do you have write priviliges?

Applied to trunk. Thanks!

-- Max

[committed] MAINTAINERS: add myself to write-after-approval list.

[Max Filippov]

2014-10-15  Max Filippov  

* MAINTAINERS (write-after-approval): Add myself.

Index: MAINTAINERS
===
--- MAINTAINERS (revision 216231)
+++ MAINTAINERS (revision 216232)
@@ -380,6 +380,7 @@
 Chris Fairles  
 Changpeng Fang 
 Li Feng
+Max Filippov   
 Thomas Fitzsimmons 
 Brian Ford 
 John Freeman   

[PATCH] Fix PR target/65730

[Max Filippov]

2015-05-20  Max Filippov  
gcc/
* config/xtensa/xtensa.c (init_alignment_context): Replace MULT
by BITS_PER_UNIT with ASHIFT by exact_log2 (BITS_PER_UNIT).
---
 gcc/config/xtensa/xtensa.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index eb039ba..7296e36 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -1461,8 +1461,9 @@ init_alignment_context (struct alignment_context *ac, rtx 
mem)
   if (ac->shift != NULL_RTX)
 {
   /* Shift is the byte count, but we need the bitcount.  */
-  ac->shift = expand_simple_binop (SImode, MULT, ac->shift,
-  GEN_INT (BITS_PER_UNIT),
+  gcc_assert (exact_log2 (BITS_PER_UNIT) >= 0);
+  ac->shift = expand_simple_binop (SImode, ASHIFT, ac->shift,
+  GEN_INT (exact_log2 (BITS_PER_UNIT)),
   NULL_RTX, 1, OPTAB_DIRECT);
   ac->modemask = expand_simple_binop (SImode, ASHIFT,
  GEN_INT (GET_MODE_MASK (mode)),
-- 
1.8.1.4

Re: [PATCH] Fix PR target/65730

[Max Filippov]

On Wed, May 20, 2015 at 7:36 PM, augustine.sterl...@gmail.com
 wrote:
> On Tue, May 19, 2015 at 8:31 PM, Max Filippov  wrote:
>> 2015-05-20  Max Filippov  
>> gcc/
>> * config/xtensa/xtensa.c (init_alignment_context): Replace MULT
>> by BITS_PER_UNIT with ASHIFT by exact_log2 (BITS_PER_UNIT).
>
> Approved, please apply.

Applied to trunk. Thanks!

-- Max

Re: [PATCH] xtensa: align data naturally when optimizing for size

[Max Filippov]

On Tue, Feb 24, 2015 at 2:30 AM, augustine.sterl...@gmail.com
 wrote:
> On Sat, Feb 21, 2015 at 4:19 PM, Max Filippov  wrote:
>>
>> gcc for xtensa always aligns data at least to a word boundary, even when
>> it has smaller natural alignment. This results in unexpectedly high data
>> section sizes and unreasonable amount of wasted space when linking
>> objects compiled with -fdata-sections flag.
>>
>> Align data naturally when optimization for size is enabled.
>>
>> 2015-02-22  Max Filippov  
>
>
> This is OK for xtensa.

Applied to trunk. Thanks!

-- Max

Re: [PATCH] gcc/reload.c: Initialize several arrays before use them in find_reloads()

[Max Filippov]

Hi,

On Tue, Feb 24, 2015 at 6:54 PM, Jeff Law  wrote:
>
> You can tackle them in any order you wish.  However, I suspect fixing the
> xtensa backend may be easier.  I don't have any good way to test xtensa, but
> something like the attached patch for the xtensa port should be sufficient.

I can confirm that this patch fixes the issue. I haven't got a segfault
as was reported in bugzilla, but I got some 'conditional jump or move
depends on uninitialised value' under valgrind, originated from
find_reloads, that the patch fixed. And with it the testcase from
bugzilla actually produces code with loop instruction.

-- 
Thanks.
-- Max

Re: [PATCH] gcc/reload.c: Initialize several arrays before use them in find_reloads()

[Max Filippov]

Sterling,

On Wed, Feb 25, 2015 at 2:36 AM, augustine.sterl...@gmail.com
 wrote:
> On Tue, Feb 24, 2015 at 2:05 PM, Max Filippov  wrote:
>> On Tue, Feb 24, 2015 at 6:54 PM, Jeff Law  wrote:
>>> You can tackle them in any order you wish.  However, I suspect fixing the
>>> xtensa backend may be easier.  I don't have any good way to test xtensa, but
>>> something like the attached patch for the xtensa port should be sufficient.
>>
>> I can confirm that this patch fixes the issue. I haven't got a segfault
>> as was reported in bugzilla, but I got some 'conditional jump or move
>> depends on uninitialised value' under valgrind, originated from
>> find_reloads, that the patch fixed. And with it the testcase from
>> bugzilla actually produces code with loop instruction.
>
> Max, the patch doesn't fix the underlying issue, it just hides the bad
> memory reference by initializing what we were already accessing.
>
> See Jeff Law's message earlier in the thread.

I was referring Jeff's patch, do you say that his patch is not the proper
fix?

I've also tested Chen's patch and although it 'fixed' references to
uninitialised memory, gcc did not emit loop instruction for the testcase
from the bugreport.

-- 
Thanks.
-- Max

[RFC 0/2] xtensa: add call0 ABI support

[Max Filippov]

Hello,

this series adds call0 ABI support for xtensa. Code generation part is
well tested, but I'm not 100% sure about the exception handling part.
Please review.

Max Filippov (2):
  Turn RETURN_ADDR_IN_PREVIOUS_FRAME into C expression
  Implement call0 ABI for xtensa

 gcc/builtins.c  |   2 +-
 gcc/config/sparc/sparc.h|   2 +-
 gcc/config/xtensa/constraints.md|   6 +-
 gcc/config/xtensa/xtensa-protos.h   |   3 +
 gcc/config/xtensa/xtensa.c  | 561 
 gcc/config/xtensa/xtensa.h  |  67 +++--
 gcc/config/xtensa/xtensa.md |  48 ++-
 libgcc/config/xtensa/lib2funcs.S|  10 +
 libgcc/config/xtensa/linux-unwind.h |   3 +
 libgcc/config/xtensa/t-windowed |   2 +
 libgcc/config/xtensa/t-xtensa   |   3 -
 libgcc/configure|  21 ++
 libgcc/configure.ac |  16 +
 13 files changed, 588 insertions(+), 156 deletions(-)
 create mode 100644 libgcc/config/xtensa/t-windowed

-- 
1.8.1.4

[RFC 1/2] Turn RETURN_ADDR_IN_PREVIOUS_FRAME into C expression

[Max Filippov]

This allows a target to support both windowed and non-windowed ABI.

2015-02-28  Max Filippov  

gcc/
* builtins.c (expand_builtin_return_addr): Add
RETURN_ADDR_IN_PREVIOUS_FRAME to 'if' condition.
* config/sparc/sparc.h (RETURN_ADDR_IN_PREVIOUS_FRAME): Change
definition to 1.
* config/xtensa/xtensa.h (RETURN_ADDR_IN_PREVIOUS_FRAME):
Likewise.
---
 gcc/builtins.c | 2 +-
 gcc/config/sparc/sparc.h   | 2 +-
 gcc/config/xtensa/xtensa.h | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/builtins.c b/gcc/builtins.c
index fb871e6..0cc0c68 100644
--- a/gcc/builtins.c
+++ b/gcc/builtins.c
@@ -803,7 +803,7 @@ expand_builtin_return_addr (enum built_in_function 
fndecl_code, int count)
  pointer, but it can be accessed off the previous frame pointer by
  reading the value from the register window save area.  */
 #ifdef RETURN_ADDR_IN_PREVIOUS_FRAME
-  if (fndecl_code == BUILT_IN_RETURN_ADDRESS)
+  if (RETURN_ADDR_IN_PREVIOUS_FRAME && fndecl_code == BUILT_IN_RETURN_ADDRESS)
 count--;
 #endif
 
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index c6100a1..27ad748 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -1293,7 +1293,7 @@ do {  
\
access it from the current frame pointer.  We can access it from the
previous frame pointer though by reading a value from the register window
save area.  */
-#define RETURN_ADDR_IN_PREVIOUS_FRAME
+#define RETURN_ADDR_IN_PREVIOUS_FRAME 1
 
 /* This is the offset of the return address to the true next instruction to be
executed for the current function.  */
diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index 74ca240..14fe4bb 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -615,7 +615,7 @@ typedef struct xtensa_args
 
 /* Define this if the return address of a particular stack frame is
accessed from the frame pointer of the previous stack frame.  */
-#define RETURN_ADDR_IN_PREVIOUS_FRAME
+#define RETURN_ADDR_IN_PREVIOUS_FRAME 1
 
 /* A C expression whose value is RTL representing the value of the
return address for the frame COUNT steps up from the current
-- 
1.8.1.4

[RFC 2/2] Implement call0 ABI for xtensa

[Max Filippov]

call0 is an ABI that doesn't use register windows.

2015-02-28  Max Filippov  

gcc/
* config/xtensa/constraints.md ("a" constraint): Include stack
pointer in case of call0 ABI.
("q" constraint): Make empty in case of call0 ABI.
("D" constraint): Include stack pointer in case of call0 ABI.

* config/xtensa/xtensa-protos.h (xtensa_set_return_address,
xtensa_expand_epilogue, xtensa_regno_to_class): Add new function
prototypes.

* config/xtensa/xtensa.c (xtensa_callee_save_size): New
variable.
(xtensa_regno_to_class): Make it a local variable in the
function xtensa_regno_to_class.
(xtensa_function_epilogue, TARGET_ASM_FUNCTION_EPILOGUE): Remove
macro, function prototype and implementation.
(reg_nonleaf_alloc_order): Make it a local variable in the
function order_regs_for_local_alloc.
(xtensa_conditional_register_usage): New function.
(TARGET_CONDITIONAL_REGISTER_USAGE): Define macro.
(xtensa_valid_move): Allow direct moves to stack pointer
register in call0 ABI.
(xtensa_setup_frame_addresses): Only spill register windows in
windowed ABI.
(xtensa_emit_call): Emit call(x)8 or call(x)0 in windowed and
call0 ABI respectively.
(xtensa_function_arg_1): Only mark a7 register for copying in
windowed ABI.
(xtensa_call_save_reg): New function.
(compute_frame_size): Add space for callee saved register
storage to the frame size in call0 ABI.
(xtensa_expand_prologue): Generate code to set up stack frame
and save callee-saved registers in call0 ABI.
(xtensa_expand_epilogue): New function.
(xtensa_set_return_address): New function.
(xtensa_return_addr): Calculate return address in call0 ABI.
(xtensa_builtin_saveregs): Only mark a7 register for copying and
emit copying code in windowed ABI.
(order_regs_for_local_alloc): Add preferred register allocation
order for non-leaf function in call0 ABI.
(xtensa_static_chain): Add atatic chain passing for call0 ABI.
(xtensa_asm_trampoline_template): Add trampoline generation for
call0 ABI.
(xtensa_trampoline_init): Add trampoline initialization for
call0 ABI.
(xtensa_conditional_register_usage, xtensa_regno_to_class): New
functions.

* config/xtensa/xtensa.h (TARGET_WINDOWED_ABI): New macro.
(TARGET_CPU_CPP_BUILTINS): Add built-in define for call0 ABI.
(CALL_USED_REGISTERS): Modify to encode both windowed and call0
ABI call-used registers.
(HARD_FRAME_POINTER_REGNUM): Add frame pointer for call0 ABI.
(INCOMING_REGNO, OUTGOING_REGNO): Use argument unchanged in
call0 ABI.
(REG_CLASS_CONTENTS): Include all registers into the preferred
reload registers set, adjust the set in the
xtensa_conditional_register_usage.
(xtensa_regno_to_class): Drop variable declaration.
(REGNO_REG_CLASS): Redefine to use xtensa_regno_to_class
function.
(WINDOW_SIZE): Define as 8 or 0 for windowed and call0 ABI
respectively.
(FUNCTION_PROFILER): Add _mcount call for call0 ABI.
(TRAMPOLINE_SIZE): Define trampoline size for call0 ABI.
(RETURN_ADDR_IN_PREVIOUS_FRAME): Define to 0 in call0 ABI.
(ASM_OUTPUT_POOL_PROLOGUE): Always generate literal pool
location in call0 ABI.
(EH_RETURN_STACKADJ_RTX): New definition, use a10 for passing
stack adjustment size when handling exception.
(CRT_CALL_STATIC_FUNCTION): Add definition for call0 ABI.

* config/xtensa/xtensa.md (A9_REG, UNSPECV_BLOCKAGE): New
definitions.
("return" pattern): Generate ret.n/ret in call0 ABI.
("epilogue" pattern): Expand epilogue.
("nonlocal_goto" pattern): Use default in call0 ABI.
("eh_return" pattern): Move implementation to eh_set_a0_windowed,
emit eh_set_a0_* depending on ABI.
("eh_set_a0_windowed" pattern): Former eh_return pattern.
("eh_set_a0_call0", "blockage"): New patterns.

libgcc/
* config/xtensa/lib2funcs.S (__xtensa_libgcc_window_spill,
__xtensa_nonlocal_goto): Don't compile for call0 ABI.
(__xtensa_sync_caches): Only use entry and retw in windowed ABI,
use ret in call0 ABI.

* config/xtensa/t-windowed: New file.

* libgcc/config/xtensa/t-xtensa (LIB2ADDEH): Move to t-windowed.

* libgcc/configure: Regenerated.

* libgcc/configure.ac: Check if xtensa target is configured for
windowed ABI and thus needs to use custom unwind code.
---
 gcc/config/xtensa/constraints.md|   6 +-
 gcc/config/xtensa/xtensa-protos.h   |   3 +
 gcc/config/xtensa/xtensa.c  

Re: [RFC 1/2] Turn RETURN_ADDR_IN_PREVIOUS_FRAME into C expression

[Max Filippov]

On Sun, Mar 1, 2015 at 8:34 AM, augustine.sterl...@gmail.com
 wrote:
> On Sat, Feb 28, 2015 at 10:14 AM, Max Filippov  wrote:
>> This allows a target to support both windowed and non-windowed ABI.
>>
>> 2015-02-28  Max Filippov  
>>
>> gcc/
>> * builtins.c (expand_builtin_return_addr): Add
>> RETURN_ADDR_IN_PREVIOUS_FRAME to 'if' condition.
>> * config/sparc/sparc.h (RETURN_ADDR_IN_PREVIOUS_FRAME): Change
>> definition to 1.
>> * config/xtensa/xtensa.h (RETURN_ADDR_IN_PREVIOUS_FRAME):
>> Likewise.
>
> Unfortunately, I can't approve a change to spark.h, even though this
> seems quite innocuous to me. I'm not sure why it is even relevant to
> xtensa.

Ok, I'll cc sparc maintainers.
In the 2/2 RETURN_ADDR_IN_PREVIOUS_FRAME is changed for xtensa
depending on the selected ABI.

> Without that, approved.

-- 
Thanks.
-- Max

Re: [RFC 1/2] Turn RETURN_ADDR_IN_PREVIOUS_FRAME into C expression

[Max Filippov]

Richard, David, Eric,

could you please take a look and possibly approve the below changes for
sparc?

On Sat, Feb 28, 2015 at 9:14 PM, Max Filippov  wrote:
> This allows a target to support both windowed and non-windowed ABI.
>
> 2015-02-28  Max Filippov  
>
> gcc/
> * builtins.c (expand_builtin_return_addr): Add
> RETURN_ADDR_IN_PREVIOUS_FRAME to 'if' condition.
> * config/sparc/sparc.h (RETURN_ADDR_IN_PREVIOUS_FRAME): Change
> definition to 1.
> * config/xtensa/xtensa.h (RETURN_ADDR_IN_PREVIOUS_FRAME):
> Likewise.
> ---
>  gcc/builtins.c | 2 +-
>  gcc/config/sparc/sparc.h   | 2 +-
>  gcc/config/xtensa/xtensa.h | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/gcc/builtins.c b/gcc/builtins.c
> index fb871e6..0cc0c68 100644
> --- a/gcc/builtins.c
> +++ b/gcc/builtins.c
> @@ -803,7 +803,7 @@ expand_builtin_return_addr (enum built_in_function 
> fndecl_code, int count)
>   pointer, but it can be accessed off the previous frame pointer by
>   reading the value from the register window save area.  */
>  #ifdef RETURN_ADDR_IN_PREVIOUS_FRAME
> -  if (fndecl_code == BUILT_IN_RETURN_ADDRESS)
> +  if (RETURN_ADDR_IN_PREVIOUS_FRAME && fndecl_code == 
> BUILT_IN_RETURN_ADDRESS)
>  count--;
>  #endif
>
> diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
> index c6100a1..27ad748 100644
> --- a/gcc/config/sparc/sparc.h
> +++ b/gcc/config/sparc/sparc.h
> @@ -1293,7 +1293,7 @@ do {
>   \
> access it from the current frame pointer.  We can access it from the
> previous frame pointer though by reading a value from the register window
> save area.  */
> -#define RETURN_ADDR_IN_PREVIOUS_FRAME
> +#define RETURN_ADDR_IN_PREVIOUS_FRAME 1
>
>  /* This is the offset of the return address to the true next instruction to 
> be
> executed for the current function.  */
> diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
> index 74ca240..14fe4bb 100644
> --- a/gcc/config/xtensa/xtensa.h
> +++ b/gcc/config/xtensa/xtensa.h
> @@ -615,7 +615,7 @@ typedef struct xtensa_args
>
>  /* Define this if the return address of a particular stack frame is
> accessed from the frame pointer of the previous stack frame.  */
> -#define RETURN_ADDR_IN_PREVIOUS_FRAME
> +#define RETURN_ADDR_IN_PREVIOUS_FRAME 1
>
>  /* A C expression whose value is RTL representing the value of the
> return address for the frame COUNT steps up from the current
> --
> 1.8.1.4
>

-- 
Thanks.
-- Max

Re: [RFC 1/2] Turn RETURN_ADDR_IN_PREVIOUS_FRAME into C expression

[Max Filippov]

On Mon, Mar 2, 2015 at 1:07 AM, Joseph Myers  wrote:
>
> On Sat, 28 Feb 2015, Max Filippov wrote:
>
> > This allows a target to support both windowed and non-windowed ABI.
> >
> > 2015-02-28  Max Filippov  
> >
> > gcc/
> >   * builtins.c (expand_builtin_return_addr): Add
> >   RETURN_ADDR_IN_PREVIOUS_FRAME to 'if' condition.
>
> If you change the semantics of a target macro you need to update the
> documentation in tm.texi.in.  I'd say you should also change the semantics
> properly to true/false, not a tristate true/false/undefined (i.e., add a
> default 0 to defaults.h and remove the #ifdef).

Will do. Thanks!

-- Max

[PATCH] Turn RETURN_ADDR_IN_PREVIOUS_FRAME into C expression

[Max Filippov]

This allows a target to support both windowed and non-windowed ABI.

2015-03-03  Max Filippov  

gcc/
* builtins.c (expand_builtin_return_addr): Add
RETURN_ADDR_IN_PREVIOUS_FRAME to 'if' condition, remove
surrounding #ifdef.
* config/sparc/sparc.h (RETURN_ADDR_IN_PREVIOUS_FRAME): Change
definition to 1.
* config/xtensa/xtensa.h (RETURN_ADDR_IN_PREVIOUS_FRAME):
Likewise.
* defaults.h (RETURN_ADDR_IN_PREVIOUS_FRAME): Define to 0 if
undefined.
doc/tm.texi.in (RETURN_ADDR_IN_PREVIOUS_FRAME): Update
paragraph.
---
Changes RFC->PATCH:
- provide default definition for RETURN_ADDR_IN_PREVIOUS_FRAME and drop
  #ifdef from builtins.c;
- update doc/tm.texi.in.

 gcc/builtins.c | 4 +---
 gcc/config/sparc/sparc.h   | 2 +-
 gcc/config/xtensa/xtensa.h | 2 +-
 gcc/defaults.h | 4 
 gcc/doc/tm.texi.in | 7 ---
 5 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/gcc/builtins.c b/gcc/builtins.c
index fb871e6..9263777 100644
--- a/gcc/builtins.c
+++ b/gcc/builtins.c
@@ -802,10 +802,8 @@ expand_builtin_return_addr (enum built_in_function 
fndecl_code, int count)
  register.  There is no way to access it off of the current frame
  pointer, but it can be accessed off the previous frame pointer by
  reading the value from the register window save area.  */
-#ifdef RETURN_ADDR_IN_PREVIOUS_FRAME
-  if (fndecl_code == BUILT_IN_RETURN_ADDRESS)
+  if (RETURN_ADDR_IN_PREVIOUS_FRAME && fndecl_code == BUILT_IN_RETURN_ADDRESS)
 count--;
-#endif
 
   /* Scan back COUNT frames to the specified frame.  */
   for (i = 0; i < count; i++)
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index c6100a1..27ad748 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -1293,7 +1293,7 @@ do {  
\
access it from the current frame pointer.  We can access it from the
previous frame pointer though by reading a value from the register window
save area.  */
-#define RETURN_ADDR_IN_PREVIOUS_FRAME
+#define RETURN_ADDR_IN_PREVIOUS_FRAME 1
 
 /* This is the offset of the return address to the true next instruction to be
executed for the current function.  */
diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index 74ca240..14fe4bb 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -615,7 +615,7 @@ typedef struct xtensa_args
 
 /* Define this if the return address of a particular stack frame is
accessed from the frame pointer of the previous stack frame.  */
-#define RETURN_ADDR_IN_PREVIOUS_FRAME
+#define RETURN_ADDR_IN_PREVIOUS_FRAME 1
 
 /* A C expression whose value is RTL representing the value of the
return address for the frame COUNT steps up from the current
diff --git a/gcc/defaults.h b/gcc/defaults.h
index 5cef92c..1d54798 100644
--- a/gcc/defaults.h
+++ b/gcc/defaults.h
@@ -1095,6 +1095,10 @@ see the files COPYING3 and COPYING.RUNTIME respectively. 
 If not, see
 #define FRAME_GROWS_DOWNWARD 0
 #endif
 
+#ifndef RETURN_ADDR_IN_PREVIOUS_FRAME
+#define RETURN_ADDR_IN_PREVIOUS_FRAME 0
+#endif
+
 /* On most machines, the CFA coincides with the first incoming parm.  */
 #ifndef ARG_POINTER_CFA_OFFSET
 #define ARG_POINTER_CFA_OFFSET(FNDECL) \
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 16d5df7..8d6dfbc 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -2650,7 +2650,7 @@ A C expression whose value is RTL representing the value 
of the return
 address for the frame @var{count} steps up from the current frame, after
 the prologue.  @var{frameaddr} is the frame pointer of the @var{count}
 frame, or the frame pointer of the @var{count} @minus{} 1 frame if
-@code{RETURN_ADDR_IN_PREVIOUS_FRAME} is defined.
+@code{RETURN_ADDR_IN_PREVIOUS_FRAME} is nonzero.
 
 The value of the expression must always be the correct address when
 @var{count} is zero, but may be @code{NULL_RTX} if there is no way to
@@ -2658,8 +2658,9 @@ determine the return address of other frames.
 @end defmac
 
 @defmac RETURN_ADDR_IN_PREVIOUS_FRAME
-Define this if the return address of a particular stack frame is accessed
-from the frame pointer of the previous stack frame.
+Define this macro to nonzero value if the return address of a particular
+stack frame is accessed from the frame pointer of the previous stack
+frame.  The zero default for this macro is suitable for most ports.
 @end defmac
 
 @defmac INCOMING_RETURN_ADDR_RTX
-- 
1.8.1.4

Re: [PATCH] Turn RETURN_ADDR_IN_PREVIOUS_FRAME into C expression

[Max Filippov]

On Tue, Mar 3, 2015 at 5:51 PM, Richard Henderson  wrote:
> On 03/02/2015 10:42 PM, Max Filippov wrote:
>> gcc/
>>   * builtins.c (expand_builtin_return_addr): Add
>>   RETURN_ADDR_IN_PREVIOUS_FRAME to 'if' condition, remove
>>   surrounding #ifdef.
>>   * config/sparc/sparc.h (RETURN_ADDR_IN_PREVIOUS_FRAME): Change
>>   definition to 1.
>>   * config/xtensa/xtensa.h (RETURN_ADDR_IN_PREVIOUS_FRAME):
>>   Likewise.
>>   * defaults.h (RETURN_ADDR_IN_PREVIOUS_FRAME): Define to 0 if
>>   undefined.
>>   doc/tm.texi.in (RETURN_ADDR_IN_PREVIOUS_FRAME): Update
>>   paragraph.
>
> Ok.

Applied to trunk. Thanks!

-- Max

Re: [PATCH] Turn RETURN_ADDR_IN_PREVIOUS_FRAME into C expression

[Max Filippov]

On Tue, Mar 3, 2015 at 6:52 PM, H.J. Lu  wrote:
> On Tue, Mar 3, 2015 at 7:05 AM, Max Filippov  wrote:
>> On Tue, Mar 3, 2015 at 5:51 PM, Richard Henderson  wrote:
>>> On 03/02/2015 10:42 PM, Max Filippov wrote:
>>>> gcc/
>>>>   * builtins.c (expand_builtin_return_addr): Add
>>>>   RETURN_ADDR_IN_PREVIOUS_FRAME to 'if' condition, remove
>>>>   surrounding #ifdef.
>>>>   * config/sparc/sparc.h (RETURN_ADDR_IN_PREVIOUS_FRAME): Change
>>>>   definition to 1.
>>>>   * config/xtensa/xtensa.h (RETURN_ADDR_IN_PREVIOUS_FRAME):
>>>>   Likewise.
>>>>   * defaults.h (RETURN_ADDR_IN_PREVIOUS_FRAME): Define to 0 if
>>>>   undefined.
>>>>   doc/tm.texi.in (RETURN_ADDR_IN_PREVIOUS_FRAME): Update
>>>>   paragraph.
>>>
>>> Ok.
>>
>> Applied to trunk. Thanks!
>>
>
> I checked in this to fix bootstrap.
>
> Index: ChangeLog
> =======
> --- ChangeLog (revision 221150)
> +++ ChangeLog (working copy)
> @@ -1,3 +1,7 @@
> +2015-03-03  H.J. Lu  
> +
> + * doc/tm.texi: Regenerated.
> +

Oops. Sorry about that.

-- 
Thanks.
-- Max

Re: [RFC 2/2] Implement call0 ABI for xtensa

[Max Filippov]

On Tue, Mar 3, 2015 at 7:13 PM, augustine.sterl...@gmail.com
 wrote:
> On Sat, Feb 28, 2015 at 10:14 AM, Max Filippov  wrote:
>> call0 is an ABI that doesn't use register windows.
>
> This is OK for xtensa.

Applied to trunk. Thanks!

-- Max

[PATCH] xtensa: implement trap pattern

[Max Filippov]

gcc/
* config/xtensa/xtensa.h (TARGET_DEBUG): New definition.
* config/xtensa/xtensa.md (define_attr "type"): New type "trap".
(define_insn "trap"): New definition.
---
 gcc/config/xtensa/xtensa.h  |  1 +
 gcc/config/xtensa/xtensa.md | 15 ++-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index 011411c..584080b 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -67,6 +67,7 @@ extern unsigned xtensa_current_frame_size;
 #define TARGET_THREADPTR   XCHAL_HAVE_THREADPTR
 #define TARGET_LOOPS   XCHAL_HAVE_LOOPS
 #define TARGET_WINDOWED_ABI(XSHAL_ABI == XTHAL_ABI_WINDOWED)
+#define TARGET_DEBUG   XCHAL_HAVE_DEBUG
 
 #define TARGET_DEFAULT \
   ((XCHAL_HAVE_L32R? 0 : MASK_CONST16) |   \
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 6d84384..fed7586 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -86,7 +86,7 @@
 ;; Attributes.
 
 (define_attr "type"
-  
"unknown,jump,call,load,store,move,arith,multi,nop,farith,fmadd,fconv,fload,fstore,mul16,mul32,div32,mac16,rsr,wsr,entry"
+  
"unknown,jump,call,load,store,move,arith,multi,nop,farith,fmadd,fconv,fload,fstore,mul16,mul32,div32,mac16,rsr,wsr,entry,trap"
   (const_string "unknown"))
 
 (define_attr "mode"
@@ -1764,6 +1764,19 @@
   [(set_attr "length" "0")
(set_attr "type" "nop")])
 
+(define_insn "trap"
+  [(trap_if (const_int 1) (const_int 0))]
+  ""
+{
+  if (TARGET_DEBUG)
+return (TARGET_DENSITY ? "break.n\t0" : "break\t0, 0");
+  else
+return (TARGET_DENSITY ? "ill.n" : "ill");
+}
+  [(set_attr "type""trap")
+   (set_attr "mode""none")
+   (set_attr "length"  "3")])
+
 ;; Setting up a frame pointer is tricky for Xtensa because GCC doesn't
 ;; know if a frame pointer is required until the reload pass, and
 ;; because there may be an incoming argument value in the hard frame
-- 
1.8.1.4

[PATCH v2] xtensa: implement trap pattern

[Max Filippov]

gcc/
* config/xtensa/xtensa.h (TARGET_DEBUG): New definition.
* config/xtensa/xtensa.md (define_attr "type"): New type "trap".
(define_insn "trap"): New definition.
---
Changes v1->v2:
- drop break.n, replace break 0, 0 with break 1, 15, coded breakpoint
  that transfers control to debugger if present.

 gcc/config/xtensa/xtensa.h  |  1 +
 gcc/config/xtensa/xtensa.md | 15 ++-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index 011411c..584080b 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -67,6 +67,7 @@ extern unsigned xtensa_current_frame_size;
 #define TARGET_THREADPTR   XCHAL_HAVE_THREADPTR
 #define TARGET_LOOPS   XCHAL_HAVE_LOOPS
 #define TARGET_WINDOWED_ABI(XSHAL_ABI == XTHAL_ABI_WINDOWED)
+#define TARGET_DEBUG   XCHAL_HAVE_DEBUG
 
 #define TARGET_DEFAULT \
   ((XCHAL_HAVE_L32R? 0 : MASK_CONST16) |   \
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 6d84384..a577aa3 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -86,7 +86,7 @@
 ;; Attributes.
 
 (define_attr "type"
-  
"unknown,jump,call,load,store,move,arith,multi,nop,farith,fmadd,fconv,fload,fstore,mul16,mul32,div32,mac16,rsr,wsr,entry"
+  
"unknown,jump,call,load,store,move,arith,multi,nop,farith,fmadd,fconv,fload,fstore,mul16,mul32,div32,mac16,rsr,wsr,entry,trap"
   (const_string "unknown"))
 
 (define_attr "mode"
@@ -1764,6 +1764,19 @@
   [(set_attr "length" "0")
(set_attr "type" "nop")])
 
+(define_insn "trap"
+  [(trap_if (const_int 1) (const_int 0))]
+  ""
+{
+  if (TARGET_DEBUG)
+return "break\t1, 15";
+  else
+return (TARGET_DENSITY ? "ill.n" : "ill");
+}
+  [(set_attr "type""trap")
+   (set_attr "mode""none")
+   (set_attr "length"  "3")])
+
 ;; Setting up a frame pointer is tricky for Xtensa because GCC doesn't
 ;; know if a frame pointer is required until the reload pass, and
 ;; because there may be an incoming argument value in the hard frame
-- 
1.8.1.4

Re: [PATCH v2] xtensa: implement trap pattern

[Max Filippov]

On Wed, Jun 10, 2015 at 5:37 PM, augustine.sterl...@gmail.com
 wrote:
> On Tue, Jun 9, 2015 at 3:14 PM, Max Filippov  wrote:
>> gcc/
>> * config/xtensa/xtensa.h (TARGET_DEBUG): New definition.
>> * config/xtensa/xtensa.md (define_attr "type"): New type "trap".
>> (define_insn "trap"): New definition.
>> ---
>> Changes v1->v2:
>> - drop break.n, replace break 0, 0 with break 1, 15, coded breakpoint
>>   that transfers control to debugger if present.
>
> This is OK for xtensa. Please apply.

Applied to trunk. Thanks!

-- Max

[PATCH] xtensa: align data naturally when optimizing for size

[Max Filippov]

gcc for xtensa always aligns data at least to a word boundary, even when
it has smaller natural alignment. This results in unexpectedly high data
section sizes and unreasonable amount of wasted space when linking
objects compiled with -fdata-sections flag.

Align data naturally when optimization for size is enabled.

2015-02-22  Max Filippov  

gcc/
* config/xtensa/xtensa.h (CONSTANT_ALIGNMENT, DATA_ALIGNMENT):
use natural alignment when optimizing for size.
---
 gcc/config/xtensa/xtensa.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index 0de072b..74ca240 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -174,7 +174,8 @@ extern unsigned xtensa_current_frame_size;
constants to be word aligned so that 'strcpy' calls that copy
constants can be done inline.  */
 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
-  ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR)   \
+  (!optimize_size &&   \
+   (TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR)   \
&& (ALIGN) < BITS_PER_WORD  \
? BITS_PER_WORD \
: (ALIGN))
@@ -186,7 +187,7 @@ extern unsigned xtensa_current_frame_size;
that copy constants to character arrays can be done inline.  */
 #undef DATA_ALIGNMENT
 #define DATA_ALIGNMENT(TYPE, ALIGN)\
-  ALIGN) < BITS_PER_WORD)  \
+  (!optimize_size && (((ALIGN) < BITS_PER_WORD)
\
 && (TREE_CODE (TYPE) == ARRAY_TYPE \
|| TREE_CODE (TYPE) == UNION_TYPE   \
|| TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
-- 
1.8.1.4

Re: [PATCH] Fix PR84521

[Max Filippov]

Hello,

On Mon, Jun 17, 2019 at 6:10 PM Jeff Law  wrote:
> On 6/17/19 6:58 PM, Wilco Dijkstra wrote:
> >> You mention that arm, mips and xtensa are still broken.  Are they worse
> >> after this patch?

The testcase from the patch passes with the trunk xtensa-linux-gcc
with windowed ABI. But with the changes in this patch a lot of tests
that use longjmp are failing on xtensa-linux.

> >> I think xtensa has two abis and the frame pointer is different across
> >> them.  Presumably a longjmp from one abi to the other isn't valid.

call0 and windowed ABI xtensa code are not supposed to work together.

-- 
Thanks.
-- Max

[PATCH] xtensa: fix PR target/90922

[Max Filippov]

Stack pointer adjustment code in prologue missed a case of no
callee-saved registers and a stack frame size bigger than 128 bytes.
Handle that case.

This fixes the following gcc tests with call0 ABI:
  gcc.c-torture/execute/stdarg-2.c
  gcc.dg/torture/pr55882.c
  gcc.dg/torture/pr57569.c

2019-06-18  Max Filippov  
gcc/
* config/xtensa/xtensa.c (xtensa_expand_prologue): Add stack
pointer adjustment for the case of no callee-saved registers and
stack frame bigger than 128 bytes.
---
 gcc/config/xtensa/xtensa.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 19bd616d67f6..ee5612441e25 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -2865,7 +2865,8 @@ xtensa_expand_prologue (void)
gen_rtx_SET (mem, reg));
}
}
-  if (total_size > 1024)
+  if (total_size > 1024
+ || (!callee_save_size && total_size > 128))
{
  rtx tmp_reg = gen_rtx_REG (Pmode, A9_REG);
  emit_move_insn (tmp_reg, GEN_INT (total_size -
-- 
2.11.0

Re: [PATCH] xtensa: fix PR target/90922

[Max Filippov]

On Tue, Jun 18, 2019 at 3:09 PM augustine.sterl...@gmail.com
 wrote:
>
> On Tue, Jun 18, 2019 at 2:27 PM Max Filippov  wrote:
> >
> > Stack pointer adjustment code in prologue missed a case of no
> > callee-saved registers and a stack frame size bigger than 128 bytes.
> > Handle that case.
> >
> > This fixes the following gcc tests with call0 ABI:
> >   gcc.c-torture/execute/stdarg-2.c
> >   gcc.dg/torture/pr55882.c
> >   gcc.dg/torture/pr57569.c
>
> Approved, please apply.

Thanks. Applied to trunk.
I'll backport it later to gcc-7..9 branches.

-- 
Thanks.
-- Max

Re: [PATCH] Fix PR84521

[Max Filippov]

On Tue, Jun 18, 2019 at 10:07 AM Wilco Dijkstra  wrote:
> > The testcase from the patch passes with the trunk xtensa-linux-gcc
> > with windowed ABI. But with the changes in this patch a lot of tests
> > that use longjmp are failing on xtensa-linux.
>
> Interesting. I looked at the _xtensa_nonlocal_goto implementation in
> libgcc/config/xtensa/lib2funcs.S, and it should work fine given it already
> checks for the frame pointer to be within the bounds of a frame.

It would work if a frame pointer was initialized in the function test, but
it wasn't:

test:
entry   sp, 64
l32ra2, .LC1
memw
l32i.n  a2, a2, 0
memw
s32i.n  a2, sp, 20
s32i.n  a7, sp, 0<
l32ra2, .LC2
s32i.n  a2, sp, 4

original version stored the sp there.

-- 
Thanks.
-- Max

Re: [PATCH] Fix PR84521

[Max Filippov]

On Tue, Jun 18, 2019 at 4:53 PM Wilco Dijkstra  wrote:
> > It would work if a frame pointer was initialized in the function test, but
> > it wasn't:
>
> Right, because it unwinds, it needs a valid frame pointer since we no
> longer store the stack pointer. So xtensa_frame_pointer_required
> should do something like:
>
>   if (cfun->machine->accesses_prev_frame || cfun->has_nonlocal_label)
> return true;

You're right, with this change things are back to normal.

-- 
Thanks.
-- Max

[PATCH] PR target/86814

[Max Filippov]

Xtensa architecture is not affected by speculation.

gcc/
2018-12-30  Max Filippov  

* config/xtensa/xtensa.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
---
 gcc/config/xtensa/xtensa.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 080bb4ad765d..34e85dcc164a 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -331,6 +331,9 @@ static unsigned HOST_WIDE_INT xtensa_asan_shadow_offset 
(void);
 #undef TARGET_ASAN_SHADOW_OFFSET
 #define TARGET_ASAN_SHADOW_OFFSET xtensa_asan_shadow_offset
 
+#undef TARGET_HAVE_SPECULATION_SAFE_VALUE
+#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 
-- 
2.11.0

Re: [PATCH] PR target/86814

[Max Filippov]

On Sun, Dec 30, 2018 at 8:06 PM augustine.sterl...@gmail.com
 wrote:
> On Sun, Dec 30, 2018 at 1:06 AM Max Filippov  wrote:
> > Xtensa architecture is not affected by speculation.
> >
> > gcc/
> > 2018-12-30  Max Filippov  
> >
> > * config/xtensa/xtensa.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
> > Define to speculation_safe_value_not_needed.
>
> Approved.

Applied to trunk.
Thank you and happy New Year!

-- Max

Re: [PATCH] xtensa: fix PR target/90922

[Max Filippov]

On Tue, Jun 18, 2019 at 3:23 PM Max Filippov  wrote:
>
> On Tue, Jun 18, 2019 at 3:09 PM augustine.sterl...@gmail.com
>  wrote:
> >
> > On Tue, Jun 18, 2019 at 2:27 PM Max Filippov  wrote:
> > >
> > > Stack pointer adjustment code in prologue missed a case of no
> > > callee-saved registers and a stack frame size bigger than 128 bytes.
> > > Handle that case.
> > >
> > > This fixes the following gcc tests with call0 ABI:
> > >   gcc.c-torture/execute/stdarg-2.c
> > >   gcc.dg/torture/pr55882.c
> > >   gcc.dg/torture/pr57569.c
> >
> > Approved, please apply.
>
> Thanks. Applied to trunk.
> I'll backport it later to gcc-7..9 branches.

I've committed the backported versions to gcc-7..9 branches.

-- 
Thanks.
-- Max

[PATCH] gcc: xtensa: don't force PIC for uclinux target

[Max Filippov]

xtensa-uclinux uses bFLT executable file format that cannot relocate
fields representing offsets from data to code. C++ objects built as PIC
use offsets to encode FDE structures. As a result C++ exception handling
doesn't work correctly on xtensa-uclinux. Don't use PIC by default on
xtensa-uclinux.

gcc/
2018-11-04  Max Filippov  

* config/xtensa/uclinux.h (XTENSA_ALWAYS_PIC): Change to 0.
---
 gcc/config/xtensa/uclinux.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/xtensa/uclinux.h b/gcc/config/xtensa/uclinux.h
index ba26187c8f7a..1cb334919c7c 100644
--- a/gcc/config/xtensa/uclinux.h
+++ b/gcc/config/xtensa/uclinux.h
@@ -60,7 +60,7 @@ along with GCC; see the file COPYING3.  If not see
 #define LOCAL_LABEL_PREFIX "."
 
 /* Always enable "-fpic" for Xtensa Linux.  */
-#define XTENSA_ALWAYS_PIC 1
+#define XTENSA_ALWAYS_PIC 0
 
 #undef TARGET_LIBC_HAS_FUNCTION
 #define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function
-- 
2.11.0

[PATCH v2] gcc: xtensa: don't force PIC for uclinux target

[Max Filippov]

xtensa-uclinux uses bFLT executable file format that cannot relocate
fields representing offsets from data to code. C++ objects built as PIC
use offsets to encode FDE structures. As a result C++ exception handling
doesn't work correctly on xtensa-uclinux. Don't use PIC by default on
xtensa-uclinux.

gcc/
2018-11-04  Max Filippov  

* config/xtensa/uclinux.h (XTENSA_ALWAYS_PIC): Change to 0.
---
Changes v1->v2:
- fix up comment for the XTENSA_ALWAYS_PIC macro

 gcc/config/xtensa/uclinux.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/xtensa/uclinux.h b/gcc/config/xtensa/uclinux.h
index ba26187c8f7a..c7743df9d97c 100644
--- a/gcc/config/xtensa/uclinux.h
+++ b/gcc/config/xtensa/uclinux.h
@@ -59,8 +59,8 @@ along with GCC; see the file COPYING3.  If not see
 #undef LOCAL_LABEL_PREFIX
 #define LOCAL_LABEL_PREFIX "."
 
-/* Always enable "-fpic" for Xtensa Linux.  */
-#define XTENSA_ALWAYS_PIC 1
+/* Don't enable "-fpic" for Xtensa uclinux.  */
+#define XTENSA_ALWAYS_PIC 0
 
 #undef TARGET_LIBC_HAS_FUNCTION
 #define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function
-- 
2.11.0

Re: [PATCH v2] gcc: xtensa: don't force PIC for uclinux target

[Max Filippov]

On Mon, Nov 5, 2018 at 3:18 PM augustine.sterl...@gmail.com
 wrote:
>
> On Mon, Nov 5, 2018 at 11:07 AM Max Filippov  wrote:
>>
>> xtensa-uclinux uses bFLT executable file format that cannot relocate
>> fields representing offsets from data to code. C++ objects built as PIC
>> use offsets to encode FDE structures. As a result C++ exception handling
>> doesn't work correctly on xtensa-uclinux. Don't use PIC by default on
>> xtensa-uclinux.
>>
>> gcc/
>> 2018-11-04  Max Filippov  
>>
>> * config/xtensa/uclinux.h (XTENSA_ALWAYS_PIC): Change to 0.
>
> Approved.

Thanks! Applied to trunk. Will also backport it to gcc-8, gcc-7 and
gcc-6 branches.

-- Max

[PATCH] gcc: move assemble_start_function / assemble_end_function to output_mi_thunk

[Max Filippov]

Let backends call assemble_start_function after they have generated
thunk function body so that a constant pool could be output if it is
required. This may help backends to avoid implementing custom constant
loading code specifically for the MI thunk and reuse existing
functionality.

gcc/
2019-01-08  Max Filippov  

* cgraphunit.c (cgraph_node::expand_thunk): Remove
assemble_start_function and assemble_end_function calls.
* config/alpha/alpha.c (alpha_output_mi_thunk_osf): Call
assemble_start_function and assemble_end_function.
* config/arc/arc.c (arc_output_mi_thunk): Likewise.
* config/arm/arm.c (arm_output_mi_thunk): Likewise.
* config/bfin/bfin.c (bfin_output_mi_thunk): Likewise.
* config/c6x/c6x.c (c6x_output_mi_thunk): Likewise.
* config/cris/cris.c (cris_asm_output_mi_thunk): Likewise.
* config/csky/csky.c (csky_output_mi_thunk): Likewise.
* config/epiphany/epiphany.c (epiphany_output_mi_thunk): Likewise.
* config/frv/frv.c (frv_asm_output_mi_thunk): Likewise.
* config/i386/i386.c (x86_output_mi_thunk): Likewise.
* config/ia64/ia64.c (ia64_output_mi_thunk): Likewise.
* config/m68k/m68k.c (m68k_output_mi_thunk): Likewise.
* config/microblaze/microblaze.c (microblaze_asm_output_mi_thunk):
Likewise.
* config/mips/mips.c (mips_output_mi_thunk): Likewise.
* config/mmix/mmix.c (mmix_asm_output_mi_thunk): Likewise.
* config/mn10300/mn10300.c (mn10300_asm_output_mi_thunk): Likewise.
* config/nds32/nds32.c (nds32_asm_output_mi_thunk): Likewise.
* config/nios2/nios2.c (nios2_asm_output_mi_thunk): Likewise.
* config/or1k/or1k.c (or1k_output_mi_thunk): Likewise.
* config/pa/pa.c (pa_asm_output_mi_thunk): Likewise.
* config/riscv/riscv.c (riscv_output_mi_thunk): Likewise.
* config/rs6000/rs6000.c (rs6000_output_mi_thunk): Likewise.
* config/s390/s390.c (s390_output_mi_thunk): Likewise.
* config/sh/sh.c (sh_output_mi_thunk): Likewise.
* config/sparc/sparc.c (sparc_output_mi_thunk): Likewise.
* config/spu/spu.c (spu_output_mi_thunk): Likewise.
* config/stormy16/stormy16.c (xstormy16_asm_output_mi_thunk):
Likewise.
* config/tilegx/tilegx.c (tilegx_output_mi_thunk): Likewise.
* config/tilepro/tilepro.c (tilepro_asm_output_mi_thunk): Likewise.
* config/vax/vax.c (vax_output_mi_thunk): Likewise.
---

Bootstrapped/regtested on x86_64-pc-linux-gnu, no new regressions.

Build tested for the following targets:
alpha-linux-gnu, arc-elf, arm-linux-gnueabi, bfin-elf, c6x-elf, cris-elf,
csky-elf, epiphany-elf, frv-elf, ia64-elf, m68k-elf, microblaze-elf,
mips-elf, mmix-knuth-mmixware, mn10300-elf, nds32-elf, nios2-elf,
or1k-elf, parisc-elf, riscv-elf, ppc-elf, s390-linux-gnu, sh-elf,
sparc-elf, spu-elf, xstormy16-elf, tilegx-linux-gnu, tilepro-linux-gnu,
vax-linux-gnu

OK for trunk?

 gcc/cgraphunit.c   | 4 
 gcc/config/alpha/alpha.c   | 3 +++
 gcc/config/arc/arc.c   | 4 
 gcc/config/arm/arm.c   | 4 
 gcc/config/bfin/bfin.c | 3 +++
 gcc/config/c6x/c6x.c   | 3 +++
 gcc/config/cris/cris.c | 4 
 gcc/config/csky/csky.c | 3 +++
 gcc/config/epiphany/epiphany.c | 3 +++
 gcc/config/frv/frv.c   | 4 
 gcc/config/i386/i386.c | 5 -
 gcc/config/ia64/ia64.c | 3 +++
 gcc/config/m68k/m68k.c | 3 +++
 gcc/config/microblaze/microblaze.c | 3 +++
 gcc/config/mips/mips.c | 3 +++
 gcc/config/mmix/mmix.c | 6 +-
 gcc/config/mn10300/mn10300.c   | 3 +++
 gcc/config/nds32/nds32.c   | 3 +++
 gcc/config/nios2/nios2.c   | 3 +++
 gcc/config/or1k/or1k.c | 5 -
 gcc/config/pa/pa.c | 3 +++
 gcc/config/riscv/riscv.c   | 3 +++
 gcc/config/rs6000/rs6000.c | 3 +++
 gcc/config/s390/s390.c | 3 +++
 gcc/config/sh/sh.c | 3 +++
 gcc/config/sparc/sparc.c   | 3 +++
 gcc/config/spu/spu.c   | 3 +++
 gcc/config/stormy16/stormy16.c | 3 +++
 gcc/config/tilegx/tilegx.c | 3 +++
 gcc/config/tilepro/tilepro.c   | 3 +++
 gcc/config/vax/vax.c   | 4 
 31 files changed, 99 insertions(+), 7 deletions(-)

diff --git a/gcc/cgraphunit.c b/gcc/cgraphunit.c
index 8bfbd0bb12f3..325cefad8366 100644
--- a/gcc/cgraphunit.c
+++ b/gcc/cgraphunit.c
@@ -1790,7 +1790,6 @@ cgraph_node::expand_thunk (bool output_asm_thunks, bool 
force_gimple_thunk)
   && targetm.asm_out.can_output_mi_thunk (thunk_fndecl, fixed_offset,
  virtual_value, alias))
 {
-  const char *fnname;
   tree fn_block;
   tree restype = TREE_TYPE (TREE_TYPE (thunk_fndecl));
 
@@ -1814,7 +1813,6 @@ cgraph_node::expand_thunk (bool output_asm_thun